ide-iops.c revision 3ceca727fe3a38dd8d7a3adf938fefda83eee8af
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat <alan@redhat.com> 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/ide.h> 22#include <linux/bitops.h> 23#include <linux/nmi.h> 24 25#include <asm/byteorder.h> 26#include <asm/irq.h> 27#include <asm/uaccess.h> 28#include <asm/io.h> 29 30/* 31 * Conventional PIO operations for ATA devices 32 */ 33 34static u8 ide_inb (unsigned long port) 35{ 36 return (u8) inb(port); 37} 38 39static void ide_outb (u8 val, unsigned long port) 40{ 41 outb(val, port); 42} 43 44/* 45 * MMIO operations, typically used for SATA controllers 46 */ 47 48static u8 ide_mm_inb (unsigned long port) 49{ 50 return (u8) readb((void __iomem *) port); 51} 52 53static void ide_mm_outb (u8 value, unsigned long port) 54{ 55 writeb(value, (void __iomem *) port); 56} 57 58void SELECT_DRIVE (ide_drive_t *drive) 59{ 60 ide_hwif_t *hwif = drive->hwif; 61 const struct ide_port_ops *port_ops = hwif->port_ops; 62 ide_task_t task; 63 64 if (port_ops && port_ops->selectproc) 65 port_ops->selectproc(drive); 66 67 memset(&task, 0, sizeof(task)); 68 task.tf_flags = IDE_TFLAG_OUT_DEVICE; 69 70 drive->hwif->tp_ops->tf_load(drive, &task); 71} 72 73void SELECT_MASK(ide_drive_t *drive, int mask) 74{ 75 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 76 77 if (port_ops && port_ops->maskproc) 78 port_ops->maskproc(drive, mask); 79} 80 81void ide_exec_command(ide_hwif_t *hwif, u8 cmd) 82{ 83 if (hwif->host_flags & IDE_HFLAG_MMIO) 84 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr); 85 else 86 outb(cmd, hwif->io_ports.command_addr); 87} 88EXPORT_SYMBOL_GPL(ide_exec_command); 89 90u8 ide_read_status(ide_hwif_t *hwif) 91{ 92 if (hwif->host_flags & IDE_HFLAG_MMIO) 93 return readb((void __iomem *)hwif->io_ports.status_addr); 94 else 95 return inb(hwif->io_ports.status_addr); 96} 97EXPORT_SYMBOL_GPL(ide_read_status); 98 99u8 ide_read_altstatus(ide_hwif_t *hwif) 100{ 101 if (hwif->host_flags & IDE_HFLAG_MMIO) 102 return readb((void __iomem *)hwif->io_ports.ctl_addr); 103 else 104 return inb(hwif->io_ports.ctl_addr); 105} 106EXPORT_SYMBOL_GPL(ide_read_altstatus); 107 108u8 ide_read_sff_dma_status(ide_hwif_t *hwif) 109{ 110 if (hwif->host_flags & IDE_HFLAG_MMIO) 111 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); 112 else 113 return inb(hwif->dma_base + ATA_DMA_STATUS); 114} 115EXPORT_SYMBOL_GPL(ide_read_sff_dma_status); 116 117void ide_set_irq(ide_hwif_t *hwif, int on) 118{ 119 u8 ctl = ATA_DEVCTL_OBS; 120 121 if (on == 4) { /* hack for SRST */ 122 ctl |= 4; 123 on &= ~4; 124 } 125 126 ctl |= on ? 0 : 2; 127 128 if (hwif->host_flags & IDE_HFLAG_MMIO) 129 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); 130 else 131 outb(ctl, hwif->io_ports.ctl_addr); 132} 133EXPORT_SYMBOL_GPL(ide_set_irq); 134 135void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 136{ 137 ide_hwif_t *hwif = drive->hwif; 138 struct ide_io_ports *io_ports = &hwif->io_ports; 139 struct ide_taskfile *tf = &task->tf; 140 void (*tf_outb)(u8 addr, unsigned long port); 141 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 142 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 143 144 if (mmio) 145 tf_outb = ide_mm_outb; 146 else 147 tf_outb = ide_outb; 148 149 if (task->tf_flags & IDE_TFLAG_FLAGGED) 150 HIHI = 0xFF; 151 152 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 153 u16 data = (tf->hob_data << 8) | tf->data; 154 155 if (mmio) 156 writew(data, (void __iomem *)io_ports->data_addr); 157 else 158 outw(data, io_ports->data_addr); 159 } 160 161 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 162 tf_outb(tf->hob_feature, io_ports->feature_addr); 163 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 164 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 165 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 166 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 167 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 168 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 169 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 170 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 171 172 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 173 tf_outb(tf->feature, io_ports->feature_addr); 174 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 175 tf_outb(tf->nsect, io_ports->nsect_addr); 176 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 177 tf_outb(tf->lbal, io_ports->lbal_addr); 178 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 179 tf_outb(tf->lbam, io_ports->lbam_addr); 180 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 181 tf_outb(tf->lbah, io_ports->lbah_addr); 182 183 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 184 tf_outb((tf->device & HIHI) | drive->select.all, 185 io_ports->device_addr); 186} 187EXPORT_SYMBOL_GPL(ide_tf_load); 188 189void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 190{ 191 ide_hwif_t *hwif = drive->hwif; 192 struct ide_io_ports *io_ports = &hwif->io_ports; 193 struct ide_taskfile *tf = &task->tf; 194 void (*tf_outb)(u8 addr, unsigned long port); 195 u8 (*tf_inb)(unsigned long port); 196 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 197 198 if (mmio) { 199 tf_outb = ide_mm_outb; 200 tf_inb = ide_mm_inb; 201 } else { 202 tf_outb = ide_outb; 203 tf_inb = ide_inb; 204 } 205 206 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 207 u16 data; 208 209 if (mmio) 210 data = readw((void __iomem *)io_ports->data_addr); 211 else 212 data = inw(io_ports->data_addr); 213 214 tf->data = data & 0xff; 215 tf->hob_data = (data >> 8) & 0xff; 216 } 217 218 /* be sure we're looking at the low order bits */ 219 tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr); 220 221 if (task->tf_flags & IDE_TFLAG_IN_FEATURE) 222 tf->feature = tf_inb(io_ports->feature_addr); 223 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 224 tf->nsect = tf_inb(io_ports->nsect_addr); 225 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 226 tf->lbal = tf_inb(io_ports->lbal_addr); 227 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 228 tf->lbam = tf_inb(io_ports->lbam_addr); 229 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 230 tf->lbah = tf_inb(io_ports->lbah_addr); 231 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 232 tf->device = tf_inb(io_ports->device_addr); 233 234 if (task->tf_flags & IDE_TFLAG_LBA48) { 235 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr); 236 237 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 238 tf->hob_feature = tf_inb(io_ports->feature_addr); 239 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 240 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 241 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 242 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 243 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 244 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 245 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 246 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 247 } 248} 249EXPORT_SYMBOL_GPL(ide_tf_read); 250 251/* 252 * Some localbus EIDE interfaces require a special access sequence 253 * when using 32-bit I/O instructions to transfer data. We call this 254 * the "vlb_sync" sequence, which consists of three successive reads 255 * of the sector count register location, with interrupts disabled 256 * to ensure that the reads all happen together. 257 */ 258static void ata_vlb_sync(unsigned long port) 259{ 260 (void)inb(port); 261 (void)inb(port); 262 (void)inb(port); 263} 264 265/* 266 * This is used for most PIO data transfers *from* the IDE interface 267 * 268 * These routines will round up any request for an odd number of bytes, 269 * so if an odd len is specified, be sure that there's at least one 270 * extra byte allocated for the buffer. 271 */ 272void ide_input_data(ide_drive_t *drive, struct request *rq, void *buf, 273 unsigned int len) 274{ 275 ide_hwif_t *hwif = drive->hwif; 276 struct ide_io_ports *io_ports = &hwif->io_ports; 277 unsigned long data_addr = io_ports->data_addr; 278 u8 io_32bit = drive->io_32bit; 279 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 280 281 len++; 282 283 if (io_32bit) { 284 unsigned long uninitialized_var(flags); 285 286 if ((io_32bit & 2) && !mmio) { 287 local_irq_save(flags); 288 ata_vlb_sync(io_ports->nsect_addr); 289 } 290 291 if (mmio) 292 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 293 else 294 insl(data_addr, buf, len / 4); 295 296 if ((io_32bit & 2) && !mmio) 297 local_irq_restore(flags); 298 299 if ((len & 3) >= 2) { 300 if (mmio) 301 __ide_mm_insw((void __iomem *)data_addr, 302 (u8 *)buf + (len & ~3), 1); 303 else 304 insw(data_addr, (u8 *)buf + (len & ~3), 1); 305 } 306 } else { 307 if (mmio) 308 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 309 else 310 insw(data_addr, buf, len / 2); 311 } 312} 313EXPORT_SYMBOL_GPL(ide_input_data); 314 315/* 316 * This is used for most PIO data transfers *to* the IDE interface 317 */ 318void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf, 319 unsigned int len) 320{ 321 ide_hwif_t *hwif = drive->hwif; 322 struct ide_io_ports *io_ports = &hwif->io_ports; 323 unsigned long data_addr = io_ports->data_addr; 324 u8 io_32bit = drive->io_32bit; 325 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 326 327 if (io_32bit) { 328 unsigned long uninitialized_var(flags); 329 330 if ((io_32bit & 2) && !mmio) { 331 local_irq_save(flags); 332 ata_vlb_sync(io_ports->nsect_addr); 333 } 334 335 if (mmio) 336 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 337 else 338 outsl(data_addr, buf, len / 4); 339 340 if ((io_32bit & 2) && !mmio) 341 local_irq_restore(flags); 342 343 if ((len & 3) >= 2) { 344 if (mmio) 345 __ide_mm_outsw((void __iomem *)data_addr, 346 (u8 *)buf + (len & ~3), 1); 347 else 348 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 349 } 350 } else { 351 if (mmio) 352 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 353 else 354 outsw(data_addr, buf, len / 2); 355 } 356} 357EXPORT_SYMBOL_GPL(ide_output_data); 358 359u8 ide_read_error(ide_drive_t *drive) 360{ 361 ide_task_t task; 362 363 memset(&task, 0, sizeof(task)); 364 task.tf_flags = IDE_TFLAG_IN_FEATURE; 365 366 drive->hwif->tp_ops->tf_read(drive, &task); 367 368 return task.tf.error; 369} 370EXPORT_SYMBOL_GPL(ide_read_error); 371 372void ide_read_bcount_and_ireason(ide_drive_t *drive, u16 *bcount, u8 *ireason) 373{ 374 ide_task_t task; 375 376 memset(&task, 0, sizeof(task)); 377 task.tf_flags = IDE_TFLAG_IN_LBAH | IDE_TFLAG_IN_LBAM | 378 IDE_TFLAG_IN_NSECT; 379 380 drive->hwif->tp_ops->tf_read(drive, &task); 381 382 *bcount = (task.tf.lbah << 8) | task.tf.lbam; 383 *ireason = task.tf.nsect & 3; 384} 385EXPORT_SYMBOL_GPL(ide_read_bcount_and_ireason); 386 387const struct ide_tp_ops default_tp_ops = { 388 .exec_command = ide_exec_command, 389 .read_status = ide_read_status, 390 .read_altstatus = ide_read_altstatus, 391 .read_sff_dma_status = ide_read_sff_dma_status, 392 393 .set_irq = ide_set_irq, 394 395 .tf_load = ide_tf_load, 396 .tf_read = ide_tf_read, 397 398 .input_data = ide_input_data, 399 .output_data = ide_output_data, 400}; 401 402void ide_fix_driveid(u16 *id) 403{ 404#ifndef __LITTLE_ENDIAN 405# ifdef __BIG_ENDIAN 406 int i; 407 408 for (i = 0; i < 256; i++) 409 id[i] = __le16_to_cpu(id[i]); 410# else 411# error "Please fix <asm/byteorder.h>" 412# endif 413#endif 414} 415 416/* 417 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 418 * removing leading/trailing blanks and compressing internal blanks. 419 * It is primarily used to tidy up the model name/number fields as 420 * returned by the ATA_CMD_ID_ATA[PI] commands. 421 */ 422 423void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 424{ 425 u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */ 426 427 if (byteswap) { 428 /* convert from big-endian to host byte order */ 429 for (p = s ; p != end ; p += 2) 430 be16_to_cpus((u16 *) p); 431 } 432 433 /* strip leading blanks */ 434 p = s; 435 while (s != end && *s == ' ') 436 ++s; 437 /* compress internal blanks and strip trailing blanks */ 438 while (s != end && *s) { 439 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 440 *p++ = *(s-1); 441 } 442 /* wipe out trailing garbage */ 443 while (p != end) 444 *p++ = '\0'; 445} 446 447EXPORT_SYMBOL(ide_fixstring); 448 449/* 450 * Needed for PCI irq sharing 451 */ 452int drive_is_ready (ide_drive_t *drive) 453{ 454 ide_hwif_t *hwif = HWIF(drive); 455 u8 stat = 0; 456 457 if (drive->waiting_for_dma) 458 return hwif->dma_ops->dma_test_irq(drive); 459 460#if 0 461 /* need to guarantee 400ns since last command was issued */ 462 udelay(1); 463#endif 464 465 /* 466 * We do a passive status test under shared PCI interrupts on 467 * cards that truly share the ATA side interrupt, but may also share 468 * an interrupt with another pci card/device. We make no assumptions 469 * about possible isa-pnp and pci-pnp issues yet. 470 */ 471 if (hwif->io_ports.ctl_addr) 472 stat = hwif->tp_ops->read_altstatus(hwif); 473 else 474 /* Note: this may clear a pending IRQ!! */ 475 stat = hwif->tp_ops->read_status(hwif); 476 477 if (stat & ATA_BUSY) 478 /* drive busy: definitely not interrupting */ 479 return 0; 480 481 /* drive ready: *might* be interrupting */ 482 return 1; 483} 484 485EXPORT_SYMBOL(drive_is_ready); 486 487/* 488 * This routine busy-waits for the drive status to be not "busy". 489 * It then checks the status for all of the "good" bits and none 490 * of the "bad" bits, and if all is okay it returns 0. All other 491 * cases return error -- caller may then invoke ide_error(). 492 * 493 * This routine should get fixed to not hog the cpu during extra long waits.. 494 * That could be done by busy-waiting for the first jiffy or two, and then 495 * setting a timer to wake up at half second intervals thereafter, 496 * until timeout is achieved, before timing out. 497 */ 498static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 499{ 500 ide_hwif_t *hwif = drive->hwif; 501 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 502 unsigned long flags; 503 int i; 504 u8 stat; 505 506 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 507 stat = tp_ops->read_status(hwif); 508 509 if (stat & ATA_BUSY) { 510 local_irq_set(flags); 511 timeout += jiffies; 512 while ((stat = tp_ops->read_status(hwif)) & ATA_BUSY) { 513 if (time_after(jiffies, timeout)) { 514 /* 515 * One last read after the timeout in case 516 * heavy interrupt load made us not make any 517 * progress during the timeout.. 518 */ 519 stat = tp_ops->read_status(hwif); 520 if ((stat & ATA_BUSY) == 0) 521 break; 522 523 local_irq_restore(flags); 524 *rstat = stat; 525 return -EBUSY; 526 } 527 } 528 local_irq_restore(flags); 529 } 530 /* 531 * Allow status to settle, then read it again. 532 * A few rare drives vastly violate the 400ns spec here, 533 * so we'll wait up to 10usec for a "good" status 534 * rather than expensively fail things immediately. 535 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 536 */ 537 for (i = 0; i < 10; i++) { 538 udelay(1); 539 stat = tp_ops->read_status(hwif); 540 541 if (OK_STAT(stat, good, bad)) { 542 *rstat = stat; 543 return 0; 544 } 545 } 546 *rstat = stat; 547 return -EFAULT; 548} 549 550/* 551 * In case of error returns error value after doing "*startstop = ide_error()". 552 * The caller should return the updated value of "startstop" in this case, 553 * "startstop" is unchanged when the function returns 0. 554 */ 555int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 556{ 557 int err; 558 u8 stat; 559 560 /* bail early if we've exceeded max_failures */ 561 if (drive->max_failures && (drive->failures > drive->max_failures)) { 562 *startstop = ide_stopped; 563 return 1; 564 } 565 566 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 567 568 if (err) { 569 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 570 *startstop = ide_error(drive, s, stat); 571 } 572 573 return err; 574} 575 576EXPORT_SYMBOL(ide_wait_stat); 577 578/** 579 * ide_in_drive_list - look for drive in black/white list 580 * @id: drive identifier 581 * @table: list to inspect 582 * 583 * Look for a drive in the blacklist and the whitelist tables 584 * Returns 1 if the drive is found in the table. 585 */ 586 587int ide_in_drive_list(u16 *id, const struct drive_list_entry *table) 588{ 589 for ( ; table->id_model; table++) 590 if ((!strcmp(table->id_model, (char *)&id[ATA_ID_PROD])) && 591 (!table->id_firmware || 592 strstr((char *)&id[ATA_ID_FW_REV], table->id_firmware))) 593 return 1; 594 return 0; 595} 596 597EXPORT_SYMBOL_GPL(ide_in_drive_list); 598 599/* 600 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 601 * We list them here and depend on the device side cable detection for them. 602 * 603 * Some optical devices with the buggy firmwares have the same problem. 604 */ 605static const struct drive_list_entry ivb_list[] = { 606 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 607 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 608 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 609 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 610 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 611 { "TSSTcorp CDDVDW SH-S202H" , "SB00" }, 612 { "TSSTcorp CDDVDW SH-S202H" , "SB01" }, 613 { NULL , NULL } 614}; 615 616/* 617 * All hosts that use the 80c ribbon must use! 618 * The name is derived from upper byte of word 93 and the 80c ribbon. 619 */ 620u8 eighty_ninty_three (ide_drive_t *drive) 621{ 622 ide_hwif_t *hwif = drive->hwif; 623 u16 *id = drive->id; 624 int ivb = ide_in_drive_list(id, ivb_list); 625 626 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 627 return 1; 628 629 if (ivb) 630 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 631 drive->name); 632 633 if (ide_dev_is_sata(id) && !ivb) 634 return 1; 635 636 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 637 goto no_80w; 638 639 /* 640 * FIXME: 641 * - change master/slave IDENTIFY order 642 * - force bit13 (80c cable present) check also for !ivb devices 643 * (unless the slave device is pre-ATA3) 644 */ 645 if ((id[ATA_ID_HW_CONFIG] & 0x4000) || 646 (ivb && (id[ATA_ID_HW_CONFIG] & 0x2000))) 647 return 1; 648 649no_80w: 650 if (drive->udma33_warned == 1) 651 return 0; 652 653 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 654 "limiting max speed to UDMA33\n", 655 drive->name, 656 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 657 658 drive->udma33_warned = 1; 659 660 return 0; 661} 662 663int ide_driveid_update(ide_drive_t *drive) 664{ 665 ide_hwif_t *hwif = drive->hwif; 666 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 667 u16 *id; 668 unsigned long flags; 669 u8 stat; 670 671 /* 672 * Re-read drive->id for possible DMA mode 673 * change (copied from ide-probe.c) 674 */ 675 676 SELECT_MASK(drive, 1); 677 tp_ops->set_irq(hwif, 0); 678 msleep(50); 679 tp_ops->exec_command(hwif, ATA_CMD_ID_ATA); 680 681 if (ide_busy_sleep(hwif, WAIT_WORSTCASE, 1)) { 682 SELECT_MASK(drive, 0); 683 return 0; 684 } 685 686 msleep(50); /* wait for IRQ and ATA_DRQ */ 687 stat = tp_ops->read_status(hwif); 688 689 if (!OK_STAT(stat, ATA_DRQ, BAD_R_STAT)) { 690 SELECT_MASK(drive, 0); 691 printk("%s: CHECK for good STATUS\n", drive->name); 692 return 0; 693 } 694 local_irq_save(flags); 695 SELECT_MASK(drive, 0); 696 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 697 if (!id) { 698 local_irq_restore(flags); 699 return 0; 700 } 701 tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); 702 (void)tp_ops->read_status(hwif); /* clear drive IRQ */ 703 local_irq_enable(); 704 local_irq_restore(flags); 705 ide_fix_driveid(id); 706 707 drive->id[ATA_ID_UDMA_MODES] = id[ATA_ID_UDMA_MODES]; 708 drive->id[ATA_ID_MWDMA_MODES] = id[ATA_ID_MWDMA_MODES]; 709 drive->id[ATA_ID_SWDMA_MODES] = id[ATA_ID_SWDMA_MODES]; 710 /* anything more ? */ 711 712 kfree(id); 713 714 if (drive->using_dma && ide_id_dma_bug(drive)) 715 ide_dma_off(drive); 716 717 return 1; 718} 719 720int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 721{ 722 ide_hwif_t *hwif = drive->hwif; 723 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 724 u16 *id = drive->id, i; 725 int error = 0; 726 u8 stat; 727 ide_task_t task; 728 729#ifdef CONFIG_BLK_DEV_IDEDMA 730 if (hwif->dma_ops) /* check if host supports DMA */ 731 hwif->dma_ops->dma_host_set(drive, 0); 732#endif 733 734 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 735 if ((speed & 0xf8) == XFER_PIO_0 && ata_id_has_iordy(drive->id) == 0) 736 goto skip; 737 738 /* 739 * Don't use ide_wait_cmd here - it will 740 * attempt to set_geometry and recalibrate, 741 * but for some reason these don't work at 742 * this point (lost interrupt). 743 */ 744 /* 745 * Select the drive, and issue the SETFEATURES command 746 */ 747 disable_irq_nosync(hwif->irq); 748 749 /* 750 * FIXME: we race against the running IRQ here if 751 * this is called from non IRQ context. If we use 752 * disable_irq() we hang on the error path. Work 753 * is needed. 754 */ 755 756 udelay(1); 757 SELECT_DRIVE(drive); 758 SELECT_MASK(drive, 0); 759 udelay(1); 760 tp_ops->set_irq(hwif, 0); 761 762 memset(&task, 0, sizeof(task)); 763 task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT; 764 task.tf.feature = SETFEATURES_XFER; 765 task.tf.nsect = speed; 766 767 tp_ops->tf_load(drive, &task); 768 769 tp_ops->exec_command(hwif, ATA_CMD_SET_FEATURES); 770 771 if (drive->quirk_list == 2) 772 tp_ops->set_irq(hwif, 1); 773 774 error = __ide_wait_stat(drive, drive->ready_stat, 775 ATA_BUSY | ATA_DRQ | ATA_ERR, 776 WAIT_CMD, &stat); 777 778 SELECT_MASK(drive, 0); 779 780 enable_irq(hwif->irq); 781 782 if (error) { 783 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 784 return error; 785 } 786 787 id[ATA_ID_UDMA_MODES] &= ~0xFF00; 788 id[ATA_ID_MWDMA_MODES] &= ~0x0F00; 789 id[ATA_ID_SWDMA_MODES] &= ~0x0F00; 790 791 skip: 792#ifdef CONFIG_BLK_DEV_IDEDMA 793 if (speed >= XFER_SW_DMA_0 && drive->using_dma) 794 hwif->dma_ops->dma_host_set(drive, 1); 795 else if (hwif->dma_ops) /* check if host supports DMA */ 796 ide_dma_off_quietly(drive); 797#endif 798 799 if (speed >= XFER_UDMA_0) { 800 i = 1 << (speed - XFER_UDMA_0); 801 id[ATA_ID_UDMA_MODES] |= (i << 8 | i); 802 } else if (speed >= XFER_MW_DMA_0) { 803 i = 1 << (speed - XFER_MW_DMA_0); 804 id[ATA_ID_MWDMA_MODES] |= (i << 8 | i); 805 } else if (speed >= XFER_SW_DMA_0) { 806 i = 1 << (speed - XFER_SW_DMA_0); 807 id[ATA_ID_SWDMA_MODES] |= (i << 8 | i); 808 } 809 810 if (!drive->init_speed) 811 drive->init_speed = speed; 812 drive->current_speed = speed; 813 return error; 814} 815 816/* 817 * This should get invoked any time we exit the driver to 818 * wait for an interrupt response from a drive. handler() points 819 * at the appropriate code to handle the next interrupt, and a 820 * timer is started to prevent us from waiting forever in case 821 * something goes wrong (see the ide_timer_expiry() handler later on). 822 * 823 * See also ide_execute_command 824 */ 825static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 826 unsigned int timeout, ide_expiry_t *expiry) 827{ 828 ide_hwgroup_t *hwgroup = HWGROUP(drive); 829 830 BUG_ON(hwgroup->handler); 831 hwgroup->handler = handler; 832 hwgroup->expiry = expiry; 833 hwgroup->timer.expires = jiffies + timeout; 834 hwgroup->req_gen_timer = hwgroup->req_gen; 835 add_timer(&hwgroup->timer); 836} 837 838void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 839 unsigned int timeout, ide_expiry_t *expiry) 840{ 841 unsigned long flags; 842 spin_lock_irqsave(&ide_lock, flags); 843 __ide_set_handler(drive, handler, timeout, expiry); 844 spin_unlock_irqrestore(&ide_lock, flags); 845} 846 847EXPORT_SYMBOL(ide_set_handler); 848 849/** 850 * ide_execute_command - execute an IDE command 851 * @drive: IDE drive to issue the command against 852 * @command: command byte to write 853 * @handler: handler for next phase 854 * @timeout: timeout for command 855 * @expiry: handler to run on timeout 856 * 857 * Helper function to issue an IDE command. This handles the 858 * atomicity requirements, command timing and ensures that the 859 * handler and IRQ setup do not race. All IDE command kick off 860 * should go via this function or do equivalent locking. 861 */ 862 863void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 864 unsigned timeout, ide_expiry_t *expiry) 865{ 866 unsigned long flags; 867 ide_hwif_t *hwif = HWIF(drive); 868 869 spin_lock_irqsave(&ide_lock, flags); 870 __ide_set_handler(drive, handler, timeout, expiry); 871 hwif->tp_ops->exec_command(hwif, cmd); 872 /* 873 * Drive takes 400nS to respond, we must avoid the IRQ being 874 * serviced before that. 875 * 876 * FIXME: we could skip this delay with care on non shared devices 877 */ 878 ndelay(400); 879 spin_unlock_irqrestore(&ide_lock, flags); 880} 881EXPORT_SYMBOL(ide_execute_command); 882 883void ide_execute_pkt_cmd(ide_drive_t *drive) 884{ 885 ide_hwif_t *hwif = drive->hwif; 886 unsigned long flags; 887 888 spin_lock_irqsave(&ide_lock, flags); 889 hwif->tp_ops->exec_command(hwif, ATA_CMD_PACKET); 890 ndelay(400); 891 spin_unlock_irqrestore(&ide_lock, flags); 892} 893EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 894 895static inline void ide_complete_drive_reset(ide_drive_t *drive, int err) 896{ 897 struct request *rq = drive->hwif->hwgroup->rq; 898 899 if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET) 900 ide_end_request(drive, err ? err : 1, 0); 901} 902 903/* needed below */ 904static ide_startstop_t do_reset1 (ide_drive_t *, int); 905 906/* 907 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 908 * during an atapi drive reset operation. If the drive has not yet responded, 909 * and we have not yet hit our maximum waiting time, then the timer is restarted 910 * for another 50ms. 911 */ 912static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 913{ 914 ide_hwif_t *hwif = drive->hwif; 915 ide_hwgroup_t *hwgroup = hwif->hwgroup; 916 u8 stat; 917 918 SELECT_DRIVE(drive); 919 udelay (10); 920 stat = hwif->tp_ops->read_status(hwif); 921 922 if (OK_STAT(stat, 0, ATA_BUSY)) 923 printk("%s: ATAPI reset complete\n", drive->name); 924 else { 925 if (time_before(jiffies, hwgroup->poll_timeout)) { 926 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 927 /* continue polling */ 928 return ide_started; 929 } 930 /* end of polling */ 931 hwgroup->polling = 0; 932 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 933 drive->name, stat); 934 /* do it the old fashioned way */ 935 return do_reset1(drive, 1); 936 } 937 /* done polling */ 938 hwgroup->polling = 0; 939 ide_complete_drive_reset(drive, 0); 940 return ide_stopped; 941} 942 943/* 944 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 945 * during an ide reset operation. If the drives have not yet responded, 946 * and we have not yet hit our maximum waiting time, then the timer is restarted 947 * for another 50ms. 948 */ 949static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 950{ 951 ide_hwgroup_t *hwgroup = HWGROUP(drive); 952 ide_hwif_t *hwif = HWIF(drive); 953 const struct ide_port_ops *port_ops = hwif->port_ops; 954 u8 tmp; 955 int err = 0; 956 957 if (port_ops && port_ops->reset_poll) { 958 err = port_ops->reset_poll(drive); 959 if (err) { 960 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 961 hwif->name, drive->name); 962 goto out; 963 } 964 } 965 966 tmp = hwif->tp_ops->read_status(hwif); 967 968 if (!OK_STAT(tmp, 0, ATA_BUSY)) { 969 if (time_before(jiffies, hwgroup->poll_timeout)) { 970 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 971 /* continue polling */ 972 return ide_started; 973 } 974 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 975 drive->failures++; 976 err = -EIO; 977 } else { 978 printk("%s: reset: ", hwif->name); 979 tmp = ide_read_error(drive); 980 981 if (tmp == 1) { 982 printk("success\n"); 983 drive->failures = 0; 984 } else { 985 drive->failures++; 986 printk("master: "); 987 switch (tmp & 0x7f) { 988 case 1: printk("passed"); 989 break; 990 case 2: printk("formatter device error"); 991 break; 992 case 3: printk("sector buffer error"); 993 break; 994 case 4: printk("ECC circuitry error"); 995 break; 996 case 5: printk("controlling MPU error"); 997 break; 998 default:printk("error (0x%02x?)", tmp); 999 } 1000 if (tmp & 0x80) 1001 printk("; slave: failed"); 1002 printk("\n"); 1003 err = -EIO; 1004 } 1005 } 1006out: 1007 hwgroup->polling = 0; /* done polling */ 1008 ide_complete_drive_reset(drive, err); 1009 return ide_stopped; 1010} 1011 1012static void ide_disk_pre_reset(ide_drive_t *drive) 1013{ 1014 int legacy = (drive->id[ATA_ID_CFS_ENABLE_2] & 0x0400) ? 0 : 1; 1015 1016 drive->special.all = 0; 1017 drive->special.b.set_geometry = legacy; 1018 drive->special.b.recalibrate = legacy; 1019 drive->mult_count = 0; 1020 if (!drive->keep_settings && !drive->using_dma) 1021 drive->mult_req = 0; 1022 if (drive->mult_req != drive->mult_count) 1023 drive->special.b.set_multmode = 1; 1024} 1025 1026static void pre_reset(ide_drive_t *drive) 1027{ 1028 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1029 1030 if (drive->media == ide_disk) 1031 ide_disk_pre_reset(drive); 1032 else 1033 drive->post_reset = 1; 1034 1035 if (drive->using_dma) { 1036 if (drive->crc_count) 1037 ide_check_dma_crc(drive); 1038 else 1039 ide_dma_off(drive); 1040 } 1041 1042 if (!drive->keep_settings) { 1043 if (!drive->using_dma) { 1044 drive->unmask = 0; 1045 drive->io_32bit = 0; 1046 } 1047 return; 1048 } 1049 1050 if (port_ops && port_ops->pre_reset) 1051 port_ops->pre_reset(drive); 1052 1053 if (drive->current_speed != 0xff) 1054 drive->desired_speed = drive->current_speed; 1055 drive->current_speed = 0xff; 1056} 1057 1058/* 1059 * do_reset1() attempts to recover a confused drive by resetting it. 1060 * Unfortunately, resetting a disk drive actually resets all devices on 1061 * the same interface, so it can really be thought of as resetting the 1062 * interface rather than resetting the drive. 1063 * 1064 * ATAPI devices have their own reset mechanism which allows them to be 1065 * individually reset without clobbering other devices on the same interface. 1066 * 1067 * Unfortunately, the IDE interface does not generate an interrupt to let 1068 * us know when the reset operation has finished, so we must poll for this. 1069 * Equally poor, though, is the fact that this may a very long time to complete, 1070 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1071 * we set a timer to poll at 50ms intervals. 1072 */ 1073static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1074{ 1075 unsigned int unit; 1076 unsigned long flags; 1077 ide_hwif_t *hwif; 1078 ide_hwgroup_t *hwgroup; 1079 struct ide_io_ports *io_ports; 1080 const struct ide_tp_ops *tp_ops; 1081 const struct ide_port_ops *port_ops; 1082 1083 spin_lock_irqsave(&ide_lock, flags); 1084 hwif = HWIF(drive); 1085 hwgroup = HWGROUP(drive); 1086 1087 io_ports = &hwif->io_ports; 1088 1089 tp_ops = hwif->tp_ops; 1090 1091 /* We must not reset with running handlers */ 1092 BUG_ON(hwgroup->handler != NULL); 1093 1094 /* For an ATAPI device, first try an ATAPI SRST. */ 1095 if (drive->media != ide_disk && !do_not_try_atapi) { 1096 pre_reset(drive); 1097 SELECT_DRIVE(drive); 1098 udelay (20); 1099 tp_ops->exec_command(hwif, ATA_CMD_DEV_RESET); 1100 ndelay(400); 1101 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1102 hwgroup->polling = 1; 1103 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1104 spin_unlock_irqrestore(&ide_lock, flags); 1105 return ide_started; 1106 } 1107 1108 /* 1109 * First, reset any device state data we were maintaining 1110 * for any of the drives on this interface. 1111 */ 1112 for (unit = 0; unit < MAX_DRIVES; ++unit) 1113 pre_reset(&hwif->drives[unit]); 1114 1115 if (io_ports->ctl_addr == 0) { 1116 spin_unlock_irqrestore(&ide_lock, flags); 1117 ide_complete_drive_reset(drive, -ENXIO); 1118 return ide_stopped; 1119 } 1120 1121 /* 1122 * Note that we also set nIEN while resetting the device, 1123 * to mask unwanted interrupts from the interface during the reset. 1124 * However, due to the design of PC hardware, this will cause an 1125 * immediate interrupt due to the edge transition it produces. 1126 * This single interrupt gives us a "fast poll" for drives that 1127 * recover from reset very quickly, saving us the first 50ms wait time. 1128 * 1129 * TODO: add ->softreset method and stop abusing ->set_irq 1130 */ 1131 /* set SRST and nIEN */ 1132 tp_ops->set_irq(hwif, 4); 1133 /* more than enough time */ 1134 udelay(10); 1135 /* clear SRST, leave nIEN (unless device is on the quirk list) */ 1136 tp_ops->set_irq(hwif, drive->quirk_list == 2); 1137 /* more than enough time */ 1138 udelay(10); 1139 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1140 hwgroup->polling = 1; 1141 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1142 1143 /* 1144 * Some weird controller like resetting themselves to a strange 1145 * state when the disks are reset this way. At least, the Winbond 1146 * 553 documentation says that 1147 */ 1148 port_ops = hwif->port_ops; 1149 if (port_ops && port_ops->resetproc) 1150 port_ops->resetproc(drive); 1151 1152 spin_unlock_irqrestore(&ide_lock, flags); 1153 return ide_started; 1154} 1155 1156/* 1157 * ide_do_reset() is the entry point to the drive/interface reset code. 1158 */ 1159 1160ide_startstop_t ide_do_reset (ide_drive_t *drive) 1161{ 1162 return do_reset1(drive, 0); 1163} 1164 1165EXPORT_SYMBOL(ide_do_reset); 1166 1167/* 1168 * ide_wait_not_busy() waits for the currently selected device on the hwif 1169 * to report a non-busy status, see comments in ide_probe_port(). 1170 */ 1171int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1172{ 1173 u8 stat = 0; 1174 1175 while(timeout--) { 1176 /* 1177 * Turn this into a schedule() sleep once I'm sure 1178 * about locking issues (2.5 work ?). 1179 */ 1180 mdelay(1); 1181 stat = hwif->tp_ops->read_status(hwif); 1182 if ((stat & ATA_BUSY) == 0) 1183 return 0; 1184 /* 1185 * Assume a value of 0xff means nothing is connected to 1186 * the interface and it doesn't implement the pull-down 1187 * resistor on D7. 1188 */ 1189 if (stat == 0xff) 1190 return -ENODEV; 1191 touch_softlockup_watchdog(); 1192 touch_nmi_watchdog(); 1193 } 1194 return -EBUSY; 1195} 1196 1197EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1198 1199