ide-iops.c revision 4dde4492d850a4c9bcaa92e5bd7f4eebe3e2f5ab
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat <alan@redhat.com> 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/hdreg.h> 22#include <linux/ide.h> 23#include <linux/bitops.h> 24#include <linux/nmi.h> 25 26#include <asm/byteorder.h> 27#include <asm/irq.h> 28#include <asm/uaccess.h> 29#include <asm/io.h> 30 31/* 32 * Conventional PIO operations for ATA devices 33 */ 34 35static u8 ide_inb (unsigned long port) 36{ 37 return (u8) inb(port); 38} 39 40static void ide_outb (u8 val, unsigned long port) 41{ 42 outb(val, port); 43} 44 45/* 46 * MMIO operations, typically used for SATA controllers 47 */ 48 49static u8 ide_mm_inb (unsigned long port) 50{ 51 return (u8) readb((void __iomem *) port); 52} 53 54static void ide_mm_outb (u8 value, unsigned long port) 55{ 56 writeb(value, (void __iomem *) port); 57} 58 59void SELECT_DRIVE (ide_drive_t *drive) 60{ 61 ide_hwif_t *hwif = drive->hwif; 62 const struct ide_port_ops *port_ops = hwif->port_ops; 63 ide_task_t task; 64 65 if (port_ops && port_ops->selectproc) 66 port_ops->selectproc(drive); 67 68 memset(&task, 0, sizeof(task)); 69 task.tf_flags = IDE_TFLAG_OUT_DEVICE; 70 71 drive->hwif->tp_ops->tf_load(drive, &task); 72} 73 74void SELECT_MASK(ide_drive_t *drive, int mask) 75{ 76 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 77 78 if (port_ops && port_ops->maskproc) 79 port_ops->maskproc(drive, mask); 80} 81 82void ide_exec_command(ide_hwif_t *hwif, u8 cmd) 83{ 84 if (hwif->host_flags & IDE_HFLAG_MMIO) 85 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr); 86 else 87 outb(cmd, hwif->io_ports.command_addr); 88} 89EXPORT_SYMBOL_GPL(ide_exec_command); 90 91u8 ide_read_status(ide_hwif_t *hwif) 92{ 93 if (hwif->host_flags & IDE_HFLAG_MMIO) 94 return readb((void __iomem *)hwif->io_ports.status_addr); 95 else 96 return inb(hwif->io_ports.status_addr); 97} 98EXPORT_SYMBOL_GPL(ide_read_status); 99 100u8 ide_read_altstatus(ide_hwif_t *hwif) 101{ 102 if (hwif->host_flags & IDE_HFLAG_MMIO) 103 return readb((void __iomem *)hwif->io_ports.ctl_addr); 104 else 105 return inb(hwif->io_ports.ctl_addr); 106} 107EXPORT_SYMBOL_GPL(ide_read_altstatus); 108 109u8 ide_read_sff_dma_status(ide_hwif_t *hwif) 110{ 111 if (hwif->host_flags & IDE_HFLAG_MMIO) 112 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)); 113 else 114 return inb(hwif->dma_base + ATA_DMA_STATUS); 115} 116EXPORT_SYMBOL_GPL(ide_read_sff_dma_status); 117 118void ide_set_irq(ide_hwif_t *hwif, int on) 119{ 120 u8 ctl = ATA_DEVCTL_OBS; 121 122 if (on == 4) { /* hack for SRST */ 123 ctl |= 4; 124 on &= ~4; 125 } 126 127 ctl |= on ? 0 : 2; 128 129 if (hwif->host_flags & IDE_HFLAG_MMIO) 130 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); 131 else 132 outb(ctl, hwif->io_ports.ctl_addr); 133} 134EXPORT_SYMBOL_GPL(ide_set_irq); 135 136void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 137{ 138 ide_hwif_t *hwif = drive->hwif; 139 struct ide_io_ports *io_ports = &hwif->io_ports; 140 struct ide_taskfile *tf = &task->tf; 141 void (*tf_outb)(u8 addr, unsigned long port); 142 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 143 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 144 145 if (mmio) 146 tf_outb = ide_mm_outb; 147 else 148 tf_outb = ide_outb; 149 150 if (task->tf_flags & IDE_TFLAG_FLAGGED) 151 HIHI = 0xFF; 152 153 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 154 u16 data = (tf->hob_data << 8) | tf->data; 155 156 if (mmio) 157 writew(data, (void __iomem *)io_ports->data_addr); 158 else 159 outw(data, io_ports->data_addr); 160 } 161 162 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 163 tf_outb(tf->hob_feature, io_ports->feature_addr); 164 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 165 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 166 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 167 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 168 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 169 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 170 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 171 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 172 173 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 174 tf_outb(tf->feature, io_ports->feature_addr); 175 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 176 tf_outb(tf->nsect, io_ports->nsect_addr); 177 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 178 tf_outb(tf->lbal, io_ports->lbal_addr); 179 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 180 tf_outb(tf->lbam, io_ports->lbam_addr); 181 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 182 tf_outb(tf->lbah, io_ports->lbah_addr); 183 184 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 185 tf_outb((tf->device & HIHI) | drive->select.all, 186 io_ports->device_addr); 187} 188EXPORT_SYMBOL_GPL(ide_tf_load); 189 190void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 191{ 192 ide_hwif_t *hwif = drive->hwif; 193 struct ide_io_ports *io_ports = &hwif->io_ports; 194 struct ide_taskfile *tf = &task->tf; 195 void (*tf_outb)(u8 addr, unsigned long port); 196 u8 (*tf_inb)(unsigned long port); 197 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 198 199 if (mmio) { 200 tf_outb = ide_mm_outb; 201 tf_inb = ide_mm_inb; 202 } else { 203 tf_outb = ide_outb; 204 tf_inb = ide_inb; 205 } 206 207 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 208 u16 data; 209 210 if (mmio) 211 data = readw((void __iomem *)io_ports->data_addr); 212 else 213 data = inw(io_ports->data_addr); 214 215 tf->data = data & 0xff; 216 tf->hob_data = (data >> 8) & 0xff; 217 } 218 219 /* be sure we're looking at the low order bits */ 220 tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr); 221 222 if (task->tf_flags & IDE_TFLAG_IN_FEATURE) 223 tf->feature = tf_inb(io_ports->feature_addr); 224 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 225 tf->nsect = tf_inb(io_ports->nsect_addr); 226 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 227 tf->lbal = tf_inb(io_ports->lbal_addr); 228 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 229 tf->lbam = tf_inb(io_ports->lbam_addr); 230 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 231 tf->lbah = tf_inb(io_ports->lbah_addr); 232 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 233 tf->device = tf_inb(io_ports->device_addr); 234 235 if (task->tf_flags & IDE_TFLAG_LBA48) { 236 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr); 237 238 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 239 tf->hob_feature = tf_inb(io_ports->feature_addr); 240 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 241 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 242 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 243 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 244 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 245 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 246 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 247 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 248 } 249} 250EXPORT_SYMBOL_GPL(ide_tf_read); 251 252/* 253 * Some localbus EIDE interfaces require a special access sequence 254 * when using 32-bit I/O instructions to transfer data. We call this 255 * the "vlb_sync" sequence, which consists of three successive reads 256 * of the sector count register location, with interrupts disabled 257 * to ensure that the reads all happen together. 258 */ 259static void ata_vlb_sync(unsigned long port) 260{ 261 (void)inb(port); 262 (void)inb(port); 263 (void)inb(port); 264} 265 266/* 267 * This is used for most PIO data transfers *from* the IDE interface 268 * 269 * These routines will round up any request for an odd number of bytes, 270 * so if an odd len is specified, be sure that there's at least one 271 * extra byte allocated for the buffer. 272 */ 273void ide_input_data(ide_drive_t *drive, struct request *rq, void *buf, 274 unsigned int len) 275{ 276 ide_hwif_t *hwif = drive->hwif; 277 struct ide_io_ports *io_ports = &hwif->io_ports; 278 unsigned long data_addr = io_ports->data_addr; 279 u8 io_32bit = drive->io_32bit; 280 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 281 282 len++; 283 284 if (io_32bit) { 285 unsigned long uninitialized_var(flags); 286 287 if ((io_32bit & 2) && !mmio) { 288 local_irq_save(flags); 289 ata_vlb_sync(io_ports->nsect_addr); 290 } 291 292 if (mmio) 293 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 294 else 295 insl(data_addr, buf, len / 4); 296 297 if ((io_32bit & 2) && !mmio) 298 local_irq_restore(flags); 299 300 if ((len & 3) >= 2) { 301 if (mmio) 302 __ide_mm_insw((void __iomem *)data_addr, 303 (u8 *)buf + (len & ~3), 1); 304 else 305 insw(data_addr, (u8 *)buf + (len & ~3), 1); 306 } 307 } else { 308 if (mmio) 309 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 310 else 311 insw(data_addr, buf, len / 2); 312 } 313} 314EXPORT_SYMBOL_GPL(ide_input_data); 315 316/* 317 * This is used for most PIO data transfers *to* the IDE interface 318 */ 319void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf, 320 unsigned int len) 321{ 322 ide_hwif_t *hwif = drive->hwif; 323 struct ide_io_ports *io_ports = &hwif->io_ports; 324 unsigned long data_addr = io_ports->data_addr; 325 u8 io_32bit = drive->io_32bit; 326 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 327 328 if (io_32bit) { 329 unsigned long uninitialized_var(flags); 330 331 if ((io_32bit & 2) && !mmio) { 332 local_irq_save(flags); 333 ata_vlb_sync(io_ports->nsect_addr); 334 } 335 336 if (mmio) 337 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 338 else 339 outsl(data_addr, buf, len / 4); 340 341 if ((io_32bit & 2) && !mmio) 342 local_irq_restore(flags); 343 344 if ((len & 3) >= 2) { 345 if (mmio) 346 __ide_mm_outsw((void __iomem *)data_addr, 347 (u8 *)buf + (len & ~3), 1); 348 else 349 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 350 } 351 } else { 352 if (mmio) 353 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 354 else 355 outsw(data_addr, buf, len / 2); 356 } 357} 358EXPORT_SYMBOL_GPL(ide_output_data); 359 360u8 ide_read_error(ide_drive_t *drive) 361{ 362 ide_task_t task; 363 364 memset(&task, 0, sizeof(task)); 365 task.tf_flags = IDE_TFLAG_IN_FEATURE; 366 367 drive->hwif->tp_ops->tf_read(drive, &task); 368 369 return task.tf.error; 370} 371EXPORT_SYMBOL_GPL(ide_read_error); 372 373void ide_read_bcount_and_ireason(ide_drive_t *drive, u16 *bcount, u8 *ireason) 374{ 375 ide_task_t task; 376 377 memset(&task, 0, sizeof(task)); 378 task.tf_flags = IDE_TFLAG_IN_LBAH | IDE_TFLAG_IN_LBAM | 379 IDE_TFLAG_IN_NSECT; 380 381 drive->hwif->tp_ops->tf_read(drive, &task); 382 383 *bcount = (task.tf.lbah << 8) | task.tf.lbam; 384 *ireason = task.tf.nsect & 3; 385} 386EXPORT_SYMBOL_GPL(ide_read_bcount_and_ireason); 387 388const struct ide_tp_ops default_tp_ops = { 389 .exec_command = ide_exec_command, 390 .read_status = ide_read_status, 391 .read_altstatus = ide_read_altstatus, 392 .read_sff_dma_status = ide_read_sff_dma_status, 393 394 .set_irq = ide_set_irq, 395 396 .tf_load = ide_tf_load, 397 .tf_read = ide_tf_read, 398 399 .input_data = ide_input_data, 400 .output_data = ide_output_data, 401}; 402 403void ide_fix_driveid(u16 *id) 404{ 405#ifndef __LITTLE_ENDIAN 406# ifdef __BIG_ENDIAN 407 struct hd_driveid *driveid = (struct hd_driveid *)id; 408 int i; 409 410 for (i = 0; i < 256; i++) { 411 /* these words are accessed as two 8-bit values */ 412 if (i == 47 || i == 49 || i == 51 || i == 52 || i == 59) 413 continue; 414 if (i == 60 || i == 61) /* ->lba_capacity is 32-bit */ 415 continue; 416 if (i == 98 || i == 99) /* ->spg is 32-bit */ 417 continue; 418 if (i > 99 && i < 104) /* ->lba_capacity_2 is 64-bit */ 419 continue; 420 421 id[i] = __le16_to_cpu(id[i]); 422 } 423 424 driveid->lba_capacity = __le32_to_cpu(driveid->lba_capacity); 425 driveid->spg = __le32_to_cpu(driveid->spg); 426 driveid->lba_capacity_2 = __le64_to_cpu(driveid->lba_capacity_2); 427# else 428# error "Please fix <asm/byteorder.h>" 429# endif 430#endif 431} 432 433/* 434 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 435 * removing leading/trailing blanks and compressing internal blanks. 436 * It is primarily used to tidy up the model name/number fields as 437 * returned by the WIN_[P]IDENTIFY commands. 438 */ 439 440void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 441{ 442 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 443 444 if (byteswap) { 445 /* convert from big-endian to host byte order */ 446 for (p = end ; p != s;) 447 be16_to_cpus((u16 *)(p -= 2)); 448 } 449 /* strip leading blanks */ 450 while (s != end && *s == ' ') 451 ++s; 452 /* compress internal blanks and strip trailing blanks */ 453 while (s != end && *s) { 454 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 455 *p++ = *(s-1); 456 } 457 /* wipe out trailing garbage */ 458 while (p != end) 459 *p++ = '\0'; 460} 461 462EXPORT_SYMBOL(ide_fixstring); 463 464/* 465 * Needed for PCI irq sharing 466 */ 467int drive_is_ready (ide_drive_t *drive) 468{ 469 ide_hwif_t *hwif = HWIF(drive); 470 u8 stat = 0; 471 472 if (drive->waiting_for_dma) 473 return hwif->dma_ops->dma_test_irq(drive); 474 475#if 0 476 /* need to guarantee 400ns since last command was issued */ 477 udelay(1); 478#endif 479 480 /* 481 * We do a passive status test under shared PCI interrupts on 482 * cards that truly share the ATA side interrupt, but may also share 483 * an interrupt with another pci card/device. We make no assumptions 484 * about possible isa-pnp and pci-pnp issues yet. 485 */ 486 if (hwif->io_ports.ctl_addr) 487 stat = hwif->tp_ops->read_altstatus(hwif); 488 else 489 /* Note: this may clear a pending IRQ!! */ 490 stat = hwif->tp_ops->read_status(hwif); 491 492 if (stat & BUSY_STAT) 493 /* drive busy: definitely not interrupting */ 494 return 0; 495 496 /* drive ready: *might* be interrupting */ 497 return 1; 498} 499 500EXPORT_SYMBOL(drive_is_ready); 501 502/* 503 * This routine busy-waits for the drive status to be not "busy". 504 * It then checks the status for all of the "good" bits and none 505 * of the "bad" bits, and if all is okay it returns 0. All other 506 * cases return error -- caller may then invoke ide_error(). 507 * 508 * This routine should get fixed to not hog the cpu during extra long waits.. 509 * That could be done by busy-waiting for the first jiffy or two, and then 510 * setting a timer to wake up at half second intervals thereafter, 511 * until timeout is achieved, before timing out. 512 */ 513static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 514{ 515 ide_hwif_t *hwif = drive->hwif; 516 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 517 unsigned long flags; 518 int i; 519 u8 stat; 520 521 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 522 stat = tp_ops->read_status(hwif); 523 524 if (stat & BUSY_STAT) { 525 local_irq_set(flags); 526 timeout += jiffies; 527 while ((stat = tp_ops->read_status(hwif)) & BUSY_STAT) { 528 if (time_after(jiffies, timeout)) { 529 /* 530 * One last read after the timeout in case 531 * heavy interrupt load made us not make any 532 * progress during the timeout.. 533 */ 534 stat = tp_ops->read_status(hwif); 535 if (!(stat & BUSY_STAT)) 536 break; 537 538 local_irq_restore(flags); 539 *rstat = stat; 540 return -EBUSY; 541 } 542 } 543 local_irq_restore(flags); 544 } 545 /* 546 * Allow status to settle, then read it again. 547 * A few rare drives vastly violate the 400ns spec here, 548 * so we'll wait up to 10usec for a "good" status 549 * rather than expensively fail things immediately. 550 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 551 */ 552 for (i = 0; i < 10; i++) { 553 udelay(1); 554 stat = tp_ops->read_status(hwif); 555 556 if (OK_STAT(stat, good, bad)) { 557 *rstat = stat; 558 return 0; 559 } 560 } 561 *rstat = stat; 562 return -EFAULT; 563} 564 565/* 566 * In case of error returns error value after doing "*startstop = ide_error()". 567 * The caller should return the updated value of "startstop" in this case, 568 * "startstop" is unchanged when the function returns 0. 569 */ 570int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 571{ 572 int err; 573 u8 stat; 574 575 /* bail early if we've exceeded max_failures */ 576 if (drive->max_failures && (drive->failures > drive->max_failures)) { 577 *startstop = ide_stopped; 578 return 1; 579 } 580 581 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 582 583 if (err) { 584 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 585 *startstop = ide_error(drive, s, stat); 586 } 587 588 return err; 589} 590 591EXPORT_SYMBOL(ide_wait_stat); 592 593/** 594 * ide_in_drive_list - look for drive in black/white list 595 * @id: drive identifier 596 * @table: list to inspect 597 * 598 * Look for a drive in the blacklist and the whitelist tables 599 * Returns 1 if the drive is found in the table. 600 */ 601 602int ide_in_drive_list(u16 *id, const struct drive_list_entry *table) 603{ 604 for ( ; table->id_model; table++) 605 if ((!strcmp(table->id_model, (char *)&id[ATA_ID_PROD])) && 606 (!table->id_firmware || 607 strstr((char *)&id[ATA_ID_FW_REV], table->id_firmware))) 608 return 1; 609 return 0; 610} 611 612EXPORT_SYMBOL_GPL(ide_in_drive_list); 613 614/* 615 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 616 * We list them here and depend on the device side cable detection for them. 617 * 618 * Some optical devices with the buggy firmwares have the same problem. 619 */ 620static const struct drive_list_entry ivb_list[] = { 621 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 622 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 623 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 624 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 625 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 626 { "TSSTcorp CDDVDW SH-S202H" , "SB00" }, 627 { "TSSTcorp CDDVDW SH-S202H" , "SB01" }, 628 { NULL , NULL } 629}; 630 631/* 632 * All hosts that use the 80c ribbon must use! 633 * The name is derived from upper byte of word 93 and the 80c ribbon. 634 */ 635u8 eighty_ninty_three (ide_drive_t *drive) 636{ 637 ide_hwif_t *hwif = drive->hwif; 638 u16 *id = drive->id; 639 int ivb = ide_in_drive_list(id, ivb_list); 640 641 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 642 return 1; 643 644 if (ivb) 645 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 646 drive->name); 647 648 if (ide_dev_is_sata(id) && !ivb) 649 return 1; 650 651 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 652 goto no_80w; 653 654 /* 655 * FIXME: 656 * - change master/slave IDENTIFY order 657 * - force bit13 (80c cable present) check also for !ivb devices 658 * (unless the slave device is pre-ATA3) 659 */ 660 if ((id[ATA_ID_HW_CONFIG] & 0x4000) || 661 (ivb && (id[ATA_ID_HW_CONFIG] & 0x2000))) 662 return 1; 663 664no_80w: 665 if (drive->udma33_warned == 1) 666 return 0; 667 668 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 669 "limiting max speed to UDMA33\n", 670 drive->name, 671 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 672 673 drive->udma33_warned = 1; 674 675 return 0; 676} 677 678int ide_driveid_update(ide_drive_t *drive) 679{ 680 ide_hwif_t *hwif = drive->hwif; 681 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 682 u16 *id; 683 unsigned long timeout, flags; 684 u8 stat; 685 686 /* 687 * Re-read drive->id for possible DMA mode 688 * change (copied from ide-probe.c) 689 */ 690 691 SELECT_MASK(drive, 1); 692 tp_ops->set_irq(hwif, 0); 693 msleep(50); 694 tp_ops->exec_command(hwif, WIN_IDENTIFY); 695 timeout = jiffies + WAIT_WORSTCASE; 696 do { 697 if (time_after(jiffies, timeout)) { 698 SELECT_MASK(drive, 0); 699 return 0; /* drive timed-out */ 700 } 701 702 msleep(50); /* give drive a breather */ 703 stat = tp_ops->read_altstatus(hwif); 704 } while (stat & BUSY_STAT); 705 706 msleep(50); /* wait for IRQ and DRQ_STAT */ 707 stat = tp_ops->read_status(hwif); 708 709 if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) { 710 SELECT_MASK(drive, 0); 711 printk("%s: CHECK for good STATUS\n", drive->name); 712 return 0; 713 } 714 local_irq_save(flags); 715 SELECT_MASK(drive, 0); 716 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 717 if (!id) { 718 local_irq_restore(flags); 719 return 0; 720 } 721 tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); 722 (void)tp_ops->read_status(hwif); /* clear drive IRQ */ 723 local_irq_enable(); 724 local_irq_restore(flags); 725 ide_fix_driveid(id); 726 727 drive->id[ATA_ID_UDMA_MODES] = id[ATA_ID_UDMA_MODES]; 728 drive->id[ATA_ID_MWDMA_MODES] = id[ATA_ID_MWDMA_MODES]; 729 drive->id[ATA_ID_SWDMA_MODES] = id[ATA_ID_SWDMA_MODES]; 730 /* anything more ? */ 731 732 kfree(id); 733 734 if (drive->using_dma && ide_id_dma_bug(drive)) 735 ide_dma_off(drive); 736 737 return 1; 738} 739 740int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 741{ 742 ide_hwif_t *hwif = drive->hwif; 743 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 744 u16 *id = drive->id, i; 745 int error = 0; 746 u8 stat; 747 ide_task_t task; 748 749#ifdef CONFIG_BLK_DEV_IDEDMA 750 if (hwif->dma_ops) /* check if host supports DMA */ 751 hwif->dma_ops->dma_host_set(drive, 0); 752#endif 753 754 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 755 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->driveid->capability & 8)) 756 goto skip; 757 758 /* 759 * Don't use ide_wait_cmd here - it will 760 * attempt to set_geometry and recalibrate, 761 * but for some reason these don't work at 762 * this point (lost interrupt). 763 */ 764 /* 765 * Select the drive, and issue the SETFEATURES command 766 */ 767 disable_irq_nosync(hwif->irq); 768 769 /* 770 * FIXME: we race against the running IRQ here if 771 * this is called from non IRQ context. If we use 772 * disable_irq() we hang on the error path. Work 773 * is needed. 774 */ 775 776 udelay(1); 777 SELECT_DRIVE(drive); 778 SELECT_MASK(drive, 0); 779 udelay(1); 780 tp_ops->set_irq(hwif, 0); 781 782 memset(&task, 0, sizeof(task)); 783 task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT; 784 task.tf.feature = SETFEATURES_XFER; 785 task.tf.nsect = speed; 786 787 tp_ops->tf_load(drive, &task); 788 789 tp_ops->exec_command(hwif, WIN_SETFEATURES); 790 791 if (drive->quirk_list == 2) 792 tp_ops->set_irq(hwif, 1); 793 794 error = __ide_wait_stat(drive, drive->ready_stat, 795 BUSY_STAT|DRQ_STAT|ERR_STAT, 796 WAIT_CMD, &stat); 797 798 SELECT_MASK(drive, 0); 799 800 enable_irq(hwif->irq); 801 802 if (error) { 803 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 804 return error; 805 } 806 807 id[ATA_ID_UDMA_MODES] &= ~0xFF00; 808 id[ATA_ID_MWDMA_MODES] &= ~0x0F00; 809 id[ATA_ID_SWDMA_MODES] &= ~0x0F00; 810 811 skip: 812#ifdef CONFIG_BLK_DEV_IDEDMA 813 if (speed >= XFER_SW_DMA_0 && drive->using_dma) 814 hwif->dma_ops->dma_host_set(drive, 1); 815 else if (hwif->dma_ops) /* check if host supports DMA */ 816 ide_dma_off_quietly(drive); 817#endif 818 819 if (speed >= XFER_UDMA_0) { 820 i = 1 << (speed - XFER_UDMA_0); 821 id[ATA_ID_UDMA_MODES] |= (i << 8 | i); 822 } else if (speed >= XFER_MW_DMA_0) { 823 i = 1 << (speed - XFER_MW_DMA_0); 824 id[ATA_ID_MWDMA_MODES] |= (i << 8 | i); 825 } else if (speed >= XFER_SW_DMA_0) { 826 i = 1 << (speed - XFER_SW_DMA_0); 827 id[ATA_ID_SWDMA_MODES] |= (i << 8 | i); 828 } 829 830 if (!drive->init_speed) 831 drive->init_speed = speed; 832 drive->current_speed = speed; 833 return error; 834} 835 836/* 837 * This should get invoked any time we exit the driver to 838 * wait for an interrupt response from a drive. handler() points 839 * at the appropriate code to handle the next interrupt, and a 840 * timer is started to prevent us from waiting forever in case 841 * something goes wrong (see the ide_timer_expiry() handler later on). 842 * 843 * See also ide_execute_command 844 */ 845static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 846 unsigned int timeout, ide_expiry_t *expiry) 847{ 848 ide_hwgroup_t *hwgroup = HWGROUP(drive); 849 850 BUG_ON(hwgroup->handler); 851 hwgroup->handler = handler; 852 hwgroup->expiry = expiry; 853 hwgroup->timer.expires = jiffies + timeout; 854 hwgroup->req_gen_timer = hwgroup->req_gen; 855 add_timer(&hwgroup->timer); 856} 857 858void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 859 unsigned int timeout, ide_expiry_t *expiry) 860{ 861 unsigned long flags; 862 spin_lock_irqsave(&ide_lock, flags); 863 __ide_set_handler(drive, handler, timeout, expiry); 864 spin_unlock_irqrestore(&ide_lock, flags); 865} 866 867EXPORT_SYMBOL(ide_set_handler); 868 869/** 870 * ide_execute_command - execute an IDE command 871 * @drive: IDE drive to issue the command against 872 * @command: command byte to write 873 * @handler: handler for next phase 874 * @timeout: timeout for command 875 * @expiry: handler to run on timeout 876 * 877 * Helper function to issue an IDE command. This handles the 878 * atomicity requirements, command timing and ensures that the 879 * handler and IRQ setup do not race. All IDE command kick off 880 * should go via this function or do equivalent locking. 881 */ 882 883void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 884 unsigned timeout, ide_expiry_t *expiry) 885{ 886 unsigned long flags; 887 ide_hwif_t *hwif = HWIF(drive); 888 889 spin_lock_irqsave(&ide_lock, flags); 890 __ide_set_handler(drive, handler, timeout, expiry); 891 hwif->tp_ops->exec_command(hwif, cmd); 892 /* 893 * Drive takes 400nS to respond, we must avoid the IRQ being 894 * serviced before that. 895 * 896 * FIXME: we could skip this delay with care on non shared devices 897 */ 898 ndelay(400); 899 spin_unlock_irqrestore(&ide_lock, flags); 900} 901EXPORT_SYMBOL(ide_execute_command); 902 903void ide_execute_pkt_cmd(ide_drive_t *drive) 904{ 905 ide_hwif_t *hwif = drive->hwif; 906 unsigned long flags; 907 908 spin_lock_irqsave(&ide_lock, flags); 909 hwif->tp_ops->exec_command(hwif, WIN_PACKETCMD); 910 ndelay(400); 911 spin_unlock_irqrestore(&ide_lock, flags); 912} 913EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 914 915static inline void ide_complete_drive_reset(ide_drive_t *drive, int err) 916{ 917 struct request *rq = drive->hwif->hwgroup->rq; 918 919 if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET) 920 ide_end_request(drive, err ? err : 1, 0); 921} 922 923/* needed below */ 924static ide_startstop_t do_reset1 (ide_drive_t *, int); 925 926/* 927 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 928 * during an atapi drive reset operation. If the drive has not yet responded, 929 * and we have not yet hit our maximum waiting time, then the timer is restarted 930 * for another 50ms. 931 */ 932static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 933{ 934 ide_hwif_t *hwif = drive->hwif; 935 ide_hwgroup_t *hwgroup = hwif->hwgroup; 936 u8 stat; 937 938 SELECT_DRIVE(drive); 939 udelay (10); 940 stat = hwif->tp_ops->read_status(hwif); 941 942 if (OK_STAT(stat, 0, BUSY_STAT)) 943 printk("%s: ATAPI reset complete\n", drive->name); 944 else { 945 if (time_before(jiffies, hwgroup->poll_timeout)) { 946 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 947 /* continue polling */ 948 return ide_started; 949 } 950 /* end of polling */ 951 hwgroup->polling = 0; 952 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 953 drive->name, stat); 954 /* do it the old fashioned way */ 955 return do_reset1(drive, 1); 956 } 957 /* done polling */ 958 hwgroup->polling = 0; 959 ide_complete_drive_reset(drive, 0); 960 return ide_stopped; 961} 962 963/* 964 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 965 * during an ide reset operation. If the drives have not yet responded, 966 * and we have not yet hit our maximum waiting time, then the timer is restarted 967 * for another 50ms. 968 */ 969static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 970{ 971 ide_hwgroup_t *hwgroup = HWGROUP(drive); 972 ide_hwif_t *hwif = HWIF(drive); 973 const struct ide_port_ops *port_ops = hwif->port_ops; 974 u8 tmp; 975 int err = 0; 976 977 if (port_ops && port_ops->reset_poll) { 978 err = port_ops->reset_poll(drive); 979 if (err) { 980 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 981 hwif->name, drive->name); 982 goto out; 983 } 984 } 985 986 tmp = hwif->tp_ops->read_status(hwif); 987 988 if (!OK_STAT(tmp, 0, BUSY_STAT)) { 989 if (time_before(jiffies, hwgroup->poll_timeout)) { 990 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 991 /* continue polling */ 992 return ide_started; 993 } 994 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 995 drive->failures++; 996 err = -EIO; 997 } else { 998 printk("%s: reset: ", hwif->name); 999 tmp = ide_read_error(drive); 1000 1001 if (tmp == 1) { 1002 printk("success\n"); 1003 drive->failures = 0; 1004 } else { 1005 drive->failures++; 1006 printk("master: "); 1007 switch (tmp & 0x7f) { 1008 case 1: printk("passed"); 1009 break; 1010 case 2: printk("formatter device error"); 1011 break; 1012 case 3: printk("sector buffer error"); 1013 break; 1014 case 4: printk("ECC circuitry error"); 1015 break; 1016 case 5: printk("controlling MPU error"); 1017 break; 1018 default:printk("error (0x%02x?)", tmp); 1019 } 1020 if (tmp & 0x80) 1021 printk("; slave: failed"); 1022 printk("\n"); 1023 err = -EIO; 1024 } 1025 } 1026out: 1027 hwgroup->polling = 0; /* done polling */ 1028 ide_complete_drive_reset(drive, err); 1029 return ide_stopped; 1030} 1031 1032static void ide_disk_pre_reset(ide_drive_t *drive) 1033{ 1034 int legacy = (drive->id[ATA_ID_CFS_ENABLE_2] & 0x0400) ? 0 : 1; 1035 1036 drive->special.all = 0; 1037 drive->special.b.set_geometry = legacy; 1038 drive->special.b.recalibrate = legacy; 1039 drive->mult_count = 0; 1040 if (!drive->keep_settings && !drive->using_dma) 1041 drive->mult_req = 0; 1042 if (drive->mult_req != drive->mult_count) 1043 drive->special.b.set_multmode = 1; 1044} 1045 1046static void pre_reset(ide_drive_t *drive) 1047{ 1048 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1049 1050 if (drive->media == ide_disk) 1051 ide_disk_pre_reset(drive); 1052 else 1053 drive->post_reset = 1; 1054 1055 if (drive->using_dma) { 1056 if (drive->crc_count) 1057 ide_check_dma_crc(drive); 1058 else 1059 ide_dma_off(drive); 1060 } 1061 1062 if (!drive->keep_settings) { 1063 if (!drive->using_dma) { 1064 drive->unmask = 0; 1065 drive->io_32bit = 0; 1066 } 1067 return; 1068 } 1069 1070 if (port_ops && port_ops->pre_reset) 1071 port_ops->pre_reset(drive); 1072 1073 if (drive->current_speed != 0xff) 1074 drive->desired_speed = drive->current_speed; 1075 drive->current_speed = 0xff; 1076} 1077 1078/* 1079 * do_reset1() attempts to recover a confused drive by resetting it. 1080 * Unfortunately, resetting a disk drive actually resets all devices on 1081 * the same interface, so it can really be thought of as resetting the 1082 * interface rather than resetting the drive. 1083 * 1084 * ATAPI devices have their own reset mechanism which allows them to be 1085 * individually reset without clobbering other devices on the same interface. 1086 * 1087 * Unfortunately, the IDE interface does not generate an interrupt to let 1088 * us know when the reset operation has finished, so we must poll for this. 1089 * Equally poor, though, is the fact that this may a very long time to complete, 1090 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1091 * we set a timer to poll at 50ms intervals. 1092 */ 1093static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1094{ 1095 unsigned int unit; 1096 unsigned long flags; 1097 ide_hwif_t *hwif; 1098 ide_hwgroup_t *hwgroup; 1099 struct ide_io_ports *io_ports; 1100 const struct ide_tp_ops *tp_ops; 1101 const struct ide_port_ops *port_ops; 1102 1103 spin_lock_irqsave(&ide_lock, flags); 1104 hwif = HWIF(drive); 1105 hwgroup = HWGROUP(drive); 1106 1107 io_ports = &hwif->io_ports; 1108 1109 tp_ops = hwif->tp_ops; 1110 1111 /* We must not reset with running handlers */ 1112 BUG_ON(hwgroup->handler != NULL); 1113 1114 /* For an ATAPI device, first try an ATAPI SRST. */ 1115 if (drive->media != ide_disk && !do_not_try_atapi) { 1116 pre_reset(drive); 1117 SELECT_DRIVE(drive); 1118 udelay (20); 1119 tp_ops->exec_command(hwif, WIN_SRST); 1120 ndelay(400); 1121 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1122 hwgroup->polling = 1; 1123 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1124 spin_unlock_irqrestore(&ide_lock, flags); 1125 return ide_started; 1126 } 1127 1128 /* 1129 * First, reset any device state data we were maintaining 1130 * for any of the drives on this interface. 1131 */ 1132 for (unit = 0; unit < MAX_DRIVES; ++unit) 1133 pre_reset(&hwif->drives[unit]); 1134 1135 if (io_ports->ctl_addr == 0) { 1136 spin_unlock_irqrestore(&ide_lock, flags); 1137 ide_complete_drive_reset(drive, -ENXIO); 1138 return ide_stopped; 1139 } 1140 1141 /* 1142 * Note that we also set nIEN while resetting the device, 1143 * to mask unwanted interrupts from the interface during the reset. 1144 * However, due to the design of PC hardware, this will cause an 1145 * immediate interrupt due to the edge transition it produces. 1146 * This single interrupt gives us a "fast poll" for drives that 1147 * recover from reset very quickly, saving us the first 50ms wait time. 1148 * 1149 * TODO: add ->softreset method and stop abusing ->set_irq 1150 */ 1151 /* set SRST and nIEN */ 1152 tp_ops->set_irq(hwif, 4); 1153 /* more than enough time */ 1154 udelay(10); 1155 /* clear SRST, leave nIEN (unless device is on the quirk list) */ 1156 tp_ops->set_irq(hwif, drive->quirk_list == 2); 1157 /* more than enough time */ 1158 udelay(10); 1159 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1160 hwgroup->polling = 1; 1161 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1162 1163 /* 1164 * Some weird controller like resetting themselves to a strange 1165 * state when the disks are reset this way. At least, the Winbond 1166 * 553 documentation says that 1167 */ 1168 port_ops = hwif->port_ops; 1169 if (port_ops && port_ops->resetproc) 1170 port_ops->resetproc(drive); 1171 1172 spin_unlock_irqrestore(&ide_lock, flags); 1173 return ide_started; 1174} 1175 1176/* 1177 * ide_do_reset() is the entry point to the drive/interface reset code. 1178 */ 1179 1180ide_startstop_t ide_do_reset (ide_drive_t *drive) 1181{ 1182 return do_reset1(drive, 0); 1183} 1184 1185EXPORT_SYMBOL(ide_do_reset); 1186 1187/* 1188 * ide_wait_not_busy() waits for the currently selected device on the hwif 1189 * to report a non-busy status, see comments in ide_probe_port(). 1190 */ 1191int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1192{ 1193 u8 stat = 0; 1194 1195 while(timeout--) { 1196 /* 1197 * Turn this into a schedule() sleep once I'm sure 1198 * about locking issues (2.5 work ?). 1199 */ 1200 mdelay(1); 1201 stat = hwif->tp_ops->read_status(hwif); 1202 if ((stat & BUSY_STAT) == 0) 1203 return 0; 1204 /* 1205 * Assume a value of 0xff means nothing is connected to 1206 * the interface and it doesn't implement the pull-down 1207 * resistor on D7. 1208 */ 1209 if (stat == 0xff) 1210 return -ENODEV; 1211 touch_softlockup_watchdog(); 1212 touch_nmi_watchdog(); 1213 } 1214 return -EBUSY; 1215} 1216 1217EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1218 1219