ide-iops.c revision 7ed5b157d9dff55bf477b4c8b4708d5d45476677
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/ide.h> 22#include <linux/bitops.h> 23#include <linux/nmi.h> 24 25#include <asm/byteorder.h> 26#include <asm/irq.h> 27#include <asm/uaccess.h> 28#include <asm/io.h> 29 30/* 31 * Conventional PIO operations for ATA devices 32 */ 33 34static u8 ide_inb (unsigned long port) 35{ 36 return (u8) inb(port); 37} 38 39static void ide_outb (u8 val, unsigned long port) 40{ 41 outb(val, port); 42} 43 44/* 45 * MMIO operations, typically used for SATA controllers 46 */ 47 48static u8 ide_mm_inb (unsigned long port) 49{ 50 return (u8) readb((void __iomem *) port); 51} 52 53static void ide_mm_outb (u8 value, unsigned long port) 54{ 55 writeb(value, (void __iomem *) port); 56} 57 58void SELECT_DRIVE (ide_drive_t *drive) 59{ 60 ide_hwif_t *hwif = drive->hwif; 61 const struct ide_port_ops *port_ops = hwif->port_ops; 62 ide_task_t task; 63 64 if (port_ops && port_ops->selectproc) 65 port_ops->selectproc(drive); 66 67 memset(&task, 0, sizeof(task)); 68 task.tf_flags = IDE_TFLAG_OUT_DEVICE; 69 70 drive->hwif->tp_ops->tf_load(drive, &task); 71} 72 73void SELECT_MASK(ide_drive_t *drive, int mask) 74{ 75 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 76 77 if (port_ops && port_ops->maskproc) 78 port_ops->maskproc(drive, mask); 79} 80 81void ide_exec_command(ide_hwif_t *hwif, u8 cmd) 82{ 83 if (hwif->host_flags & IDE_HFLAG_MMIO) 84 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr); 85 else 86 outb(cmd, hwif->io_ports.command_addr); 87} 88EXPORT_SYMBOL_GPL(ide_exec_command); 89 90u8 ide_read_status(ide_hwif_t *hwif) 91{ 92 if (hwif->host_flags & IDE_HFLAG_MMIO) 93 return readb((void __iomem *)hwif->io_ports.status_addr); 94 else 95 return inb(hwif->io_ports.status_addr); 96} 97EXPORT_SYMBOL_GPL(ide_read_status); 98 99u8 ide_read_altstatus(ide_hwif_t *hwif) 100{ 101 if (hwif->host_flags & IDE_HFLAG_MMIO) 102 return readb((void __iomem *)hwif->io_ports.ctl_addr); 103 else 104 return inb(hwif->io_ports.ctl_addr); 105} 106EXPORT_SYMBOL_GPL(ide_read_altstatus); 107 108void ide_set_irq(ide_hwif_t *hwif, int on) 109{ 110 u8 ctl = ATA_DEVCTL_OBS; 111 112 if (on == 4) { /* hack for SRST */ 113 ctl |= 4; 114 on &= ~4; 115 } 116 117 ctl |= on ? 0 : 2; 118 119 if (hwif->host_flags & IDE_HFLAG_MMIO) 120 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); 121 else 122 outb(ctl, hwif->io_ports.ctl_addr); 123} 124EXPORT_SYMBOL_GPL(ide_set_irq); 125 126void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 127{ 128 ide_hwif_t *hwif = drive->hwif; 129 struct ide_io_ports *io_ports = &hwif->io_ports; 130 struct ide_taskfile *tf = &task->tf; 131 void (*tf_outb)(u8 addr, unsigned long port); 132 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 133 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 134 135 if (mmio) 136 tf_outb = ide_mm_outb; 137 else 138 tf_outb = ide_outb; 139 140 if (task->tf_flags & IDE_TFLAG_FLAGGED) 141 HIHI = 0xFF; 142 143 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 144 u16 data = (tf->hob_data << 8) | tf->data; 145 146 if (mmio) 147 writew(data, (void __iomem *)io_ports->data_addr); 148 else 149 outw(data, io_ports->data_addr); 150 } 151 152 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 153 tf_outb(tf->hob_feature, io_ports->feature_addr); 154 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 155 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 156 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 157 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 158 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 159 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 160 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 161 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 162 163 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 164 tf_outb(tf->feature, io_ports->feature_addr); 165 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 166 tf_outb(tf->nsect, io_ports->nsect_addr); 167 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 168 tf_outb(tf->lbal, io_ports->lbal_addr); 169 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 170 tf_outb(tf->lbam, io_ports->lbam_addr); 171 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 172 tf_outb(tf->lbah, io_ports->lbah_addr); 173 174 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 175 tf_outb((tf->device & HIHI) | drive->select, 176 io_ports->device_addr); 177} 178EXPORT_SYMBOL_GPL(ide_tf_load); 179 180void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 181{ 182 ide_hwif_t *hwif = drive->hwif; 183 struct ide_io_ports *io_ports = &hwif->io_ports; 184 struct ide_taskfile *tf = &task->tf; 185 void (*tf_outb)(u8 addr, unsigned long port); 186 u8 (*tf_inb)(unsigned long port); 187 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 188 189 if (mmio) { 190 tf_outb = ide_mm_outb; 191 tf_inb = ide_mm_inb; 192 } else { 193 tf_outb = ide_outb; 194 tf_inb = ide_inb; 195 } 196 197 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 198 u16 data; 199 200 if (mmio) 201 data = readw((void __iomem *)io_ports->data_addr); 202 else 203 data = inw(io_ports->data_addr); 204 205 tf->data = data & 0xff; 206 tf->hob_data = (data >> 8) & 0xff; 207 } 208 209 /* be sure we're looking at the low order bits */ 210 tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr); 211 212 if (task->tf_flags & IDE_TFLAG_IN_FEATURE) 213 tf->feature = tf_inb(io_ports->feature_addr); 214 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 215 tf->nsect = tf_inb(io_ports->nsect_addr); 216 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 217 tf->lbal = tf_inb(io_ports->lbal_addr); 218 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 219 tf->lbam = tf_inb(io_ports->lbam_addr); 220 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 221 tf->lbah = tf_inb(io_ports->lbah_addr); 222 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 223 tf->device = tf_inb(io_ports->device_addr); 224 225 if (task->tf_flags & IDE_TFLAG_LBA48) { 226 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr); 227 228 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 229 tf->hob_feature = tf_inb(io_ports->feature_addr); 230 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 231 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 232 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 233 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 234 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 235 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 236 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 237 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 238 } 239} 240EXPORT_SYMBOL_GPL(ide_tf_read); 241 242/* 243 * Some localbus EIDE interfaces require a special access sequence 244 * when using 32-bit I/O instructions to transfer data. We call this 245 * the "vlb_sync" sequence, which consists of three successive reads 246 * of the sector count register location, with interrupts disabled 247 * to ensure that the reads all happen together. 248 */ 249static void ata_vlb_sync(unsigned long port) 250{ 251 (void)inb(port); 252 (void)inb(port); 253 (void)inb(port); 254} 255 256/* 257 * This is used for most PIO data transfers *from* the IDE interface 258 * 259 * These routines will round up any request for an odd number of bytes, 260 * so if an odd len is specified, be sure that there's at least one 261 * extra byte allocated for the buffer. 262 */ 263void ide_input_data(ide_drive_t *drive, struct request *rq, void *buf, 264 unsigned int len) 265{ 266 ide_hwif_t *hwif = drive->hwif; 267 struct ide_io_ports *io_ports = &hwif->io_ports; 268 unsigned long data_addr = io_ports->data_addr; 269 u8 io_32bit = drive->io_32bit; 270 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 271 272 len++; 273 274 if (io_32bit) { 275 unsigned long uninitialized_var(flags); 276 277 if ((io_32bit & 2) && !mmio) { 278 local_irq_save(flags); 279 ata_vlb_sync(io_ports->nsect_addr); 280 } 281 282 if (mmio) 283 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 284 else 285 insl(data_addr, buf, len / 4); 286 287 if ((io_32bit & 2) && !mmio) 288 local_irq_restore(flags); 289 290 if ((len & 3) >= 2) { 291 if (mmio) 292 __ide_mm_insw((void __iomem *)data_addr, 293 (u8 *)buf + (len & ~3), 1); 294 else 295 insw(data_addr, (u8 *)buf + (len & ~3), 1); 296 } 297 } else { 298 if (mmio) 299 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 300 else 301 insw(data_addr, buf, len / 2); 302 } 303} 304EXPORT_SYMBOL_GPL(ide_input_data); 305 306/* 307 * This is used for most PIO data transfers *to* the IDE interface 308 */ 309void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf, 310 unsigned int len) 311{ 312 ide_hwif_t *hwif = drive->hwif; 313 struct ide_io_ports *io_ports = &hwif->io_ports; 314 unsigned long data_addr = io_ports->data_addr; 315 u8 io_32bit = drive->io_32bit; 316 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 317 318 len++; 319 320 if (io_32bit) { 321 unsigned long uninitialized_var(flags); 322 323 if ((io_32bit & 2) && !mmio) { 324 local_irq_save(flags); 325 ata_vlb_sync(io_ports->nsect_addr); 326 } 327 328 if (mmio) 329 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 330 else 331 outsl(data_addr, buf, len / 4); 332 333 if ((io_32bit & 2) && !mmio) 334 local_irq_restore(flags); 335 336 if ((len & 3) >= 2) { 337 if (mmio) 338 __ide_mm_outsw((void __iomem *)data_addr, 339 (u8 *)buf + (len & ~3), 1); 340 else 341 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 342 } 343 } else { 344 if (mmio) 345 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 346 else 347 outsw(data_addr, buf, len / 2); 348 } 349} 350EXPORT_SYMBOL_GPL(ide_output_data); 351 352u8 ide_read_error(ide_drive_t *drive) 353{ 354 ide_task_t task; 355 356 memset(&task, 0, sizeof(task)); 357 task.tf_flags = IDE_TFLAG_IN_FEATURE; 358 359 drive->hwif->tp_ops->tf_read(drive, &task); 360 361 return task.tf.error; 362} 363EXPORT_SYMBOL_GPL(ide_read_error); 364 365void ide_read_bcount_and_ireason(ide_drive_t *drive, u16 *bcount, u8 *ireason) 366{ 367 ide_task_t task; 368 369 memset(&task, 0, sizeof(task)); 370 task.tf_flags = IDE_TFLAG_IN_LBAH | IDE_TFLAG_IN_LBAM | 371 IDE_TFLAG_IN_NSECT; 372 373 drive->hwif->tp_ops->tf_read(drive, &task); 374 375 *bcount = (task.tf.lbah << 8) | task.tf.lbam; 376 *ireason = task.tf.nsect & 3; 377} 378EXPORT_SYMBOL_GPL(ide_read_bcount_and_ireason); 379 380const struct ide_tp_ops default_tp_ops = { 381 .exec_command = ide_exec_command, 382 .read_status = ide_read_status, 383 .read_altstatus = ide_read_altstatus, 384 385 .set_irq = ide_set_irq, 386 387 .tf_load = ide_tf_load, 388 .tf_read = ide_tf_read, 389 390 .input_data = ide_input_data, 391 .output_data = ide_output_data, 392}; 393 394void ide_fix_driveid(u16 *id) 395{ 396#ifndef __LITTLE_ENDIAN 397# ifdef __BIG_ENDIAN 398 int i; 399 400 for (i = 0; i < 256; i++) 401 id[i] = __le16_to_cpu(id[i]); 402# else 403# error "Please fix <asm/byteorder.h>" 404# endif 405#endif 406} 407 408/* 409 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 410 * removing leading/trailing blanks and compressing internal blanks. 411 * It is primarily used to tidy up the model name/number fields as 412 * returned by the ATA_CMD_ID_ATA[PI] commands. 413 */ 414 415void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 416{ 417 u8 *p, *end = &s[bytecount & ~1]; /* bytecount must be even */ 418 419 if (byteswap) { 420 /* convert from big-endian to host byte order */ 421 for (p = s ; p != end ; p += 2) 422 be16_to_cpus((u16 *) p); 423 } 424 425 /* strip leading blanks */ 426 p = s; 427 while (s != end && *s == ' ') 428 ++s; 429 /* compress internal blanks and strip trailing blanks */ 430 while (s != end && *s) { 431 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 432 *p++ = *(s-1); 433 } 434 /* wipe out trailing garbage */ 435 while (p != end) 436 *p++ = '\0'; 437} 438 439EXPORT_SYMBOL(ide_fixstring); 440 441/* 442 * Needed for PCI irq sharing 443 */ 444int drive_is_ready (ide_drive_t *drive) 445{ 446 ide_hwif_t *hwif = drive->hwif; 447 u8 stat = 0; 448 449 if (drive->waiting_for_dma) 450 return hwif->dma_ops->dma_test_irq(drive); 451 452 /* 453 * We do a passive status test under shared PCI interrupts on 454 * cards that truly share the ATA side interrupt, but may also share 455 * an interrupt with another pci card/device. We make no assumptions 456 * about possible isa-pnp and pci-pnp issues yet. 457 */ 458 if (hwif->io_ports.ctl_addr && 459 (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) 460 stat = hwif->tp_ops->read_altstatus(hwif); 461 else 462 /* Note: this may clear a pending IRQ!! */ 463 stat = hwif->tp_ops->read_status(hwif); 464 465 if (stat & ATA_BUSY) 466 /* drive busy: definitely not interrupting */ 467 return 0; 468 469 /* drive ready: *might* be interrupting */ 470 return 1; 471} 472 473EXPORT_SYMBOL(drive_is_ready); 474 475/* 476 * This routine busy-waits for the drive status to be not "busy". 477 * It then checks the status for all of the "good" bits and none 478 * of the "bad" bits, and if all is okay it returns 0. All other 479 * cases return error -- caller may then invoke ide_error(). 480 * 481 * This routine should get fixed to not hog the cpu during extra long waits.. 482 * That could be done by busy-waiting for the first jiffy or two, and then 483 * setting a timer to wake up at half second intervals thereafter, 484 * until timeout is achieved, before timing out. 485 */ 486static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 487{ 488 ide_hwif_t *hwif = drive->hwif; 489 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 490 unsigned long flags; 491 int i; 492 u8 stat; 493 494 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 495 stat = tp_ops->read_status(hwif); 496 497 if (stat & ATA_BUSY) { 498 local_save_flags(flags); 499 local_irq_enable_in_hardirq(); 500 timeout += jiffies; 501 while ((stat = tp_ops->read_status(hwif)) & ATA_BUSY) { 502 if (time_after(jiffies, timeout)) { 503 /* 504 * One last read after the timeout in case 505 * heavy interrupt load made us not make any 506 * progress during the timeout.. 507 */ 508 stat = tp_ops->read_status(hwif); 509 if ((stat & ATA_BUSY) == 0) 510 break; 511 512 local_irq_restore(flags); 513 *rstat = stat; 514 return -EBUSY; 515 } 516 } 517 local_irq_restore(flags); 518 } 519 /* 520 * Allow status to settle, then read it again. 521 * A few rare drives vastly violate the 400ns spec here, 522 * so we'll wait up to 10usec for a "good" status 523 * rather than expensively fail things immediately. 524 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 525 */ 526 for (i = 0; i < 10; i++) { 527 udelay(1); 528 stat = tp_ops->read_status(hwif); 529 530 if (OK_STAT(stat, good, bad)) { 531 *rstat = stat; 532 return 0; 533 } 534 } 535 *rstat = stat; 536 return -EFAULT; 537} 538 539/* 540 * In case of error returns error value after doing "*startstop = ide_error()". 541 * The caller should return the updated value of "startstop" in this case, 542 * "startstop" is unchanged when the function returns 0. 543 */ 544int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 545{ 546 int err; 547 u8 stat; 548 549 /* bail early if we've exceeded max_failures */ 550 if (drive->max_failures && (drive->failures > drive->max_failures)) { 551 *startstop = ide_stopped; 552 return 1; 553 } 554 555 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 556 557 if (err) { 558 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 559 *startstop = ide_error(drive, s, stat); 560 } 561 562 return err; 563} 564 565EXPORT_SYMBOL(ide_wait_stat); 566 567/** 568 * ide_in_drive_list - look for drive in black/white list 569 * @id: drive identifier 570 * @table: list to inspect 571 * 572 * Look for a drive in the blacklist and the whitelist tables 573 * Returns 1 if the drive is found in the table. 574 */ 575 576int ide_in_drive_list(u16 *id, const struct drive_list_entry *table) 577{ 578 for ( ; table->id_model; table++) 579 if ((!strcmp(table->id_model, (char *)&id[ATA_ID_PROD])) && 580 (!table->id_firmware || 581 strstr((char *)&id[ATA_ID_FW_REV], table->id_firmware))) 582 return 1; 583 return 0; 584} 585 586EXPORT_SYMBOL_GPL(ide_in_drive_list); 587 588/* 589 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 590 * We list them here and depend on the device side cable detection for them. 591 * 592 * Some optical devices with the buggy firmwares have the same problem. 593 */ 594static const struct drive_list_entry ivb_list[] = { 595 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 596 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 597 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 598 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 599 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 600 { "TSSTcorp CDDVDW SH-S202H" , "SB00" }, 601 { "TSSTcorp CDDVDW SH-S202H" , "SB01" }, 602 { "SAMSUNG SP0822N" , "WA100-10" }, 603 { NULL , NULL } 604}; 605 606/* 607 * All hosts that use the 80c ribbon must use! 608 * The name is derived from upper byte of word 93 and the 80c ribbon. 609 */ 610u8 eighty_ninty_three (ide_drive_t *drive) 611{ 612 ide_hwif_t *hwif = drive->hwif; 613 u16 *id = drive->id; 614 int ivb = ide_in_drive_list(id, ivb_list); 615 616 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 617 return 1; 618 619 if (ivb) 620 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 621 drive->name); 622 623 if (ata_id_is_sata(id) && !ivb) 624 return 1; 625 626 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 627 goto no_80w; 628 629 /* 630 * FIXME: 631 * - change master/slave IDENTIFY order 632 * - force bit13 (80c cable present) check also for !ivb devices 633 * (unless the slave device is pre-ATA3) 634 */ 635 if ((id[ATA_ID_HW_CONFIG] & 0x4000) || 636 (ivb && (id[ATA_ID_HW_CONFIG] & 0x2000))) 637 return 1; 638 639no_80w: 640 if (drive->dev_flags & IDE_DFLAG_UDMA33_WARNED) 641 return 0; 642 643 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 644 "limiting max speed to UDMA33\n", 645 drive->name, 646 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 647 648 drive->dev_flags |= IDE_DFLAG_UDMA33_WARNED; 649 650 return 0; 651} 652 653int ide_driveid_update(ide_drive_t *drive) 654{ 655 ide_hwif_t *hwif = drive->hwif; 656 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 657 u16 *id; 658 unsigned long flags; 659 u8 stat; 660 661 /* 662 * Re-read drive->id for possible DMA mode 663 * change (copied from ide-probe.c) 664 */ 665 666 SELECT_MASK(drive, 1); 667 tp_ops->set_irq(hwif, 0); 668 msleep(50); 669 tp_ops->exec_command(hwif, ATA_CMD_ID_ATA); 670 671 if (ide_busy_sleep(hwif, WAIT_WORSTCASE, 1)) { 672 SELECT_MASK(drive, 0); 673 return 0; 674 } 675 676 msleep(50); /* wait for IRQ and ATA_DRQ */ 677 stat = tp_ops->read_status(hwif); 678 679 if (!OK_STAT(stat, ATA_DRQ, BAD_R_STAT)) { 680 SELECT_MASK(drive, 0); 681 printk("%s: CHECK for good STATUS\n", drive->name); 682 return 0; 683 } 684 local_irq_save(flags); 685 SELECT_MASK(drive, 0); 686 id = kmalloc(SECTOR_SIZE, GFP_ATOMIC); 687 if (!id) { 688 local_irq_restore(flags); 689 return 0; 690 } 691 tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); 692 (void)tp_ops->read_status(hwif); /* clear drive IRQ */ 693 local_irq_enable(); 694 local_irq_restore(flags); 695 ide_fix_driveid(id); 696 697 drive->id[ATA_ID_UDMA_MODES] = id[ATA_ID_UDMA_MODES]; 698 drive->id[ATA_ID_MWDMA_MODES] = id[ATA_ID_MWDMA_MODES]; 699 drive->id[ATA_ID_SWDMA_MODES] = id[ATA_ID_SWDMA_MODES]; 700 /* anything more ? */ 701 702 kfree(id); 703 704 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) && ide_id_dma_bug(drive)) 705 ide_dma_off(drive); 706 707 return 1; 708} 709 710int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 711{ 712 ide_hwif_t *hwif = drive->hwif; 713 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 714 u16 *id = drive->id, i; 715 int error = 0; 716 u8 stat; 717 ide_task_t task; 718 719#ifdef CONFIG_BLK_DEV_IDEDMA 720 if (hwif->dma_ops) /* check if host supports DMA */ 721 hwif->dma_ops->dma_host_set(drive, 0); 722#endif 723 724 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 725 if ((speed & 0xf8) == XFER_PIO_0 && ata_id_has_iordy(drive->id) == 0) 726 goto skip; 727 728 /* 729 * Don't use ide_wait_cmd here - it will 730 * attempt to set_geometry and recalibrate, 731 * but for some reason these don't work at 732 * this point (lost interrupt). 733 */ 734 /* 735 * Select the drive, and issue the SETFEATURES command 736 */ 737 disable_irq_nosync(hwif->irq); 738 739 /* 740 * FIXME: we race against the running IRQ here if 741 * this is called from non IRQ context. If we use 742 * disable_irq() we hang on the error path. Work 743 * is needed. 744 */ 745 746 udelay(1); 747 SELECT_DRIVE(drive); 748 SELECT_MASK(drive, 1); 749 udelay(1); 750 tp_ops->set_irq(hwif, 0); 751 752 memset(&task, 0, sizeof(task)); 753 task.tf_flags = IDE_TFLAG_OUT_FEATURE | IDE_TFLAG_OUT_NSECT; 754 task.tf.feature = SETFEATURES_XFER; 755 task.tf.nsect = speed; 756 757 tp_ops->tf_load(drive, &task); 758 759 tp_ops->exec_command(hwif, ATA_CMD_SET_FEATURES); 760 761 if (drive->quirk_list == 2) 762 tp_ops->set_irq(hwif, 1); 763 764 error = __ide_wait_stat(drive, drive->ready_stat, 765 ATA_BUSY | ATA_DRQ | ATA_ERR, 766 WAIT_CMD, &stat); 767 768 SELECT_MASK(drive, 0); 769 770 enable_irq(hwif->irq); 771 772 if (error) { 773 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 774 return error; 775 } 776 777 id[ATA_ID_UDMA_MODES] &= ~0xFF00; 778 id[ATA_ID_MWDMA_MODES] &= ~0x0F00; 779 id[ATA_ID_SWDMA_MODES] &= ~0x0F00; 780 781 skip: 782#ifdef CONFIG_BLK_DEV_IDEDMA 783 if (speed >= XFER_SW_DMA_0 && (drive->dev_flags & IDE_DFLAG_USING_DMA)) 784 hwif->dma_ops->dma_host_set(drive, 1); 785 else if (hwif->dma_ops) /* check if host supports DMA */ 786 ide_dma_off_quietly(drive); 787#endif 788 789 if (speed >= XFER_UDMA_0) { 790 i = 1 << (speed - XFER_UDMA_0); 791 id[ATA_ID_UDMA_MODES] |= (i << 8 | i); 792 } else if (speed >= XFER_MW_DMA_0) { 793 i = 1 << (speed - XFER_MW_DMA_0); 794 id[ATA_ID_MWDMA_MODES] |= (i << 8 | i); 795 } else if (speed >= XFER_SW_DMA_0) { 796 i = 1 << (speed - XFER_SW_DMA_0); 797 id[ATA_ID_SWDMA_MODES] |= (i << 8 | i); 798 } 799 800 if (!drive->init_speed) 801 drive->init_speed = speed; 802 drive->current_speed = speed; 803 return error; 804} 805 806/* 807 * This should get invoked any time we exit the driver to 808 * wait for an interrupt response from a drive. handler() points 809 * at the appropriate code to handle the next interrupt, and a 810 * timer is started to prevent us from waiting forever in case 811 * something goes wrong (see the ide_timer_expiry() handler later on). 812 * 813 * See also ide_execute_command 814 */ 815static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 816 unsigned int timeout, ide_expiry_t *expiry) 817{ 818 ide_hwif_t *hwif = drive->hwif; 819 820 BUG_ON(hwif->handler); 821 hwif->handler = handler; 822 hwif->expiry = expiry; 823 hwif->timer.expires = jiffies + timeout; 824 hwif->req_gen_timer = hwif->req_gen; 825 add_timer(&hwif->timer); 826} 827 828void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 829 unsigned int timeout, ide_expiry_t *expiry) 830{ 831 ide_hwif_t *hwif = drive->hwif; 832 unsigned long flags; 833 834 spin_lock_irqsave(&hwif->lock, flags); 835 __ide_set_handler(drive, handler, timeout, expiry); 836 spin_unlock_irqrestore(&hwif->lock, flags); 837} 838 839EXPORT_SYMBOL(ide_set_handler); 840 841/** 842 * ide_execute_command - execute an IDE command 843 * @drive: IDE drive to issue the command against 844 * @command: command byte to write 845 * @handler: handler for next phase 846 * @timeout: timeout for command 847 * @expiry: handler to run on timeout 848 * 849 * Helper function to issue an IDE command. This handles the 850 * atomicity requirements, command timing and ensures that the 851 * handler and IRQ setup do not race. All IDE command kick off 852 * should go via this function or do equivalent locking. 853 */ 854 855void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 856 unsigned timeout, ide_expiry_t *expiry) 857{ 858 ide_hwif_t *hwif = drive->hwif; 859 unsigned long flags; 860 861 spin_lock_irqsave(&hwif->lock, flags); 862 __ide_set_handler(drive, handler, timeout, expiry); 863 hwif->tp_ops->exec_command(hwif, cmd); 864 /* 865 * Drive takes 400nS to respond, we must avoid the IRQ being 866 * serviced before that. 867 * 868 * FIXME: we could skip this delay with care on non shared devices 869 */ 870 ndelay(400); 871 spin_unlock_irqrestore(&hwif->lock, flags); 872} 873EXPORT_SYMBOL(ide_execute_command); 874 875void ide_execute_pkt_cmd(ide_drive_t *drive) 876{ 877 ide_hwif_t *hwif = drive->hwif; 878 unsigned long flags; 879 880 spin_lock_irqsave(&hwif->lock, flags); 881 hwif->tp_ops->exec_command(hwif, ATA_CMD_PACKET); 882 ndelay(400); 883 spin_unlock_irqrestore(&hwif->lock, flags); 884} 885EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 886 887static inline void ide_complete_drive_reset(ide_drive_t *drive, int err) 888{ 889 struct request *rq = drive->hwif->rq; 890 891 if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET) 892 ide_end_request(drive, err ? err : 1, 0); 893} 894 895/* needed below */ 896static ide_startstop_t do_reset1 (ide_drive_t *, int); 897 898/* 899 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 900 * during an atapi drive reset operation. If the drive has not yet responded, 901 * and we have not yet hit our maximum waiting time, then the timer is restarted 902 * for another 50ms. 903 */ 904static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 905{ 906 ide_hwif_t *hwif = drive->hwif; 907 u8 stat; 908 909 SELECT_DRIVE(drive); 910 udelay (10); 911 stat = hwif->tp_ops->read_status(hwif); 912 913 if (OK_STAT(stat, 0, ATA_BUSY)) 914 printk("%s: ATAPI reset complete\n", drive->name); 915 else { 916 if (time_before(jiffies, hwif->poll_timeout)) { 917 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 918 /* continue polling */ 919 return ide_started; 920 } 921 /* end of polling */ 922 hwif->polling = 0; 923 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 924 drive->name, stat); 925 /* do it the old fashioned way */ 926 return do_reset1(drive, 1); 927 } 928 /* done polling */ 929 hwif->polling = 0; 930 ide_complete_drive_reset(drive, 0); 931 return ide_stopped; 932} 933 934static void ide_reset_report_error(ide_hwif_t *hwif, u8 err) 935{ 936 static const char *err_master_vals[] = 937 { NULL, "passed", "formatter device error", 938 "sector buffer error", "ECC circuitry error", 939 "controlling MPU error" }; 940 941 u8 err_master = err & 0x7f; 942 943 printk(KERN_ERR "%s: reset: master: ", hwif->name); 944 if (err_master && err_master < 6) 945 printk(KERN_CONT "%s", err_master_vals[err_master]); 946 else 947 printk(KERN_CONT "error (0x%02x?)", err); 948 if (err & 0x80) 949 printk(KERN_CONT "; slave: failed"); 950 printk(KERN_CONT "\n"); 951} 952 953/* 954 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 955 * during an ide reset operation. If the drives have not yet responded, 956 * and we have not yet hit our maximum waiting time, then the timer is restarted 957 * for another 50ms. 958 */ 959static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 960{ 961 ide_hwif_t *hwif = drive->hwif; 962 const struct ide_port_ops *port_ops = hwif->port_ops; 963 u8 tmp; 964 int err = 0; 965 966 if (port_ops && port_ops->reset_poll) { 967 err = port_ops->reset_poll(drive); 968 if (err) { 969 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 970 hwif->name, drive->name); 971 goto out; 972 } 973 } 974 975 tmp = hwif->tp_ops->read_status(hwif); 976 977 if (!OK_STAT(tmp, 0, ATA_BUSY)) { 978 if (time_before(jiffies, hwif->poll_timeout)) { 979 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 980 /* continue polling */ 981 return ide_started; 982 } 983 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 984 drive->failures++; 985 err = -EIO; 986 } else { 987 tmp = ide_read_error(drive); 988 989 if (tmp == 1) { 990 printk(KERN_INFO "%s: reset: success\n", hwif->name); 991 drive->failures = 0; 992 } else { 993 ide_reset_report_error(hwif, tmp); 994 drive->failures++; 995 err = -EIO; 996 } 997 } 998out: 999 hwif->polling = 0; /* done polling */ 1000 ide_complete_drive_reset(drive, err); 1001 return ide_stopped; 1002} 1003 1004static void ide_disk_pre_reset(ide_drive_t *drive) 1005{ 1006 int legacy = (drive->id[ATA_ID_CFS_ENABLE_2] & 0x0400) ? 0 : 1; 1007 1008 drive->special.all = 0; 1009 drive->special.b.set_geometry = legacy; 1010 drive->special.b.recalibrate = legacy; 1011 1012 drive->mult_count = 0; 1013 drive->dev_flags &= ~IDE_DFLAG_PARKED; 1014 1015 if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0 && 1016 (drive->dev_flags & IDE_DFLAG_USING_DMA) == 0) 1017 drive->mult_req = 0; 1018 1019 if (drive->mult_req != drive->mult_count) 1020 drive->special.b.set_multmode = 1; 1021} 1022 1023static void pre_reset(ide_drive_t *drive) 1024{ 1025 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1026 1027 if (drive->media == ide_disk) 1028 ide_disk_pre_reset(drive); 1029 else 1030 drive->dev_flags |= IDE_DFLAG_POST_RESET; 1031 1032 if (drive->dev_flags & IDE_DFLAG_USING_DMA) { 1033 if (drive->crc_count) 1034 ide_check_dma_crc(drive); 1035 else 1036 ide_dma_off(drive); 1037 } 1038 1039 if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0) { 1040 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0) { 1041 drive->dev_flags &= ~IDE_DFLAG_UNMASK; 1042 drive->io_32bit = 0; 1043 } 1044 return; 1045 } 1046 1047 if (port_ops && port_ops->pre_reset) 1048 port_ops->pre_reset(drive); 1049 1050 if (drive->current_speed != 0xff) 1051 drive->desired_speed = drive->current_speed; 1052 drive->current_speed = 0xff; 1053} 1054 1055/* 1056 * do_reset1() attempts to recover a confused drive by resetting it. 1057 * Unfortunately, resetting a disk drive actually resets all devices on 1058 * the same interface, so it can really be thought of as resetting the 1059 * interface rather than resetting the drive. 1060 * 1061 * ATAPI devices have their own reset mechanism which allows them to be 1062 * individually reset without clobbering other devices on the same interface. 1063 * 1064 * Unfortunately, the IDE interface does not generate an interrupt to let 1065 * us know when the reset operation has finished, so we must poll for this. 1066 * Equally poor, though, is the fact that this may a very long time to complete, 1067 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1068 * we set a timer to poll at 50ms intervals. 1069 */ 1070static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1071{ 1072 ide_hwif_t *hwif = drive->hwif; 1073 struct ide_io_ports *io_ports = &hwif->io_ports; 1074 const struct ide_tp_ops *tp_ops = hwif->tp_ops; 1075 const struct ide_port_ops *port_ops; 1076 ide_drive_t *tdrive; 1077 unsigned long flags, timeout; 1078 int i; 1079 DEFINE_WAIT(wait); 1080 1081 spin_lock_irqsave(&hwif->lock, flags); 1082 1083 /* We must not reset with running handlers */ 1084 BUG_ON(hwif->handler != NULL); 1085 1086 /* For an ATAPI device, first try an ATAPI SRST. */ 1087 if (drive->media != ide_disk && !do_not_try_atapi) { 1088 pre_reset(drive); 1089 SELECT_DRIVE(drive); 1090 udelay (20); 1091 tp_ops->exec_command(hwif, ATA_CMD_DEV_RESET); 1092 ndelay(400); 1093 hwif->poll_timeout = jiffies + WAIT_WORSTCASE; 1094 hwif->polling = 1; 1095 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1096 spin_unlock_irqrestore(&hwif->lock, flags); 1097 return ide_started; 1098 } 1099 1100 /* We must not disturb devices in the IDE_DFLAG_PARKED state. */ 1101 do { 1102 unsigned long now; 1103 1104 prepare_to_wait(&ide_park_wq, &wait, TASK_UNINTERRUPTIBLE); 1105 timeout = jiffies; 1106 ide_port_for_each_present_dev(i, tdrive, hwif) { 1107 if ((tdrive->dev_flags & IDE_DFLAG_PARKED) && 1108 time_after(tdrive->sleep, timeout)) 1109 timeout = tdrive->sleep; 1110 } 1111 1112 now = jiffies; 1113 if (time_before_eq(timeout, now)) 1114 break; 1115 1116 spin_unlock_irqrestore(&hwif->lock, flags); 1117 timeout = schedule_timeout_uninterruptible(timeout - now); 1118 spin_lock_irqsave(&hwif->lock, flags); 1119 } while (timeout); 1120 finish_wait(&ide_park_wq, &wait); 1121 1122 /* 1123 * First, reset any device state data we were maintaining 1124 * for any of the drives on this interface. 1125 */ 1126 ide_port_for_each_dev(i, tdrive, hwif) 1127 pre_reset(tdrive); 1128 1129 if (io_ports->ctl_addr == 0) { 1130 spin_unlock_irqrestore(&hwif->lock, flags); 1131 ide_complete_drive_reset(drive, -ENXIO); 1132 return ide_stopped; 1133 } 1134 1135 /* 1136 * Note that we also set nIEN while resetting the device, 1137 * to mask unwanted interrupts from the interface during the reset. 1138 * However, due to the design of PC hardware, this will cause an 1139 * immediate interrupt due to the edge transition it produces. 1140 * This single interrupt gives us a "fast poll" for drives that 1141 * recover from reset very quickly, saving us the first 50ms wait time. 1142 * 1143 * TODO: add ->softreset method and stop abusing ->set_irq 1144 */ 1145 /* set SRST and nIEN */ 1146 tp_ops->set_irq(hwif, 4); 1147 /* more than enough time */ 1148 udelay(10); 1149 /* clear SRST, leave nIEN (unless device is on the quirk list) */ 1150 tp_ops->set_irq(hwif, drive->quirk_list == 2); 1151 /* more than enough time */ 1152 udelay(10); 1153 hwif->poll_timeout = jiffies + WAIT_WORSTCASE; 1154 hwif->polling = 1; 1155 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1156 1157 /* 1158 * Some weird controller like resetting themselves to a strange 1159 * state when the disks are reset this way. At least, the Winbond 1160 * 553 documentation says that 1161 */ 1162 port_ops = hwif->port_ops; 1163 if (port_ops && port_ops->resetproc) 1164 port_ops->resetproc(drive); 1165 1166 spin_unlock_irqrestore(&hwif->lock, flags); 1167 return ide_started; 1168} 1169 1170/* 1171 * ide_do_reset() is the entry point to the drive/interface reset code. 1172 */ 1173 1174ide_startstop_t ide_do_reset (ide_drive_t *drive) 1175{ 1176 return do_reset1(drive, 0); 1177} 1178 1179EXPORT_SYMBOL(ide_do_reset); 1180 1181/* 1182 * ide_wait_not_busy() waits for the currently selected device on the hwif 1183 * to report a non-busy status, see comments in ide_probe_port(). 1184 */ 1185int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1186{ 1187 u8 stat = 0; 1188 1189 while(timeout--) { 1190 /* 1191 * Turn this into a schedule() sleep once I'm sure 1192 * about locking issues (2.5 work ?). 1193 */ 1194 mdelay(1); 1195 stat = hwif->tp_ops->read_status(hwif); 1196 if ((stat & ATA_BUSY) == 0) 1197 return 0; 1198 /* 1199 * Assume a value of 0xff means nothing is connected to 1200 * the interface and it doesn't implement the pull-down 1201 * resistor on D7. 1202 */ 1203 if (stat == 0xff) 1204 return -ENODEV; 1205 touch_softlockup_watchdog(); 1206 touch_nmi_watchdog(); 1207 } 1208 return -EBUSY; 1209} 1210