ide-iops.c revision ca545c1e75cd017bfd9a9b6c4f81f9b82ba20947
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat <alan@redhat.com> 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/hdreg.h> 22#include <linux/ide.h> 23#include <linux/bitops.h> 24#include <linux/nmi.h> 25 26#include <asm/byteorder.h> 27#include <asm/irq.h> 28#include <asm/uaccess.h> 29#include <asm/io.h> 30 31/* 32 * Conventional PIO operations for ATA devices 33 */ 34 35static u8 ide_inb (unsigned long port) 36{ 37 return (u8) inb(port); 38} 39 40static u16 ide_inw (unsigned long port) 41{ 42 return (u16) inw(port); 43} 44 45static void ide_outb (u8 val, unsigned long port) 46{ 47 outb(val, port); 48} 49 50static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 51{ 52 outb(addr, port); 53} 54 55static void ide_outw (u16 val, unsigned long port) 56{ 57 outw(val, port); 58} 59 60void default_hwif_iops (ide_hwif_t *hwif) 61{ 62 hwif->OUTB = ide_outb; 63 hwif->OUTBSYNC = ide_outbsync; 64 hwif->OUTW = ide_outw; 65 hwif->INB = ide_inb; 66 hwif->INW = ide_inw; 67} 68 69/* 70 * MMIO operations, typically used for SATA controllers 71 */ 72 73static u8 ide_mm_inb (unsigned long port) 74{ 75 return (u8) readb((void __iomem *) port); 76} 77 78static u16 ide_mm_inw (unsigned long port) 79{ 80 return (u16) readw((void __iomem *) port); 81} 82 83static void ide_mm_outb (u8 value, unsigned long port) 84{ 85 writeb(value, (void __iomem *) port); 86} 87 88static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 89{ 90 writeb(value, (void __iomem *) port); 91} 92 93static void ide_mm_outw (u16 value, unsigned long port) 94{ 95 writew(value, (void __iomem *) port); 96} 97 98void default_hwif_mmiops (ide_hwif_t *hwif) 99{ 100 hwif->OUTB = ide_mm_outb; 101 /* Most systems will need to override OUTBSYNC, alas however 102 this one is controller specific! */ 103 hwif->OUTBSYNC = ide_mm_outbsync; 104 hwif->OUTW = ide_mm_outw; 105 hwif->INB = ide_mm_inb; 106 hwif->INW = ide_mm_inw; 107} 108 109EXPORT_SYMBOL(default_hwif_mmiops); 110 111void SELECT_DRIVE (ide_drive_t *drive) 112{ 113 ide_hwif_t *hwif = drive->hwif; 114 const struct ide_port_ops *port_ops = hwif->port_ops; 115 116 if (port_ops && port_ops->selectproc) 117 port_ops->selectproc(drive); 118 119 hwif->OUTB(drive->select.all, hwif->io_ports.device_addr); 120} 121 122void SELECT_MASK (ide_drive_t *drive, int mask) 123{ 124 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 125 126 if (port_ops && port_ops->maskproc) 127 port_ops->maskproc(drive, mask); 128} 129 130static void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 131{ 132 ide_hwif_t *hwif = drive->hwif; 133 struct ide_io_ports *io_ports = &hwif->io_ports; 134 struct ide_taskfile *tf = &task->tf; 135 void (*tf_outb)(u8 addr, unsigned long port); 136 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 137 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 138 139 if (mmio) 140 tf_outb = ide_mm_outb; 141 else 142 tf_outb = ide_outb; 143 144 if (task->tf_flags & IDE_TFLAG_FLAGGED) 145 HIHI = 0xFF; 146 147 ide_set_irq(drive, 1); 148 149 if ((task->tf_flags & IDE_TFLAG_NO_SELECT_MASK) == 0) 150 SELECT_MASK(drive, 0); 151 152 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 153 u16 data = (tf->hob_data << 8) | tf->data; 154 155 if (mmio) 156 writew(data, (void __iomem *)io_ports->data_addr); 157 else 158 outw(data, io_ports->data_addr); 159 } 160 161 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 162 tf_outb(tf->hob_feature, io_ports->feature_addr); 163 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 164 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 165 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 166 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 167 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 168 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 169 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 170 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 171 172 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 173 tf_outb(tf->feature, io_ports->feature_addr); 174 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 175 tf_outb(tf->nsect, io_ports->nsect_addr); 176 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 177 tf_outb(tf->lbal, io_ports->lbal_addr); 178 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 179 tf_outb(tf->lbam, io_ports->lbam_addr); 180 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 181 tf_outb(tf->lbah, io_ports->lbah_addr); 182 183 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 184 tf_outb((tf->device & HIHI) | drive->select.all, 185 io_ports->device_addr); 186} 187 188static void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 189{ 190 ide_hwif_t *hwif = drive->hwif; 191 struct ide_io_ports *io_ports = &hwif->io_ports; 192 struct ide_taskfile *tf = &task->tf; 193 void (*tf_outb)(u8 addr, unsigned long port); 194 u8 (*tf_inb)(unsigned long port); 195 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 196 197 if (mmio) { 198 tf_outb = ide_mm_outb; 199 tf_inb = ide_mm_inb; 200 } else { 201 tf_outb = ide_outb; 202 tf_inb = ide_inb; 203 } 204 205 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 206 u16 data; 207 208 if (mmio) 209 data = readw((void __iomem *)io_ports->data_addr); 210 else 211 data = inw(io_ports->data_addr); 212 213 tf->data = data & 0xff; 214 tf->hob_data = (data >> 8) & 0xff; 215 } 216 217 /* be sure we're looking at the low order bits */ 218 tf_outb(drive->ctl & ~0x80, io_ports->ctl_addr); 219 220 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 221 tf->nsect = tf_inb(io_ports->nsect_addr); 222 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 223 tf->lbal = tf_inb(io_ports->lbal_addr); 224 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 225 tf->lbam = tf_inb(io_ports->lbam_addr); 226 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 227 tf->lbah = tf_inb(io_ports->lbah_addr); 228 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 229 tf->device = tf_inb(io_ports->device_addr); 230 231 if (task->tf_flags & IDE_TFLAG_LBA48) { 232 tf_outb(drive->ctl | 0x80, io_ports->ctl_addr); 233 234 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 235 tf->hob_feature = tf_inb(io_ports->feature_addr); 236 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 237 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 238 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 239 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 240 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 241 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 242 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 243 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 244 } 245} 246 247/* 248 * Some localbus EIDE interfaces require a special access sequence 249 * when using 32-bit I/O instructions to transfer data. We call this 250 * the "vlb_sync" sequence, which consists of three successive reads 251 * of the sector count register location, with interrupts disabled 252 * to ensure that the reads all happen together. 253 */ 254static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 255{ 256 (void) HWIF(drive)->INB(port); 257 (void) HWIF(drive)->INB(port); 258 (void) HWIF(drive)->INB(port); 259} 260 261/* 262 * This is used for most PIO data transfers *from* the IDE interface 263 * 264 * These routines will round up any request for an odd number of bytes, 265 * so if an odd len is specified, be sure that there's at least one 266 * extra byte allocated for the buffer. 267 */ 268static void ata_input_data(ide_drive_t *drive, struct request *rq, 269 void *buf, unsigned int len) 270{ 271 ide_hwif_t *hwif = drive->hwif; 272 struct ide_io_ports *io_ports = &hwif->io_ports; 273 unsigned long data_addr = io_ports->data_addr; 274 u8 io_32bit = drive->io_32bit; 275 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 276 277 len++; 278 279 if (io_32bit) { 280 unsigned long uninitialized_var(flags); 281 282 if (io_32bit & 2) { 283 local_irq_save(flags); 284 ata_vlb_sync(drive, io_ports->nsect_addr); 285 } 286 287 if (mmio) 288 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 289 else 290 insl(data_addr, buf, len / 4); 291 292 if (io_32bit & 2) 293 local_irq_restore(flags); 294 295 if ((len & 3) >= 2) { 296 if (mmio) 297 __ide_mm_insw((void __iomem *)data_addr, 298 (u8 *)buf + (len & ~3), 1); 299 else 300 insw(data_addr, (u8 *)buf + (len & ~3), 1); 301 } 302 } else { 303 if (mmio) 304 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 305 else 306 insw(data_addr, buf, len / 2); 307 } 308} 309 310/* 311 * This is used for most PIO data transfers *to* the IDE interface 312 */ 313static void ata_output_data(ide_drive_t *drive, struct request *rq, 314 void *buf, unsigned int len) 315{ 316 ide_hwif_t *hwif = drive->hwif; 317 struct ide_io_ports *io_ports = &hwif->io_ports; 318 unsigned long data_addr = io_ports->data_addr; 319 u8 io_32bit = drive->io_32bit; 320 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 321 322 if (io_32bit) { 323 unsigned long uninitialized_var(flags); 324 325 if (io_32bit & 2) { 326 local_irq_save(flags); 327 ata_vlb_sync(drive, io_ports->nsect_addr); 328 } 329 330 if (mmio) 331 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 332 else 333 outsl(data_addr, buf, len / 4); 334 335 if (io_32bit & 2) 336 local_irq_restore(flags); 337 338 if ((len & 3) >= 2) { 339 if (mmio) 340 __ide_mm_outsw((void __iomem *)data_addr, 341 (u8 *)buf + (len & ~3), 1); 342 else 343 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 344 } 345 } else { 346 if (mmio) 347 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 348 else 349 outsw(data_addr, buf, len / 2); 350 } 351} 352 353void default_hwif_transport(ide_hwif_t *hwif) 354{ 355 hwif->tf_load = ide_tf_load; 356 hwif->tf_read = ide_tf_read; 357 358 hwif->input_data = ata_input_data; 359 hwif->output_data = ata_output_data; 360} 361 362void ide_fix_driveid (struct hd_driveid *id) 363{ 364#ifndef __LITTLE_ENDIAN 365# ifdef __BIG_ENDIAN 366 int i; 367 u16 *stringcast; 368 369 id->config = __le16_to_cpu(id->config); 370 id->cyls = __le16_to_cpu(id->cyls); 371 id->reserved2 = __le16_to_cpu(id->reserved2); 372 id->heads = __le16_to_cpu(id->heads); 373 id->track_bytes = __le16_to_cpu(id->track_bytes); 374 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 375 id->sectors = __le16_to_cpu(id->sectors); 376 id->vendor0 = __le16_to_cpu(id->vendor0); 377 id->vendor1 = __le16_to_cpu(id->vendor1); 378 id->vendor2 = __le16_to_cpu(id->vendor2); 379 stringcast = (u16 *)&id->serial_no[0]; 380 for (i = 0; i < (20/2); i++) 381 stringcast[i] = __le16_to_cpu(stringcast[i]); 382 id->buf_type = __le16_to_cpu(id->buf_type); 383 id->buf_size = __le16_to_cpu(id->buf_size); 384 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 385 stringcast = (u16 *)&id->fw_rev[0]; 386 for (i = 0; i < (8/2); i++) 387 stringcast[i] = __le16_to_cpu(stringcast[i]); 388 stringcast = (u16 *)&id->model[0]; 389 for (i = 0; i < (40/2); i++) 390 stringcast[i] = __le16_to_cpu(stringcast[i]); 391 id->dword_io = __le16_to_cpu(id->dword_io); 392 id->reserved50 = __le16_to_cpu(id->reserved50); 393 id->field_valid = __le16_to_cpu(id->field_valid); 394 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 395 id->cur_heads = __le16_to_cpu(id->cur_heads); 396 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 397 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 398 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 399 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 400 id->dma_1word = __le16_to_cpu(id->dma_1word); 401 id->dma_mword = __le16_to_cpu(id->dma_mword); 402 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 403 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 404 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 405 id->eide_pio = __le16_to_cpu(id->eide_pio); 406 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 407 for (i = 0; i < 2; ++i) 408 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 409 for (i = 0; i < 4; ++i) 410 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 411 id->queue_depth = __le16_to_cpu(id->queue_depth); 412 for (i = 0; i < 4; ++i) 413 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 414 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 415 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 416 id->command_set_1 = __le16_to_cpu(id->command_set_1); 417 id->command_set_2 = __le16_to_cpu(id->command_set_2); 418 id->cfsse = __le16_to_cpu(id->cfsse); 419 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 420 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 421 id->csf_default = __le16_to_cpu(id->csf_default); 422 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 423 id->trseuc = __le16_to_cpu(id->trseuc); 424 id->trsEuc = __le16_to_cpu(id->trsEuc); 425 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 426 id->mprc = __le16_to_cpu(id->mprc); 427 id->hw_config = __le16_to_cpu(id->hw_config); 428 id->acoustic = __le16_to_cpu(id->acoustic); 429 id->msrqs = __le16_to_cpu(id->msrqs); 430 id->sxfert = __le16_to_cpu(id->sxfert); 431 id->sal = __le16_to_cpu(id->sal); 432 id->spg = __le32_to_cpu(id->spg); 433 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 434 for (i = 0; i < 22; i++) 435 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 436 id->last_lun = __le16_to_cpu(id->last_lun); 437 id->word127 = __le16_to_cpu(id->word127); 438 id->dlf = __le16_to_cpu(id->dlf); 439 id->csfo = __le16_to_cpu(id->csfo); 440 for (i = 0; i < 26; i++) 441 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 442 id->word156 = __le16_to_cpu(id->word156); 443 for (i = 0; i < 3; i++) 444 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 445 id->cfa_power = __le16_to_cpu(id->cfa_power); 446 for (i = 0; i < 14; i++) 447 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 448 for (i = 0; i < 31; i++) 449 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 450 for (i = 0; i < 48; i++) 451 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 452 id->integrity_word = __le16_to_cpu(id->integrity_word); 453# else 454# error "Please fix <asm/byteorder.h>" 455# endif 456#endif 457} 458 459/* 460 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 461 * removing leading/trailing blanks and compressing internal blanks. 462 * It is primarily used to tidy up the model name/number fields as 463 * returned by the WIN_[P]IDENTIFY commands. 464 */ 465 466void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 467{ 468 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 469 470 if (byteswap) { 471 /* convert from big-endian to host byte order */ 472 for (p = end ; p != s;) { 473 unsigned short *pp = (unsigned short *) (p -= 2); 474 *pp = ntohs(*pp); 475 } 476 } 477 /* strip leading blanks */ 478 while (s != end && *s == ' ') 479 ++s; 480 /* compress internal blanks and strip trailing blanks */ 481 while (s != end && *s) { 482 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 483 *p++ = *(s-1); 484 } 485 /* wipe out trailing garbage */ 486 while (p != end) 487 *p++ = '\0'; 488} 489 490EXPORT_SYMBOL(ide_fixstring); 491 492/* 493 * Needed for PCI irq sharing 494 */ 495int drive_is_ready (ide_drive_t *drive) 496{ 497 ide_hwif_t *hwif = HWIF(drive); 498 u8 stat = 0; 499 500 if (drive->waiting_for_dma) 501 return hwif->dma_ops->dma_test_irq(drive); 502 503#if 0 504 /* need to guarantee 400ns since last command was issued */ 505 udelay(1); 506#endif 507 508 /* 509 * We do a passive status test under shared PCI interrupts on 510 * cards that truly share the ATA side interrupt, but may also share 511 * an interrupt with another pci card/device. We make no assumptions 512 * about possible isa-pnp and pci-pnp issues yet. 513 */ 514 if (hwif->io_ports.ctl_addr) 515 stat = ide_read_altstatus(drive); 516 else 517 /* Note: this may clear a pending IRQ!! */ 518 stat = ide_read_status(drive); 519 520 if (stat & BUSY_STAT) 521 /* drive busy: definitely not interrupting */ 522 return 0; 523 524 /* drive ready: *might* be interrupting */ 525 return 1; 526} 527 528EXPORT_SYMBOL(drive_is_ready); 529 530/* 531 * This routine busy-waits for the drive status to be not "busy". 532 * It then checks the status for all of the "good" bits and none 533 * of the "bad" bits, and if all is okay it returns 0. All other 534 * cases return error -- caller may then invoke ide_error(). 535 * 536 * This routine should get fixed to not hog the cpu during extra long waits.. 537 * That could be done by busy-waiting for the first jiffy or two, and then 538 * setting a timer to wake up at half second intervals thereafter, 539 * until timeout is achieved, before timing out. 540 */ 541static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 542{ 543 unsigned long flags; 544 int i; 545 u8 stat; 546 547 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 548 stat = ide_read_status(drive); 549 550 if (stat & BUSY_STAT) { 551 local_irq_set(flags); 552 timeout += jiffies; 553 while ((stat = ide_read_status(drive)) & BUSY_STAT) { 554 if (time_after(jiffies, timeout)) { 555 /* 556 * One last read after the timeout in case 557 * heavy interrupt load made us not make any 558 * progress during the timeout.. 559 */ 560 stat = ide_read_status(drive); 561 if (!(stat & BUSY_STAT)) 562 break; 563 564 local_irq_restore(flags); 565 *rstat = stat; 566 return -EBUSY; 567 } 568 } 569 local_irq_restore(flags); 570 } 571 /* 572 * Allow status to settle, then read it again. 573 * A few rare drives vastly violate the 400ns spec here, 574 * so we'll wait up to 10usec for a "good" status 575 * rather than expensively fail things immediately. 576 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 577 */ 578 for (i = 0; i < 10; i++) { 579 udelay(1); 580 stat = ide_read_status(drive); 581 582 if (OK_STAT(stat, good, bad)) { 583 *rstat = stat; 584 return 0; 585 } 586 } 587 *rstat = stat; 588 return -EFAULT; 589} 590 591/* 592 * In case of error returns error value after doing "*startstop = ide_error()". 593 * The caller should return the updated value of "startstop" in this case, 594 * "startstop" is unchanged when the function returns 0. 595 */ 596int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 597{ 598 int err; 599 u8 stat; 600 601 /* bail early if we've exceeded max_failures */ 602 if (drive->max_failures && (drive->failures > drive->max_failures)) { 603 *startstop = ide_stopped; 604 return 1; 605 } 606 607 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 608 609 if (err) { 610 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 611 *startstop = ide_error(drive, s, stat); 612 } 613 614 return err; 615} 616 617EXPORT_SYMBOL(ide_wait_stat); 618 619/** 620 * ide_in_drive_list - look for drive in black/white list 621 * @id: drive identifier 622 * @drive_table: list to inspect 623 * 624 * Look for a drive in the blacklist and the whitelist tables 625 * Returns 1 if the drive is found in the table. 626 */ 627 628int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 629{ 630 for ( ; drive_table->id_model; drive_table++) 631 if ((!strcmp(drive_table->id_model, id->model)) && 632 (!drive_table->id_firmware || 633 strstr(id->fw_rev, drive_table->id_firmware))) 634 return 1; 635 return 0; 636} 637 638EXPORT_SYMBOL_GPL(ide_in_drive_list); 639 640/* 641 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 642 * We list them here and depend on the device side cable detection for them. 643 * 644 * Some optical devices with the buggy firmwares have the same problem. 645 */ 646static const struct drive_list_entry ivb_list[] = { 647 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 648 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 649 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 650 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 651 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 652 { NULL , NULL } 653}; 654 655/* 656 * All hosts that use the 80c ribbon must use! 657 * The name is derived from upper byte of word 93 and the 80c ribbon. 658 */ 659u8 eighty_ninty_three (ide_drive_t *drive) 660{ 661 ide_hwif_t *hwif = drive->hwif; 662 struct hd_driveid *id = drive->id; 663 int ivb = ide_in_drive_list(id, ivb_list); 664 665 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 666 return 1; 667 668 if (ivb) 669 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 670 drive->name); 671 672 if (ide_dev_is_sata(id) && !ivb) 673 return 1; 674 675 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 676 goto no_80w; 677 678 /* 679 * FIXME: 680 * - change master/slave IDENTIFY order 681 * - force bit13 (80c cable present) check also for !ivb devices 682 * (unless the slave device is pre-ATA3) 683 */ 684 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 685 return 1; 686 687no_80w: 688 if (drive->udma33_warned == 1) 689 return 0; 690 691 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 692 "limiting max speed to UDMA33\n", 693 drive->name, 694 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 695 696 drive->udma33_warned = 1; 697 698 return 0; 699} 700 701int ide_driveid_update(ide_drive_t *drive) 702{ 703 ide_hwif_t *hwif = drive->hwif; 704 struct hd_driveid *id; 705 unsigned long timeout, flags; 706 u8 stat; 707 708 /* 709 * Re-read drive->id for possible DMA mode 710 * change (copied from ide-probe.c) 711 */ 712 713 SELECT_MASK(drive, 1); 714 ide_set_irq(drive, 1); 715 msleep(50); 716 hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr); 717 timeout = jiffies + WAIT_WORSTCASE; 718 do { 719 if (time_after(jiffies, timeout)) { 720 SELECT_MASK(drive, 0); 721 return 0; /* drive timed-out */ 722 } 723 724 msleep(50); /* give drive a breather */ 725 stat = ide_read_altstatus(drive); 726 } while (stat & BUSY_STAT); 727 728 msleep(50); /* wait for IRQ and DRQ_STAT */ 729 stat = ide_read_status(drive); 730 731 if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) { 732 SELECT_MASK(drive, 0); 733 printk("%s: CHECK for good STATUS\n", drive->name); 734 return 0; 735 } 736 local_irq_save(flags); 737 SELECT_MASK(drive, 0); 738 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 739 if (!id) { 740 local_irq_restore(flags); 741 return 0; 742 } 743 hwif->input_data(drive, NULL, id, SECTOR_SIZE); 744 (void)ide_read_status(drive); /* clear drive IRQ */ 745 local_irq_enable(); 746 local_irq_restore(flags); 747 ide_fix_driveid(id); 748 if (id) { 749 drive->id->dma_ultra = id->dma_ultra; 750 drive->id->dma_mword = id->dma_mword; 751 drive->id->dma_1word = id->dma_1word; 752 /* anything more ? */ 753 kfree(id); 754 755 if (drive->using_dma && ide_id_dma_bug(drive)) 756 ide_dma_off(drive); 757 } 758 759 return 1; 760} 761 762int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 763{ 764 ide_hwif_t *hwif = drive->hwif; 765 struct ide_io_ports *io_ports = &hwif->io_ports; 766 int error = 0; 767 u8 stat; 768 769// while (HWGROUP(drive)->busy) 770// msleep(50); 771 772#ifdef CONFIG_BLK_DEV_IDEDMA 773 if (hwif->dma_ops) /* check if host supports DMA */ 774 hwif->dma_ops->dma_host_set(drive, 0); 775#endif 776 777 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 778 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) 779 goto skip; 780 781 /* 782 * Don't use ide_wait_cmd here - it will 783 * attempt to set_geometry and recalibrate, 784 * but for some reason these don't work at 785 * this point (lost interrupt). 786 */ 787 /* 788 * Select the drive, and issue the SETFEATURES command 789 */ 790 disable_irq_nosync(hwif->irq); 791 792 /* 793 * FIXME: we race against the running IRQ here if 794 * this is called from non IRQ context. If we use 795 * disable_irq() we hang on the error path. Work 796 * is needed. 797 */ 798 799 udelay(1); 800 SELECT_DRIVE(drive); 801 SELECT_MASK(drive, 0); 802 udelay(1); 803 ide_set_irq(drive, 0); 804 hwif->OUTB(speed, io_ports->nsect_addr); 805 hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr); 806 hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr); 807 if (drive->quirk_list == 2) 808 ide_set_irq(drive, 1); 809 810 error = __ide_wait_stat(drive, drive->ready_stat, 811 BUSY_STAT|DRQ_STAT|ERR_STAT, 812 WAIT_CMD, &stat); 813 814 SELECT_MASK(drive, 0); 815 816 enable_irq(hwif->irq); 817 818 if (error) { 819 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 820 return error; 821 } 822 823 drive->id->dma_ultra &= ~0xFF00; 824 drive->id->dma_mword &= ~0x0F00; 825 drive->id->dma_1word &= ~0x0F00; 826 827 skip: 828#ifdef CONFIG_BLK_DEV_IDEDMA 829 if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) && 830 drive->using_dma) 831 hwif->dma_ops->dma_host_set(drive, 1); 832 else if (hwif->dma_ops) /* check if host supports DMA */ 833 ide_dma_off_quietly(drive); 834#endif 835 836 switch(speed) { 837 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 838 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 839 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 840 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 841 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 842 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 843 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 844 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 845 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 846 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 847 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 848 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 849 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 850 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 851 default: break; 852 } 853 if (!drive->init_speed) 854 drive->init_speed = speed; 855 drive->current_speed = speed; 856 return error; 857} 858 859/* 860 * This should get invoked any time we exit the driver to 861 * wait for an interrupt response from a drive. handler() points 862 * at the appropriate code to handle the next interrupt, and a 863 * timer is started to prevent us from waiting forever in case 864 * something goes wrong (see the ide_timer_expiry() handler later on). 865 * 866 * See also ide_execute_command 867 */ 868static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 869 unsigned int timeout, ide_expiry_t *expiry) 870{ 871 ide_hwgroup_t *hwgroup = HWGROUP(drive); 872 873 BUG_ON(hwgroup->handler); 874 hwgroup->handler = handler; 875 hwgroup->expiry = expiry; 876 hwgroup->timer.expires = jiffies + timeout; 877 hwgroup->req_gen_timer = hwgroup->req_gen; 878 add_timer(&hwgroup->timer); 879} 880 881void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 882 unsigned int timeout, ide_expiry_t *expiry) 883{ 884 unsigned long flags; 885 spin_lock_irqsave(&ide_lock, flags); 886 __ide_set_handler(drive, handler, timeout, expiry); 887 spin_unlock_irqrestore(&ide_lock, flags); 888} 889 890EXPORT_SYMBOL(ide_set_handler); 891 892/** 893 * ide_execute_command - execute an IDE command 894 * @drive: IDE drive to issue the command against 895 * @command: command byte to write 896 * @handler: handler for next phase 897 * @timeout: timeout for command 898 * @expiry: handler to run on timeout 899 * 900 * Helper function to issue an IDE command. This handles the 901 * atomicity requirements, command timing and ensures that the 902 * handler and IRQ setup do not race. All IDE command kick off 903 * should go via this function or do equivalent locking. 904 */ 905 906void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 907 unsigned timeout, ide_expiry_t *expiry) 908{ 909 unsigned long flags; 910 ide_hwif_t *hwif = HWIF(drive); 911 912 spin_lock_irqsave(&ide_lock, flags); 913 __ide_set_handler(drive, handler, timeout, expiry); 914 hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr); 915 /* 916 * Drive takes 400nS to respond, we must avoid the IRQ being 917 * serviced before that. 918 * 919 * FIXME: we could skip this delay with care on non shared devices 920 */ 921 ndelay(400); 922 spin_unlock_irqrestore(&ide_lock, flags); 923} 924EXPORT_SYMBOL(ide_execute_command); 925 926void ide_execute_pkt_cmd(ide_drive_t *drive) 927{ 928 ide_hwif_t *hwif = drive->hwif; 929 unsigned long flags; 930 931 spin_lock_irqsave(&ide_lock, flags); 932 hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr); 933 ndelay(400); 934 spin_unlock_irqrestore(&ide_lock, flags); 935} 936EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 937 938/* needed below */ 939static ide_startstop_t do_reset1 (ide_drive_t *, int); 940 941/* 942 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 943 * during an atapi drive reset operation. If the drive has not yet responded, 944 * and we have not yet hit our maximum waiting time, then the timer is restarted 945 * for another 50ms. 946 */ 947static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 948{ 949 ide_hwgroup_t *hwgroup = HWGROUP(drive); 950 u8 stat; 951 952 SELECT_DRIVE(drive); 953 udelay (10); 954 stat = ide_read_status(drive); 955 956 if (OK_STAT(stat, 0, BUSY_STAT)) 957 printk("%s: ATAPI reset complete\n", drive->name); 958 else { 959 if (time_before(jiffies, hwgroup->poll_timeout)) { 960 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 961 /* continue polling */ 962 return ide_started; 963 } 964 /* end of polling */ 965 hwgroup->polling = 0; 966 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 967 drive->name, stat); 968 /* do it the old fashioned way */ 969 return do_reset1(drive, 1); 970 } 971 /* done polling */ 972 hwgroup->polling = 0; 973 hwgroup->resetting = 0; 974 return ide_stopped; 975} 976 977/* 978 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 979 * during an ide reset operation. If the drives have not yet responded, 980 * and we have not yet hit our maximum waiting time, then the timer is restarted 981 * for another 50ms. 982 */ 983static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 984{ 985 ide_hwgroup_t *hwgroup = HWGROUP(drive); 986 ide_hwif_t *hwif = HWIF(drive); 987 const struct ide_port_ops *port_ops = hwif->port_ops; 988 u8 tmp; 989 990 if (port_ops && port_ops->reset_poll) { 991 if (port_ops->reset_poll(drive)) { 992 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 993 hwif->name, drive->name); 994 return ide_stopped; 995 } 996 } 997 998 tmp = ide_read_status(drive); 999 1000 if (!OK_STAT(tmp, 0, BUSY_STAT)) { 1001 if (time_before(jiffies, hwgroup->poll_timeout)) { 1002 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1003 /* continue polling */ 1004 return ide_started; 1005 } 1006 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 1007 drive->failures++; 1008 } else { 1009 printk("%s: reset: ", hwif->name); 1010 tmp = ide_read_error(drive); 1011 1012 if (tmp == 1) { 1013 printk("success\n"); 1014 drive->failures = 0; 1015 } else { 1016 drive->failures++; 1017 printk("master: "); 1018 switch (tmp & 0x7f) { 1019 case 1: printk("passed"); 1020 break; 1021 case 2: printk("formatter device error"); 1022 break; 1023 case 3: printk("sector buffer error"); 1024 break; 1025 case 4: printk("ECC circuitry error"); 1026 break; 1027 case 5: printk("controlling MPU error"); 1028 break; 1029 default:printk("error (0x%02x?)", tmp); 1030 } 1031 if (tmp & 0x80) 1032 printk("; slave: failed"); 1033 printk("\n"); 1034 } 1035 } 1036 hwgroup->polling = 0; /* done polling */ 1037 hwgroup->resetting = 0; /* done reset attempt */ 1038 return ide_stopped; 1039} 1040 1041static void ide_disk_pre_reset(ide_drive_t *drive) 1042{ 1043 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1044 1045 drive->special.all = 0; 1046 drive->special.b.set_geometry = legacy; 1047 drive->special.b.recalibrate = legacy; 1048 drive->mult_count = 0; 1049 if (!drive->keep_settings && !drive->using_dma) 1050 drive->mult_req = 0; 1051 if (drive->mult_req != drive->mult_count) 1052 drive->special.b.set_multmode = 1; 1053} 1054 1055static void pre_reset(ide_drive_t *drive) 1056{ 1057 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1058 1059 if (drive->media == ide_disk) 1060 ide_disk_pre_reset(drive); 1061 else 1062 drive->post_reset = 1; 1063 1064 if (drive->using_dma) { 1065 if (drive->crc_count) 1066 ide_check_dma_crc(drive); 1067 else 1068 ide_dma_off(drive); 1069 } 1070 1071 if (!drive->keep_settings) { 1072 if (!drive->using_dma) { 1073 drive->unmask = 0; 1074 drive->io_32bit = 0; 1075 } 1076 return; 1077 } 1078 1079 if (port_ops && port_ops->pre_reset) 1080 port_ops->pre_reset(drive); 1081 1082 if (drive->current_speed != 0xff) 1083 drive->desired_speed = drive->current_speed; 1084 drive->current_speed = 0xff; 1085} 1086 1087/* 1088 * do_reset1() attempts to recover a confused drive by resetting it. 1089 * Unfortunately, resetting a disk drive actually resets all devices on 1090 * the same interface, so it can really be thought of as resetting the 1091 * interface rather than resetting the drive. 1092 * 1093 * ATAPI devices have their own reset mechanism which allows them to be 1094 * individually reset without clobbering other devices on the same interface. 1095 * 1096 * Unfortunately, the IDE interface does not generate an interrupt to let 1097 * us know when the reset operation has finished, so we must poll for this. 1098 * Equally poor, though, is the fact that this may a very long time to complete, 1099 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1100 * we set a timer to poll at 50ms intervals. 1101 */ 1102static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1103{ 1104 unsigned int unit; 1105 unsigned long flags; 1106 ide_hwif_t *hwif; 1107 ide_hwgroup_t *hwgroup; 1108 struct ide_io_ports *io_ports; 1109 const struct ide_port_ops *port_ops; 1110 u8 ctl; 1111 1112 spin_lock_irqsave(&ide_lock, flags); 1113 hwif = HWIF(drive); 1114 hwgroup = HWGROUP(drive); 1115 1116 io_ports = &hwif->io_ports; 1117 1118 /* We must not reset with running handlers */ 1119 BUG_ON(hwgroup->handler != NULL); 1120 1121 /* For an ATAPI device, first try an ATAPI SRST. */ 1122 if (drive->media != ide_disk && !do_not_try_atapi) { 1123 hwgroup->resetting = 1; 1124 pre_reset(drive); 1125 SELECT_DRIVE(drive); 1126 udelay (20); 1127 hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr); 1128 ndelay(400); 1129 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1130 hwgroup->polling = 1; 1131 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1132 spin_unlock_irqrestore(&ide_lock, flags); 1133 return ide_started; 1134 } 1135 1136 /* 1137 * First, reset any device state data we were maintaining 1138 * for any of the drives on this interface. 1139 */ 1140 for (unit = 0; unit < MAX_DRIVES; ++unit) 1141 pre_reset(&hwif->drives[unit]); 1142 1143 if (io_ports->ctl_addr == 0) { 1144 spin_unlock_irqrestore(&ide_lock, flags); 1145 return ide_stopped; 1146 } 1147 1148 hwgroup->resetting = 1; 1149 /* 1150 * Note that we also set nIEN while resetting the device, 1151 * to mask unwanted interrupts from the interface during the reset. 1152 * However, due to the design of PC hardware, this will cause an 1153 * immediate interrupt due to the edge transition it produces. 1154 * This single interrupt gives us a "fast poll" for drives that 1155 * recover from reset very quickly, saving us the first 50ms wait time. 1156 */ 1157 /* set SRST and nIEN */ 1158 hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr); 1159 /* more than enough time */ 1160 udelay(10); 1161 if (drive->quirk_list == 2) 1162 ctl = drive->ctl; /* clear SRST and nIEN */ 1163 else 1164 ctl = drive->ctl | 2; /* clear SRST, leave nIEN */ 1165 hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr); 1166 /* more than enough time */ 1167 udelay(10); 1168 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1169 hwgroup->polling = 1; 1170 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1171 1172 /* 1173 * Some weird controller like resetting themselves to a strange 1174 * state when the disks are reset this way. At least, the Winbond 1175 * 553 documentation says that 1176 */ 1177 port_ops = hwif->port_ops; 1178 if (port_ops && port_ops->resetproc) 1179 port_ops->resetproc(drive); 1180 1181 spin_unlock_irqrestore(&ide_lock, flags); 1182 return ide_started; 1183} 1184 1185/* 1186 * ide_do_reset() is the entry point to the drive/interface reset code. 1187 */ 1188 1189ide_startstop_t ide_do_reset (ide_drive_t *drive) 1190{ 1191 return do_reset1(drive, 0); 1192} 1193 1194EXPORT_SYMBOL(ide_do_reset); 1195 1196/* 1197 * ide_wait_not_busy() waits for the currently selected device on the hwif 1198 * to report a non-busy status, see comments in ide_probe_port(). 1199 */ 1200int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1201{ 1202 u8 stat = 0; 1203 1204 while(timeout--) { 1205 /* 1206 * Turn this into a schedule() sleep once I'm sure 1207 * about locking issues (2.5 work ?). 1208 */ 1209 mdelay(1); 1210 stat = hwif->INB(hwif->io_ports.status_addr); 1211 if ((stat & BUSY_STAT) == 0) 1212 return 0; 1213 /* 1214 * Assume a value of 0xff means nothing is connected to 1215 * the interface and it doesn't implement the pull-down 1216 * resistor on D7. 1217 */ 1218 if (stat == 0xff) 1219 return -ENODEV; 1220 touch_softlockup_watchdog(); 1221 touch_nmi_watchdog(); 1222 } 1223 return -EBUSY; 1224} 1225 1226EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1227 1228