ide-iops.c revision cd3dbc99da337f2130f3cb2691fbb65c8bf22337
1/* 2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 3 * 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 6 * 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/string.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/mm.h> 15#include <linux/interrupt.h> 16#include <linux/major.h> 17#include <linux/errno.h> 18#include <linux/genhd.h> 19#include <linux/blkpg.h> 20#include <linux/slab.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/hdreg.h> 24#include <linux/ide.h> 25#include <linux/bitops.h> 26#include <linux/nmi.h> 27 28#include <asm/byteorder.h> 29#include <asm/irq.h> 30#include <asm/uaccess.h> 31#include <asm/io.h> 32 33/* 34 * Conventional PIO operations for ATA devices 35 */ 36 37static u8 ide_inb (unsigned long port) 38{ 39 return (u8) inb(port); 40} 41 42static u16 ide_inw (unsigned long port) 43{ 44 return (u16) inw(port); 45} 46 47static void ide_insw (unsigned long port, void *addr, u32 count) 48{ 49 insw(port, addr, count); 50} 51 52static void ide_insl (unsigned long port, void *addr, u32 count) 53{ 54 insl(port, addr, count); 55} 56 57static void ide_outb (u8 val, unsigned long port) 58{ 59 outb(val, port); 60} 61 62static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 63{ 64 outb(addr, port); 65} 66 67static void ide_outw (u16 val, unsigned long port) 68{ 69 outw(val, port); 70} 71 72static void ide_outsw (unsigned long port, void *addr, u32 count) 73{ 74 outsw(port, addr, count); 75} 76 77static void ide_outsl (unsigned long port, void *addr, u32 count) 78{ 79 outsl(port, addr, count); 80} 81 82void default_hwif_iops (ide_hwif_t *hwif) 83{ 84 hwif->OUTB = ide_outb; 85 hwif->OUTBSYNC = ide_outbsync; 86 hwif->OUTW = ide_outw; 87 hwif->OUTSW = ide_outsw; 88 hwif->OUTSL = ide_outsl; 89 hwif->INB = ide_inb; 90 hwif->INW = ide_inw; 91 hwif->INSW = ide_insw; 92 hwif->INSL = ide_insl; 93} 94 95/* 96 * MMIO operations, typically used for SATA controllers 97 */ 98 99static u8 ide_mm_inb (unsigned long port) 100{ 101 return (u8) readb((void __iomem *) port); 102} 103 104static u16 ide_mm_inw (unsigned long port) 105{ 106 return (u16) readw((void __iomem *) port); 107} 108 109static void ide_mm_insw (unsigned long port, void *addr, u32 count) 110{ 111 __ide_mm_insw((void __iomem *) port, addr, count); 112} 113 114static void ide_mm_insl (unsigned long port, void *addr, u32 count) 115{ 116 __ide_mm_insl((void __iomem *) port, addr, count); 117} 118 119static void ide_mm_outb (u8 value, unsigned long port) 120{ 121 writeb(value, (void __iomem *) port); 122} 123 124static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 125{ 126 writeb(value, (void __iomem *) port); 127} 128 129static void ide_mm_outw (u16 value, unsigned long port) 130{ 131 writew(value, (void __iomem *) port); 132} 133 134static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 135{ 136 __ide_mm_outsw((void __iomem *) port, addr, count); 137} 138 139static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 140{ 141 __ide_mm_outsl((void __iomem *) port, addr, count); 142} 143 144void default_hwif_mmiops (ide_hwif_t *hwif) 145{ 146 hwif->OUTB = ide_mm_outb; 147 /* Most systems will need to override OUTBSYNC, alas however 148 this one is controller specific! */ 149 hwif->OUTBSYNC = ide_mm_outbsync; 150 hwif->OUTW = ide_mm_outw; 151 hwif->OUTSW = ide_mm_outsw; 152 hwif->OUTSL = ide_mm_outsl; 153 hwif->INB = ide_mm_inb; 154 hwif->INW = ide_mm_inw; 155 hwif->INSW = ide_mm_insw; 156 hwif->INSL = ide_mm_insl; 157} 158 159EXPORT_SYMBOL(default_hwif_mmiops); 160 161u32 ide_read_24 (ide_drive_t *drive) 162{ 163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); 164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG); 165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG); 166 return (hcyl<<16)|(lcyl<<8)|sect; 167} 168 169void SELECT_DRIVE (ide_drive_t *drive) 170{ 171 if (HWIF(drive)->selectproc) 172 HWIF(drive)->selectproc(drive); 173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 174} 175 176EXPORT_SYMBOL(SELECT_DRIVE); 177 178void SELECT_INTERRUPT (ide_drive_t *drive) 179{ 180 if (HWIF(drive)->intrproc) 181 HWIF(drive)->intrproc(drive); 182 else 183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG); 184} 185 186void SELECT_MASK (ide_drive_t *drive, int mask) 187{ 188 if (HWIF(drive)->maskproc) 189 HWIF(drive)->maskproc(drive, mask); 190} 191 192/* 193 * Some localbus EIDE interfaces require a special access sequence 194 * when using 32-bit I/O instructions to transfer data. We call this 195 * the "vlb_sync" sequence, which consists of three successive reads 196 * of the sector count register location, with interrupts disabled 197 * to ensure that the reads all happen together. 198 */ 199static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 200{ 201 (void) HWIF(drive)->INB(port); 202 (void) HWIF(drive)->INB(port); 203 (void) HWIF(drive)->INB(port); 204} 205 206/* 207 * This is used for most PIO data transfers *from* the IDE interface 208 */ 209static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 210{ 211 ide_hwif_t *hwif = HWIF(drive); 212 u8 io_32bit = drive->io_32bit; 213 214 if (io_32bit) { 215 if (io_32bit & 2) { 216 unsigned long flags; 217 local_irq_save(flags); 218 ata_vlb_sync(drive, IDE_NSECTOR_REG); 219 hwif->INSL(IDE_DATA_REG, buffer, wcount); 220 local_irq_restore(flags); 221 } else 222 hwif->INSL(IDE_DATA_REG, buffer, wcount); 223 } else { 224 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 225 } 226} 227 228/* 229 * This is used for most PIO data transfers *to* the IDE interface 230 */ 231static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 232{ 233 ide_hwif_t *hwif = HWIF(drive); 234 u8 io_32bit = drive->io_32bit; 235 236 if (io_32bit) { 237 if (io_32bit & 2) { 238 unsigned long flags; 239 local_irq_save(flags); 240 ata_vlb_sync(drive, IDE_NSECTOR_REG); 241 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 242 local_irq_restore(flags); 243 } else 244 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 245 } else { 246 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 247 } 248} 249 250/* 251 * The following routines are mainly used by the ATAPI drivers. 252 * 253 * These routines will round up any request for an odd number of bytes, 254 * so if an odd bytecount is specified, be sure that there's at least one 255 * extra byte allocated for the buffer. 256 */ 257 258static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 259{ 260 ide_hwif_t *hwif = HWIF(drive); 261 262 ++bytecount; 263#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 264 if (MACH_IS_ATARI || MACH_IS_Q40) { 265 /* Atari has a byte-swapped IDE interface */ 266 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 267 return; 268 } 269#endif /* CONFIG_ATARI || CONFIG_Q40 */ 270 hwif->ata_input_data(drive, buffer, bytecount / 4); 271 if ((bytecount & 0x03) >= 2) 272 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 273} 274 275static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 276{ 277 ide_hwif_t *hwif = HWIF(drive); 278 279 ++bytecount; 280#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 281 if (MACH_IS_ATARI || MACH_IS_Q40) { 282 /* Atari has a byte-swapped IDE interface */ 283 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 284 return; 285 } 286#endif /* CONFIG_ATARI || CONFIG_Q40 */ 287 hwif->ata_output_data(drive, buffer, bytecount / 4); 288 if ((bytecount & 0x03) >= 2) 289 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 290} 291 292void default_hwif_transport(ide_hwif_t *hwif) 293{ 294 hwif->ata_input_data = ata_input_data; 295 hwif->ata_output_data = ata_output_data; 296 hwif->atapi_input_bytes = atapi_input_bytes; 297 hwif->atapi_output_bytes = atapi_output_bytes; 298} 299 300void ide_fix_driveid (struct hd_driveid *id) 301{ 302#ifndef __LITTLE_ENDIAN 303# ifdef __BIG_ENDIAN 304 int i; 305 u16 *stringcast; 306 307 id->config = __le16_to_cpu(id->config); 308 id->cyls = __le16_to_cpu(id->cyls); 309 id->reserved2 = __le16_to_cpu(id->reserved2); 310 id->heads = __le16_to_cpu(id->heads); 311 id->track_bytes = __le16_to_cpu(id->track_bytes); 312 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 313 id->sectors = __le16_to_cpu(id->sectors); 314 id->vendor0 = __le16_to_cpu(id->vendor0); 315 id->vendor1 = __le16_to_cpu(id->vendor1); 316 id->vendor2 = __le16_to_cpu(id->vendor2); 317 stringcast = (u16 *)&id->serial_no[0]; 318 for (i = 0; i < (20/2); i++) 319 stringcast[i] = __le16_to_cpu(stringcast[i]); 320 id->buf_type = __le16_to_cpu(id->buf_type); 321 id->buf_size = __le16_to_cpu(id->buf_size); 322 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 323 stringcast = (u16 *)&id->fw_rev[0]; 324 for (i = 0; i < (8/2); i++) 325 stringcast[i] = __le16_to_cpu(stringcast[i]); 326 stringcast = (u16 *)&id->model[0]; 327 for (i = 0; i < (40/2); i++) 328 stringcast[i] = __le16_to_cpu(stringcast[i]); 329 id->dword_io = __le16_to_cpu(id->dword_io); 330 id->reserved50 = __le16_to_cpu(id->reserved50); 331 id->field_valid = __le16_to_cpu(id->field_valid); 332 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 333 id->cur_heads = __le16_to_cpu(id->cur_heads); 334 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 335 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 336 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 337 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 338 id->dma_1word = __le16_to_cpu(id->dma_1word); 339 id->dma_mword = __le16_to_cpu(id->dma_mword); 340 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 341 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 342 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 343 id->eide_pio = __le16_to_cpu(id->eide_pio); 344 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 345 for (i = 0; i < 2; ++i) 346 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 347 for (i = 0; i < 4; ++i) 348 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 349 id->queue_depth = __le16_to_cpu(id->queue_depth); 350 for (i = 0; i < 4; ++i) 351 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 352 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 353 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 354 id->command_set_1 = __le16_to_cpu(id->command_set_1); 355 id->command_set_2 = __le16_to_cpu(id->command_set_2); 356 id->cfsse = __le16_to_cpu(id->cfsse); 357 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 358 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 359 id->csf_default = __le16_to_cpu(id->csf_default); 360 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 361 id->trseuc = __le16_to_cpu(id->trseuc); 362 id->trsEuc = __le16_to_cpu(id->trsEuc); 363 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 364 id->mprc = __le16_to_cpu(id->mprc); 365 id->hw_config = __le16_to_cpu(id->hw_config); 366 id->acoustic = __le16_to_cpu(id->acoustic); 367 id->msrqs = __le16_to_cpu(id->msrqs); 368 id->sxfert = __le16_to_cpu(id->sxfert); 369 id->sal = __le16_to_cpu(id->sal); 370 id->spg = __le32_to_cpu(id->spg); 371 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 372 for (i = 0; i < 22; i++) 373 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 374 id->last_lun = __le16_to_cpu(id->last_lun); 375 id->word127 = __le16_to_cpu(id->word127); 376 id->dlf = __le16_to_cpu(id->dlf); 377 id->csfo = __le16_to_cpu(id->csfo); 378 for (i = 0; i < 26; i++) 379 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 380 id->word156 = __le16_to_cpu(id->word156); 381 for (i = 0; i < 3; i++) 382 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 383 id->cfa_power = __le16_to_cpu(id->cfa_power); 384 for (i = 0; i < 14; i++) 385 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 386 for (i = 0; i < 31; i++) 387 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 388 for (i = 0; i < 48; i++) 389 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 390 id->integrity_word = __le16_to_cpu(id->integrity_word); 391# else 392# error "Please fix <asm/byteorder.h>" 393# endif 394#endif 395} 396 397/* 398 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 399 * removing leading/trailing blanks and compressing internal blanks. 400 * It is primarily used to tidy up the model name/number fields as 401 * returned by the WIN_[P]IDENTIFY commands. 402 */ 403 404void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 405{ 406 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 407 408 if (byteswap) { 409 /* convert from big-endian to host byte order */ 410 for (p = end ; p != s;) { 411 unsigned short *pp = (unsigned short *) (p -= 2); 412 *pp = ntohs(*pp); 413 } 414 } 415 /* strip leading blanks */ 416 while (s != end && *s == ' ') 417 ++s; 418 /* compress internal blanks and strip trailing blanks */ 419 while (s != end && *s) { 420 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 421 *p++ = *(s-1); 422 } 423 /* wipe out trailing garbage */ 424 while (p != end) 425 *p++ = '\0'; 426} 427 428EXPORT_SYMBOL(ide_fixstring); 429 430/* 431 * Needed for PCI irq sharing 432 */ 433int drive_is_ready (ide_drive_t *drive) 434{ 435 ide_hwif_t *hwif = HWIF(drive); 436 u8 stat = 0; 437 438 if (drive->waiting_for_dma) 439 return hwif->ide_dma_test_irq(drive); 440 441#if 0 442 /* need to guarantee 400ns since last command was issued */ 443 udelay(1); 444#endif 445 446 /* 447 * We do a passive status test under shared PCI interrupts on 448 * cards that truly share the ATA side interrupt, but may also share 449 * an interrupt with another pci card/device. We make no assumptions 450 * about possible isa-pnp and pci-pnp issues yet. 451 */ 452 if (IDE_CONTROL_REG) 453 stat = hwif->INB(IDE_ALTSTATUS_REG); 454 else 455 /* Note: this may clear a pending IRQ!! */ 456 stat = hwif->INB(IDE_STATUS_REG); 457 458 if (stat & BUSY_STAT) 459 /* drive busy: definitely not interrupting */ 460 return 0; 461 462 /* drive ready: *might* be interrupting */ 463 return 1; 464} 465 466EXPORT_SYMBOL(drive_is_ready); 467 468/* 469 * This routine busy-waits for the drive status to be not "busy". 470 * It then checks the status for all of the "good" bits and none 471 * of the "bad" bits, and if all is okay it returns 0. All other 472 * cases return error -- caller may then invoke ide_error(). 473 * 474 * This routine should get fixed to not hog the cpu during extra long waits.. 475 * That could be done by busy-waiting for the first jiffy or two, and then 476 * setting a timer to wake up at half second intervals thereafter, 477 * until timeout is achieved, before timing out. 478 */ 479static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 480{ 481 ide_hwif_t *hwif = drive->hwif; 482 unsigned long flags; 483 int i; 484 u8 stat; 485 486 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 487 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 488 local_irq_set(flags); 489 timeout += jiffies; 490 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 491 if (time_after(jiffies, timeout)) { 492 /* 493 * One last read after the timeout in case 494 * heavy interrupt load made us not make any 495 * progress during the timeout.. 496 */ 497 stat = hwif->INB(IDE_STATUS_REG); 498 if (!(stat & BUSY_STAT)) 499 break; 500 501 local_irq_restore(flags); 502 *rstat = stat; 503 return -EBUSY; 504 } 505 } 506 local_irq_restore(flags); 507 } 508 /* 509 * Allow status to settle, then read it again. 510 * A few rare drives vastly violate the 400ns spec here, 511 * so we'll wait up to 10usec for a "good" status 512 * rather than expensively fail things immediately. 513 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 514 */ 515 for (i = 0; i < 10; i++) { 516 udelay(1); 517 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) { 518 *rstat = stat; 519 return 0; 520 } 521 } 522 *rstat = stat; 523 return -EFAULT; 524} 525 526/* 527 * In case of error returns error value after doing "*startstop = ide_error()". 528 * The caller should return the updated value of "startstop" in this case, 529 * "startstop" is unchanged when the function returns 0. 530 */ 531int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 532{ 533 int err; 534 u8 stat; 535 536 /* bail early if we've exceeded max_failures */ 537 if (drive->max_failures && (drive->failures > drive->max_failures)) { 538 *startstop = ide_stopped; 539 return 1; 540 } 541 542 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 543 544 if (err) { 545 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 546 *startstop = ide_error(drive, s, stat); 547 } 548 549 return err; 550} 551 552EXPORT_SYMBOL(ide_wait_stat); 553 554/** 555 * ide_in_drive_list - look for drive in black/white list 556 * @id: drive identifier 557 * @drive_table: list to inspect 558 * 559 * Look for a drive in the blacklist and the whitelist tables 560 * Returns 1 if the drive is found in the table. 561 */ 562 563int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 564{ 565 for ( ; drive_table->id_model; drive_table++) 566 if ((!strcmp(drive_table->id_model, id->model)) && 567 (!drive_table->id_firmware || 568 strstr(id->fw_rev, drive_table->id_firmware))) 569 return 1; 570 return 0; 571} 572 573EXPORT_SYMBOL_GPL(ide_in_drive_list); 574 575/* 576 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 577 * We list them here and depend on the device side cable detection for them. 578 * 579 * Some optical devices with the buggy firmwares have the same problem. 580 */ 581static const struct drive_list_entry ivb_list[] = { 582 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 583 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 584 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 585 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 586 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 587 { NULL , NULL } 588}; 589 590/* 591 * All hosts that use the 80c ribbon must use! 592 * The name is derived from upper byte of word 93 and the 80c ribbon. 593 */ 594u8 eighty_ninty_three (ide_drive_t *drive) 595{ 596 ide_hwif_t *hwif = drive->hwif; 597 struct hd_driveid *id = drive->id; 598 int ivb = ide_in_drive_list(id, ivb_list); 599 600 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 601 return 1; 602 603 if (ivb) 604 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 605 drive->name); 606 607 if (ide_dev_is_sata(id) && !ivb) 608 return 1; 609 610 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 611 goto no_80w; 612 613 /* 614 * FIXME: 615 * - force bit13 (80c cable present) check also for !ivb devices 616 * (unless the slave device is pre-ATA3) 617 */ 618 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 619 return 1; 620 621no_80w: 622 if (drive->udma33_warned == 1) 623 return 0; 624 625 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 626 "limiting max speed to UDMA33\n", 627 drive->name, 628 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 629 630 drive->udma33_warned = 1; 631 632 return 0; 633} 634 635int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 636{ 637 if (args->tf.command == WIN_SETFEATURES && 638 args->tf.lbal > XFER_UDMA_2 && 639 args->tf.feature == SETFEATURES_XFER) { 640 if (eighty_ninty_three(drive) == 0) { 641 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " 642 "be set\n", drive->name); 643 return 1; 644 } 645 } 646 647 return 0; 648} 649 650/* 651 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 652 * 1 : Safe to update drive->id DMA registers. 653 * 0 : OOPs not allowed. 654 */ 655int set_transfer (ide_drive_t *drive, ide_task_t *args) 656{ 657 if (args->tf.command == WIN_SETFEATURES && 658 args->tf.lbal >= XFER_SW_DMA_0 && 659 args->tf.feature == SETFEATURES_XFER && 660 (drive->id->dma_ultra || 661 drive->id->dma_mword || 662 drive->id->dma_1word)) 663 return 1; 664 665 return 0; 666} 667 668#ifdef CONFIG_BLK_DEV_IDEDMA 669static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 670{ 671 if (!drive->crc_count) 672 return drive->current_speed; 673 drive->crc_count = 0; 674 675 switch(drive->current_speed) { 676 case XFER_UDMA_7: return XFER_UDMA_6; 677 case XFER_UDMA_6: return XFER_UDMA_5; 678 case XFER_UDMA_5: return XFER_UDMA_4; 679 case XFER_UDMA_4: return XFER_UDMA_3; 680 case XFER_UDMA_3: return XFER_UDMA_2; 681 case XFER_UDMA_2: return XFER_UDMA_1; 682 case XFER_UDMA_1: return XFER_UDMA_0; 683 /* 684 * OOPS we do not goto non Ultra DMA modes 685 * without iCRC's available we force 686 * the system to PIO and make the user 687 * invoke the ATA-1 ATA-2 DMA modes. 688 */ 689 case XFER_UDMA_0: 690 default: return XFER_PIO_4; 691 } 692} 693#endif /* CONFIG_BLK_DEV_IDEDMA */ 694 695int ide_driveid_update(ide_drive_t *drive) 696{ 697 ide_hwif_t *hwif = drive->hwif; 698 struct hd_driveid *id; 699 unsigned long timeout, flags; 700 701 /* 702 * Re-read drive->id for possible DMA mode 703 * change (copied from ide-probe.c) 704 */ 705 706 SELECT_MASK(drive, 1); 707 if (IDE_CONTROL_REG) 708 hwif->OUTB(drive->ctl,IDE_CONTROL_REG); 709 msleep(50); 710 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 711 timeout = jiffies + WAIT_WORSTCASE; 712 do { 713 if (time_after(jiffies, timeout)) { 714 SELECT_MASK(drive, 0); 715 return 0; /* drive timed-out */ 716 } 717 msleep(50); /* give drive a breather */ 718 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 719 msleep(50); /* wait for IRQ and DRQ_STAT */ 720 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 721 SELECT_MASK(drive, 0); 722 printk("%s: CHECK for good STATUS\n", drive->name); 723 return 0; 724 } 725 local_irq_save(flags); 726 SELECT_MASK(drive, 0); 727 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 728 if (!id) { 729 local_irq_restore(flags); 730 return 0; 731 } 732 ata_input_data(drive, id, SECTOR_WORDS); 733 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 734 local_irq_enable(); 735 local_irq_restore(flags); 736 ide_fix_driveid(id); 737 if (id) { 738 drive->id->dma_ultra = id->dma_ultra; 739 drive->id->dma_mword = id->dma_mword; 740 drive->id->dma_1word = id->dma_1word; 741 /* anything more ? */ 742 kfree(id); 743 744 if (drive->using_dma && ide_id_dma_bug(drive)) 745 ide_dma_off(drive); 746 } 747 748 return 1; 749} 750 751int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 752{ 753 ide_hwif_t *hwif = drive->hwif; 754 int error = 0; 755 u8 stat; 756 757// while (HWGROUP(drive)->busy) 758// msleep(50); 759 760#ifdef CONFIG_BLK_DEV_IDEDMA 761 if (hwif->ide_dma_on) /* check if host supports DMA */ 762 hwif->dma_host_off(drive); 763#endif 764 765 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 766 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) 767 goto skip; 768 769 /* 770 * Don't use ide_wait_cmd here - it will 771 * attempt to set_geometry and recalibrate, 772 * but for some reason these don't work at 773 * this point (lost interrupt). 774 */ 775 /* 776 * Select the drive, and issue the SETFEATURES command 777 */ 778 disable_irq_nosync(hwif->irq); 779 780 /* 781 * FIXME: we race against the running IRQ here if 782 * this is called from non IRQ context. If we use 783 * disable_irq() we hang on the error path. Work 784 * is needed. 785 */ 786 787 udelay(1); 788 SELECT_DRIVE(drive); 789 SELECT_MASK(drive, 0); 790 udelay(1); 791 if (IDE_CONTROL_REG) 792 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 793 hwif->OUTB(speed, IDE_NSECTOR_REG); 794 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 795 hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); 796 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) 797 hwif->OUTB(drive->ctl, IDE_CONTROL_REG); 798 799 error = __ide_wait_stat(drive, drive->ready_stat, 800 BUSY_STAT|DRQ_STAT|ERR_STAT, 801 WAIT_CMD, &stat); 802 803 SELECT_MASK(drive, 0); 804 805 enable_irq(hwif->irq); 806 807 if (error) { 808 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 809 return error; 810 } 811 812 drive->id->dma_ultra &= ~0xFF00; 813 drive->id->dma_mword &= ~0x0F00; 814 drive->id->dma_1word &= ~0x0F00; 815 816 skip: 817#ifdef CONFIG_BLK_DEV_IDEDMA 818 if (speed >= XFER_SW_DMA_0) 819 hwif->dma_host_on(drive); 820 else if (hwif->ide_dma_on) /* check if host supports DMA */ 821 hwif->dma_off_quietly(drive); 822#endif 823 824 switch(speed) { 825 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 826 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 827 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 828 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 829 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 830 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 831 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 832 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 833 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 834 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 835 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 836 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 837 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 838 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 839 default: break; 840 } 841 if (!drive->init_speed) 842 drive->init_speed = speed; 843 drive->current_speed = speed; 844 return error; 845} 846 847/* 848 * This should get invoked any time we exit the driver to 849 * wait for an interrupt response from a drive. handler() points 850 * at the appropriate code to handle the next interrupt, and a 851 * timer is started to prevent us from waiting forever in case 852 * something goes wrong (see the ide_timer_expiry() handler later on). 853 * 854 * See also ide_execute_command 855 */ 856static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 857 unsigned int timeout, ide_expiry_t *expiry) 858{ 859 ide_hwgroup_t *hwgroup = HWGROUP(drive); 860 861 if (hwgroup->handler != NULL) { 862 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 863 "old=%p, new=%p\n", 864 drive->name, hwgroup->handler, handler); 865 } 866 hwgroup->handler = handler; 867 hwgroup->expiry = expiry; 868 hwgroup->timer.expires = jiffies + timeout; 869 hwgroup->req_gen_timer = hwgroup->req_gen; 870 add_timer(&hwgroup->timer); 871} 872 873void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 874 unsigned int timeout, ide_expiry_t *expiry) 875{ 876 unsigned long flags; 877 spin_lock_irqsave(&ide_lock, flags); 878 __ide_set_handler(drive, handler, timeout, expiry); 879 spin_unlock_irqrestore(&ide_lock, flags); 880} 881 882EXPORT_SYMBOL(ide_set_handler); 883 884/** 885 * ide_execute_command - execute an IDE command 886 * @drive: IDE drive to issue the command against 887 * @command: command byte to write 888 * @handler: handler for next phase 889 * @timeout: timeout for command 890 * @expiry: handler to run on timeout 891 * 892 * Helper function to issue an IDE command. This handles the 893 * atomicity requirements, command timing and ensures that the 894 * handler and IRQ setup do not race. All IDE command kick off 895 * should go via this function or do equivalent locking. 896 */ 897 898void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 899 unsigned timeout, ide_expiry_t *expiry) 900{ 901 unsigned long flags; 902 ide_hwgroup_t *hwgroup = HWGROUP(drive); 903 ide_hwif_t *hwif = HWIF(drive); 904 905 spin_lock_irqsave(&ide_lock, flags); 906 907 BUG_ON(hwgroup->handler); 908 hwgroup->handler = handler; 909 hwgroup->expiry = expiry; 910 hwgroup->timer.expires = jiffies + timeout; 911 hwgroup->req_gen_timer = hwgroup->req_gen; 912 add_timer(&hwgroup->timer); 913 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 914 /* Drive takes 400nS to respond, we must avoid the IRQ being 915 serviced before that. 916 917 FIXME: we could skip this delay with care on non shared 918 devices 919 */ 920 ndelay(400); 921 spin_unlock_irqrestore(&ide_lock, flags); 922} 923 924EXPORT_SYMBOL(ide_execute_command); 925 926 927/* needed below */ 928static ide_startstop_t do_reset1 (ide_drive_t *, int); 929 930/* 931 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 932 * during an atapi drive reset operation. If the drive has not yet responded, 933 * and we have not yet hit our maximum waiting time, then the timer is restarted 934 * for another 50ms. 935 */ 936static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 937{ 938 ide_hwgroup_t *hwgroup = HWGROUP(drive); 939 ide_hwif_t *hwif = HWIF(drive); 940 u8 stat; 941 942 SELECT_DRIVE(drive); 943 udelay (10); 944 945 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 946 printk("%s: ATAPI reset complete\n", drive->name); 947 } else { 948 if (time_before(jiffies, hwgroup->poll_timeout)) { 949 BUG_ON(HWGROUP(drive)->handler != NULL); 950 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 951 /* continue polling */ 952 return ide_started; 953 } 954 /* end of polling */ 955 hwgroup->polling = 0; 956 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 957 drive->name, stat); 958 /* do it the old fashioned way */ 959 return do_reset1(drive, 1); 960 } 961 /* done polling */ 962 hwgroup->polling = 0; 963 hwgroup->resetting = 0; 964 return ide_stopped; 965} 966 967/* 968 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 969 * during an ide reset operation. If the drives have not yet responded, 970 * and we have not yet hit our maximum waiting time, then the timer is restarted 971 * for another 50ms. 972 */ 973static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 974{ 975 ide_hwgroup_t *hwgroup = HWGROUP(drive); 976 ide_hwif_t *hwif = HWIF(drive); 977 u8 tmp; 978 979 if (hwif->reset_poll != NULL) { 980 if (hwif->reset_poll(drive)) { 981 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 982 hwif->name, drive->name); 983 return ide_stopped; 984 } 985 } 986 987 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 988 if (time_before(jiffies, hwgroup->poll_timeout)) { 989 BUG_ON(HWGROUP(drive)->handler != NULL); 990 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 991 /* continue polling */ 992 return ide_started; 993 } 994 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 995 drive->failures++; 996 } else { 997 printk("%s: reset: ", hwif->name); 998 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 999 printk("success\n"); 1000 drive->failures = 0; 1001 } else { 1002 drive->failures++; 1003 printk("master: "); 1004 switch (tmp & 0x7f) { 1005 case 1: printk("passed"); 1006 break; 1007 case 2: printk("formatter device error"); 1008 break; 1009 case 3: printk("sector buffer error"); 1010 break; 1011 case 4: printk("ECC circuitry error"); 1012 break; 1013 case 5: printk("controlling MPU error"); 1014 break; 1015 default:printk("error (0x%02x?)", tmp); 1016 } 1017 if (tmp & 0x80) 1018 printk("; slave: failed"); 1019 printk("\n"); 1020 } 1021 } 1022 hwgroup->polling = 0; /* done polling */ 1023 hwgroup->resetting = 0; /* done reset attempt */ 1024 return ide_stopped; 1025} 1026 1027static void check_dma_crc(ide_drive_t *drive) 1028{ 1029#ifdef CONFIG_BLK_DEV_IDEDMA 1030 if (drive->crc_count) { 1031 drive->hwif->dma_off_quietly(drive); 1032 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1033 if (drive->current_speed >= XFER_SW_DMA_0) 1034 (void) HWIF(drive)->ide_dma_on(drive); 1035 } else 1036 ide_dma_off(drive); 1037#endif 1038} 1039 1040static void ide_disk_pre_reset(ide_drive_t *drive) 1041{ 1042 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1043 1044 drive->special.all = 0; 1045 drive->special.b.set_geometry = legacy; 1046 drive->special.b.recalibrate = legacy; 1047 drive->mult_count = 0; 1048 if (!drive->keep_settings && !drive->using_dma) 1049 drive->mult_req = 0; 1050 if (drive->mult_req != drive->mult_count) 1051 drive->special.b.set_multmode = 1; 1052} 1053 1054static void pre_reset(ide_drive_t *drive) 1055{ 1056 if (drive->media == ide_disk) 1057 ide_disk_pre_reset(drive); 1058 else 1059 drive->post_reset = 1; 1060 1061 if (!drive->keep_settings) { 1062 if (drive->using_dma) { 1063 check_dma_crc(drive); 1064 } else { 1065 drive->unmask = 0; 1066 drive->io_32bit = 0; 1067 } 1068 return; 1069 } 1070 if (drive->using_dma) 1071 check_dma_crc(drive); 1072 1073 if (HWIF(drive)->pre_reset != NULL) 1074 HWIF(drive)->pre_reset(drive); 1075 1076 if (drive->current_speed != 0xff) 1077 drive->desired_speed = drive->current_speed; 1078 drive->current_speed = 0xff; 1079} 1080 1081/* 1082 * do_reset1() attempts to recover a confused drive by resetting it. 1083 * Unfortunately, resetting a disk drive actually resets all devices on 1084 * the same interface, so it can really be thought of as resetting the 1085 * interface rather than resetting the drive. 1086 * 1087 * ATAPI devices have their own reset mechanism which allows them to be 1088 * individually reset without clobbering other devices on the same interface. 1089 * 1090 * Unfortunately, the IDE interface does not generate an interrupt to let 1091 * us know when the reset operation has finished, so we must poll for this. 1092 * Equally poor, though, is the fact that this may a very long time to complete, 1093 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1094 * we set a timer to poll at 50ms intervals. 1095 */ 1096static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1097{ 1098 unsigned int unit; 1099 unsigned long flags; 1100 ide_hwif_t *hwif; 1101 ide_hwgroup_t *hwgroup; 1102 1103 spin_lock_irqsave(&ide_lock, flags); 1104 hwif = HWIF(drive); 1105 hwgroup = HWGROUP(drive); 1106 1107 /* We must not reset with running handlers */ 1108 BUG_ON(hwgroup->handler != NULL); 1109 1110 /* For an ATAPI device, first try an ATAPI SRST. */ 1111 if (drive->media != ide_disk && !do_not_try_atapi) { 1112 hwgroup->resetting = 1; 1113 pre_reset(drive); 1114 SELECT_DRIVE(drive); 1115 udelay (20); 1116 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1117 ndelay(400); 1118 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1119 hwgroup->polling = 1; 1120 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1121 spin_unlock_irqrestore(&ide_lock, flags); 1122 return ide_started; 1123 } 1124 1125 /* 1126 * First, reset any device state data we were maintaining 1127 * for any of the drives on this interface. 1128 */ 1129 for (unit = 0; unit < MAX_DRIVES; ++unit) 1130 pre_reset(&hwif->drives[unit]); 1131 1132 if (!IDE_CONTROL_REG) { 1133 spin_unlock_irqrestore(&ide_lock, flags); 1134 return ide_stopped; 1135 } 1136 1137 hwgroup->resetting = 1; 1138 /* 1139 * Note that we also set nIEN while resetting the device, 1140 * to mask unwanted interrupts from the interface during the reset. 1141 * However, due to the design of PC hardware, this will cause an 1142 * immediate interrupt due to the edge transition it produces. 1143 * This single interrupt gives us a "fast poll" for drives that 1144 * recover from reset very quickly, saving us the first 50ms wait time. 1145 */ 1146 /* set SRST and nIEN */ 1147 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1148 /* more than enough time */ 1149 udelay(10); 1150 if (drive->quirk_list == 2) { 1151 /* clear SRST and nIEN */ 1152 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1153 } else { 1154 /* clear SRST, leave nIEN */ 1155 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1156 } 1157 /* more than enough time */ 1158 udelay(10); 1159 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1160 hwgroup->polling = 1; 1161 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1162 1163 /* 1164 * Some weird controller like resetting themselves to a strange 1165 * state when the disks are reset this way. At least, the Winbond 1166 * 553 documentation says that 1167 */ 1168 if (hwif->resetproc) 1169 hwif->resetproc(drive); 1170 1171 spin_unlock_irqrestore(&ide_lock, flags); 1172 return ide_started; 1173} 1174 1175/* 1176 * ide_do_reset() is the entry point to the drive/interface reset code. 1177 */ 1178 1179ide_startstop_t ide_do_reset (ide_drive_t *drive) 1180{ 1181 return do_reset1(drive, 0); 1182} 1183 1184EXPORT_SYMBOL(ide_do_reset); 1185 1186/* 1187 * ide_wait_not_busy() waits for the currently selected device on the hwif 1188 * to report a non-busy status, see comments in probe_hwif(). 1189 */ 1190int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1191{ 1192 u8 stat = 0; 1193 1194 while(timeout--) { 1195 /* 1196 * Turn this into a schedule() sleep once I'm sure 1197 * about locking issues (2.5 work ?). 1198 */ 1199 mdelay(1); 1200 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1201 if ((stat & BUSY_STAT) == 0) 1202 return 0; 1203 /* 1204 * Assume a value of 0xff means nothing is connected to 1205 * the interface and it doesn't implement the pull-down 1206 * resistor on D7. 1207 */ 1208 if (stat == 0xff) 1209 return -ENODEV; 1210 touch_softlockup_watchdog(); 1211 touch_nmi_watchdog(); 1212 } 1213 return -EBUSY; 1214} 1215 1216EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1217 1218