ide-iops.c revision ed4af48fd660176680da905817f6e40d51436e4c
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat <alan@redhat.com> 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/hdreg.h> 22#include <linux/ide.h> 23#include <linux/bitops.h> 24#include <linux/nmi.h> 25 26#include <asm/byteorder.h> 27#include <asm/irq.h> 28#include <asm/uaccess.h> 29#include <asm/io.h> 30 31/* 32 * Conventional PIO operations for ATA devices 33 */ 34 35static u8 ide_inb (unsigned long port) 36{ 37 return (u8) inb(port); 38} 39 40static void ide_outb (u8 val, unsigned long port) 41{ 42 outb(val, port); 43} 44 45static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 46{ 47 outb(addr, port); 48} 49 50void default_hwif_iops (ide_hwif_t *hwif) 51{ 52 hwif->OUTB = ide_outb; 53 hwif->OUTBSYNC = ide_outbsync; 54 hwif->INB = ide_inb; 55} 56 57/* 58 * MMIO operations, typically used for SATA controllers 59 */ 60 61static u8 ide_mm_inb (unsigned long port) 62{ 63 return (u8) readb((void __iomem *) port); 64} 65 66static void ide_mm_outb (u8 value, unsigned long port) 67{ 68 writeb(value, (void __iomem *) port); 69} 70 71static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 72{ 73 writeb(value, (void __iomem *) port); 74} 75 76void default_hwif_mmiops (ide_hwif_t *hwif) 77{ 78 hwif->OUTB = ide_mm_outb; 79 /* Most systems will need to override OUTBSYNC, alas however 80 this one is controller specific! */ 81 hwif->OUTBSYNC = ide_mm_outbsync; 82 hwif->INB = ide_mm_inb; 83} 84 85EXPORT_SYMBOL(default_hwif_mmiops); 86 87void SELECT_DRIVE (ide_drive_t *drive) 88{ 89 ide_hwif_t *hwif = drive->hwif; 90 const struct ide_port_ops *port_ops = hwif->port_ops; 91 92 if (port_ops && port_ops->selectproc) 93 port_ops->selectproc(drive); 94 95 hwif->OUTB(drive->select.all, hwif->io_ports.device_addr); 96} 97 98void SELECT_MASK(ide_drive_t *drive, int mask) 99{ 100 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 101 102 if (port_ops && port_ops->maskproc) 103 port_ops->maskproc(drive, mask); 104} 105 106static void ide_tf_load(ide_drive_t *drive, ide_task_t *task) 107{ 108 ide_hwif_t *hwif = drive->hwif; 109 struct ide_io_ports *io_ports = &hwif->io_ports; 110 struct ide_taskfile *tf = &task->tf; 111 void (*tf_outb)(u8 addr, unsigned long port); 112 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 113 u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF; 114 115 if (mmio) 116 tf_outb = ide_mm_outb; 117 else 118 tf_outb = ide_outb; 119 120 if (task->tf_flags & IDE_TFLAG_FLAGGED) 121 HIHI = 0xFF; 122 123 if (task->tf_flags & IDE_TFLAG_OUT_DATA) { 124 u16 data = (tf->hob_data << 8) | tf->data; 125 126 if (mmio) 127 writew(data, (void __iomem *)io_ports->data_addr); 128 else 129 outw(data, io_ports->data_addr); 130 } 131 132 if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) 133 tf_outb(tf->hob_feature, io_ports->feature_addr); 134 if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) 135 tf_outb(tf->hob_nsect, io_ports->nsect_addr); 136 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) 137 tf_outb(tf->hob_lbal, io_ports->lbal_addr); 138 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) 139 tf_outb(tf->hob_lbam, io_ports->lbam_addr); 140 if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) 141 tf_outb(tf->hob_lbah, io_ports->lbah_addr); 142 143 if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) 144 tf_outb(tf->feature, io_ports->feature_addr); 145 if (task->tf_flags & IDE_TFLAG_OUT_NSECT) 146 tf_outb(tf->nsect, io_ports->nsect_addr); 147 if (task->tf_flags & IDE_TFLAG_OUT_LBAL) 148 tf_outb(tf->lbal, io_ports->lbal_addr); 149 if (task->tf_flags & IDE_TFLAG_OUT_LBAM) 150 tf_outb(tf->lbam, io_ports->lbam_addr); 151 if (task->tf_flags & IDE_TFLAG_OUT_LBAH) 152 tf_outb(tf->lbah, io_ports->lbah_addr); 153 154 if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) 155 tf_outb((tf->device & HIHI) | drive->select.all, 156 io_ports->device_addr); 157} 158 159static void ide_tf_read(ide_drive_t *drive, ide_task_t *task) 160{ 161 ide_hwif_t *hwif = drive->hwif; 162 struct ide_io_ports *io_ports = &hwif->io_ports; 163 struct ide_taskfile *tf = &task->tf; 164 void (*tf_outb)(u8 addr, unsigned long port); 165 u8 (*tf_inb)(unsigned long port); 166 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 167 168 if (mmio) { 169 tf_outb = ide_mm_outb; 170 tf_inb = ide_mm_inb; 171 } else { 172 tf_outb = ide_outb; 173 tf_inb = ide_inb; 174 } 175 176 if (task->tf_flags & IDE_TFLAG_IN_DATA) { 177 u16 data; 178 179 if (mmio) 180 data = readw((void __iomem *)io_ports->data_addr); 181 else 182 data = inw(io_ports->data_addr); 183 184 tf->data = data & 0xff; 185 tf->hob_data = (data >> 8) & 0xff; 186 } 187 188 /* be sure we're looking at the low order bits */ 189 tf_outb(drive->ctl & ~0x80, io_ports->ctl_addr); 190 191 if (task->tf_flags & IDE_TFLAG_IN_NSECT) 192 tf->nsect = tf_inb(io_ports->nsect_addr); 193 if (task->tf_flags & IDE_TFLAG_IN_LBAL) 194 tf->lbal = tf_inb(io_ports->lbal_addr); 195 if (task->tf_flags & IDE_TFLAG_IN_LBAM) 196 tf->lbam = tf_inb(io_ports->lbam_addr); 197 if (task->tf_flags & IDE_TFLAG_IN_LBAH) 198 tf->lbah = tf_inb(io_ports->lbah_addr); 199 if (task->tf_flags & IDE_TFLAG_IN_DEVICE) 200 tf->device = tf_inb(io_ports->device_addr); 201 202 if (task->tf_flags & IDE_TFLAG_LBA48) { 203 tf_outb(drive->ctl | 0x80, io_ports->ctl_addr); 204 205 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) 206 tf->hob_feature = tf_inb(io_ports->feature_addr); 207 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) 208 tf->hob_nsect = tf_inb(io_ports->nsect_addr); 209 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) 210 tf->hob_lbal = tf_inb(io_ports->lbal_addr); 211 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) 212 tf->hob_lbam = tf_inb(io_ports->lbam_addr); 213 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) 214 tf->hob_lbah = tf_inb(io_ports->lbah_addr); 215 } 216} 217 218/* 219 * Some localbus EIDE interfaces require a special access sequence 220 * when using 32-bit I/O instructions to transfer data. We call this 221 * the "vlb_sync" sequence, which consists of three successive reads 222 * of the sector count register location, with interrupts disabled 223 * to ensure that the reads all happen together. 224 */ 225static void ata_vlb_sync(unsigned long port) 226{ 227 (void)inb(port); 228 (void)inb(port); 229 (void)inb(port); 230} 231 232/* 233 * This is used for most PIO data transfers *from* the IDE interface 234 * 235 * These routines will round up any request for an odd number of bytes, 236 * so if an odd len is specified, be sure that there's at least one 237 * extra byte allocated for the buffer. 238 */ 239static void ata_input_data(ide_drive_t *drive, struct request *rq, 240 void *buf, unsigned int len) 241{ 242 ide_hwif_t *hwif = drive->hwif; 243 struct ide_io_ports *io_ports = &hwif->io_ports; 244 unsigned long data_addr = io_ports->data_addr; 245 u8 io_32bit = drive->io_32bit; 246 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 247 248 len++; 249 250 if (io_32bit) { 251 unsigned long uninitialized_var(flags); 252 253 if ((io_32bit & 2) && !mmio) { 254 local_irq_save(flags); 255 ata_vlb_sync(io_ports->nsect_addr); 256 } 257 258 if (mmio) 259 __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); 260 else 261 insl(data_addr, buf, len / 4); 262 263 if ((io_32bit & 2) && !mmio) 264 local_irq_restore(flags); 265 266 if ((len & 3) >= 2) { 267 if (mmio) 268 __ide_mm_insw((void __iomem *)data_addr, 269 (u8 *)buf + (len & ~3), 1); 270 else 271 insw(data_addr, (u8 *)buf + (len & ~3), 1); 272 } 273 } else { 274 if (mmio) 275 __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); 276 else 277 insw(data_addr, buf, len / 2); 278 } 279} 280 281/* 282 * This is used for most PIO data transfers *to* the IDE interface 283 */ 284static void ata_output_data(ide_drive_t *drive, struct request *rq, 285 void *buf, unsigned int len) 286{ 287 ide_hwif_t *hwif = drive->hwif; 288 struct ide_io_ports *io_ports = &hwif->io_ports; 289 unsigned long data_addr = io_ports->data_addr; 290 u8 io_32bit = drive->io_32bit; 291 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 292 293 if (io_32bit) { 294 unsigned long uninitialized_var(flags); 295 296 if ((io_32bit & 2) && !mmio) { 297 local_irq_save(flags); 298 ata_vlb_sync(io_ports->nsect_addr); 299 } 300 301 if (mmio) 302 __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); 303 else 304 outsl(data_addr, buf, len / 4); 305 306 if ((io_32bit & 2) && !mmio) 307 local_irq_restore(flags); 308 309 if ((len & 3) >= 2) { 310 if (mmio) 311 __ide_mm_outsw((void __iomem *)data_addr, 312 (u8 *)buf + (len & ~3), 1); 313 else 314 outsw(data_addr, (u8 *)buf + (len & ~3), 1); 315 } 316 } else { 317 if (mmio) 318 __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); 319 else 320 outsw(data_addr, buf, len / 2); 321 } 322} 323 324void default_hwif_transport(ide_hwif_t *hwif) 325{ 326 hwif->tf_load = ide_tf_load; 327 hwif->tf_read = ide_tf_read; 328 329 hwif->input_data = ata_input_data; 330 hwif->output_data = ata_output_data; 331} 332 333void ide_fix_driveid (struct hd_driveid *id) 334{ 335#ifndef __LITTLE_ENDIAN 336# ifdef __BIG_ENDIAN 337 int i; 338 u16 *stringcast; 339 340 id->config = __le16_to_cpu(id->config); 341 id->cyls = __le16_to_cpu(id->cyls); 342 id->reserved2 = __le16_to_cpu(id->reserved2); 343 id->heads = __le16_to_cpu(id->heads); 344 id->track_bytes = __le16_to_cpu(id->track_bytes); 345 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 346 id->sectors = __le16_to_cpu(id->sectors); 347 id->vendor0 = __le16_to_cpu(id->vendor0); 348 id->vendor1 = __le16_to_cpu(id->vendor1); 349 id->vendor2 = __le16_to_cpu(id->vendor2); 350 stringcast = (u16 *)&id->serial_no[0]; 351 for (i = 0; i < (20/2); i++) 352 stringcast[i] = __le16_to_cpu(stringcast[i]); 353 id->buf_type = __le16_to_cpu(id->buf_type); 354 id->buf_size = __le16_to_cpu(id->buf_size); 355 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 356 stringcast = (u16 *)&id->fw_rev[0]; 357 for (i = 0; i < (8/2); i++) 358 stringcast[i] = __le16_to_cpu(stringcast[i]); 359 stringcast = (u16 *)&id->model[0]; 360 for (i = 0; i < (40/2); i++) 361 stringcast[i] = __le16_to_cpu(stringcast[i]); 362 id->dword_io = __le16_to_cpu(id->dword_io); 363 id->reserved50 = __le16_to_cpu(id->reserved50); 364 id->field_valid = __le16_to_cpu(id->field_valid); 365 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 366 id->cur_heads = __le16_to_cpu(id->cur_heads); 367 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 368 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 369 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 370 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 371 id->dma_1word = __le16_to_cpu(id->dma_1word); 372 id->dma_mword = __le16_to_cpu(id->dma_mword); 373 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 374 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 375 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 376 id->eide_pio = __le16_to_cpu(id->eide_pio); 377 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 378 for (i = 0; i < 2; ++i) 379 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 380 for (i = 0; i < 4; ++i) 381 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 382 id->queue_depth = __le16_to_cpu(id->queue_depth); 383 for (i = 0; i < 4; ++i) 384 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 385 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 386 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 387 id->command_set_1 = __le16_to_cpu(id->command_set_1); 388 id->command_set_2 = __le16_to_cpu(id->command_set_2); 389 id->cfsse = __le16_to_cpu(id->cfsse); 390 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 391 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 392 id->csf_default = __le16_to_cpu(id->csf_default); 393 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 394 id->trseuc = __le16_to_cpu(id->trseuc); 395 id->trsEuc = __le16_to_cpu(id->trsEuc); 396 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 397 id->mprc = __le16_to_cpu(id->mprc); 398 id->hw_config = __le16_to_cpu(id->hw_config); 399 id->acoustic = __le16_to_cpu(id->acoustic); 400 id->msrqs = __le16_to_cpu(id->msrqs); 401 id->sxfert = __le16_to_cpu(id->sxfert); 402 id->sal = __le16_to_cpu(id->sal); 403 id->spg = __le32_to_cpu(id->spg); 404 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 405 for (i = 0; i < 22; i++) 406 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 407 id->last_lun = __le16_to_cpu(id->last_lun); 408 id->word127 = __le16_to_cpu(id->word127); 409 id->dlf = __le16_to_cpu(id->dlf); 410 id->csfo = __le16_to_cpu(id->csfo); 411 for (i = 0; i < 26; i++) 412 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 413 id->word156 = __le16_to_cpu(id->word156); 414 for (i = 0; i < 3; i++) 415 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 416 id->cfa_power = __le16_to_cpu(id->cfa_power); 417 for (i = 0; i < 14; i++) 418 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 419 for (i = 0; i < 31; i++) 420 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 421 for (i = 0; i < 48; i++) 422 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 423 id->integrity_word = __le16_to_cpu(id->integrity_word); 424# else 425# error "Please fix <asm/byteorder.h>" 426# endif 427#endif 428} 429 430/* 431 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 432 * removing leading/trailing blanks and compressing internal blanks. 433 * It is primarily used to tidy up the model name/number fields as 434 * returned by the WIN_[P]IDENTIFY commands. 435 */ 436 437void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 438{ 439 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 440 441 if (byteswap) { 442 /* convert from big-endian to host byte order */ 443 for (p = end ; p != s;) { 444 unsigned short *pp = (unsigned short *) (p -= 2); 445 *pp = ntohs(*pp); 446 } 447 } 448 /* strip leading blanks */ 449 while (s != end && *s == ' ') 450 ++s; 451 /* compress internal blanks and strip trailing blanks */ 452 while (s != end && *s) { 453 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 454 *p++ = *(s-1); 455 } 456 /* wipe out trailing garbage */ 457 while (p != end) 458 *p++ = '\0'; 459} 460 461EXPORT_SYMBOL(ide_fixstring); 462 463/* 464 * Needed for PCI irq sharing 465 */ 466int drive_is_ready (ide_drive_t *drive) 467{ 468 ide_hwif_t *hwif = HWIF(drive); 469 u8 stat = 0; 470 471 if (drive->waiting_for_dma) 472 return hwif->dma_ops->dma_test_irq(drive); 473 474#if 0 475 /* need to guarantee 400ns since last command was issued */ 476 udelay(1); 477#endif 478 479 /* 480 * We do a passive status test under shared PCI interrupts on 481 * cards that truly share the ATA side interrupt, but may also share 482 * an interrupt with another pci card/device. We make no assumptions 483 * about possible isa-pnp and pci-pnp issues yet. 484 */ 485 if (hwif->io_ports.ctl_addr) 486 stat = ide_read_altstatus(drive); 487 else 488 /* Note: this may clear a pending IRQ!! */ 489 stat = ide_read_status(drive); 490 491 if (stat & BUSY_STAT) 492 /* drive busy: definitely not interrupting */ 493 return 0; 494 495 /* drive ready: *might* be interrupting */ 496 return 1; 497} 498 499EXPORT_SYMBOL(drive_is_ready); 500 501/* 502 * This routine busy-waits for the drive status to be not "busy". 503 * It then checks the status for all of the "good" bits and none 504 * of the "bad" bits, and if all is okay it returns 0. All other 505 * cases return error -- caller may then invoke ide_error(). 506 * 507 * This routine should get fixed to not hog the cpu during extra long waits.. 508 * That could be done by busy-waiting for the first jiffy or two, and then 509 * setting a timer to wake up at half second intervals thereafter, 510 * until timeout is achieved, before timing out. 511 */ 512static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 513{ 514 unsigned long flags; 515 int i; 516 u8 stat; 517 518 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 519 stat = ide_read_status(drive); 520 521 if (stat & BUSY_STAT) { 522 local_irq_set(flags); 523 timeout += jiffies; 524 while ((stat = ide_read_status(drive)) & BUSY_STAT) { 525 if (time_after(jiffies, timeout)) { 526 /* 527 * One last read after the timeout in case 528 * heavy interrupt load made us not make any 529 * progress during the timeout.. 530 */ 531 stat = ide_read_status(drive); 532 if (!(stat & BUSY_STAT)) 533 break; 534 535 local_irq_restore(flags); 536 *rstat = stat; 537 return -EBUSY; 538 } 539 } 540 local_irq_restore(flags); 541 } 542 /* 543 * Allow status to settle, then read it again. 544 * A few rare drives vastly violate the 400ns spec here, 545 * so we'll wait up to 10usec for a "good" status 546 * rather than expensively fail things immediately. 547 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 548 */ 549 for (i = 0; i < 10; i++) { 550 udelay(1); 551 stat = ide_read_status(drive); 552 553 if (OK_STAT(stat, good, bad)) { 554 *rstat = stat; 555 return 0; 556 } 557 } 558 *rstat = stat; 559 return -EFAULT; 560} 561 562/* 563 * In case of error returns error value after doing "*startstop = ide_error()". 564 * The caller should return the updated value of "startstop" in this case, 565 * "startstop" is unchanged when the function returns 0. 566 */ 567int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 568{ 569 int err; 570 u8 stat; 571 572 /* bail early if we've exceeded max_failures */ 573 if (drive->max_failures && (drive->failures > drive->max_failures)) { 574 *startstop = ide_stopped; 575 return 1; 576 } 577 578 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 579 580 if (err) { 581 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 582 *startstop = ide_error(drive, s, stat); 583 } 584 585 return err; 586} 587 588EXPORT_SYMBOL(ide_wait_stat); 589 590/** 591 * ide_in_drive_list - look for drive in black/white list 592 * @id: drive identifier 593 * @drive_table: list to inspect 594 * 595 * Look for a drive in the blacklist and the whitelist tables 596 * Returns 1 if the drive is found in the table. 597 */ 598 599int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 600{ 601 for ( ; drive_table->id_model; drive_table++) 602 if ((!strcmp(drive_table->id_model, id->model)) && 603 (!drive_table->id_firmware || 604 strstr(id->fw_rev, drive_table->id_firmware))) 605 return 1; 606 return 0; 607} 608 609EXPORT_SYMBOL_GPL(ide_in_drive_list); 610 611/* 612 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 613 * We list them here and depend on the device side cable detection for them. 614 * 615 * Some optical devices with the buggy firmwares have the same problem. 616 */ 617static const struct drive_list_entry ivb_list[] = { 618 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 619 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 620 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 621 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 622 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 623 { "TSSTcorp CDDVDW SH-S202H" , "SB00" }, 624 { "TSSTcorp CDDVDW SH-S202H" , "SB01" }, 625 { NULL , NULL } 626}; 627 628/* 629 * All hosts that use the 80c ribbon must use! 630 * The name is derived from upper byte of word 93 and the 80c ribbon. 631 */ 632u8 eighty_ninty_three (ide_drive_t *drive) 633{ 634 ide_hwif_t *hwif = drive->hwif; 635 struct hd_driveid *id = drive->id; 636 int ivb = ide_in_drive_list(id, ivb_list); 637 638 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 639 return 1; 640 641 if (ivb) 642 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 643 drive->name); 644 645 if (ide_dev_is_sata(id) && !ivb) 646 return 1; 647 648 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 649 goto no_80w; 650 651 /* 652 * FIXME: 653 * - change master/slave IDENTIFY order 654 * - force bit13 (80c cable present) check also for !ivb devices 655 * (unless the slave device is pre-ATA3) 656 */ 657 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 658 return 1; 659 660no_80w: 661 if (drive->udma33_warned == 1) 662 return 0; 663 664 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 665 "limiting max speed to UDMA33\n", 666 drive->name, 667 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 668 669 drive->udma33_warned = 1; 670 671 return 0; 672} 673 674int ide_driveid_update(ide_drive_t *drive) 675{ 676 ide_hwif_t *hwif = drive->hwif; 677 struct hd_driveid *id; 678 unsigned long timeout, flags; 679 u8 stat; 680 681 /* 682 * Re-read drive->id for possible DMA mode 683 * change (copied from ide-probe.c) 684 */ 685 686 SELECT_MASK(drive, 1); 687 ide_set_irq(drive, 0); 688 msleep(50); 689 hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr); 690 timeout = jiffies + WAIT_WORSTCASE; 691 do { 692 if (time_after(jiffies, timeout)) { 693 SELECT_MASK(drive, 0); 694 return 0; /* drive timed-out */ 695 } 696 697 msleep(50); /* give drive a breather */ 698 stat = ide_read_altstatus(drive); 699 } while (stat & BUSY_STAT); 700 701 msleep(50); /* wait for IRQ and DRQ_STAT */ 702 stat = ide_read_status(drive); 703 704 if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) { 705 SELECT_MASK(drive, 0); 706 printk("%s: CHECK for good STATUS\n", drive->name); 707 return 0; 708 } 709 local_irq_save(flags); 710 SELECT_MASK(drive, 0); 711 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 712 if (!id) { 713 local_irq_restore(flags); 714 return 0; 715 } 716 hwif->input_data(drive, NULL, id, SECTOR_SIZE); 717 (void)ide_read_status(drive); /* clear drive IRQ */ 718 local_irq_enable(); 719 local_irq_restore(flags); 720 ide_fix_driveid(id); 721 if (id) { 722 drive->id->dma_ultra = id->dma_ultra; 723 drive->id->dma_mword = id->dma_mword; 724 drive->id->dma_1word = id->dma_1word; 725 /* anything more ? */ 726 kfree(id); 727 728 if (drive->using_dma && ide_id_dma_bug(drive)) 729 ide_dma_off(drive); 730 } 731 732 return 1; 733} 734 735int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 736{ 737 ide_hwif_t *hwif = drive->hwif; 738 struct ide_io_ports *io_ports = &hwif->io_ports; 739 int error = 0; 740 u8 stat; 741 742#ifdef CONFIG_BLK_DEV_IDEDMA 743 if (hwif->dma_ops) /* check if host supports DMA */ 744 hwif->dma_ops->dma_host_set(drive, 0); 745#endif 746 747 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 748 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) 749 goto skip; 750 751 /* 752 * Don't use ide_wait_cmd here - it will 753 * attempt to set_geometry and recalibrate, 754 * but for some reason these don't work at 755 * this point (lost interrupt). 756 */ 757 /* 758 * Select the drive, and issue the SETFEATURES command 759 */ 760 disable_irq_nosync(hwif->irq); 761 762 /* 763 * FIXME: we race against the running IRQ here if 764 * this is called from non IRQ context. If we use 765 * disable_irq() we hang on the error path. Work 766 * is needed. 767 */ 768 769 udelay(1); 770 SELECT_DRIVE(drive); 771 SELECT_MASK(drive, 0); 772 udelay(1); 773 ide_set_irq(drive, 0); 774 hwif->OUTB(speed, io_ports->nsect_addr); 775 hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr); 776 hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr); 777 if (drive->quirk_list == 2) 778 ide_set_irq(drive, 1); 779 780 error = __ide_wait_stat(drive, drive->ready_stat, 781 BUSY_STAT|DRQ_STAT|ERR_STAT, 782 WAIT_CMD, &stat); 783 784 SELECT_MASK(drive, 0); 785 786 enable_irq(hwif->irq); 787 788 if (error) { 789 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 790 return error; 791 } 792 793 drive->id->dma_ultra &= ~0xFF00; 794 drive->id->dma_mword &= ~0x0F00; 795 drive->id->dma_1word &= ~0x0F00; 796 797 skip: 798#ifdef CONFIG_BLK_DEV_IDEDMA 799 if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) && 800 drive->using_dma) 801 hwif->dma_ops->dma_host_set(drive, 1); 802 else if (hwif->dma_ops) /* check if host supports DMA */ 803 ide_dma_off_quietly(drive); 804#endif 805 806 switch(speed) { 807 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 808 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 809 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 810 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 811 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 812 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 813 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 814 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 815 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 816 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 817 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 818 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 819 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 820 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 821 default: break; 822 } 823 if (!drive->init_speed) 824 drive->init_speed = speed; 825 drive->current_speed = speed; 826 return error; 827} 828 829/* 830 * This should get invoked any time we exit the driver to 831 * wait for an interrupt response from a drive. handler() points 832 * at the appropriate code to handle the next interrupt, and a 833 * timer is started to prevent us from waiting forever in case 834 * something goes wrong (see the ide_timer_expiry() handler later on). 835 * 836 * See also ide_execute_command 837 */ 838static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 839 unsigned int timeout, ide_expiry_t *expiry) 840{ 841 ide_hwgroup_t *hwgroup = HWGROUP(drive); 842 843 BUG_ON(hwgroup->handler); 844 hwgroup->handler = handler; 845 hwgroup->expiry = expiry; 846 hwgroup->timer.expires = jiffies + timeout; 847 hwgroup->req_gen_timer = hwgroup->req_gen; 848 add_timer(&hwgroup->timer); 849} 850 851void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 852 unsigned int timeout, ide_expiry_t *expiry) 853{ 854 unsigned long flags; 855 spin_lock_irqsave(&ide_lock, flags); 856 __ide_set_handler(drive, handler, timeout, expiry); 857 spin_unlock_irqrestore(&ide_lock, flags); 858} 859 860EXPORT_SYMBOL(ide_set_handler); 861 862/** 863 * ide_execute_command - execute an IDE command 864 * @drive: IDE drive to issue the command against 865 * @command: command byte to write 866 * @handler: handler for next phase 867 * @timeout: timeout for command 868 * @expiry: handler to run on timeout 869 * 870 * Helper function to issue an IDE command. This handles the 871 * atomicity requirements, command timing and ensures that the 872 * handler and IRQ setup do not race. All IDE command kick off 873 * should go via this function or do equivalent locking. 874 */ 875 876void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 877 unsigned timeout, ide_expiry_t *expiry) 878{ 879 unsigned long flags; 880 ide_hwif_t *hwif = HWIF(drive); 881 882 spin_lock_irqsave(&ide_lock, flags); 883 __ide_set_handler(drive, handler, timeout, expiry); 884 hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr); 885 /* 886 * Drive takes 400nS to respond, we must avoid the IRQ being 887 * serviced before that. 888 * 889 * FIXME: we could skip this delay with care on non shared devices 890 */ 891 ndelay(400); 892 spin_unlock_irqrestore(&ide_lock, flags); 893} 894EXPORT_SYMBOL(ide_execute_command); 895 896void ide_execute_pkt_cmd(ide_drive_t *drive) 897{ 898 ide_hwif_t *hwif = drive->hwif; 899 unsigned long flags; 900 901 spin_lock_irqsave(&ide_lock, flags); 902 hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr); 903 ndelay(400); 904 spin_unlock_irqrestore(&ide_lock, flags); 905} 906EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); 907 908/* needed below */ 909static ide_startstop_t do_reset1 (ide_drive_t *, int); 910 911/* 912 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 913 * during an atapi drive reset operation. If the drive has not yet responded, 914 * and we have not yet hit our maximum waiting time, then the timer is restarted 915 * for another 50ms. 916 */ 917static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 918{ 919 ide_hwgroup_t *hwgroup = HWGROUP(drive); 920 u8 stat; 921 922 SELECT_DRIVE(drive); 923 udelay (10); 924 stat = ide_read_status(drive); 925 926 if (OK_STAT(stat, 0, BUSY_STAT)) 927 printk("%s: ATAPI reset complete\n", drive->name); 928 else { 929 if (time_before(jiffies, hwgroup->poll_timeout)) { 930 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 931 /* continue polling */ 932 return ide_started; 933 } 934 /* end of polling */ 935 hwgroup->polling = 0; 936 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 937 drive->name, stat); 938 /* do it the old fashioned way */ 939 return do_reset1(drive, 1); 940 } 941 /* done polling */ 942 hwgroup->polling = 0; 943 hwgroup->resetting = 0; 944 return ide_stopped; 945} 946 947/* 948 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 949 * during an ide reset operation. If the drives have not yet responded, 950 * and we have not yet hit our maximum waiting time, then the timer is restarted 951 * for another 50ms. 952 */ 953static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 954{ 955 ide_hwgroup_t *hwgroup = HWGROUP(drive); 956 ide_hwif_t *hwif = HWIF(drive); 957 const struct ide_port_ops *port_ops = hwif->port_ops; 958 u8 tmp; 959 960 if (port_ops && port_ops->reset_poll) { 961 if (port_ops->reset_poll(drive)) { 962 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 963 hwif->name, drive->name); 964 return ide_stopped; 965 } 966 } 967 968 tmp = ide_read_status(drive); 969 970 if (!OK_STAT(tmp, 0, BUSY_STAT)) { 971 if (time_before(jiffies, hwgroup->poll_timeout)) { 972 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 973 /* continue polling */ 974 return ide_started; 975 } 976 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 977 drive->failures++; 978 } else { 979 printk("%s: reset: ", hwif->name); 980 tmp = ide_read_error(drive); 981 982 if (tmp == 1) { 983 printk("success\n"); 984 drive->failures = 0; 985 } else { 986 drive->failures++; 987 printk("master: "); 988 switch (tmp & 0x7f) { 989 case 1: printk("passed"); 990 break; 991 case 2: printk("formatter device error"); 992 break; 993 case 3: printk("sector buffer error"); 994 break; 995 case 4: printk("ECC circuitry error"); 996 break; 997 case 5: printk("controlling MPU error"); 998 break; 999 default:printk("error (0x%02x?)", tmp); 1000 } 1001 if (tmp & 0x80) 1002 printk("; slave: failed"); 1003 printk("\n"); 1004 } 1005 } 1006 hwgroup->polling = 0; /* done polling */ 1007 hwgroup->resetting = 0; /* done reset attempt */ 1008 return ide_stopped; 1009} 1010 1011static void ide_disk_pre_reset(ide_drive_t *drive) 1012{ 1013 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1014 1015 drive->special.all = 0; 1016 drive->special.b.set_geometry = legacy; 1017 drive->special.b.recalibrate = legacy; 1018 drive->mult_count = 0; 1019 if (!drive->keep_settings && !drive->using_dma) 1020 drive->mult_req = 0; 1021 if (drive->mult_req != drive->mult_count) 1022 drive->special.b.set_multmode = 1; 1023} 1024 1025static void pre_reset(ide_drive_t *drive) 1026{ 1027 const struct ide_port_ops *port_ops = drive->hwif->port_ops; 1028 1029 if (drive->media == ide_disk) 1030 ide_disk_pre_reset(drive); 1031 else 1032 drive->post_reset = 1; 1033 1034 if (drive->using_dma) { 1035 if (drive->crc_count) 1036 ide_check_dma_crc(drive); 1037 else 1038 ide_dma_off(drive); 1039 } 1040 1041 if (!drive->keep_settings) { 1042 if (!drive->using_dma) { 1043 drive->unmask = 0; 1044 drive->io_32bit = 0; 1045 } 1046 return; 1047 } 1048 1049 if (port_ops && port_ops->pre_reset) 1050 port_ops->pre_reset(drive); 1051 1052 if (drive->current_speed != 0xff) 1053 drive->desired_speed = drive->current_speed; 1054 drive->current_speed = 0xff; 1055} 1056 1057/* 1058 * do_reset1() attempts to recover a confused drive by resetting it. 1059 * Unfortunately, resetting a disk drive actually resets all devices on 1060 * the same interface, so it can really be thought of as resetting the 1061 * interface rather than resetting the drive. 1062 * 1063 * ATAPI devices have their own reset mechanism which allows them to be 1064 * individually reset without clobbering other devices on the same interface. 1065 * 1066 * Unfortunately, the IDE interface does not generate an interrupt to let 1067 * us know when the reset operation has finished, so we must poll for this. 1068 * Equally poor, though, is the fact that this may a very long time to complete, 1069 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1070 * we set a timer to poll at 50ms intervals. 1071 */ 1072static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1073{ 1074 unsigned int unit; 1075 unsigned long flags; 1076 ide_hwif_t *hwif; 1077 ide_hwgroup_t *hwgroup; 1078 struct ide_io_ports *io_ports; 1079 const struct ide_port_ops *port_ops; 1080 u8 ctl; 1081 1082 spin_lock_irqsave(&ide_lock, flags); 1083 hwif = HWIF(drive); 1084 hwgroup = HWGROUP(drive); 1085 1086 io_ports = &hwif->io_ports; 1087 1088 /* We must not reset with running handlers */ 1089 BUG_ON(hwgroup->handler != NULL); 1090 1091 /* For an ATAPI device, first try an ATAPI SRST. */ 1092 if (drive->media != ide_disk && !do_not_try_atapi) { 1093 hwgroup->resetting = 1; 1094 pre_reset(drive); 1095 SELECT_DRIVE(drive); 1096 udelay (20); 1097 hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr); 1098 ndelay(400); 1099 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1100 hwgroup->polling = 1; 1101 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1102 spin_unlock_irqrestore(&ide_lock, flags); 1103 return ide_started; 1104 } 1105 1106 /* 1107 * First, reset any device state data we were maintaining 1108 * for any of the drives on this interface. 1109 */ 1110 for (unit = 0; unit < MAX_DRIVES; ++unit) 1111 pre_reset(&hwif->drives[unit]); 1112 1113 if (io_ports->ctl_addr == 0) { 1114 spin_unlock_irqrestore(&ide_lock, flags); 1115 return ide_stopped; 1116 } 1117 1118 hwgroup->resetting = 1; 1119 /* 1120 * Note that we also set nIEN while resetting the device, 1121 * to mask unwanted interrupts from the interface during the reset. 1122 * However, due to the design of PC hardware, this will cause an 1123 * immediate interrupt due to the edge transition it produces. 1124 * This single interrupt gives us a "fast poll" for drives that 1125 * recover from reset very quickly, saving us the first 50ms wait time. 1126 */ 1127 /* set SRST and nIEN */ 1128 hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr); 1129 /* more than enough time */ 1130 udelay(10); 1131 if (drive->quirk_list == 2) 1132 ctl = drive->ctl; /* clear SRST and nIEN */ 1133 else 1134 ctl = drive->ctl | 2; /* clear SRST, leave nIEN */ 1135 hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr); 1136 /* more than enough time */ 1137 udelay(10); 1138 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1139 hwgroup->polling = 1; 1140 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1141 1142 /* 1143 * Some weird controller like resetting themselves to a strange 1144 * state when the disks are reset this way. At least, the Winbond 1145 * 553 documentation says that 1146 */ 1147 port_ops = hwif->port_ops; 1148 if (port_ops && port_ops->resetproc) 1149 port_ops->resetproc(drive); 1150 1151 spin_unlock_irqrestore(&ide_lock, flags); 1152 return ide_started; 1153} 1154 1155/* 1156 * ide_do_reset() is the entry point to the drive/interface reset code. 1157 */ 1158 1159ide_startstop_t ide_do_reset (ide_drive_t *drive) 1160{ 1161 return do_reset1(drive, 0); 1162} 1163 1164EXPORT_SYMBOL(ide_do_reset); 1165 1166/* 1167 * ide_wait_not_busy() waits for the currently selected device on the hwif 1168 * to report a non-busy status, see comments in ide_probe_port(). 1169 */ 1170int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1171{ 1172 u8 stat = 0; 1173 1174 while(timeout--) { 1175 /* 1176 * Turn this into a schedule() sleep once I'm sure 1177 * about locking issues (2.5 work ?). 1178 */ 1179 mdelay(1); 1180 stat = hwif->INB(hwif->io_ports.status_addr); 1181 if ((stat & BUSY_STAT) == 0) 1182 return 0; 1183 /* 1184 * Assume a value of 0xff means nothing is connected to 1185 * the interface and it doesn't implement the pull-down 1186 * resistor on D7. 1187 */ 1188 if (stat == 0xff) 1189 return -ENODEV; 1190 touch_softlockup_watchdog(); 1191 touch_nmi_watchdog(); 1192 } 1193 return -EBUSY; 1194} 1195 1196EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1197 1198