ide-iops.c revision fa017176f7144028aa23c1adcebb1792c891320c
1/* 2 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 2003 Red Hat <alan@redhat.com> 4 * 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/string.h> 10#include <linux/kernel.h> 11#include <linux/timer.h> 12#include <linux/mm.h> 13#include <linux/interrupt.h> 14#include <linux/major.h> 15#include <linux/errno.h> 16#include <linux/genhd.h> 17#include <linux/blkpg.h> 18#include <linux/slab.h> 19#include <linux/pci.h> 20#include <linux/delay.h> 21#include <linux/hdreg.h> 22#include <linux/ide.h> 23#include <linux/bitops.h> 24#include <linux/nmi.h> 25 26#include <asm/byteorder.h> 27#include <asm/irq.h> 28#include <asm/uaccess.h> 29#include <asm/io.h> 30 31/* 32 * Conventional PIO operations for ATA devices 33 */ 34 35static u8 ide_inb (unsigned long port) 36{ 37 return (u8) inb(port); 38} 39 40static u16 ide_inw (unsigned long port) 41{ 42 return (u16) inw(port); 43} 44 45static void ide_insw (unsigned long port, void *addr, u32 count) 46{ 47 insw(port, addr, count); 48} 49 50static void ide_insl (unsigned long port, void *addr, u32 count) 51{ 52 insl(port, addr, count); 53} 54 55static void ide_outb (u8 val, unsigned long port) 56{ 57 outb(val, port); 58} 59 60static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 61{ 62 outb(addr, port); 63} 64 65static void ide_outw (u16 val, unsigned long port) 66{ 67 outw(val, port); 68} 69 70static void ide_outsw (unsigned long port, void *addr, u32 count) 71{ 72 outsw(port, addr, count); 73} 74 75static void ide_outsl (unsigned long port, void *addr, u32 count) 76{ 77 outsl(port, addr, count); 78} 79 80void default_hwif_iops (ide_hwif_t *hwif) 81{ 82 hwif->OUTB = ide_outb; 83 hwif->OUTBSYNC = ide_outbsync; 84 hwif->OUTW = ide_outw; 85 hwif->OUTSW = ide_outsw; 86 hwif->OUTSL = ide_outsl; 87 hwif->INB = ide_inb; 88 hwif->INW = ide_inw; 89 hwif->INSW = ide_insw; 90 hwif->INSL = ide_insl; 91} 92 93/* 94 * MMIO operations, typically used for SATA controllers 95 */ 96 97static u8 ide_mm_inb (unsigned long port) 98{ 99 return (u8) readb((void __iomem *) port); 100} 101 102static u16 ide_mm_inw (unsigned long port) 103{ 104 return (u16) readw((void __iomem *) port); 105} 106 107static void ide_mm_insw (unsigned long port, void *addr, u32 count) 108{ 109 __ide_mm_insw((void __iomem *) port, addr, count); 110} 111 112static void ide_mm_insl (unsigned long port, void *addr, u32 count) 113{ 114 __ide_mm_insl((void __iomem *) port, addr, count); 115} 116 117static void ide_mm_outb (u8 value, unsigned long port) 118{ 119 writeb(value, (void __iomem *) port); 120} 121 122static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 123{ 124 writeb(value, (void __iomem *) port); 125} 126 127static void ide_mm_outw (u16 value, unsigned long port) 128{ 129 writew(value, (void __iomem *) port); 130} 131 132static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 133{ 134 __ide_mm_outsw((void __iomem *) port, addr, count); 135} 136 137static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 138{ 139 __ide_mm_outsl((void __iomem *) port, addr, count); 140} 141 142void default_hwif_mmiops (ide_hwif_t *hwif) 143{ 144 hwif->OUTB = ide_mm_outb; 145 /* Most systems will need to override OUTBSYNC, alas however 146 this one is controller specific! */ 147 hwif->OUTBSYNC = ide_mm_outbsync; 148 hwif->OUTW = ide_mm_outw; 149 hwif->OUTSW = ide_mm_outsw; 150 hwif->OUTSL = ide_mm_outsl; 151 hwif->INB = ide_mm_inb; 152 hwif->INW = ide_mm_inw; 153 hwif->INSW = ide_mm_insw; 154 hwif->INSL = ide_mm_insl; 155} 156 157EXPORT_SYMBOL(default_hwif_mmiops); 158 159void SELECT_DRIVE (ide_drive_t *drive) 160{ 161 if (HWIF(drive)->selectproc) 162 HWIF(drive)->selectproc(drive); 163 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 164} 165 166void SELECT_MASK (ide_drive_t *drive, int mask) 167{ 168 if (HWIF(drive)->maskproc) 169 HWIF(drive)->maskproc(drive, mask); 170} 171 172/* 173 * Some localbus EIDE interfaces require a special access sequence 174 * when using 32-bit I/O instructions to transfer data. We call this 175 * the "vlb_sync" sequence, which consists of three successive reads 176 * of the sector count register location, with interrupts disabled 177 * to ensure that the reads all happen together. 178 */ 179static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 180{ 181 (void) HWIF(drive)->INB(port); 182 (void) HWIF(drive)->INB(port); 183 (void) HWIF(drive)->INB(port); 184} 185 186/* 187 * This is used for most PIO data transfers *from* the IDE interface 188 */ 189static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 190{ 191 ide_hwif_t *hwif = HWIF(drive); 192 u8 io_32bit = drive->io_32bit; 193 194 if (io_32bit) { 195 if (io_32bit & 2) { 196 unsigned long flags; 197 local_irq_save(flags); 198 ata_vlb_sync(drive, IDE_NSECTOR_REG); 199 hwif->INSL(IDE_DATA_REG, buffer, wcount); 200 local_irq_restore(flags); 201 } else 202 hwif->INSL(IDE_DATA_REG, buffer, wcount); 203 } else { 204 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 205 } 206} 207 208/* 209 * This is used for most PIO data transfers *to* the IDE interface 210 */ 211static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 212{ 213 ide_hwif_t *hwif = HWIF(drive); 214 u8 io_32bit = drive->io_32bit; 215 216 if (io_32bit) { 217 if (io_32bit & 2) { 218 unsigned long flags; 219 local_irq_save(flags); 220 ata_vlb_sync(drive, IDE_NSECTOR_REG); 221 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 222 local_irq_restore(flags); 223 } else 224 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 225 } else { 226 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 227 } 228} 229 230/* 231 * The following routines are mainly used by the ATAPI drivers. 232 * 233 * These routines will round up any request for an odd number of bytes, 234 * so if an odd bytecount is specified, be sure that there's at least one 235 * extra byte allocated for the buffer. 236 */ 237 238static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 239{ 240 ide_hwif_t *hwif = HWIF(drive); 241 242 ++bytecount; 243#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 244 if (MACH_IS_ATARI || MACH_IS_Q40) { 245 /* Atari has a byte-swapped IDE interface */ 246 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 247 return; 248 } 249#endif /* CONFIG_ATARI || CONFIG_Q40 */ 250 hwif->ata_input_data(drive, buffer, bytecount / 4); 251 if ((bytecount & 0x03) >= 2) 252 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 253} 254 255static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 256{ 257 ide_hwif_t *hwif = HWIF(drive); 258 259 ++bytecount; 260#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 261 if (MACH_IS_ATARI || MACH_IS_Q40) { 262 /* Atari has a byte-swapped IDE interface */ 263 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 264 return; 265 } 266#endif /* CONFIG_ATARI || CONFIG_Q40 */ 267 hwif->ata_output_data(drive, buffer, bytecount / 4); 268 if ((bytecount & 0x03) >= 2) 269 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 270} 271 272void default_hwif_transport(ide_hwif_t *hwif) 273{ 274 hwif->ata_input_data = ata_input_data; 275 hwif->ata_output_data = ata_output_data; 276 hwif->atapi_input_bytes = atapi_input_bytes; 277 hwif->atapi_output_bytes = atapi_output_bytes; 278} 279 280void ide_fix_driveid (struct hd_driveid *id) 281{ 282#ifndef __LITTLE_ENDIAN 283# ifdef __BIG_ENDIAN 284 int i; 285 u16 *stringcast; 286 287 id->config = __le16_to_cpu(id->config); 288 id->cyls = __le16_to_cpu(id->cyls); 289 id->reserved2 = __le16_to_cpu(id->reserved2); 290 id->heads = __le16_to_cpu(id->heads); 291 id->track_bytes = __le16_to_cpu(id->track_bytes); 292 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 293 id->sectors = __le16_to_cpu(id->sectors); 294 id->vendor0 = __le16_to_cpu(id->vendor0); 295 id->vendor1 = __le16_to_cpu(id->vendor1); 296 id->vendor2 = __le16_to_cpu(id->vendor2); 297 stringcast = (u16 *)&id->serial_no[0]; 298 for (i = 0; i < (20/2); i++) 299 stringcast[i] = __le16_to_cpu(stringcast[i]); 300 id->buf_type = __le16_to_cpu(id->buf_type); 301 id->buf_size = __le16_to_cpu(id->buf_size); 302 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 303 stringcast = (u16 *)&id->fw_rev[0]; 304 for (i = 0; i < (8/2); i++) 305 stringcast[i] = __le16_to_cpu(stringcast[i]); 306 stringcast = (u16 *)&id->model[0]; 307 for (i = 0; i < (40/2); i++) 308 stringcast[i] = __le16_to_cpu(stringcast[i]); 309 id->dword_io = __le16_to_cpu(id->dword_io); 310 id->reserved50 = __le16_to_cpu(id->reserved50); 311 id->field_valid = __le16_to_cpu(id->field_valid); 312 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 313 id->cur_heads = __le16_to_cpu(id->cur_heads); 314 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 315 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 316 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 317 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 318 id->dma_1word = __le16_to_cpu(id->dma_1word); 319 id->dma_mword = __le16_to_cpu(id->dma_mword); 320 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 321 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 322 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 323 id->eide_pio = __le16_to_cpu(id->eide_pio); 324 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 325 for (i = 0; i < 2; ++i) 326 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 327 for (i = 0; i < 4; ++i) 328 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 329 id->queue_depth = __le16_to_cpu(id->queue_depth); 330 for (i = 0; i < 4; ++i) 331 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 332 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 333 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 334 id->command_set_1 = __le16_to_cpu(id->command_set_1); 335 id->command_set_2 = __le16_to_cpu(id->command_set_2); 336 id->cfsse = __le16_to_cpu(id->cfsse); 337 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 338 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 339 id->csf_default = __le16_to_cpu(id->csf_default); 340 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 341 id->trseuc = __le16_to_cpu(id->trseuc); 342 id->trsEuc = __le16_to_cpu(id->trsEuc); 343 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 344 id->mprc = __le16_to_cpu(id->mprc); 345 id->hw_config = __le16_to_cpu(id->hw_config); 346 id->acoustic = __le16_to_cpu(id->acoustic); 347 id->msrqs = __le16_to_cpu(id->msrqs); 348 id->sxfert = __le16_to_cpu(id->sxfert); 349 id->sal = __le16_to_cpu(id->sal); 350 id->spg = __le32_to_cpu(id->spg); 351 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 352 for (i = 0; i < 22; i++) 353 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 354 id->last_lun = __le16_to_cpu(id->last_lun); 355 id->word127 = __le16_to_cpu(id->word127); 356 id->dlf = __le16_to_cpu(id->dlf); 357 id->csfo = __le16_to_cpu(id->csfo); 358 for (i = 0; i < 26; i++) 359 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 360 id->word156 = __le16_to_cpu(id->word156); 361 for (i = 0; i < 3; i++) 362 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 363 id->cfa_power = __le16_to_cpu(id->cfa_power); 364 for (i = 0; i < 14; i++) 365 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 366 for (i = 0; i < 31; i++) 367 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 368 for (i = 0; i < 48; i++) 369 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 370 id->integrity_word = __le16_to_cpu(id->integrity_word); 371# else 372# error "Please fix <asm/byteorder.h>" 373# endif 374#endif 375} 376 377/* 378 * ide_fixstring() cleans up and (optionally) byte-swaps a text string, 379 * removing leading/trailing blanks and compressing internal blanks. 380 * It is primarily used to tidy up the model name/number fields as 381 * returned by the WIN_[P]IDENTIFY commands. 382 */ 383 384void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 385{ 386 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 387 388 if (byteswap) { 389 /* convert from big-endian to host byte order */ 390 for (p = end ; p != s;) { 391 unsigned short *pp = (unsigned short *) (p -= 2); 392 *pp = ntohs(*pp); 393 } 394 } 395 /* strip leading blanks */ 396 while (s != end && *s == ' ') 397 ++s; 398 /* compress internal blanks and strip trailing blanks */ 399 while (s != end && *s) { 400 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 401 *p++ = *(s-1); 402 } 403 /* wipe out trailing garbage */ 404 while (p != end) 405 *p++ = '\0'; 406} 407 408EXPORT_SYMBOL(ide_fixstring); 409 410/* 411 * Needed for PCI irq sharing 412 */ 413int drive_is_ready (ide_drive_t *drive) 414{ 415 ide_hwif_t *hwif = HWIF(drive); 416 u8 stat = 0; 417 418 if (drive->waiting_for_dma) 419 return hwif->ide_dma_test_irq(drive); 420 421#if 0 422 /* need to guarantee 400ns since last command was issued */ 423 udelay(1); 424#endif 425 426 /* 427 * We do a passive status test under shared PCI interrupts on 428 * cards that truly share the ATA side interrupt, but may also share 429 * an interrupt with another pci card/device. We make no assumptions 430 * about possible isa-pnp and pci-pnp issues yet. 431 */ 432 if (IDE_CONTROL_REG) 433 stat = hwif->INB(IDE_ALTSTATUS_REG); 434 else 435 /* Note: this may clear a pending IRQ!! */ 436 stat = hwif->INB(IDE_STATUS_REG); 437 438 if (stat & BUSY_STAT) 439 /* drive busy: definitely not interrupting */ 440 return 0; 441 442 /* drive ready: *might* be interrupting */ 443 return 1; 444} 445 446EXPORT_SYMBOL(drive_is_ready); 447 448/* 449 * This routine busy-waits for the drive status to be not "busy". 450 * It then checks the status for all of the "good" bits and none 451 * of the "bad" bits, and if all is okay it returns 0. All other 452 * cases return error -- caller may then invoke ide_error(). 453 * 454 * This routine should get fixed to not hog the cpu during extra long waits.. 455 * That could be done by busy-waiting for the first jiffy or two, and then 456 * setting a timer to wake up at half second intervals thereafter, 457 * until timeout is achieved, before timing out. 458 */ 459static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) 460{ 461 ide_hwif_t *hwif = drive->hwif; 462 unsigned long flags; 463 int i; 464 u8 stat; 465 466 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 467 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 468 local_irq_set(flags); 469 timeout += jiffies; 470 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 471 if (time_after(jiffies, timeout)) { 472 /* 473 * One last read after the timeout in case 474 * heavy interrupt load made us not make any 475 * progress during the timeout.. 476 */ 477 stat = hwif->INB(IDE_STATUS_REG); 478 if (!(stat & BUSY_STAT)) 479 break; 480 481 local_irq_restore(flags); 482 *rstat = stat; 483 return -EBUSY; 484 } 485 } 486 local_irq_restore(flags); 487 } 488 /* 489 * Allow status to settle, then read it again. 490 * A few rare drives vastly violate the 400ns spec here, 491 * so we'll wait up to 10usec for a "good" status 492 * rather than expensively fail things immediately. 493 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 494 */ 495 for (i = 0; i < 10; i++) { 496 udelay(1); 497 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) { 498 *rstat = stat; 499 return 0; 500 } 501 } 502 *rstat = stat; 503 return -EFAULT; 504} 505 506/* 507 * In case of error returns error value after doing "*startstop = ide_error()". 508 * The caller should return the updated value of "startstop" in this case, 509 * "startstop" is unchanged when the function returns 0. 510 */ 511int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 512{ 513 int err; 514 u8 stat; 515 516 /* bail early if we've exceeded max_failures */ 517 if (drive->max_failures && (drive->failures > drive->max_failures)) { 518 *startstop = ide_stopped; 519 return 1; 520 } 521 522 err = __ide_wait_stat(drive, good, bad, timeout, &stat); 523 524 if (err) { 525 char *s = (err == -EBUSY) ? "status timeout" : "status error"; 526 *startstop = ide_error(drive, s, stat); 527 } 528 529 return err; 530} 531 532EXPORT_SYMBOL(ide_wait_stat); 533 534/** 535 * ide_in_drive_list - look for drive in black/white list 536 * @id: drive identifier 537 * @drive_table: list to inspect 538 * 539 * Look for a drive in the blacklist and the whitelist tables 540 * Returns 1 if the drive is found in the table. 541 */ 542 543int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) 544{ 545 for ( ; drive_table->id_model; drive_table++) 546 if ((!strcmp(drive_table->id_model, id->model)) && 547 (!drive_table->id_firmware || 548 strstr(id->fw_rev, drive_table->id_firmware))) 549 return 1; 550 return 0; 551} 552 553EXPORT_SYMBOL_GPL(ide_in_drive_list); 554 555/* 556 * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. 557 * We list them here and depend on the device side cable detection for them. 558 * 559 * Some optical devices with the buggy firmwares have the same problem. 560 */ 561static const struct drive_list_entry ivb_list[] = { 562 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 563 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 564 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 565 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 566 { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, 567 { NULL , NULL } 568}; 569 570/* 571 * All hosts that use the 80c ribbon must use! 572 * The name is derived from upper byte of word 93 and the 80c ribbon. 573 */ 574u8 eighty_ninty_three (ide_drive_t *drive) 575{ 576 ide_hwif_t *hwif = drive->hwif; 577 struct hd_driveid *id = drive->id; 578 int ivb = ide_in_drive_list(id, ivb_list); 579 580 if (hwif->cbl == ATA_CBL_PATA40_SHORT) 581 return 1; 582 583 if (ivb) 584 printk(KERN_DEBUG "%s: skipping word 93 validity check\n", 585 drive->name); 586 587 if (ide_dev_is_sata(id) && !ivb) 588 return 1; 589 590 if (hwif->cbl != ATA_CBL_PATA80 && !ivb) 591 goto no_80w; 592 593 /* 594 * FIXME: 595 * - force bit13 (80c cable present) check also for !ivb devices 596 * (unless the slave device is pre-ATA3) 597 */ 598 if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) 599 return 1; 600 601no_80w: 602 if (drive->udma33_warned == 1) 603 return 0; 604 605 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 606 "limiting max speed to UDMA33\n", 607 drive->name, 608 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); 609 610 drive->udma33_warned = 1; 611 612 return 0; 613} 614 615int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 616{ 617 if (args->tf.command == WIN_SETFEATURES && 618 args->tf.nsect > XFER_UDMA_2 && 619 args->tf.feature == SETFEATURES_XFER) { 620 if (eighty_ninty_three(drive) == 0) { 621 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " 622 "be set\n", drive->name); 623 return 1; 624 } 625 } 626 627 return 0; 628} 629 630/* 631 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 632 * 1 : Safe to update drive->id DMA registers. 633 * 0 : OOPs not allowed. 634 */ 635int set_transfer (ide_drive_t *drive, ide_task_t *args) 636{ 637 if (args->tf.command == WIN_SETFEATURES && 638 args->tf.nsect >= XFER_SW_DMA_0 && 639 args->tf.feature == SETFEATURES_XFER && 640 (drive->id->dma_ultra || 641 drive->id->dma_mword || 642 drive->id->dma_1word)) 643 return 1; 644 645 return 0; 646} 647 648#ifdef CONFIG_BLK_DEV_IDEDMA 649static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 650{ 651 if (!drive->crc_count) 652 return drive->current_speed; 653 drive->crc_count = 0; 654 655 switch(drive->current_speed) { 656 case XFER_UDMA_7: return XFER_UDMA_6; 657 case XFER_UDMA_6: return XFER_UDMA_5; 658 case XFER_UDMA_5: return XFER_UDMA_4; 659 case XFER_UDMA_4: return XFER_UDMA_3; 660 case XFER_UDMA_3: return XFER_UDMA_2; 661 case XFER_UDMA_2: return XFER_UDMA_1; 662 case XFER_UDMA_1: return XFER_UDMA_0; 663 /* 664 * OOPS we do not goto non Ultra DMA modes 665 * without iCRC's available we force 666 * the system to PIO and make the user 667 * invoke the ATA-1 ATA-2 DMA modes. 668 */ 669 case XFER_UDMA_0: 670 default: return XFER_PIO_4; 671 } 672} 673#endif /* CONFIG_BLK_DEV_IDEDMA */ 674 675int ide_driveid_update(ide_drive_t *drive) 676{ 677 ide_hwif_t *hwif = drive->hwif; 678 struct hd_driveid *id; 679 unsigned long timeout, flags; 680 681 /* 682 * Re-read drive->id for possible DMA mode 683 * change (copied from ide-probe.c) 684 */ 685 686 SELECT_MASK(drive, 1); 687 ide_set_irq(drive, 1); 688 msleep(50); 689 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 690 timeout = jiffies + WAIT_WORSTCASE; 691 do { 692 if (time_after(jiffies, timeout)) { 693 SELECT_MASK(drive, 0); 694 return 0; /* drive timed-out */ 695 } 696 msleep(50); /* give drive a breather */ 697 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 698 msleep(50); /* wait for IRQ and DRQ_STAT */ 699 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 700 SELECT_MASK(drive, 0); 701 printk("%s: CHECK for good STATUS\n", drive->name); 702 return 0; 703 } 704 local_irq_save(flags); 705 SELECT_MASK(drive, 0); 706 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 707 if (!id) { 708 local_irq_restore(flags); 709 return 0; 710 } 711 ata_input_data(drive, id, SECTOR_WORDS); 712 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 713 local_irq_enable(); 714 local_irq_restore(flags); 715 ide_fix_driveid(id); 716 if (id) { 717 drive->id->dma_ultra = id->dma_ultra; 718 drive->id->dma_mword = id->dma_mword; 719 drive->id->dma_1word = id->dma_1word; 720 /* anything more ? */ 721 kfree(id); 722 723 if (drive->using_dma && ide_id_dma_bug(drive)) 724 ide_dma_off(drive); 725 } 726 727 return 1; 728} 729 730int ide_config_drive_speed(ide_drive_t *drive, u8 speed) 731{ 732 ide_hwif_t *hwif = drive->hwif; 733 int error = 0; 734 u8 stat; 735 736// while (HWGROUP(drive)->busy) 737// msleep(50); 738 739#ifdef CONFIG_BLK_DEV_IDEDMA 740 if (hwif->dma_host_set) /* check if host supports DMA */ 741 hwif->dma_host_set(drive, 0); 742#endif 743 744 /* Skip setting PIO flow-control modes on pre-EIDE drives */ 745 if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) 746 goto skip; 747 748 /* 749 * Don't use ide_wait_cmd here - it will 750 * attempt to set_geometry and recalibrate, 751 * but for some reason these don't work at 752 * this point (lost interrupt). 753 */ 754 /* 755 * Select the drive, and issue the SETFEATURES command 756 */ 757 disable_irq_nosync(hwif->irq); 758 759 /* 760 * FIXME: we race against the running IRQ here if 761 * this is called from non IRQ context. If we use 762 * disable_irq() we hang on the error path. Work 763 * is needed. 764 */ 765 766 udelay(1); 767 SELECT_DRIVE(drive); 768 SELECT_MASK(drive, 0); 769 udelay(1); 770 ide_set_irq(drive, 0); 771 hwif->OUTB(speed, IDE_NSECTOR_REG); 772 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 773 hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); 774 if (drive->quirk_list == 2) 775 ide_set_irq(drive, 1); 776 777 error = __ide_wait_stat(drive, drive->ready_stat, 778 BUSY_STAT|DRQ_STAT|ERR_STAT, 779 WAIT_CMD, &stat); 780 781 SELECT_MASK(drive, 0); 782 783 enable_irq(hwif->irq); 784 785 if (error) { 786 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 787 return error; 788 } 789 790 drive->id->dma_ultra &= ~0xFF00; 791 drive->id->dma_mword &= ~0x0F00; 792 drive->id->dma_1word &= ~0x0F00; 793 794 skip: 795#ifdef CONFIG_BLK_DEV_IDEDMA 796 if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) && 797 drive->using_dma) 798 hwif->dma_host_set(drive, 1); 799 else if (hwif->dma_host_set) /* check if host supports DMA */ 800 ide_dma_off_quietly(drive); 801#endif 802 803 switch(speed) { 804 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 805 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 806 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 807 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 808 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 809 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 810 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 811 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 812 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 813 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 814 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 815 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 816 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 817 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 818 default: break; 819 } 820 if (!drive->init_speed) 821 drive->init_speed = speed; 822 drive->current_speed = speed; 823 return error; 824} 825 826/* 827 * This should get invoked any time we exit the driver to 828 * wait for an interrupt response from a drive. handler() points 829 * at the appropriate code to handle the next interrupt, and a 830 * timer is started to prevent us from waiting forever in case 831 * something goes wrong (see the ide_timer_expiry() handler later on). 832 * 833 * See also ide_execute_command 834 */ 835static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 836 unsigned int timeout, ide_expiry_t *expiry) 837{ 838 ide_hwgroup_t *hwgroup = HWGROUP(drive); 839 840 if (hwgroup->handler != NULL) { 841 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 842 "old=%p, new=%p\n", 843 drive->name, hwgroup->handler, handler); 844 } 845 hwgroup->handler = handler; 846 hwgroup->expiry = expiry; 847 hwgroup->timer.expires = jiffies + timeout; 848 hwgroup->req_gen_timer = hwgroup->req_gen; 849 add_timer(&hwgroup->timer); 850} 851 852void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 853 unsigned int timeout, ide_expiry_t *expiry) 854{ 855 unsigned long flags; 856 spin_lock_irqsave(&ide_lock, flags); 857 __ide_set_handler(drive, handler, timeout, expiry); 858 spin_unlock_irqrestore(&ide_lock, flags); 859} 860 861EXPORT_SYMBOL(ide_set_handler); 862 863/** 864 * ide_execute_command - execute an IDE command 865 * @drive: IDE drive to issue the command against 866 * @command: command byte to write 867 * @handler: handler for next phase 868 * @timeout: timeout for command 869 * @expiry: handler to run on timeout 870 * 871 * Helper function to issue an IDE command. This handles the 872 * atomicity requirements, command timing and ensures that the 873 * handler and IRQ setup do not race. All IDE command kick off 874 * should go via this function or do equivalent locking. 875 */ 876 877void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, 878 unsigned timeout, ide_expiry_t *expiry) 879{ 880 unsigned long flags; 881 ide_hwgroup_t *hwgroup = HWGROUP(drive); 882 ide_hwif_t *hwif = HWIF(drive); 883 884 spin_lock_irqsave(&ide_lock, flags); 885 BUG_ON(hwgroup->handler); 886 __ide_set_handler(drive, handler, timeout, expiry); 887 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 888 /* 889 * Drive takes 400nS to respond, we must avoid the IRQ being 890 * serviced before that. 891 * 892 * FIXME: we could skip this delay with care on non shared devices 893 */ 894 ndelay(400); 895 spin_unlock_irqrestore(&ide_lock, flags); 896} 897 898EXPORT_SYMBOL(ide_execute_command); 899 900 901/* needed below */ 902static ide_startstop_t do_reset1 (ide_drive_t *, int); 903 904/* 905 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 906 * during an atapi drive reset operation. If the drive has not yet responded, 907 * and we have not yet hit our maximum waiting time, then the timer is restarted 908 * for another 50ms. 909 */ 910static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 911{ 912 ide_hwgroup_t *hwgroup = HWGROUP(drive); 913 ide_hwif_t *hwif = HWIF(drive); 914 u8 stat; 915 916 SELECT_DRIVE(drive); 917 udelay (10); 918 919 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 920 printk("%s: ATAPI reset complete\n", drive->name); 921 } else { 922 if (time_before(jiffies, hwgroup->poll_timeout)) { 923 BUG_ON(HWGROUP(drive)->handler != NULL); 924 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 925 /* continue polling */ 926 return ide_started; 927 } 928 /* end of polling */ 929 hwgroup->polling = 0; 930 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 931 drive->name, stat); 932 /* do it the old fashioned way */ 933 return do_reset1(drive, 1); 934 } 935 /* done polling */ 936 hwgroup->polling = 0; 937 hwgroup->resetting = 0; 938 return ide_stopped; 939} 940 941/* 942 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 943 * during an ide reset operation. If the drives have not yet responded, 944 * and we have not yet hit our maximum waiting time, then the timer is restarted 945 * for another 50ms. 946 */ 947static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 948{ 949 ide_hwgroup_t *hwgroup = HWGROUP(drive); 950 ide_hwif_t *hwif = HWIF(drive); 951 u8 tmp; 952 953 if (hwif->reset_poll != NULL) { 954 if (hwif->reset_poll(drive)) { 955 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 956 hwif->name, drive->name); 957 return ide_stopped; 958 } 959 } 960 961 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 962 if (time_before(jiffies, hwgroup->poll_timeout)) { 963 BUG_ON(HWGROUP(drive)->handler != NULL); 964 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 965 /* continue polling */ 966 return ide_started; 967 } 968 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 969 drive->failures++; 970 } else { 971 printk("%s: reset: ", hwif->name); 972 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 973 printk("success\n"); 974 drive->failures = 0; 975 } else { 976 drive->failures++; 977 printk("master: "); 978 switch (tmp & 0x7f) { 979 case 1: printk("passed"); 980 break; 981 case 2: printk("formatter device error"); 982 break; 983 case 3: printk("sector buffer error"); 984 break; 985 case 4: printk("ECC circuitry error"); 986 break; 987 case 5: printk("controlling MPU error"); 988 break; 989 default:printk("error (0x%02x?)", tmp); 990 } 991 if (tmp & 0x80) 992 printk("; slave: failed"); 993 printk("\n"); 994 } 995 } 996 hwgroup->polling = 0; /* done polling */ 997 hwgroup->resetting = 0; /* done reset attempt */ 998 return ide_stopped; 999} 1000 1001static void check_dma_crc(ide_drive_t *drive) 1002{ 1003#ifdef CONFIG_BLK_DEV_IDEDMA 1004 if (drive->crc_count) { 1005 ide_dma_off_quietly(drive); 1006 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1007 if (drive->current_speed >= XFER_SW_DMA_0) 1008 ide_dma_on(drive); 1009 } else 1010 ide_dma_off(drive); 1011#endif 1012} 1013 1014static void ide_disk_pre_reset(ide_drive_t *drive) 1015{ 1016 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1017 1018 drive->special.all = 0; 1019 drive->special.b.set_geometry = legacy; 1020 drive->special.b.recalibrate = legacy; 1021 drive->mult_count = 0; 1022 if (!drive->keep_settings && !drive->using_dma) 1023 drive->mult_req = 0; 1024 if (drive->mult_req != drive->mult_count) 1025 drive->special.b.set_multmode = 1; 1026} 1027 1028static void pre_reset(ide_drive_t *drive) 1029{ 1030 if (drive->media == ide_disk) 1031 ide_disk_pre_reset(drive); 1032 else 1033 drive->post_reset = 1; 1034 1035 if (!drive->keep_settings) { 1036 if (drive->using_dma) { 1037 check_dma_crc(drive); 1038 } else { 1039 drive->unmask = 0; 1040 drive->io_32bit = 0; 1041 } 1042 return; 1043 } 1044 if (drive->using_dma) 1045 check_dma_crc(drive); 1046 1047 if (HWIF(drive)->pre_reset != NULL) 1048 HWIF(drive)->pre_reset(drive); 1049 1050 if (drive->current_speed != 0xff) 1051 drive->desired_speed = drive->current_speed; 1052 drive->current_speed = 0xff; 1053} 1054 1055/* 1056 * do_reset1() attempts to recover a confused drive by resetting it. 1057 * Unfortunately, resetting a disk drive actually resets all devices on 1058 * the same interface, so it can really be thought of as resetting the 1059 * interface rather than resetting the drive. 1060 * 1061 * ATAPI devices have their own reset mechanism which allows them to be 1062 * individually reset without clobbering other devices on the same interface. 1063 * 1064 * Unfortunately, the IDE interface does not generate an interrupt to let 1065 * us know when the reset operation has finished, so we must poll for this. 1066 * Equally poor, though, is the fact that this may a very long time to complete, 1067 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1068 * we set a timer to poll at 50ms intervals. 1069 */ 1070static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1071{ 1072 unsigned int unit; 1073 unsigned long flags; 1074 ide_hwif_t *hwif; 1075 ide_hwgroup_t *hwgroup; 1076 1077 spin_lock_irqsave(&ide_lock, flags); 1078 hwif = HWIF(drive); 1079 hwgroup = HWGROUP(drive); 1080 1081 /* We must not reset with running handlers */ 1082 BUG_ON(hwgroup->handler != NULL); 1083 1084 /* For an ATAPI device, first try an ATAPI SRST. */ 1085 if (drive->media != ide_disk && !do_not_try_atapi) { 1086 hwgroup->resetting = 1; 1087 pre_reset(drive); 1088 SELECT_DRIVE(drive); 1089 udelay (20); 1090 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1091 ndelay(400); 1092 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1093 hwgroup->polling = 1; 1094 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1095 spin_unlock_irqrestore(&ide_lock, flags); 1096 return ide_started; 1097 } 1098 1099 /* 1100 * First, reset any device state data we were maintaining 1101 * for any of the drives on this interface. 1102 */ 1103 for (unit = 0; unit < MAX_DRIVES; ++unit) 1104 pre_reset(&hwif->drives[unit]); 1105 1106 if (!IDE_CONTROL_REG) { 1107 spin_unlock_irqrestore(&ide_lock, flags); 1108 return ide_stopped; 1109 } 1110 1111 hwgroup->resetting = 1; 1112 /* 1113 * Note that we also set nIEN while resetting the device, 1114 * to mask unwanted interrupts from the interface during the reset. 1115 * However, due to the design of PC hardware, this will cause an 1116 * immediate interrupt due to the edge transition it produces. 1117 * This single interrupt gives us a "fast poll" for drives that 1118 * recover from reset very quickly, saving us the first 50ms wait time. 1119 */ 1120 /* set SRST and nIEN */ 1121 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1122 /* more than enough time */ 1123 udelay(10); 1124 if (drive->quirk_list == 2) { 1125 /* clear SRST and nIEN */ 1126 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1127 } else { 1128 /* clear SRST, leave nIEN */ 1129 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1130 } 1131 /* more than enough time */ 1132 udelay(10); 1133 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1134 hwgroup->polling = 1; 1135 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1136 1137 /* 1138 * Some weird controller like resetting themselves to a strange 1139 * state when the disks are reset this way. At least, the Winbond 1140 * 553 documentation says that 1141 */ 1142 if (hwif->resetproc) 1143 hwif->resetproc(drive); 1144 1145 spin_unlock_irqrestore(&ide_lock, flags); 1146 return ide_started; 1147} 1148 1149/* 1150 * ide_do_reset() is the entry point to the drive/interface reset code. 1151 */ 1152 1153ide_startstop_t ide_do_reset (ide_drive_t *drive) 1154{ 1155 return do_reset1(drive, 0); 1156} 1157 1158EXPORT_SYMBOL(ide_do_reset); 1159 1160/* 1161 * ide_wait_not_busy() waits for the currently selected device on the hwif 1162 * to report a non-busy status, see comments in ide_probe_port(). 1163 */ 1164int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1165{ 1166 u8 stat = 0; 1167 1168 while(timeout--) { 1169 /* 1170 * Turn this into a schedule() sleep once I'm sure 1171 * about locking issues (2.5 work ?). 1172 */ 1173 mdelay(1); 1174 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1175 if ((stat & BUSY_STAT) == 0) 1176 return 0; 1177 /* 1178 * Assume a value of 0xff means nothing is connected to 1179 * the interface and it doesn't implement the pull-down 1180 * resistor on D7. 1181 */ 1182 if (stat == 0xff) 1183 return -ENODEV; 1184 touch_softlockup_watchdog(); 1185 touch_nmi_watchdog(); 1186 } 1187 return -EBUSY; 1188} 1189 1190EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1191 1192