setup-pci.c revision 120b9cfddff2e398fece07c5e127f3fdbb660441
1/* 2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19 3 * 4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * 6 * Copyright (c) 1995-1998 Mark Lord 7 * May be copied or modified under the terms of the GNU General Public License 8 * 9 * Recent Changes 10 * Split the set up function into multiple functions 11 * Use pci_set_master 12 * Fix misreporting of I/O v MMIO problems 13 * Initial fixups for simplex devices 14 */ 15 16/* 17 * This module provides support for automatic detection and 18 * configuration of all PCI IDE interfaces present in a system. 19 */ 20 21#include <linux/module.h> 22#include <linux/types.h> 23#include <linux/kernel.h> 24#include <linux/pci.h> 25#include <linux/init.h> 26#include <linux/timer.h> 27#include <linux/mm.h> 28#include <linux/interrupt.h> 29#include <linux/ide.h> 30#include <linux/dma-mapping.h> 31 32#include <asm/io.h> 33#include <asm/irq.h> 34 35 36/** 37 * ide_match_hwif - match a PCI IDE against an ide_hwif 38 * @io_base: I/O base of device 39 * @bootable: set if its bootable 40 * @name: name of device 41 * 42 * Match a PCI IDE port against an entry in ide_hwifs[], 43 * based on io_base port if possible. Return the matching hwif, 44 * or a new hwif. If we find an error (clashing, out of devices, etc) 45 * return NULL 46 * 47 * FIXME: we need to handle mmio matches here too 48 */ 49 50static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name) 51{ 52 int h; 53 ide_hwif_t *hwif; 54 55 /* 56 * Look for a hwif with matching io_base specified using 57 * parameters to ide_setup(). 58 */ 59 for (h = 0; h < MAX_HWIFS; ++h) { 60 hwif = &ide_hwifs[h]; 61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 62 if (hwif->chipset == ide_forced) 63 return hwif; /* a perfect match */ 64 } 65 } 66 /* 67 * Look for a hwif with matching io_base default value. 68 * If chipset is "ide_unknown", then claim that hwif slot. 69 * Otherwise, some other chipset has already claimed it.. :( 70 */ 71 for (h = 0; h < MAX_HWIFS; ++h) { 72 hwif = &ide_hwifs[h]; 73 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 74 if (hwif->chipset == ide_unknown) 75 return hwif; /* match */ 76 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n", 77 name, io_base, hwif->name); 78 return NULL; /* already claimed */ 79 } 80 } 81 /* 82 * Okay, there is no hwif matching our io_base, 83 * so we'll just claim an unassigned slot. 84 * Give preference to claiming other slots before claiming ide0/ide1, 85 * just in case there's another interface yet-to-be-scanned 86 * which uses ports 1f0/170 (the ide0/ide1 defaults). 87 * 88 * Unless there is a bootable card that does not use the standard 89 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag. 90 */ 91 if (bootable) { 92 for (h = 0; h < MAX_HWIFS; ++h) { 93 hwif = &ide_hwifs[h]; 94 if (hwif->chipset == ide_unknown) 95 return hwif; /* pick an unused entry */ 96 } 97 } else { 98 for (h = 2; h < MAX_HWIFS; ++h) { 99 hwif = ide_hwifs + h; 100 if (hwif->chipset == ide_unknown) 101 return hwif; /* pick an unused entry */ 102 } 103 } 104 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) { 105 hwif = ide_hwifs + h; 106 if (hwif->chipset == ide_unknown) 107 return hwif; /* pick an unused entry */ 108 } 109 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name); 110 return NULL; 111} 112 113/** 114 * ide_setup_pci_baseregs - place a PCI IDE controller native 115 * @dev: PCI device of interface to switch native 116 * @name: Name of interface 117 * 118 * We attempt to place the PCI interface into PCI native mode. If 119 * we succeed the BARs are ok and the controller is in PCI mode. 120 * Returns 0 on success or an errno code. 121 * 122 * FIXME: if we program the interface and then fail to set the BARS 123 * we don't switch it back to legacy mode. Do we actually care ?? 124 */ 125 126static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) 127{ 128 u8 progif = 0; 129 130 /* 131 * Place both IDE interfaces into PCI "native" mode: 132 */ 133 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 134 (progif & 5) != 5) { 135 if ((progif & 0xa) != 0xa) { 136 printk(KERN_INFO "%s: device not capable of full " 137 "native PCI mode\n", name); 138 return -EOPNOTSUPP; 139 } 140 printk("%s: placing both ports into native PCI mode\n", name); 141 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 142 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 143 (progif & 5) != 5) { 144 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " 145 "0x%04x, got 0x%04x\n", 146 name, progif|5, progif); 147 return -EOPNOTSUPP; 148 } 149 } 150 return 0; 151} 152 153#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 154 155#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED 156/* 157 * Long lost data from 2.0.34 that is now in 2.0.39 158 * 159 * This was used in ./drivers/block/triton.c to do DMA Base address setup 160 * when PnP failed. Oh the things we forget. I believe this was part 161 * of SFF-8038i that has been withdrawn from public access... :-(( 162 */ 163#define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */ 164#define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */ 165#define DEFAULT_BMALIBA 0xd400 /* ALI's default value */ 166#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ 167 168/** 169 * ide_get_or_set_dma_base - setup BMIBA 170 * @hwif: Interface 171 * 172 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space: 173 * If need be we set up the DMA base. Where a device has a partner that 174 * is already in DMA mode we check and enforce IDE simplex rules. 175 */ 176 177static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif) 178{ 179 unsigned long dma_base = 0; 180 struct pci_dev *dev = hwif->pci_dev; 181 182#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED 183 int second_chance = 0; 184 185second_chance_to_dma: 186#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ 187 188 if (hwif->mmio) 189 return hwif->dma_base; 190 191 if (hwif->mate && hwif->mate->dma_base) { 192 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 193 } else { 194 dma_base = pci_resource_start(dev, 4); 195 if (!dma_base) { 196 printk(KERN_ERR "%s: dma_base is invalid\n", 197 hwif->cds->name); 198 } 199 } 200 201#ifdef CONFIG_BLK_DEV_IDEDMA_FORCED 202 /* FIXME - should use pci_assign_resource surely */ 203 if ((!dma_base) && (!second_chance)) { 204 unsigned long set_bmiba = 0; 205 second_chance++; 206 switch(dev->vendor) { 207 case PCI_VENDOR_ID_AL: 208 set_bmiba = DEFAULT_BMALIBA; break; 209 case PCI_VENDOR_ID_VIA: 210 set_bmiba = DEFAULT_BMCRBA; break; 211 case PCI_VENDOR_ID_INTEL: 212 set_bmiba = DEFAULT_BMIBA; break; 213 default: 214 return dma_base; 215 } 216 pci_write_config_dword(dev, 0x20, set_bmiba|1); 217 goto second_chance_to_dma; 218 } 219#endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */ 220 221 if (dma_base) { 222 u8 simplex_stat = 0; 223 dma_base += hwif->channel ? 8 : 0; 224 225 switch(dev->device) { 226 case PCI_DEVICE_ID_AL_M5219: 227 case PCI_DEVICE_ID_AL_M5229: 228 case PCI_DEVICE_ID_AMD_VIPER_7409: 229 case PCI_DEVICE_ID_CMD_643: 230 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: 231 case PCI_DEVICE_ID_REVOLUTION: 232 simplex_stat = hwif->INB(dma_base + 2); 233 hwif->OUTB((simplex_stat&0x60),(dma_base + 2)); 234 simplex_stat = hwif->INB(dma_base + 2); 235 if (simplex_stat & 0x80) { 236 printk(KERN_INFO "%s: simplex device: " 237 "DMA forced\n", 238 hwif->cds->name); 239 } 240 break; 241 default: 242 /* 243 * If the device claims "simplex" DMA, 244 * this means only one of the two interfaces 245 * can be trusted with DMA at any point in time. 246 * So we should enable DMA only on one of the 247 * two interfaces. 248 */ 249 simplex_stat = hwif->INB(dma_base + 2); 250 if (simplex_stat & 0x80) { 251 /* simplex device? */ 252/* 253 * At this point we haven't probed the drives so we can't make the 254 * appropriate decision. Really we should defer this problem 255 * until we tune the drive then try to grab DMA ownership if we want 256 * to be the DMA end. This has to be become dynamic to handle hot 257 * plug. 258 */ 259 if (hwif->mate && hwif->mate->dma_base) { 260 printk(KERN_INFO "%s: simplex device: " 261 "DMA disabled\n", 262 hwif->cds->name); 263 dma_base = 0; 264 } 265 } 266 } 267 } 268 return dma_base; 269} 270#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 271 272void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d) 273{ 274 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n", 275 d->name, pci_name(dev)); 276} 277 278EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 279 280 281/** 282 * ide_pci_enable - do PCI enables 283 * @dev: PCI device 284 * @d: IDE pci device data 285 * 286 * Enable the IDE PCI device. We attempt to enable the device in full 287 * but if that fails then we only need BAR4 so we will enable that. 288 * 289 * Returns zero on success or an error code 290 */ 291 292static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d) 293{ 294 int ret; 295 296 if (pci_enable_device(dev)) { 297 ret = pci_enable_device_bars(dev, 1 << 4); 298 if (ret < 0) { 299 printk(KERN_WARNING "%s: (ide_setup_pci_device:) " 300 "Could not enable device.\n", d->name); 301 goto out; 302 } 303 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); 304 } 305 306 /* 307 * assume all devices can do 32-bit dma for now. we can add a 308 * dma mask field to the ide_pci_device_t if we need it (or let 309 * lower level driver set the dma mask) 310 */ 311 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); 312 if (ret < 0) { 313 printk(KERN_ERR "%s: can't set dma mask\n", d->name); 314 goto out; 315 } 316 317 /* FIXME: Temporary - until we put in the hotplug interface logic 318 Check that the bits we want are not in use by someone else. */ 319 ret = pci_request_region(dev, 4, "ide_tmp"); 320 if (ret < 0) 321 goto out; 322 323 pci_release_region(dev, 4); 324out: 325 return ret; 326} 327 328/** 329 * ide_pci_configure - configure an unconfigured device 330 * @dev: PCI device 331 * @d: IDE pci device data 332 * 333 * Enable and configure the PCI device we have been passed. 334 * Returns zero on success or an error code. 335 */ 336 337static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d) 338{ 339 u16 pcicmd = 0; 340 /* 341 * PnP BIOS was *supposed* to have setup this device, but we 342 * can do it ourselves, so long as the BIOS has assigned an IRQ 343 * (or possibly the device is using a "legacy header" for IRQs). 344 * Maybe the user deliberately *disabled* the device, 345 * but we'll eventually ignore it again if no drives respond. 346 */ 347 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO)) 348 { 349 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); 350 return -ENODEV; 351 } 352 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 353 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 354 return -EIO; 355 } 356 if (!(pcicmd & PCI_COMMAND_IO)) { 357 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); 358 return -ENXIO; 359 } 360 return 0; 361} 362 363/** 364 * ide_pci_check_iomem - check a register is I/O 365 * @dev: pci device 366 * @d: ide_pci_device 367 * @bar: bar number 368 * 369 * Checks if a BAR is configured and points to MMIO space. If so 370 * print an error and return an error code. Otherwise return 0 371 */ 372 373static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar) 374{ 375 ulong flags = pci_resource_flags(dev, bar); 376 377 /* Unconfigured ? */ 378 if (!flags || pci_resource_len(dev, bar) == 0) 379 return 0; 380 381 /* I/O space */ 382 if(flags & PCI_BASE_ADDRESS_IO_MASK) 383 return 0; 384 385 /* Bad */ 386 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported " 387 "as MEM, report to " 388 "<andre@linux-ide.org>.\n", d->name); 389 return -EINVAL; 390} 391 392/** 393 * ide_hwif_configure - configure an IDE interface 394 * @dev: PCI device holding interface 395 * @d: IDE pci data 396 * @mate: Paired interface if any 397 * 398 * Perform the initial set up for the hardware interface structure. This 399 * is done per interface port rather than per PCI device. There may be 400 * more than one port per device. 401 * 402 * Returns the new hardware interface structure, or NULL on a failure 403 */ 404 405static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq) 406{ 407 unsigned long ctl = 0, base = 0; 408 ide_hwif_t *hwif; 409 410 if ((d->flags & IDEPCI_FLAG_ISA_PORTS) == 0) { 411 /* Possibly we should fail if these checks report true */ 412 ide_pci_check_iomem(dev, d, 2*port); 413 ide_pci_check_iomem(dev, d, 2*port+1); 414 415 ctl = pci_resource_start(dev, 2*port+1); 416 base = pci_resource_start(dev, 2*port); 417 if ((ctl && !base) || (base && !ctl)) { 418 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) " 419 "for port %d, skipping\n", d->name, port); 420 return NULL; 421 } 422 } 423 if (!ctl) 424 { 425 /* Use default values */ 426 ctl = port ? 0x374 : 0x3f4; 427 base = port ? 0x170 : 0x1f0; 428 } 429 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL) 430 return NULL; /* no room in ide_hwifs[] */ 431 if (hwif->io_ports[IDE_DATA_OFFSET] != base || 432 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { 433 memset(&hwif->hw, 0, sizeof(hwif->hw)); 434#ifndef IDE_ARCH_OBSOLETE_INIT 435 ide_std_init_ports(&hwif->hw, base, (ctl | 2)); 436 hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0; 437#else 438 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL); 439#endif 440 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); 441 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; 442 } 443 hwif->chipset = ide_pci; 444 hwif->pci_dev = dev; 445 hwif->cds = (struct ide_pci_device_s *) d; 446 hwif->channel = port; 447 448 if (!hwif->irq) 449 hwif->irq = irq; 450 if (mate) { 451 hwif->mate = mate; 452 mate->mate = hwif; 453 } 454 return hwif; 455} 456 457/** 458 * ide_hwif_setup_dma - configure DMA interface 459 * @dev: PCI device 460 * @d: IDE pci data 461 * @hwif: Hardware interface we are configuring 462 * 463 * Set up the DMA base for the interface. Enable the master bits as 464 * necessary and attempt to bring the device DMA into a ready to use 465 * state 466 */ 467 468#ifndef CONFIG_BLK_DEV_IDEDMA_PCI 469static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) 470{ 471} 472#else 473static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) 474{ 475 u16 pcicmd; 476 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 477 478 if ((d->autodma == AUTODMA) || 479 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 480 (dev->class & 0x80))) { 481 unsigned long dma_base = ide_get_or_set_dma_base(hwif); 482 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { 483 /* 484 * Set up BM-DMA capability 485 * (PnP BIOS should have done this) 486 */ 487 /* default DMA off if we had to configure it here */ 488 hwif->autodma = 0; 489 pci_set_master(dev); 490 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { 491 printk(KERN_ERR "%s: %s error updating PCICMD\n", 492 hwif->name, d->name); 493 dma_base = 0; 494 } 495 } 496 if (dma_base) { 497 if (d->init_dma) { 498 d->init_dma(hwif, dma_base); 499 } else { 500 ide_setup_dma(hwif, dma_base, 8); 501 } 502 } else { 503 printk(KERN_INFO "%s: %s Bus-Master DMA disabled " 504 "(BIOS)\n", hwif->name, d->name); 505 } 506 } 507} 508#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/ 509 510/** 511 * ide_setup_pci_controller - set up IDE PCI 512 * @dev: PCI device 513 * @d: IDE PCI data 514 * @noisy: verbose flag 515 * @config: returned as 1 if we configured the hardware 516 * 517 * Set up the PCI and controller side of the IDE interface. This brings 518 * up the PCI side of the device, checks that the device is enabled 519 * and enables it if need be 520 */ 521 522static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config) 523{ 524 int ret; 525 u32 class_rev; 526 u16 pcicmd; 527 528 if (noisy) 529 ide_setup_pci_noise(dev, d); 530 531 ret = ide_pci_enable(dev, d); 532 if (ret < 0) 533 goto out; 534 535 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 536 if (ret < 0) { 537 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 538 goto out; 539 } 540 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 541 ret = ide_pci_configure(dev, d); 542 if (ret < 0) 543 goto out; 544 *config = 1; 545 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 546 } 547 548 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 549 class_rev &= 0xff; 550 if (noisy) 551 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev); 552out: 553 return ret; 554} 555 556/** 557 * ide_pci_setup_ports - configure ports/devices on PCI IDE 558 * @dev: PCI device 559 * @d: IDE pci device info 560 * @pciirq: IRQ line 561 * @index: ata index to update 562 * 563 * Scan the interfaces attached to this device and do any 564 * necessary per port setup. Attach the devices and ask the 565 * generic DMA layer to do its work for us. 566 * 567 * Normally called automaticall from do_ide_pci_setup_device, 568 * but is also used directly as a helper function by some controllers 569 * where the chipset setup is not the default PCI IDE one. 570 */ 571 572void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index) 573{ 574 int port; 575 int at_least_one_hwif_enabled = 0; 576 ide_hwif_t *hwif, *mate = NULL; 577 u8 tmp; 578 579 index->all = 0xf0f0; 580 581 /* 582 * Set up the IDE ports 583 */ 584 585 for (port = 0; port <= 1; ++port) { 586 ide_pci_enablebit_t *e = &(d->enablebits[port]); 587 588 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 589 (tmp & e->mask) != e->val)) 590 continue; /* port not enabled */ 591 592 if (d->channels <= port) 593 break; 594 595 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) 596 continue; 597 598 /* setup proper ancestral information */ 599 hwif->gendev.parent = &dev->dev; 600 601 if (hwif->channel) { 602 index->b.high = hwif->index; 603 } else { 604 index->b.low = hwif->index; 605 } 606 607 608 if (d->init_iops) 609 d->init_iops(hwif); 610 611 if (d->autodma == NODMA) 612 goto bypass_legacy_dma; 613 614 if(d->init_setup_dma) 615 d->init_setup_dma(dev, d, hwif); 616 else 617 ide_hwif_setup_dma(dev, d, hwif); 618bypass_legacy_dma: 619 if (d->init_hwif) 620 /* Call chipset-specific routine 621 * for each enabled hwif 622 */ 623 d->init_hwif(hwif); 624 625 mate = hwif; 626 at_least_one_hwif_enabled = 1; 627 } 628 if (!at_least_one_hwif_enabled) 629 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name); 630} 631 632EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 633 634/* 635 * ide_setup_pci_device() looks at the primary/secondary interfaces 636 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 637 * for use with them. This generic code works for most PCI chipsets. 638 * 639 * One thing that is not standardized is the location of the 640 * primary/secondary interface "enable/disable" bits. For chipsets that 641 * we "know" about, this information is in the ide_pci_device_t struct; 642 * for all other chipsets, we just assume both interfaces are enabled. 643 */ 644static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d, 645 ata_index_t *index, u8 noisy) 646{ 647 static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } }; 648 int tried_config = 0; 649 int pciirq, ret; 650 651 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); 652 if (ret < 0) 653 goto out; 654 655 /* 656 * Can we trust the reported IRQ? 657 */ 658 pciirq = dev->irq; 659 660 /* Is it an "IDE storage" device in non-PCI mode? */ 661 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { 662 if (noisy) 663 printk(KERN_INFO "%s: not 100%% native mode: " 664 "will probe irqs later\n", d->name); 665 /* 666 * This allows offboard ide-pci cards the enable a BIOS, 667 * verify interrupt settings of split-mirror pci-config 668 * space, place chipset into init-mode, and/or preserve 669 * an interrupt if the card is not native ide support. 670 */ 671 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; 672 if (ret < 0) 673 goto out; 674 pciirq = ret; 675 } else if (tried_config) { 676 if (noisy) 677 printk(KERN_INFO "%s: will probe irqs later\n", d->name); 678 pciirq = 0; 679 } else if (!pciirq) { 680 if (noisy) 681 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", 682 d->name, pciirq); 683 pciirq = 0; 684 } else { 685 if (d->init_chipset) { 686 ret = d->init_chipset(dev, d->name); 687 if (ret < 0) 688 goto out; 689 } 690 if (noisy) 691 printk(KERN_INFO "%s: 100%% native mode on irq %d\n", 692 d->name, pciirq); 693 } 694 695 /* FIXME: silent failure can happen */ 696 697 *index = ata_index; 698 ide_pci_setup_ports(dev, d, pciirq, index); 699out: 700 return ret; 701} 702 703int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d) 704{ 705 ata_index_t index_list; 706 int ret; 707 708 ret = do_ide_setup_pci_device(dev, d, &index_list, 1); 709 if (ret < 0) 710 goto out; 711 712 if ((index_list.b.low & 0xf0) != 0xf0) 713 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.low], d->fixup); 714 if ((index_list.b.high & 0xf0) != 0xf0) 715 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.high], d->fixup); 716 717 create_proc_ide_interfaces(); 718out: 719 return ret; 720} 721 722EXPORT_SYMBOL_GPL(ide_setup_pci_device); 723 724int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, 725 ide_pci_device_t *d) 726{ 727 struct pci_dev *pdev[] = { dev1, dev2 }; 728 ata_index_t index_list[2]; 729 int ret, i; 730 731 for (i = 0; i < 2; i++) { 732 ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i); 733 /* 734 * FIXME: Mom, mom, they stole me the helper function to undo 735 * do_ide_setup_pci_device() on the first device! 736 */ 737 if (ret < 0) 738 goto out; 739 } 740 741 for (i = 0; i < 2; i++) { 742 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high }; 743 int j; 744 745 for (j = 0; j < 2; j++) { 746 if ((idx[j] & 0xf0) != 0xf0) 747 probe_hwif_init(ide_hwifs + idx[j]); 748 } 749 } 750 751 create_proc_ide_interfaces(); 752out: 753 return ret; 754} 755 756EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 757 758/* 759 * Module interfaces 760 */ 761 762static int pre_init = 1; /* Before first ordered IDE scan */ 763static LIST_HEAD(ide_pci_drivers); 764 765/* 766 * __ide_pci_register_driver - attach IDE driver 767 * @driver: pci driver 768 * @module: owner module of the driver 769 * 770 * Registers a driver with the IDE layer. The IDE layer arranges that 771 * boot time setup is done in the expected device order and then 772 * hands the controllers off to the core PCI code to do the rest of 773 * the work. 774 * 775 * The driver_data of the driver table must point to an ide_pci_device_t 776 * describing the interface. 777 * 778 * Returns are the same as for pci_register_driver 779 */ 780 781int __ide_pci_register_driver(struct pci_driver *driver, struct module *module, 782 const char *mod_name) 783{ 784 if(!pre_init) 785 return __pci_register_driver(driver, module, mod_name); 786 driver->driver.owner = module; 787 list_add_tail(&driver->node, &ide_pci_drivers); 788 return 0; 789} 790 791EXPORT_SYMBOL_GPL(__ide_pci_register_driver); 792 793/** 794 * ide_scan_pcidev - find an IDE driver for a device 795 * @dev: PCI device to check 796 * 797 * Look for an IDE driver to handle the device we are considering. 798 * This is only used during boot up to get the ordering correct. After 799 * boot up the pci layer takes over the job. 800 */ 801 802static int __init ide_scan_pcidev(struct pci_dev *dev) 803{ 804 struct list_head *l; 805 struct pci_driver *d; 806 807 list_for_each(l, &ide_pci_drivers) 808 { 809 d = list_entry(l, struct pci_driver, node); 810 if(d->id_table) 811 { 812 const struct pci_device_id *id = pci_match_id(d->id_table, dev); 813 if(id != NULL) 814 { 815 if(d->probe(dev, id) >= 0) 816 { 817 dev->driver = d; 818 return 1; 819 } 820 } 821 } 822 } 823 return 0; 824} 825 826/** 827 * ide_scan_pcibus - perform the initial IDE driver scan 828 * @scan_direction: set for reverse order scanning 829 * 830 * Perform the initial bus rather than driver ordered scan of the 831 * PCI drivers. After this all IDE pci handling becomes standard 832 * module ordering not traditionally ordered. 833 */ 834 835void __init ide_scan_pcibus (int scan_direction) 836{ 837 struct pci_dev *dev = NULL; 838 struct pci_driver *d; 839 struct list_head *l, *n; 840 841 pre_init = 0; 842 if (!scan_direction) { 843 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 844 ide_scan_pcidev(dev); 845 } 846 } else { 847 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 848 ide_scan_pcidev(dev); 849 } 850 } 851 852 /* 853 * Hand the drivers over to the PCI layer now we 854 * are post init. 855 */ 856 857 list_for_each_safe(l, n, &ide_pci_drivers) 858 { 859 list_del(l); 860 d = list_entry(l, struct pci_driver, node); 861 __pci_register_driver(d, d->driver.owner, d->driver.mod_name); 862 } 863} 864