setup-pci.c revision 284901a90a9e0b812ca3f5f852cbbfb60d10249d
1/* 2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 1995-1998 Mark Lord 4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz 5 * 6 * May be copied or modified under the terms of the GNU General Public License 7 */ 8 9#include <linux/types.h> 10#include <linux/kernel.h> 11#include <linux/pci.h> 12#include <linux/init.h> 13#include <linux/interrupt.h> 14#include <linux/ide.h> 15#include <linux/dma-mapping.h> 16 17#include <asm/io.h> 18 19/** 20 * ide_setup_pci_baseregs - place a PCI IDE controller native 21 * @dev: PCI device of interface to switch native 22 * @name: Name of interface 23 * 24 * We attempt to place the PCI interface into PCI native mode. If 25 * we succeed the BARs are ok and the controller is in PCI mode. 26 * Returns 0 on success or an errno code. 27 * 28 * FIXME: if we program the interface and then fail to set the BARS 29 * we don't switch it back to legacy mode. Do we actually care ?? 30 */ 31 32static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name) 33{ 34 u8 progif = 0; 35 36 /* 37 * Place both IDE interfaces into PCI "native" mode: 38 */ 39 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 40 (progif & 5) != 5) { 41 if ((progif & 0xa) != 0xa) { 42 printk(KERN_INFO "%s %s: device not capable of full " 43 "native PCI mode\n", name, pci_name(dev)); 44 return -EOPNOTSUPP; 45 } 46 printk(KERN_INFO "%s %s: placing both ports into native PCI " 47 "mode\n", name, pci_name(dev)); 48 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 49 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 50 (progif & 5) != 5) { 51 printk(KERN_ERR "%s %s: rewrite of PROGIF failed, " 52 "wanted 0x%04x, got 0x%04x\n", 53 name, pci_name(dev), progif | 5, progif); 54 return -EOPNOTSUPP; 55 } 56 } 57 return 0; 58} 59 60#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 61static int ide_pci_clear_simplex(unsigned long dma_base, const char *name) 62{ 63 u8 dma_stat = inb(dma_base + 2); 64 65 outb(dma_stat & 0x60, dma_base + 2); 66 dma_stat = inb(dma_base + 2); 67 68 return (dma_stat & 0x80) ? 1 : 0; 69} 70 71/** 72 * ide_pci_dma_base - setup BMIBA 73 * @hwif: IDE interface 74 * @d: IDE port info 75 * 76 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 77 */ 78 79unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d) 80{ 81 struct pci_dev *dev = to_pci_dev(hwif->dev); 82 unsigned long dma_base = 0; 83 84 if (hwif->host_flags & IDE_HFLAG_MMIO) 85 return hwif->dma_base; 86 87 if (hwif->mate && hwif->mate->dma_base) { 88 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 89 } else { 90 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 91 92 dma_base = pci_resource_start(dev, baridx); 93 94 if (dma_base == 0) { 95 printk(KERN_ERR "%s %s: DMA base is invalid\n", 96 d->name, pci_name(dev)); 97 return 0; 98 } 99 } 100 101 if (hwif->channel) 102 dma_base += 8; 103 104 return dma_base; 105} 106EXPORT_SYMBOL_GPL(ide_pci_dma_base); 107 108int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d) 109{ 110 struct pci_dev *dev = to_pci_dev(hwif->dev); 111 u8 dma_stat; 112 113 if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520)) 114 goto out; 115 116 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { 117 if (ide_pci_clear_simplex(hwif->dma_base, d->name)) 118 printk(KERN_INFO "%s %s: simplex device: DMA forced\n", 119 d->name, pci_name(dev)); 120 goto out; 121 } 122 123 /* 124 * If the device claims "simplex" DMA, this means that only one of 125 * the two interfaces can be trusted with DMA at any point in time 126 * (so we should enable DMA only on one of the two interfaces). 127 * 128 * FIXME: At this point we haven't probed the drives so we can't make 129 * the appropriate decision. Really we should defer this problem until 130 * we tune the drive then try to grab DMA ownership if we want to be 131 * the DMA end. This has to be become dynamic to handle hot-plug. 132 */ 133 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); 134 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { 135 printk(KERN_INFO "%s %s: simplex device: DMA disabled\n", 136 d->name, pci_name(dev)); 137 return -1; 138 } 139out: 140 return 0; 141} 142EXPORT_SYMBOL_GPL(ide_pci_check_simplex); 143 144/* 145 * Set up BM-DMA capability (PnP BIOS should have done this) 146 */ 147int ide_pci_set_master(struct pci_dev *dev, const char *name) 148{ 149 u16 pcicmd; 150 151 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 152 153 if ((pcicmd & PCI_COMMAND_MASTER) == 0) { 154 pci_set_master(dev); 155 156 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || 157 (pcicmd & PCI_COMMAND_MASTER) == 0) { 158 printk(KERN_ERR "%s %s: error updating PCICMD\n", 159 name, pci_name(dev)); 160 return -EIO; 161 } 162 } 163 164 return 0; 165} 166EXPORT_SYMBOL_GPL(ide_pci_set_master); 167#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 168 169void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) 170{ 171 printk(KERN_INFO "%s %s: IDE controller (0x%04x:0x%04x rev 0x%02x)\n", 172 d->name, pci_name(dev), 173 dev->vendor, dev->device, dev->revision); 174} 175EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 176 177 178/** 179 * ide_pci_enable - do PCI enables 180 * @dev: PCI device 181 * @d: IDE port info 182 * 183 * Enable the IDE PCI device. We attempt to enable the device in full 184 * but if that fails then we only need IO space. The PCI code should 185 * have setup the proper resources for us already for controllers in 186 * legacy mode. 187 * 188 * Returns zero on success or an error code 189 */ 190 191static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) 192{ 193 int ret, bars; 194 195 if (pci_enable_device(dev)) { 196 ret = pci_enable_device_io(dev); 197 if (ret < 0) { 198 printk(KERN_WARNING "%s %s: couldn't enable device\n", 199 d->name, pci_name(dev)); 200 goto out; 201 } 202 printk(KERN_WARNING "%s %s: BIOS configuration fixed\n", 203 d->name, pci_name(dev)); 204 } 205 206 /* 207 * assume all devices can do 32-bit DMA for now, we can add 208 * a DMA mask field to the struct ide_port_info if we need it 209 * (or let lower level driver set the DMA mask) 210 */ 211 ret = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 212 if (ret < 0) { 213 printk(KERN_ERR "%s %s: can't set DMA mask\n", 214 d->name, pci_name(dev)); 215 goto out; 216 } 217 218 if (d->host_flags & IDE_HFLAG_SINGLE) 219 bars = (1 << 2) - 1; 220 else 221 bars = (1 << 4) - 1; 222 223 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) { 224 if (d->host_flags & IDE_HFLAG_CS5520) 225 bars |= (1 << 2); 226 else 227 bars |= (1 << 4); 228 } 229 230 ret = pci_request_selected_regions(dev, bars, d->name); 231 if (ret < 0) 232 printk(KERN_ERR "%s %s: can't reserve resources\n", 233 d->name, pci_name(dev)); 234out: 235 return ret; 236} 237 238/** 239 * ide_pci_configure - configure an unconfigured device 240 * @dev: PCI device 241 * @d: IDE port info 242 * 243 * Enable and configure the PCI device we have been passed. 244 * Returns zero on success or an error code. 245 */ 246 247static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) 248{ 249 u16 pcicmd = 0; 250 /* 251 * PnP BIOS was *supposed* to have setup this device, but we 252 * can do it ourselves, so long as the BIOS has assigned an IRQ 253 * (or possibly the device is using a "legacy header" for IRQs). 254 * Maybe the user deliberately *disabled* the device, 255 * but we'll eventually ignore it again if no drives respond. 256 */ 257 if (ide_setup_pci_baseregs(dev, d->name) || 258 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) { 259 printk(KERN_INFO "%s %s: device disabled (BIOS)\n", 260 d->name, pci_name(dev)); 261 return -ENODEV; 262 } 263 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 264 printk(KERN_ERR "%s %s: error accessing PCI regs\n", 265 d->name, pci_name(dev)); 266 return -EIO; 267 } 268 if (!(pcicmd & PCI_COMMAND_IO)) { 269 printk(KERN_ERR "%s %s: unable to enable IDE controller\n", 270 d->name, pci_name(dev)); 271 return -ENXIO; 272 } 273 return 0; 274} 275 276/** 277 * ide_pci_check_iomem - check a register is I/O 278 * @dev: PCI device 279 * @d: IDE port info 280 * @bar: BAR number 281 * 282 * Checks if a BAR is configured and points to MMIO space. If so, 283 * return an error code. Otherwise return 0 284 */ 285 286static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, 287 int bar) 288{ 289 ulong flags = pci_resource_flags(dev, bar); 290 291 /* Unconfigured ? */ 292 if (!flags || pci_resource_len(dev, bar) == 0) 293 return 0; 294 295 /* I/O space */ 296 if (flags & IORESOURCE_IO) 297 return 0; 298 299 /* Bad */ 300 return -EINVAL; 301} 302 303/** 304 * ide_hw_configure - configure a hw_regs_t instance 305 * @dev: PCI device holding interface 306 * @d: IDE port info 307 * @port: port number 308 * @hw: hw_regs_t instance corresponding to this port 309 * 310 * Perform the initial set up for the hardware interface structure. This 311 * is done per interface port rather than per PCI device. There may be 312 * more than one port per device. 313 * 314 * Returns zero on success or an error code. 315 */ 316 317static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d, 318 unsigned int port, hw_regs_t *hw) 319{ 320 unsigned long ctl = 0, base = 0; 321 322 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 323 if (ide_pci_check_iomem(dev, d, 2 * port) || 324 ide_pci_check_iomem(dev, d, 2 * port + 1)) { 325 printk(KERN_ERR "%s %s: I/O baseregs (BIOS) are " 326 "reported as MEM for port %d!\n", 327 d->name, pci_name(dev), port); 328 return -EINVAL; 329 } 330 331 ctl = pci_resource_start(dev, 2*port+1); 332 base = pci_resource_start(dev, 2*port); 333 } else { 334 /* Use default values */ 335 ctl = port ? 0x374 : 0x3f4; 336 base = port ? 0x170 : 0x1f0; 337 } 338 339 if (!base || !ctl) { 340 printk(KERN_ERR "%s %s: bad PCI BARs for port %d, skipping\n", 341 d->name, pci_name(dev), port); 342 return -EINVAL; 343 } 344 345 memset(hw, 0, sizeof(*hw)); 346 hw->dev = &dev->dev; 347 hw->chipset = d->chipset ? d->chipset : ide_pci; 348 ide_std_init_ports(hw, base, ctl | 2); 349 350 return 0; 351} 352 353#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 354/** 355 * ide_hwif_setup_dma - configure DMA interface 356 * @hwif: IDE interface 357 * @d: IDE port info 358 * 359 * Set up the DMA base for the interface. Enable the master bits as 360 * necessary and attempt to bring the device DMA into a ready to use 361 * state 362 */ 363 364int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) 365{ 366 struct pci_dev *dev = to_pci_dev(hwif->dev); 367 368 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 369 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 370 (dev->class & 0x80))) { 371 unsigned long base = ide_pci_dma_base(hwif, d); 372 373 if (base == 0) 374 return -1; 375 376 hwif->dma_base = base; 377 378 if (hwif->dma_ops == NULL) 379 hwif->dma_ops = &sff_dma_ops; 380 381 if (ide_pci_check_simplex(hwif, d) < 0) 382 return -1; 383 384 if (ide_pci_set_master(dev, d->name) < 0) 385 return -1; 386 387 if (hwif->host_flags & IDE_HFLAG_MMIO) 388 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); 389 else 390 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 391 hwif->name, base, base + 7); 392 393 hwif->extra_base = base + (hwif->channel ? 8 : 16); 394 395 if (ide_allocate_dma_engine(hwif)) 396 return -1; 397 } 398 399 return 0; 400} 401#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 402 403/** 404 * ide_setup_pci_controller - set up IDE PCI 405 * @dev: PCI device 406 * @d: IDE port info 407 * @noisy: verbose flag 408 * 409 * Set up the PCI and controller side of the IDE interface. This brings 410 * up the PCI side of the device, checks that the device is enabled 411 * and enables it if need be 412 */ 413 414static int ide_setup_pci_controller(struct pci_dev *dev, 415 const struct ide_port_info *d, int noisy) 416{ 417 int ret; 418 u16 pcicmd; 419 420 if (noisy) 421 ide_setup_pci_noise(dev, d); 422 423 ret = ide_pci_enable(dev, d); 424 if (ret < 0) 425 goto out; 426 427 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 428 if (ret < 0) { 429 printk(KERN_ERR "%s %s: error accessing PCI regs\n", 430 d->name, pci_name(dev)); 431 goto out; 432 } 433 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 434 ret = ide_pci_configure(dev, d); 435 if (ret < 0) 436 goto out; 437 printk(KERN_INFO "%s %s: device enabled (Linux)\n", 438 d->name, pci_name(dev)); 439 } 440 441out: 442 return ret; 443} 444 445/** 446 * ide_pci_setup_ports - configure ports/devices on PCI IDE 447 * @dev: PCI device 448 * @d: IDE port info 449 * @hw: hw_regs_t instances corresponding to this PCI IDE device 450 * @hws: hw_regs_t pointers table to update 451 * 452 * Scan the interfaces attached to this device and do any 453 * necessary per port setup. Attach the devices and ask the 454 * generic DMA layer to do its work for us. 455 * 456 * Normally called automaticall from do_ide_pci_setup_device, 457 * but is also used directly as a helper function by some controllers 458 * where the chipset setup is not the default PCI IDE one. 459 */ 460 461void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, 462 hw_regs_t *hw, hw_regs_t **hws) 463{ 464 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 465 u8 tmp; 466 467 /* 468 * Set up the IDE ports 469 */ 470 471 for (port = 0; port < channels; ++port) { 472 const struct ide_pci_enablebit *e = &d->enablebits[port]; 473 474 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 475 (tmp & e->mask) != e->val)) { 476 printk(KERN_INFO "%s %s: IDE port disabled\n", 477 d->name, pci_name(dev)); 478 continue; /* port not enabled */ 479 } 480 481 if (ide_hw_configure(dev, d, port, hw + port)) 482 continue; 483 484 *(hws + port) = hw + port; 485 } 486} 487EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 488 489/* 490 * ide_setup_pci_device() looks at the primary/secondary interfaces 491 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 492 * for use with them. This generic code works for most PCI chipsets. 493 * 494 * One thing that is not standardized is the location of the 495 * primary/secondary interface "enable/disable" bits. For chipsets that 496 * we "know" about, this information is in the struct ide_port_info; 497 * for all other chipsets, we just assume both interfaces are enabled. 498 */ 499static int do_ide_setup_pci_device(struct pci_dev *dev, 500 const struct ide_port_info *d, 501 u8 noisy) 502{ 503 int pciirq, ret; 504 505 /* 506 * Can we trust the reported IRQ? 507 */ 508 pciirq = dev->irq; 509 510 /* 511 * This allows offboard ide-pci cards the enable a BIOS, 512 * verify interrupt settings of split-mirror pci-config 513 * space, place chipset into init-mode, and/or preserve 514 * an interrupt if the card is not native ide support. 515 */ 516 ret = d->init_chipset ? d->init_chipset(dev) : 0; 517 if (ret < 0) 518 goto out; 519 520 if (ide_pci_is_in_compatibility_mode(dev)) { 521 if (noisy) 522 printk(KERN_INFO "%s %s: not 100%% native mode: will " 523 "probe irqs later\n", d->name, pci_name(dev)); 524 pciirq = 0; 525 } else if (!pciirq && noisy) { 526 printk(KERN_WARNING "%s %s: bad irq (%d): will probe later\n", 527 d->name, pci_name(dev), pciirq); 528 } else if (noisy) { 529 printk(KERN_INFO "%s %s: 100%% native mode on irq %d\n", 530 d->name, pci_name(dev), pciirq); 531 } 532 533 ret = pciirq; 534out: 535 return ret; 536} 537 538int ide_pci_init_one(struct pci_dev *dev, const struct ide_port_info *d, 539 void *priv) 540{ 541 struct ide_host *host; 542 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 543 int ret; 544 545 ret = ide_setup_pci_controller(dev, d, 1); 546 if (ret < 0) 547 goto out; 548 549 ide_pci_setup_ports(dev, d, &hw[0], &hws[0]); 550 551 host = ide_host_alloc(d, hws); 552 if (host == NULL) { 553 ret = -ENOMEM; 554 goto out; 555 } 556 557 host->dev[0] = &dev->dev; 558 559 host->host_priv = priv; 560 561 host->irq_flags = IRQF_SHARED; 562 563 pci_set_drvdata(dev, host); 564 565 ret = do_ide_setup_pci_device(dev, d, 1); 566 if (ret < 0) 567 goto out; 568 569 /* fixup IRQ */ 570 if (ide_pci_is_in_compatibility_mode(dev)) { 571 hw[0].irq = pci_get_legacy_ide_irq(dev, 0); 572 hw[1].irq = pci_get_legacy_ide_irq(dev, 1); 573 } else 574 hw[1].irq = hw[0].irq = ret; 575 576 ret = ide_host_register(host, d, hws); 577 if (ret) 578 ide_host_free(host); 579out: 580 return ret; 581} 582EXPORT_SYMBOL_GPL(ide_pci_init_one); 583 584int ide_pci_init_two(struct pci_dev *dev1, struct pci_dev *dev2, 585 const struct ide_port_info *d, void *priv) 586{ 587 struct pci_dev *pdev[] = { dev1, dev2 }; 588 struct ide_host *host; 589 int ret, i; 590 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 591 592 for (i = 0; i < 2; i++) { 593 ret = ide_setup_pci_controller(pdev[i], d, !i); 594 if (ret < 0) 595 goto out; 596 597 ide_pci_setup_ports(pdev[i], d, &hw[i*2], &hws[i*2]); 598 } 599 600 host = ide_host_alloc(d, hws); 601 if (host == NULL) { 602 ret = -ENOMEM; 603 goto out; 604 } 605 606 host->dev[0] = &dev1->dev; 607 host->dev[1] = &dev2->dev; 608 609 host->host_priv = priv; 610 611 host->irq_flags = IRQF_SHARED; 612 613 pci_set_drvdata(pdev[0], host); 614 pci_set_drvdata(pdev[1], host); 615 616 for (i = 0; i < 2; i++) { 617 ret = do_ide_setup_pci_device(pdev[i], d, !i); 618 619 /* 620 * FIXME: Mom, mom, they stole me the helper function to undo 621 * do_ide_setup_pci_device() on the first device! 622 */ 623 if (ret < 0) 624 goto out; 625 626 /* fixup IRQ */ 627 if (ide_pci_is_in_compatibility_mode(pdev[i])) { 628 hw[i*2].irq = pci_get_legacy_ide_irq(pdev[i], 0); 629 hw[i*2 + 1].irq = pci_get_legacy_ide_irq(pdev[i], 1); 630 } else 631 hw[i*2 + 1].irq = hw[i*2].irq = ret; 632 } 633 634 ret = ide_host_register(host, d, hws); 635 if (ret) 636 ide_host_free(host); 637out: 638 return ret; 639} 640EXPORT_SYMBOL_GPL(ide_pci_init_two); 641 642void ide_pci_remove(struct pci_dev *dev) 643{ 644 struct ide_host *host = pci_get_drvdata(dev); 645 struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL; 646 int bars; 647 648 if (host->host_flags & IDE_HFLAG_SINGLE) 649 bars = (1 << 2) - 1; 650 else 651 bars = (1 << 4) - 1; 652 653 if ((host->host_flags & IDE_HFLAG_NO_DMA) == 0) { 654 if (host->host_flags & IDE_HFLAG_CS5520) 655 bars |= (1 << 2); 656 else 657 bars |= (1 << 4); 658 } 659 660 ide_host_remove(host); 661 662 if (dev2) 663 pci_release_selected_regions(dev2, bars); 664 pci_release_selected_regions(dev, bars); 665 666 if (dev2) 667 pci_disable_device(dev2); 668 pci_disable_device(dev); 669} 670EXPORT_SYMBOL_GPL(ide_pci_remove); 671 672#ifdef CONFIG_PM 673int ide_pci_suspend(struct pci_dev *dev, pm_message_t state) 674{ 675 pci_save_state(dev); 676 pci_disable_device(dev); 677 pci_set_power_state(dev, pci_choose_state(dev, state)); 678 679 return 0; 680} 681EXPORT_SYMBOL_GPL(ide_pci_suspend); 682 683int ide_pci_resume(struct pci_dev *dev) 684{ 685 struct ide_host *host = pci_get_drvdata(dev); 686 int rc; 687 688 pci_set_power_state(dev, PCI_D0); 689 690 rc = pci_enable_device(dev); 691 if (rc) 692 return rc; 693 694 pci_restore_state(dev); 695 pci_set_master(dev); 696 697 if (host->init_chipset) 698 host->init_chipset(dev); 699 700 return 0; 701} 702EXPORT_SYMBOL_GPL(ide_pci_resume); 703#endif 704