setup-pci.c revision 8ac2b42a45896641ed292deaf038a1d2703d85a6
1/* 2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19 3 * 4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * 6 * Copyright (c) 1995-1998 Mark Lord 7 * May be copied or modified under the terms of the GNU General Public License 8 */ 9 10#include <linux/module.h> 11#include <linux/types.h> 12#include <linux/kernel.h> 13#include <linux/pci.h> 14#include <linux/init.h> 15#include <linux/timer.h> 16#include <linux/mm.h> 17#include <linux/interrupt.h> 18#include <linux/ide.h> 19#include <linux/dma-mapping.h> 20 21#include <asm/io.h> 22#include <asm/irq.h> 23 24 25/** 26 * ide_match_hwif - match a PCI IDE against an ide_hwif 27 * @io_base: I/O base of device 28 * @bootable: set if its bootable 29 * @name: name of device 30 * 31 * Match a PCI IDE port against an entry in ide_hwifs[], 32 * based on io_base port if possible. Return the matching hwif, 33 * or a new hwif. If we find an error (clashing, out of devices, etc) 34 * return NULL 35 * 36 * FIXME: we need to handle mmio matches here too 37 */ 38 39static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name) 40{ 41 int h; 42 ide_hwif_t *hwif; 43 44 /* 45 * Look for a hwif with matching io_base specified using 46 * parameters to ide_setup(). 47 */ 48 for (h = 0; h < MAX_HWIFS; ++h) { 49 hwif = &ide_hwifs[h]; 50 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 51 if (hwif->chipset == ide_forced) 52 return hwif; /* a perfect match */ 53 } 54 } 55 /* 56 * Look for a hwif with matching io_base default value. 57 * If chipset is "ide_unknown", then claim that hwif slot. 58 * Otherwise, some other chipset has already claimed it.. :( 59 */ 60 for (h = 0; h < MAX_HWIFS; ++h) { 61 hwif = &ide_hwifs[h]; 62 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 63 if (hwif->chipset == ide_unknown) 64 return hwif; /* match */ 65 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n", 66 name, io_base, hwif->name); 67 return NULL; /* already claimed */ 68 } 69 } 70 /* 71 * Okay, there is no hwif matching our io_base, 72 * so we'll just claim an unassigned slot. 73 * Give preference to claiming other slots before claiming ide0/ide1, 74 * just in case there's another interface yet-to-be-scanned 75 * which uses ports 1f0/170 (the ide0/ide1 defaults). 76 * 77 * Unless there is a bootable card that does not use the standard 78 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag. 79 */ 80 if (bootable) { 81 for (h = 0; h < MAX_HWIFS; ++h) { 82 hwif = &ide_hwifs[h]; 83 if (hwif->chipset == ide_unknown) 84 return hwif; /* pick an unused entry */ 85 } 86 } else { 87 for (h = 2; h < MAX_HWIFS; ++h) { 88 hwif = ide_hwifs + h; 89 if (hwif->chipset == ide_unknown) 90 return hwif; /* pick an unused entry */ 91 } 92 } 93 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) { 94 hwif = ide_hwifs + h; 95 if (hwif->chipset == ide_unknown) 96 return hwif; /* pick an unused entry */ 97 } 98 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name); 99 return NULL; 100} 101 102/** 103 * ide_setup_pci_baseregs - place a PCI IDE controller native 104 * @dev: PCI device of interface to switch native 105 * @name: Name of interface 106 * 107 * We attempt to place the PCI interface into PCI native mode. If 108 * we succeed the BARs are ok and the controller is in PCI mode. 109 * Returns 0 on success or an errno code. 110 * 111 * FIXME: if we program the interface and then fail to set the BARS 112 * we don't switch it back to legacy mode. Do we actually care ?? 113 */ 114 115static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) 116{ 117 u8 progif = 0; 118 119 /* 120 * Place both IDE interfaces into PCI "native" mode: 121 */ 122 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 123 (progif & 5) != 5) { 124 if ((progif & 0xa) != 0xa) { 125 printk(KERN_INFO "%s: device not capable of full " 126 "native PCI mode\n", name); 127 return -EOPNOTSUPP; 128 } 129 printk("%s: placing both ports into native PCI mode\n", name); 130 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 131 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 132 (progif & 5) != 5) { 133 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " 134 "0x%04x, got 0x%04x\n", 135 name, progif|5, progif); 136 return -EOPNOTSUPP; 137 } 138 } 139 return 0; 140} 141 142#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 143static void ide_pci_clear_simplex(unsigned long dma_base, const char *name) 144{ 145 u8 dma_stat = inb(dma_base + 2); 146 147 outb(dma_stat & 0x60, dma_base + 2); 148 dma_stat = inb(dma_base + 2); 149 if (dma_stat & 0x80) 150 printk(KERN_INFO "%s: simplex device: DMA forced\n", name); 151} 152 153/** 154 * ide_get_or_set_dma_base - setup BMIBA 155 * @d: IDE port info 156 * @hwif: IDE interface 157 * 158 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 159 * Where a device has a partner that is already in DMA mode we check 160 * and enforce IDE simplex rules. 161 */ 162 163static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif) 164{ 165 unsigned long dma_base = 0; 166 struct pci_dev *dev = hwif->pci_dev; 167 u8 dma_stat = 0; 168 169 if (hwif->mmio) 170 return hwif->dma_base; 171 172 if (hwif->mate && hwif->mate->dma_base) { 173 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 174 } else { 175 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 176 177 dma_base = pci_resource_start(dev, baridx); 178 179 if (dma_base == 0) { 180 printk(KERN_ERR "%s: DMA base is invalid\n", d->name); 181 return 0; 182 } 183 } 184 185 if (hwif->channel) 186 dma_base += 8; 187 188 if (d->host_flags & IDE_HFLAG_CS5520) 189 goto out; 190 191 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { 192 ide_pci_clear_simplex(dma_base, d->name); 193 goto out; 194 } 195 196 /* 197 * If the device claims "simplex" DMA, this means that only one of 198 * the two interfaces can be trusted with DMA at any point in time 199 * (so we should enable DMA only on one of the two interfaces). 200 * 201 * FIXME: At this point we haven't probed the drives so we can't make 202 * the appropriate decision. Really we should defer this problem until 203 * we tune the drive then try to grab DMA ownership if we want to be 204 * the DMA end. This has to be become dynamic to handle hot-plug. 205 */ 206 dma_stat = hwif->INB(dma_base + 2); 207 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { 208 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name); 209 dma_base = 0; 210 } 211out: 212 return dma_base; 213} 214#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 215 216void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) 217{ 218 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at " 219 " PCI slot %s\n", d->name, dev->vendor, dev->device, 220 dev->revision, pci_name(dev)); 221} 222 223EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 224 225 226/** 227 * ide_pci_enable - do PCI enables 228 * @dev: PCI device 229 * @d: IDE port info 230 * 231 * Enable the IDE PCI device. We attempt to enable the device in full 232 * but if that fails then we only need BAR4 so we will enable that. 233 * 234 * Returns zero on success or an error code 235 */ 236 237static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) 238{ 239 int ret; 240 241 if (pci_enable_device(dev)) { 242 ret = pci_enable_device_bars(dev, 1 << 4); 243 if (ret < 0) { 244 printk(KERN_WARNING "%s: (ide_setup_pci_device:) " 245 "Could not enable device.\n", d->name); 246 goto out; 247 } 248 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); 249 } 250 251 /* 252 * assume all devices can do 32-bit DMA for now, we can add 253 * a DMA mask field to the struct ide_port_info if we need it 254 * (or let lower level driver set the DMA mask) 255 */ 256 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); 257 if (ret < 0) { 258 printk(KERN_ERR "%s: can't set dma mask\n", d->name); 259 goto out; 260 } 261 262 /* FIXME: Temporary - until we put in the hotplug interface logic 263 Check that the bits we want are not in use by someone else. */ 264 ret = pci_request_region(dev, 4, "ide_tmp"); 265 if (ret < 0) 266 goto out; 267 268 pci_release_region(dev, 4); 269out: 270 return ret; 271} 272 273/** 274 * ide_pci_configure - configure an unconfigured device 275 * @dev: PCI device 276 * @d: IDE port info 277 * 278 * Enable and configure the PCI device we have been passed. 279 * Returns zero on success or an error code. 280 */ 281 282static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) 283{ 284 u16 pcicmd = 0; 285 /* 286 * PnP BIOS was *supposed* to have setup this device, but we 287 * can do it ourselves, so long as the BIOS has assigned an IRQ 288 * (or possibly the device is using a "legacy header" for IRQs). 289 * Maybe the user deliberately *disabled* the device, 290 * but we'll eventually ignore it again if no drives respond. 291 */ 292 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO)) 293 { 294 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); 295 return -ENODEV; 296 } 297 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 298 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 299 return -EIO; 300 } 301 if (!(pcicmd & PCI_COMMAND_IO)) { 302 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); 303 return -ENXIO; 304 } 305 return 0; 306} 307 308/** 309 * ide_pci_check_iomem - check a register is I/O 310 * @dev: PCI device 311 * @d: IDE port info 312 * @bar: BAR number 313 * 314 * Checks if a BAR is configured and points to MMIO space. If so 315 * print an error and return an error code. Otherwise return 0 316 */ 317 318static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar) 319{ 320 ulong flags = pci_resource_flags(dev, bar); 321 322 /* Unconfigured ? */ 323 if (!flags || pci_resource_len(dev, bar) == 0) 324 return 0; 325 326 /* I/O space */ 327 if(flags & PCI_BASE_ADDRESS_IO_MASK) 328 return 0; 329 330 /* Bad */ 331 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported " 332 "as MEM, report to " 333 "<andre@linux-ide.org>.\n", d->name); 334 return -EINVAL; 335} 336 337/** 338 * ide_hwif_configure - configure an IDE interface 339 * @dev: PCI device holding interface 340 * @d: IDE port info 341 * @mate: Paired interface if any 342 * 343 * Perform the initial set up for the hardware interface structure. This 344 * is done per interface port rather than per PCI device. There may be 345 * more than one port per device. 346 * 347 * Returns the new hardware interface structure, or NULL on a failure 348 */ 349 350static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq) 351{ 352 unsigned long ctl = 0, base = 0; 353 ide_hwif_t *hwif; 354 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; 355 u8 oldnoprobe = 0; 356 struct hw_regs_s hw; 357 358 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 359 /* Possibly we should fail if these checks report true */ 360 ide_pci_check_iomem(dev, d, 2*port); 361 ide_pci_check_iomem(dev, d, 2*port+1); 362 363 ctl = pci_resource_start(dev, 2*port+1); 364 base = pci_resource_start(dev, 2*port); 365 if ((ctl && !base) || (base && !ctl)) { 366 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) " 367 "for port %d, skipping\n", d->name, port); 368 return NULL; 369 } 370 } 371 if (!ctl) 372 { 373 /* Use default values */ 374 ctl = port ? 0x374 : 0x3f4; 375 base = port ? 0x170 : 0x1f0; 376 } 377 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) 378 return NULL; /* no room in ide_hwifs[] */ 379 380 memset(&hw, 0, sizeof(hw)); 381 hw.irq = hwif->irq ? hwif->irq : irq; 382 hw.dev = &dev->dev; 383 hw.chipset = d->chipset ? d->chipset : ide_pci; 384 ide_std_init_ports(&hw, base, ctl | 2); 385 386 if (hwif->io_ports[IDE_DATA_OFFSET] == base && 387 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2)) 388 oldnoprobe = hwif->noprobe; 389 390 ide_init_port_hw(hwif, &hw); 391 392 hwif->noprobe = oldnoprobe; 393 394 hwif->pci_dev = dev; 395 hwif->cds = d; 396 hwif->channel = port; 397 398 if (mate) { 399 hwif->mate = mate; 400 mate->mate = hwif; 401 } 402 return hwif; 403} 404 405/** 406 * ide_hwif_setup_dma - configure DMA interface 407 * @dev: PCI device 408 * @d: IDE port info 409 * @hwif: IDE interface 410 * 411 * Set up the DMA base for the interface. Enable the master bits as 412 * necessary and attempt to bring the device DMA into a ready to use 413 * state 414 */ 415 416static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif) 417{ 418#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 419 u16 pcicmd; 420 421 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 422 423 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 424 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 425 (dev->class & 0x80))) { 426 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); 427 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { 428 /* 429 * Set up BM-DMA capability 430 * (PnP BIOS should have done this) 431 */ 432 pci_set_master(dev); 433 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { 434 printk(KERN_ERR "%s: %s error updating PCICMD\n", 435 hwif->name, d->name); 436 dma_base = 0; 437 } 438 } 439 if (dma_base) { 440 if (d->init_dma) { 441 d->init_dma(hwif, dma_base); 442 } else { 443 ide_setup_dma(hwif, dma_base); 444 } 445 } else { 446 printk(KERN_INFO "%s: %s Bus-Master DMA disabled " 447 "(BIOS)\n", hwif->name, d->name); 448 } 449 } 450#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/ 451} 452 453/** 454 * ide_setup_pci_controller - set up IDE PCI 455 * @dev: PCI device 456 * @d: IDE port info 457 * @noisy: verbose flag 458 * @config: returned as 1 if we configured the hardware 459 * 460 * Set up the PCI and controller side of the IDE interface. This brings 461 * up the PCI side of the device, checks that the device is enabled 462 * and enables it if need be 463 */ 464 465static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config) 466{ 467 int ret; 468 u16 pcicmd; 469 470 if (noisy) 471 ide_setup_pci_noise(dev, d); 472 473 ret = ide_pci_enable(dev, d); 474 if (ret < 0) 475 goto out; 476 477 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 478 if (ret < 0) { 479 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 480 goto out; 481 } 482 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 483 ret = ide_pci_configure(dev, d); 484 if (ret < 0) 485 goto out; 486 *config = 1; 487 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 488 } 489 490out: 491 return ret; 492} 493 494/** 495 * ide_pci_setup_ports - configure ports/devices on PCI IDE 496 * @dev: PCI device 497 * @d: IDE port info 498 * @pciirq: IRQ line 499 * @idx: ATA index table to update 500 * 501 * Scan the interfaces attached to this device and do any 502 * necessary per port setup. Attach the devices and ask the 503 * generic DMA layer to do its work for us. 504 * 505 * Normally called automaticall from do_ide_pci_setup_device, 506 * but is also used directly as a helper function by some controllers 507 * where the chipset setup is not the default PCI IDE one. 508 */ 509 510void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx) 511{ 512 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 513 ide_hwif_t *hwif, *mate = NULL; 514 u8 tmp; 515 516 /* 517 * Set up the IDE ports 518 */ 519 520 for (port = 0; port < channels; ++port) { 521 const ide_pci_enablebit_t *e = &(d->enablebits[port]); 522 523 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 524 (tmp & e->mask) != e->val)) { 525 printk(KERN_INFO "%s: IDE port disabled\n", d->name); 526 continue; /* port not enabled */ 527 } 528 529 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) 530 continue; 531 532 *(idx + port) = hwif->index; 533 534 if (d->init_iops) 535 d->init_iops(hwif); 536 537 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) 538 ide_hwif_setup_dma(dev, d, hwif); 539 540 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) || 541 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS)) 542 hwif->irq = port ? 15 : 14; 543 544 hwif->host_flags = d->host_flags; 545 hwif->pio_mask = d->pio_mask; 546 547 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate) 548 hwif->mate->serialized = hwif->serialized = 1; 549 550 if (d->host_flags & IDE_HFLAG_IO_32BIT) { 551 hwif->drives[0].io_32bit = 1; 552 hwif->drives[1].io_32bit = 1; 553 } 554 555 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) { 556 hwif->drives[0].unmask = 1; 557 hwif->drives[1].unmask = 1; 558 } 559 560 if (hwif->dma_base) { 561 hwif->swdma_mask = d->swdma_mask; 562 hwif->mwdma_mask = d->mwdma_mask; 563 hwif->ultra_mask = d->udma_mask; 564 } 565 566 hwif->drives[0].autotune = 1; 567 hwif->drives[1].autotune = 1; 568 569 if (d->host_flags & IDE_HFLAG_RQSIZE_256) 570 hwif->rqsize = 256; 571 572 if (d->init_hwif) 573 /* Call chipset-specific routine 574 * for each enabled hwif 575 */ 576 d->init_hwif(hwif); 577 578 mate = hwif; 579 } 580} 581 582EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 583 584/* 585 * ide_setup_pci_device() looks at the primary/secondary interfaces 586 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 587 * for use with them. This generic code works for most PCI chipsets. 588 * 589 * One thing that is not standardized is the location of the 590 * primary/secondary interface "enable/disable" bits. For chipsets that 591 * we "know" about, this information is in the struct ide_port_info; 592 * for all other chipsets, we just assume both interfaces are enabled. 593 */ 594static int do_ide_setup_pci_device(struct pci_dev *dev, 595 const struct ide_port_info *d, 596 u8 *idx, u8 noisy) 597{ 598 int tried_config = 0; 599 int pciirq, ret; 600 601 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); 602 if (ret < 0) 603 goto out; 604 605 /* 606 * Can we trust the reported IRQ? 607 */ 608 pciirq = dev->irq; 609 610 /* Is it an "IDE storage" device in non-PCI mode? */ 611 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { 612 if (noisy) 613 printk(KERN_INFO "%s: not 100%% native mode: " 614 "will probe irqs later\n", d->name); 615 /* 616 * This allows offboard ide-pci cards the enable a BIOS, 617 * verify interrupt settings of split-mirror pci-config 618 * space, place chipset into init-mode, and/or preserve 619 * an interrupt if the card is not native ide support. 620 */ 621 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; 622 if (ret < 0) 623 goto out; 624 pciirq = ret; 625 } else if (tried_config) { 626 if (noisy) 627 printk(KERN_INFO "%s: will probe irqs later\n", d->name); 628 pciirq = 0; 629 } else if (!pciirq) { 630 if (noisy) 631 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", 632 d->name, pciirq); 633 pciirq = 0; 634 } else { 635 if (d->init_chipset) { 636 ret = d->init_chipset(dev, d->name); 637 if (ret < 0) 638 goto out; 639 } 640 if (noisy) 641 printk(KERN_INFO "%s: 100%% native mode on irq %d\n", 642 d->name, pciirq); 643 } 644 645 /* FIXME: silent failure can happen */ 646 647 ide_pci_setup_ports(dev, d, pciirq, idx); 648out: 649 return ret; 650} 651 652int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d) 653{ 654 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 655 int ret; 656 657 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1); 658 659 if (ret >= 0) 660 ide_device_add(idx); 661 662 return ret; 663} 664 665EXPORT_SYMBOL_GPL(ide_setup_pci_device); 666 667int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, 668 const struct ide_port_info *d) 669{ 670 struct pci_dev *pdev[] = { dev1, dev2 }; 671 int ret, i; 672 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 673 674 for (i = 0; i < 2; i++) { 675 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i); 676 /* 677 * FIXME: Mom, mom, they stole me the helper function to undo 678 * do_ide_setup_pci_device() on the first device! 679 */ 680 if (ret < 0) 681 goto out; 682 } 683 684 ide_device_add(idx); 685out: 686 return ret; 687} 688 689EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 690