setup-pci.c revision 8c2eece50a368c7986bae0b3e52739558dd71b51
1/*
2 *  Copyright (C) 1998-2000  Andre Hedrick <andre@linux-ide.org>
3 *  Copyright (C) 1995-1998  Mark Lord
4 *  Copyright (C)      2007  Bartlomiej Zolnierkiewicz
5 *
6 *  May be copied or modified under the terms of the GNU General Public License
7 */
8
9#include <linux/types.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/ide.h>
15#include <linux/dma-mapping.h>
16
17#include <asm/io.h>
18
19/**
20 *	ide_setup_pci_baseregs	-	place a PCI IDE controller native
21 *	@dev: PCI device of interface to switch native
22 *	@name: Name of interface
23 *
24 *	We attempt to place the PCI interface into PCI native mode. If
25 *	we succeed the BARs are ok and the controller is in PCI mode.
26 *	Returns 0 on success or an errno code.
27 *
28 *	FIXME: if we program the interface and then fail to set the BARS
29 *	we don't switch it back to legacy mode. Do we actually care ??
30 */
31
32static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name)
33{
34	u8 progif = 0;
35
36	/*
37	 * Place both IDE interfaces into PCI "native" mode:
38	 */
39	if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
40			 (progif & 5) != 5) {
41		if ((progif & 0xa) != 0xa) {
42			printk(KERN_INFO "%s: device not capable of full "
43				"native PCI mode\n", name);
44			return -EOPNOTSUPP;
45		}
46		printk("%s: placing both ports into native PCI mode\n", name);
47		(void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
48		if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
49		    (progif & 5) != 5) {
50			printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
51				"0x%04x, got 0x%04x\n",
52				name, progif|5, progif);
53			return -EOPNOTSUPP;
54		}
55	}
56	return 0;
57}
58
59#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
60static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
61{
62	u8 dma_stat = inb(dma_base + 2);
63
64	outb(dma_stat & 0x60, dma_base + 2);
65	dma_stat = inb(dma_base + 2);
66	if (dma_stat & 0x80)
67		printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
68}
69
70/**
71 *	ide_pci_dma_base	-	setup BMIBA
72 *	@hwif: IDE interface
73 *	@d: IDE port info
74 *
75 *	Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
76 */
77
78unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d)
79{
80	struct pci_dev *dev = to_pci_dev(hwif->dev);
81	unsigned long dma_base = 0;
82
83	if (hwif->host_flags & IDE_HFLAG_MMIO)
84		return hwif->dma_base;
85
86	if (hwif->mate && hwif->mate->dma_base) {
87		dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
88	} else {
89		u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
90
91		dma_base = pci_resource_start(dev, baridx);
92
93		if (dma_base == 0) {
94			printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
95			return 0;
96		}
97	}
98
99	if (hwif->channel)
100		dma_base += 8;
101
102	return dma_base;
103}
104EXPORT_SYMBOL_GPL(ide_pci_dma_base);
105
106int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d)
107{
108	u8 dma_stat;
109
110	if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520))
111		goto out;
112
113	if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
114		ide_pci_clear_simplex(hwif->dma_base, d->name);
115		goto out;
116	}
117
118	/*
119	 * If the device claims "simplex" DMA, this means that only one of
120	 * the two interfaces can be trusted with DMA at any point in time
121	 * (so we should enable DMA only on one of the two interfaces).
122	 *
123	 * FIXME: At this point we haven't probed the drives so we can't make
124	 * the appropriate decision.  Really we should defer this problem until
125	 * we tune the drive then try to grab DMA ownership if we want to be
126	 * the DMA end.  This has to be become dynamic to handle hot-plug.
127	 */
128	dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
129	if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
130		printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
131		return -1;
132	}
133out:
134	return 0;
135}
136EXPORT_SYMBOL_GPL(ide_pci_check_simplex);
137
138/*
139 * Set up BM-DMA capability (PnP BIOS should have done this)
140 */
141int ide_pci_set_master(struct pci_dev *dev, const char *name)
142{
143	u16 pcicmd;
144
145	pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
146
147	if ((pcicmd & PCI_COMMAND_MASTER) == 0) {
148		pci_set_master(dev);
149
150		if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) ||
151		    (pcicmd & PCI_COMMAND_MASTER) == 0) {
152			printk(KERN_ERR "%s: error updating PCICMD on %s\n",
153					name, pci_name(dev));
154			return -EIO;
155		}
156	}
157
158	return 0;
159}
160EXPORT_SYMBOL_GPL(ide_pci_set_master);
161#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
162
163void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
164{
165	printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
166			 " PCI slot %s\n", d->name, dev->vendor, dev->device,
167			 dev->revision, pci_name(dev));
168}
169EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
170
171
172/**
173 *	ide_pci_enable	-	do PCI enables
174 *	@dev: PCI device
175 *	@d: IDE port info
176 *
177 *	Enable the IDE PCI device. We attempt to enable the device in full
178 *	but if that fails then we only need IO space. The PCI code should
179 *	have setup the proper resources for us already for controllers in
180 *	legacy mode.
181 *
182 *	Returns zero on success or an error code
183 */
184
185static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
186{
187	int ret, bars;
188
189	if (pci_enable_device(dev)) {
190		ret = pci_enable_device_io(dev);
191		if (ret < 0) {
192			printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
193				"Could not enable device.\n", d->name);
194			goto out;
195		}
196		printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
197	}
198
199	/*
200	 * assume all devices can do 32-bit DMA for now, we can add
201	 * a DMA mask field to the struct ide_port_info if we need it
202	 * (or let lower level driver set the DMA mask)
203	 */
204	ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
205	if (ret < 0) {
206		printk(KERN_ERR "%s: can't set dma mask\n", d->name);
207		goto out;
208	}
209
210	if (d->host_flags & IDE_HFLAG_SINGLE)
211		bars = (1 << 2) - 1;
212	else
213		bars = (1 << 4) - 1;
214
215	if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
216		if (d->host_flags & IDE_HFLAG_CS5520)
217			bars |= (1 << 2);
218		else
219			bars |= (1 << 4);
220	}
221
222	ret = pci_request_selected_regions(dev, bars, d->name);
223	if (ret < 0)
224		printk(KERN_ERR "%s: can't reserve resources\n", d->name);
225out:
226	return ret;
227}
228
229/**
230 *	ide_pci_configure	-	configure an unconfigured device
231 *	@dev: PCI device
232 *	@d: IDE port info
233 *
234 *	Enable and configure the PCI device we have been passed.
235 *	Returns zero on success or an error code.
236 */
237
238static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
239{
240	u16 pcicmd = 0;
241	/*
242	 * PnP BIOS was *supposed* to have setup this device, but we
243	 * can do it ourselves, so long as the BIOS has assigned an IRQ
244	 * (or possibly the device is using a "legacy header" for IRQs).
245	 * Maybe the user deliberately *disabled* the device,
246	 * but we'll eventually ignore it again if no drives respond.
247	 */
248	if (ide_setup_pci_baseregs(dev, d->name) ||
249	    pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
250		printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
251		return -ENODEV;
252	}
253	if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
254		printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
255		return -EIO;
256	}
257	if (!(pcicmd & PCI_COMMAND_IO)) {
258		printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
259		return -ENXIO;
260	}
261	return 0;
262}
263
264/**
265 *	ide_pci_check_iomem	-	check a register is I/O
266 *	@dev: PCI device
267 *	@d: IDE port info
268 *	@bar: BAR number
269 *
270 *	Checks if a BAR is configured and points to MMIO space. If so,
271 *	return an error code. Otherwise return 0
272 */
273
274static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
275			       int bar)
276{
277	ulong flags = pci_resource_flags(dev, bar);
278
279	/* Unconfigured ? */
280	if (!flags || pci_resource_len(dev, bar) == 0)
281		return 0;
282
283	/* I/O space */
284	if (flags & IORESOURCE_IO)
285		return 0;
286
287	/* Bad */
288	return -EINVAL;
289}
290
291/**
292 *	ide_hw_configure	-	configure a hw_regs_t instance
293 *	@dev: PCI device holding interface
294 *	@d: IDE port info
295 *	@port: port number
296 *	@irq: PCI IRQ
297 *	@hw: hw_regs_t instance corresponding to this port
298 *
299 *	Perform the initial set up for the hardware interface structure. This
300 *	is done per interface port rather than per PCI device. There may be
301 *	more than one port per device.
302 *
303 *	Returns zero on success or an error code.
304 */
305
306static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d,
307			    unsigned int port, int irq, hw_regs_t *hw)
308{
309	unsigned long ctl = 0, base = 0;
310
311	if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
312		if (ide_pci_check_iomem(dev, d, 2 * port) ||
313		    ide_pci_check_iomem(dev, d, 2 * port + 1)) {
314			printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported "
315					"as MEM for port %d!\n", d->name, port);
316			return -EINVAL;
317		}
318
319		ctl  = pci_resource_start(dev, 2*port+1);
320		base = pci_resource_start(dev, 2*port);
321	} else {
322		/* Use default values */
323		ctl = port ? 0x374 : 0x3f4;
324		base = port ? 0x170 : 0x1f0;
325	}
326
327	if (!base || !ctl) {
328		printk(KERN_ERR "%s: bad PCI BARs for port %d, skipping\n",
329				d->name, port);
330		return -EINVAL;
331	}
332
333	memset(hw, 0, sizeof(*hw));
334	hw->irq = irq;
335	hw->dev = &dev->dev;
336	hw->chipset = d->chipset ? d->chipset : ide_pci;
337	ide_std_init_ports(hw, base, ctl | 2);
338
339	return 0;
340}
341
342#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
343/**
344 *	ide_hwif_setup_dma	-	configure DMA interface
345 *	@hwif: IDE interface
346 *	@d: IDE port info
347 *
348 *	Set up the DMA base for the interface. Enable the master bits as
349 *	necessary and attempt to bring the device DMA into a ready to use
350 *	state
351 */
352
353int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
354{
355	struct pci_dev *dev = to_pci_dev(hwif->dev);
356
357	if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
358	    ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
359	     (dev->class & 0x80))) {
360		unsigned long base = ide_pci_dma_base(hwif, d);
361
362		if (base == 0)
363			return -1;
364
365		hwif->dma_base = base;
366
367		if (ide_pci_check_simplex(hwif, d) < 0)
368			return -1;
369
370		if (ide_pci_set_master(dev, d->name) < 0)
371			return -1;
372
373		if (hwif->host_flags & IDE_HFLAG_MMIO)
374			printk(KERN_INFO "    %s: MMIO-DMA\n", hwif->name);
375		else
376			printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx\n",
377					 hwif->name, base, base + 7);
378
379		hwif->extra_base = base + (hwif->channel ? 8 : 16);
380
381		if (ide_allocate_dma_engine(hwif))
382			return -1;
383
384		hwif->dma_ops = &sff_dma_ops;
385	}
386
387	return 0;
388}
389#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
390
391/**
392 *	ide_setup_pci_controller	-	set up IDE PCI
393 *	@dev: PCI device
394 *	@d: IDE port info
395 *	@noisy: verbose flag
396 *
397 *	Set up the PCI and controller side of the IDE interface. This brings
398 *	up the PCI side of the device, checks that the device is enabled
399 *	and enables it if need be
400 */
401
402static int ide_setup_pci_controller(struct pci_dev *dev,
403				    const struct ide_port_info *d, int noisy)
404{
405	int ret;
406	u16 pcicmd;
407
408	if (noisy)
409		ide_setup_pci_noise(dev, d);
410
411	ret = ide_pci_enable(dev, d);
412	if (ret < 0)
413		goto out;
414
415	ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
416	if (ret < 0) {
417		printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
418		goto out;
419	}
420	if (!(pcicmd & PCI_COMMAND_IO)) {	/* is device disabled? */
421		ret = ide_pci_configure(dev, d);
422		if (ret < 0)
423			goto out;
424		printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
425	}
426
427out:
428	return ret;
429}
430
431/**
432 *	ide_pci_setup_ports	-	configure ports/devices on PCI IDE
433 *	@dev: PCI device
434 *	@d: IDE port info
435 *	@pciirq: IRQ line
436 *	@hw: hw_regs_t instances corresponding to this PCI IDE device
437 *	@hws: hw_regs_t pointers table to update
438 *
439 *	Scan the interfaces attached to this device and do any
440 *	necessary per port setup. Attach the devices and ask the
441 *	generic DMA layer to do its work for us.
442 *
443 *	Normally called automaticall from do_ide_pci_setup_device,
444 *	but is also used directly as a helper function by some controllers
445 *	where the chipset setup is not the default PCI IDE one.
446 */
447
448void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d,
449			 int pciirq, hw_regs_t *hw, hw_regs_t **hws)
450{
451	int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
452	u8 tmp;
453
454	/*
455	 * Set up the IDE ports
456	 */
457
458	for (port = 0; port < channels; ++port) {
459		const ide_pci_enablebit_t *e = &(d->enablebits[port]);
460
461		if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
462		    (tmp & e->mask) != e->val)) {
463			printk(KERN_INFO "%s: IDE port disabled\n", d->name);
464			continue;	/* port not enabled */
465		}
466
467		if (ide_hw_configure(dev, d, port, pciirq, hw + port))
468			continue;
469
470		*(hws + port) = hw + port;
471	}
472}
473EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
474
475/*
476 * ide_setup_pci_device() looks at the primary/secondary interfaces
477 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
478 * for use with them.  This generic code works for most PCI chipsets.
479 *
480 * One thing that is not standardized is the location of the
481 * primary/secondary interface "enable/disable" bits.  For chipsets that
482 * we "know" about, this information is in the struct ide_port_info;
483 * for all other chipsets, we just assume both interfaces are enabled.
484 */
485static int do_ide_setup_pci_device(struct pci_dev *dev,
486				   const struct ide_port_info *d,
487				   u8 noisy)
488{
489	int pciirq, ret;
490
491	/*
492	 * Can we trust the reported IRQ?
493	 */
494	pciirq = dev->irq;
495
496	/*
497	 * This allows offboard ide-pci cards the enable a BIOS,
498	 * verify interrupt settings of split-mirror pci-config
499	 * space, place chipset into init-mode, and/or preserve
500	 * an interrupt if the card is not native ide support.
501	 */
502	ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
503	if (ret < 0)
504		goto out;
505
506	/* Is it an "IDE storage" device in non-PCI mode? */
507	if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
508		if (noisy)
509			printk(KERN_INFO "%s: not 100%% native mode: "
510				"will probe irqs later\n", d->name);
511		pciirq = ret;
512	} else if (!pciirq) {
513		if (noisy)
514			printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
515				d->name, pciirq);
516		pciirq = 0;
517	} else {
518		if (noisy)
519			printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
520				d->name, pciirq);
521	}
522
523	ret = pciirq;
524out:
525	return ret;
526}
527
528int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
529{
530	hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
531	int ret;
532
533	ret = ide_setup_pci_controller(dev, d, 1);
534	if (ret < 0)
535		goto out;
536
537	ide_pci_setup_ports(dev, d, 0, &hw[0], &hws[0]);
538
539	ret = do_ide_setup_pci_device(dev, d, 1);
540	if (ret < 0)
541		goto out;
542
543	/* fixup IRQ */
544	hw[1].irq = hw[0].irq = ret;
545
546	ret = ide_host_add(d, hws, NULL);
547out:
548	return ret;
549}
550EXPORT_SYMBOL_GPL(ide_setup_pci_device);
551
552int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
553			  const struct ide_port_info *d)
554{
555	struct pci_dev *pdev[] = { dev1, dev2 };
556	int ret, i;
557	hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
558
559	for (i = 0; i < 2; i++) {
560		ret = ide_setup_pci_controller(pdev[i], d, !i);
561		if (ret < 0)
562			goto out;
563
564		ide_pci_setup_ports(pdev[i], d, 0, &hw[i*2], &hws[i*2]);
565
566		ret = do_ide_setup_pci_device(pdev[i], d, !i);
567
568		/*
569		 * FIXME: Mom, mom, they stole me the helper function to undo
570		 * do_ide_setup_pci_device() on the first device!
571		 */
572		if (ret < 0)
573			goto out;
574
575		/* fixup IRQ */
576		hw[i*2 + 1].irq = hw[i*2].irq = ret;
577	}
578
579	ret = ide_host_add(d, hws, NULL);
580out:
581	return ret;
582}
583EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
584