setup-pci.c revision 9ffcf364f9d0aca3ea79e9987c368eb75925460e
1/* 2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19 3 * 4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * 6 * Copyright (c) 1995-1998 Mark Lord 7 * May be copied or modified under the terms of the GNU General Public License 8 */ 9 10/* 11 * This module provides support for automatic detection and 12 * configuration of all PCI IDE interfaces present in a system. 13 */ 14 15#include <linux/module.h> 16#include <linux/types.h> 17#include <linux/kernel.h> 18#include <linux/pci.h> 19#include <linux/init.h> 20#include <linux/timer.h> 21#include <linux/mm.h> 22#include <linux/interrupt.h> 23#include <linux/ide.h> 24#include <linux/dma-mapping.h> 25 26#include <asm/io.h> 27#include <asm/irq.h> 28 29 30/** 31 * ide_match_hwif - match a PCI IDE against an ide_hwif 32 * @io_base: I/O base of device 33 * @bootable: set if its bootable 34 * @name: name of device 35 * 36 * Match a PCI IDE port against an entry in ide_hwifs[], 37 * based on io_base port if possible. Return the matching hwif, 38 * or a new hwif. If we find an error (clashing, out of devices, etc) 39 * return NULL 40 * 41 * FIXME: we need to handle mmio matches here too 42 */ 43 44static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name) 45{ 46 int h; 47 ide_hwif_t *hwif; 48 49 /* 50 * Look for a hwif with matching io_base specified using 51 * parameters to ide_setup(). 52 */ 53 for (h = 0; h < MAX_HWIFS; ++h) { 54 hwif = &ide_hwifs[h]; 55 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 56 if (hwif->chipset == ide_forced) 57 return hwif; /* a perfect match */ 58 } 59 } 60 /* 61 * Look for a hwif with matching io_base default value. 62 * If chipset is "ide_unknown", then claim that hwif slot. 63 * Otherwise, some other chipset has already claimed it.. :( 64 */ 65 for (h = 0; h < MAX_HWIFS; ++h) { 66 hwif = &ide_hwifs[h]; 67 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 68 if (hwif->chipset == ide_unknown) 69 return hwif; /* match */ 70 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n", 71 name, io_base, hwif->name); 72 return NULL; /* already claimed */ 73 } 74 } 75 /* 76 * Okay, there is no hwif matching our io_base, 77 * so we'll just claim an unassigned slot. 78 * Give preference to claiming other slots before claiming ide0/ide1, 79 * just in case there's another interface yet-to-be-scanned 80 * which uses ports 1f0/170 (the ide0/ide1 defaults). 81 * 82 * Unless there is a bootable card that does not use the standard 83 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag. 84 */ 85 if (bootable) { 86 for (h = 0; h < MAX_HWIFS; ++h) { 87 hwif = &ide_hwifs[h]; 88 if (hwif->chipset == ide_unknown) 89 return hwif; /* pick an unused entry */ 90 } 91 } else { 92 for (h = 2; h < MAX_HWIFS; ++h) { 93 hwif = ide_hwifs + h; 94 if (hwif->chipset == ide_unknown) 95 return hwif; /* pick an unused entry */ 96 } 97 } 98 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) { 99 hwif = ide_hwifs + h; 100 if (hwif->chipset == ide_unknown) 101 return hwif; /* pick an unused entry */ 102 } 103 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name); 104 return NULL; 105} 106 107/** 108 * ide_setup_pci_baseregs - place a PCI IDE controller native 109 * @dev: PCI device of interface to switch native 110 * @name: Name of interface 111 * 112 * We attempt to place the PCI interface into PCI native mode. If 113 * we succeed the BARs are ok and the controller is in PCI mode. 114 * Returns 0 on success or an errno code. 115 * 116 * FIXME: if we program the interface and then fail to set the BARS 117 * we don't switch it back to legacy mode. Do we actually care ?? 118 */ 119 120static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) 121{ 122 u8 progif = 0; 123 124 /* 125 * Place both IDE interfaces into PCI "native" mode: 126 */ 127 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 128 (progif & 5) != 5) { 129 if ((progif & 0xa) != 0xa) { 130 printk(KERN_INFO "%s: device not capable of full " 131 "native PCI mode\n", name); 132 return -EOPNOTSUPP; 133 } 134 printk("%s: placing both ports into native PCI mode\n", name); 135 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 136 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 137 (progif & 5) != 5) { 138 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " 139 "0x%04x, got 0x%04x\n", 140 name, progif|5, progif); 141 return -EOPNOTSUPP; 142 } 143 } 144 return 0; 145} 146 147#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 148/** 149 * ide_get_or_set_dma_base - setup BMIBA 150 * @d: IDE pci device data 151 * @hwif: Interface 152 * 153 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 154 * Where a device has a partner that is already in DMA mode we check 155 * and enforce IDE simplex rules. 156 */ 157 158static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hwif) 159{ 160 unsigned long dma_base = 0; 161 struct pci_dev *dev = hwif->pci_dev; 162 163 if (hwif->mmio) 164 return hwif->dma_base; 165 166 if (hwif->mate && hwif->mate->dma_base) { 167 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 168 } else { 169 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 170 171 dma_base = pci_resource_start(dev, baridx); 172 173 if (dma_base == 0) 174 printk(KERN_ERR "%s: DMA base is invalid\n", d->name); 175 } 176 177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) { 178 u8 simplex_stat = 0; 179 dma_base += hwif->channel ? 8 : 0; 180 181 switch(dev->device) { 182 case PCI_DEVICE_ID_AL_M5219: 183 case PCI_DEVICE_ID_AL_M5229: 184 case PCI_DEVICE_ID_AMD_VIPER_7409: 185 case PCI_DEVICE_ID_CMD_643: 186 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: 187 case PCI_DEVICE_ID_REVOLUTION: 188 simplex_stat = hwif->INB(dma_base + 2); 189 hwif->OUTB((simplex_stat&0x60),(dma_base + 2)); 190 simplex_stat = hwif->INB(dma_base + 2); 191 if (simplex_stat & 0x80) { 192 printk(KERN_INFO "%s: simplex device: " 193 "DMA forced\n", 194 d->name); 195 } 196 break; 197 default: 198 /* 199 * If the device claims "simplex" DMA, 200 * this means only one of the two interfaces 201 * can be trusted with DMA at any point in time. 202 * So we should enable DMA only on one of the 203 * two interfaces. 204 */ 205 simplex_stat = hwif->INB(dma_base + 2); 206 if (simplex_stat & 0x80) { 207 /* simplex device? */ 208/* 209 * At this point we haven't probed the drives so we can't make the 210 * appropriate decision. Really we should defer this problem 211 * until we tune the drive then try to grab DMA ownership if we want 212 * to be the DMA end. This has to be become dynamic to handle hot 213 * plug. 214 */ 215 if (hwif->mate && hwif->mate->dma_base) { 216 printk(KERN_INFO "%s: simplex device: " 217 "DMA disabled\n", 218 d->name); 219 dma_base = 0; 220 } 221 } 222 } 223 } 224 return dma_base; 225} 226#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 227 228void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d) 229{ 230 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n", 231 d->name, pci_name(dev)); 232} 233 234EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 235 236 237/** 238 * ide_pci_enable - do PCI enables 239 * @dev: PCI device 240 * @d: IDE pci device data 241 * 242 * Enable the IDE PCI device. We attempt to enable the device in full 243 * but if that fails then we only need BAR4 so we will enable that. 244 * 245 * Returns zero on success or an error code 246 */ 247 248static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d) 249{ 250 int ret; 251 252 if (pci_enable_device(dev)) { 253 ret = pci_enable_device_bars(dev, 1 << 4); 254 if (ret < 0) { 255 printk(KERN_WARNING "%s: (ide_setup_pci_device:) " 256 "Could not enable device.\n", d->name); 257 goto out; 258 } 259 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); 260 } 261 262 /* 263 * assume all devices can do 32-bit dma for now. we can add a 264 * dma mask field to the ide_pci_device_t if we need it (or let 265 * lower level driver set the dma mask) 266 */ 267 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); 268 if (ret < 0) { 269 printk(KERN_ERR "%s: can't set dma mask\n", d->name); 270 goto out; 271 } 272 273 /* FIXME: Temporary - until we put in the hotplug interface logic 274 Check that the bits we want are not in use by someone else. */ 275 ret = pci_request_region(dev, 4, "ide_tmp"); 276 if (ret < 0) 277 goto out; 278 279 pci_release_region(dev, 4); 280out: 281 return ret; 282} 283 284/** 285 * ide_pci_configure - configure an unconfigured device 286 * @dev: PCI device 287 * @d: IDE pci device data 288 * 289 * Enable and configure the PCI device we have been passed. 290 * Returns zero on success or an error code. 291 */ 292 293static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d) 294{ 295 u16 pcicmd = 0; 296 /* 297 * PnP BIOS was *supposed* to have setup this device, but we 298 * can do it ourselves, so long as the BIOS has assigned an IRQ 299 * (or possibly the device is using a "legacy header" for IRQs). 300 * Maybe the user deliberately *disabled* the device, 301 * but we'll eventually ignore it again if no drives respond. 302 */ 303 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO)) 304 { 305 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); 306 return -ENODEV; 307 } 308 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 309 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 310 return -EIO; 311 } 312 if (!(pcicmd & PCI_COMMAND_IO)) { 313 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); 314 return -ENXIO; 315 } 316 return 0; 317} 318 319/** 320 * ide_pci_check_iomem - check a register is I/O 321 * @dev: pci device 322 * @d: ide_pci_device 323 * @bar: bar number 324 * 325 * Checks if a BAR is configured and points to MMIO space. If so 326 * print an error and return an error code. Otherwise return 0 327 */ 328 329static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar) 330{ 331 ulong flags = pci_resource_flags(dev, bar); 332 333 /* Unconfigured ? */ 334 if (!flags || pci_resource_len(dev, bar) == 0) 335 return 0; 336 337 /* I/O space */ 338 if(flags & PCI_BASE_ADDRESS_IO_MASK) 339 return 0; 340 341 /* Bad */ 342 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported " 343 "as MEM, report to " 344 "<andre@linux-ide.org>.\n", d->name); 345 return -EINVAL; 346} 347 348/** 349 * ide_hwif_configure - configure an IDE interface 350 * @dev: PCI device holding interface 351 * @d: IDE pci data 352 * @mate: Paired interface if any 353 * 354 * Perform the initial set up for the hardware interface structure. This 355 * is done per interface port rather than per PCI device. There may be 356 * more than one port per device. 357 * 358 * Returns the new hardware interface structure, or NULL on a failure 359 */ 360 361static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq) 362{ 363 unsigned long ctl = 0, base = 0; 364 ide_hwif_t *hwif; 365 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; 366 367 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 368 /* Possibly we should fail if these checks report true */ 369 ide_pci_check_iomem(dev, d, 2*port); 370 ide_pci_check_iomem(dev, d, 2*port+1); 371 372 ctl = pci_resource_start(dev, 2*port+1); 373 base = pci_resource_start(dev, 2*port); 374 if ((ctl && !base) || (base && !ctl)) { 375 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) " 376 "for port %d, skipping\n", d->name, port); 377 return NULL; 378 } 379 } 380 if (!ctl) 381 { 382 /* Use default values */ 383 ctl = port ? 0x374 : 0x3f4; 384 base = port ? 0x170 : 0x1f0; 385 } 386 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) 387 return NULL; /* no room in ide_hwifs[] */ 388 if (hwif->io_ports[IDE_DATA_OFFSET] != base || 389 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { 390 memset(&hwif->hw, 0, sizeof(hwif->hw)); 391#ifndef IDE_ARCH_OBSOLETE_INIT 392 ide_std_init_ports(&hwif->hw, base, (ctl | 2)); 393 hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0; 394#else 395 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL); 396#endif 397 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports)); 398 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; 399 } 400 hwif->chipset = ide_pci; 401 hwif->pci_dev = dev; 402 hwif->cds = (struct ide_pci_device_s *) d; 403 hwif->channel = port; 404 405 if (!hwif->irq) 406 hwif->irq = irq; 407 if (mate) { 408 hwif->mate = mate; 409 mate->mate = hwif; 410 } 411 return hwif; 412} 413 414/** 415 * ide_hwif_setup_dma - configure DMA interface 416 * @dev: PCI device 417 * @d: IDE pci data 418 * @hwif: Hardware interface we are configuring 419 * 420 * Set up the DMA base for the interface. Enable the master bits as 421 * necessary and attempt to bring the device DMA into a ready to use 422 * state 423 */ 424 425#ifndef CONFIG_BLK_DEV_IDEDMA_PCI 426static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) 427{ 428} 429#else 430static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif) 431{ 432 u16 pcicmd; 433 434 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 435 436 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 437 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 438 (dev->class & 0x80))) { 439 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); 440 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { 441 /* 442 * Set up BM-DMA capability 443 * (PnP BIOS should have done this) 444 */ 445 pci_set_master(dev); 446 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { 447 printk(KERN_ERR "%s: %s error updating PCICMD\n", 448 hwif->name, d->name); 449 dma_base = 0; 450 } 451 } 452 if (dma_base) { 453 if (d->init_dma) { 454 d->init_dma(hwif, dma_base); 455 } else { 456 ide_setup_dma(hwif, dma_base, 8); 457 } 458 } else { 459 printk(KERN_INFO "%s: %s Bus-Master DMA disabled " 460 "(BIOS)\n", hwif->name, d->name); 461 } 462 } 463} 464#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/ 465 466/** 467 * ide_setup_pci_controller - set up IDE PCI 468 * @dev: PCI device 469 * @d: IDE PCI data 470 * @noisy: verbose flag 471 * @config: returned as 1 if we configured the hardware 472 * 473 * Set up the PCI and controller side of the IDE interface. This brings 474 * up the PCI side of the device, checks that the device is enabled 475 * and enables it if need be 476 */ 477 478static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config) 479{ 480 int ret; 481 u32 class_rev; 482 u16 pcicmd; 483 484 if (noisy) 485 ide_setup_pci_noise(dev, d); 486 487 ret = ide_pci_enable(dev, d); 488 if (ret < 0) 489 goto out; 490 491 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 492 if (ret < 0) { 493 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 494 goto out; 495 } 496 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 497 ret = ide_pci_configure(dev, d); 498 if (ret < 0) 499 goto out; 500 *config = 1; 501 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 502 } 503 504 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 505 class_rev &= 0xff; 506 if (noisy) 507 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev); 508out: 509 return ret; 510} 511 512/** 513 * ide_pci_setup_ports - configure ports/devices on PCI IDE 514 * @dev: PCI device 515 * @d: IDE pci device info 516 * @pciirq: IRQ line 517 * @index: ata index to update 518 * 519 * Scan the interfaces attached to this device and do any 520 * necessary per port setup. Attach the devices and ask the 521 * generic DMA layer to do its work for us. 522 * 523 * Normally called automaticall from do_ide_pci_setup_device, 524 * but is also used directly as a helper function by some controllers 525 * where the chipset setup is not the default PCI IDE one. 526 */ 527 528void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index) 529{ 530 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 531 int at_least_one_hwif_enabled = 0; 532 ide_hwif_t *hwif, *mate = NULL; 533 u8 tmp; 534 535 index->all = 0xf0f0; 536 537 /* 538 * Set up the IDE ports 539 */ 540 541 for (port = 0; port < channels; ++port) { 542 ide_pci_enablebit_t *e = &(d->enablebits[port]); 543 544 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 545 (tmp & e->mask) != e->val)) 546 continue; /* port not enabled */ 547 548 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) 549 continue; 550 551 /* setup proper ancestral information */ 552 hwif->gendev.parent = &dev->dev; 553 554 if (hwif->channel) { 555 index->b.high = hwif->index; 556 } else { 557 index->b.low = hwif->index; 558 } 559 560 561 if (d->init_iops) 562 d->init_iops(hwif); 563 564 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) 565 ide_hwif_setup_dma(dev, d, hwif); 566 567 hwif->host_flags = d->host_flags; 568 hwif->pio_mask = d->pio_mask; 569 570 if (d->init_hwif) 571 /* Call chipset-specific routine 572 * for each enabled hwif 573 */ 574 d->init_hwif(hwif); 575 576 mate = hwif; 577 at_least_one_hwif_enabled = 1; 578 } 579 if (!at_least_one_hwif_enabled) 580 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name); 581} 582 583EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 584 585/* 586 * ide_setup_pci_device() looks at the primary/secondary interfaces 587 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 588 * for use with them. This generic code works for most PCI chipsets. 589 * 590 * One thing that is not standardized is the location of the 591 * primary/secondary interface "enable/disable" bits. For chipsets that 592 * we "know" about, this information is in the ide_pci_device_t struct; 593 * for all other chipsets, we just assume both interfaces are enabled. 594 */ 595static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d, 596 ata_index_t *index, u8 noisy) 597{ 598 static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } }; 599 int tried_config = 0; 600 int pciirq, ret; 601 602 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); 603 if (ret < 0) 604 goto out; 605 606 /* 607 * Can we trust the reported IRQ? 608 */ 609 pciirq = dev->irq; 610 611 /* Is it an "IDE storage" device in non-PCI mode? */ 612 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { 613 if (noisy) 614 printk(KERN_INFO "%s: not 100%% native mode: " 615 "will probe irqs later\n", d->name); 616 /* 617 * This allows offboard ide-pci cards the enable a BIOS, 618 * verify interrupt settings of split-mirror pci-config 619 * space, place chipset into init-mode, and/or preserve 620 * an interrupt if the card is not native ide support. 621 */ 622 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; 623 if (ret < 0) 624 goto out; 625 pciirq = ret; 626 } else if (tried_config) { 627 if (noisy) 628 printk(KERN_INFO "%s: will probe irqs later\n", d->name); 629 pciirq = 0; 630 } else if (!pciirq) { 631 if (noisy) 632 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", 633 d->name, pciirq); 634 pciirq = 0; 635 } else { 636 if (d->init_chipset) { 637 ret = d->init_chipset(dev, d->name); 638 if (ret < 0) 639 goto out; 640 } 641 if (noisy) 642 printk(KERN_INFO "%s: 100%% native mode on irq %d\n", 643 d->name, pciirq); 644 } 645 646 /* FIXME: silent failure can happen */ 647 648 *index = ata_index; 649 ide_pci_setup_ports(dev, d, pciirq, index); 650out: 651 return ret; 652} 653 654int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d) 655{ 656 ide_hwif_t *hwif = NULL, *mate = NULL; 657 ata_index_t index_list; 658 int ret; 659 660 ret = do_ide_setup_pci_device(dev, d, &index_list, 1); 661 if (ret < 0) 662 goto out; 663 664 if ((index_list.b.low & 0xf0) != 0xf0) 665 hwif = &ide_hwifs[index_list.b.low]; 666 if ((index_list.b.high & 0xf0) != 0xf0) 667 mate = &ide_hwifs[index_list.b.high]; 668 669 if (hwif) 670 probe_hwif_init_with_fixup(hwif, d->fixup); 671 if (mate) 672 probe_hwif_init_with_fixup(mate, d->fixup); 673 674 if (hwif) 675 ide_proc_register_port(hwif); 676 if (mate) 677 ide_proc_register_port(mate); 678out: 679 return ret; 680} 681 682EXPORT_SYMBOL_GPL(ide_setup_pci_device); 683 684int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, 685 ide_pci_device_t *d) 686{ 687 struct pci_dev *pdev[] = { dev1, dev2 }; 688 ata_index_t index_list[2]; 689 int ret, i; 690 691 for (i = 0; i < 2; i++) { 692 ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i); 693 /* 694 * FIXME: Mom, mom, they stole me the helper function to undo 695 * do_ide_setup_pci_device() on the first device! 696 */ 697 if (ret < 0) 698 goto out; 699 } 700 701 for (i = 0; i < 2; i++) { 702 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high }; 703 int j; 704 705 for (j = 0; j < 2; j++) { 706 if ((idx[j] & 0xf0) != 0xf0) 707 probe_hwif_init(ide_hwifs + idx[j]); 708 } 709 } 710 711 for (i = 0; i < 2; i++) { 712 u8 idx[2] = { index_list[i].b.low, index_list[i].b.high }; 713 int j; 714 715 for (j = 0; j < 2; j++) { 716 if ((idx[j] & 0xf0) != 0xf0) 717 ide_proc_register_port(ide_hwifs + idx[j]); 718 } 719 } 720out: 721 return ret; 722} 723 724EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 725 726#ifdef CONFIG_IDEPCI_PCIBUS_ORDER 727/* 728 * Module interfaces 729 */ 730 731static int pre_init = 1; /* Before first ordered IDE scan */ 732static LIST_HEAD(ide_pci_drivers); 733 734/* 735 * __ide_pci_register_driver - attach IDE driver 736 * @driver: pci driver 737 * @module: owner module of the driver 738 * 739 * Registers a driver with the IDE layer. The IDE layer arranges that 740 * boot time setup is done in the expected device order and then 741 * hands the controllers off to the core PCI code to do the rest of 742 * the work. 743 * 744 * The driver_data of the driver table must point to an ide_pci_device_t 745 * describing the interface. 746 * 747 * Returns are the same as for pci_register_driver 748 */ 749 750int __ide_pci_register_driver(struct pci_driver *driver, struct module *module, 751 const char *mod_name) 752{ 753 if(!pre_init) 754 return __pci_register_driver(driver, module, mod_name); 755 driver->driver.owner = module; 756 list_add_tail(&driver->node, &ide_pci_drivers); 757 return 0; 758} 759 760EXPORT_SYMBOL_GPL(__ide_pci_register_driver); 761 762/** 763 * ide_scan_pcidev - find an IDE driver for a device 764 * @dev: PCI device to check 765 * 766 * Look for an IDE driver to handle the device we are considering. 767 * This is only used during boot up to get the ordering correct. After 768 * boot up the pci layer takes over the job. 769 */ 770 771static int __init ide_scan_pcidev(struct pci_dev *dev) 772{ 773 struct list_head *l; 774 struct pci_driver *d; 775 776 list_for_each(l, &ide_pci_drivers) { 777 d = list_entry(l, struct pci_driver, node); 778 if (d->id_table) { 779 const struct pci_device_id *id = pci_match_id(d->id_table, 780 dev); 781 if (id != NULL && d->probe(dev, id) >= 0) { 782 dev->driver = d; 783 pci_dev_get(dev); 784 return 1; 785 } 786 } 787 } 788 return 0; 789} 790 791/** 792 * ide_scan_pcibus - perform the initial IDE driver scan 793 * @scan_direction: set for reverse order scanning 794 * 795 * Perform the initial bus rather than driver ordered scan of the 796 * PCI drivers. After this all IDE pci handling becomes standard 797 * module ordering not traditionally ordered. 798 */ 799 800void __init ide_scan_pcibus (int scan_direction) 801{ 802 struct pci_dev *dev = NULL; 803 struct pci_driver *d; 804 struct list_head *l, *n; 805 806 pre_init = 0; 807 if (!scan_direction) 808 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) 809 ide_scan_pcidev(dev); 810 else 811 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev)) 812 != NULL) 813 ide_scan_pcidev(dev); 814 815 /* 816 * Hand the drivers over to the PCI layer now we 817 * are post init. 818 */ 819 820 list_for_each_safe(l, n, &ide_pci_drivers) { 821 list_del(l); 822 d = list_entry(l, struct pci_driver, node); 823 if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name)) 824 printk(KERN_ERR "%s: failed to register driver for %s\n", 825 __FUNCTION__, d->driver.mod_name); 826 } 827} 828#endif 829