setup-pci.c revision bf77c5317168eb73894bcc9a455429c4589a179d
1/* 2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 1995-1998 Mark Lord 4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz 5 * 6 * May be copied or modified under the terms of the GNU General Public License 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/kernel.h> 12#include <linux/pci.h> 13#include <linux/init.h> 14#include <linux/timer.h> 15#include <linux/mm.h> 16#include <linux/interrupt.h> 17#include <linux/ide.h> 18#include <linux/dma-mapping.h> 19 20#include <asm/io.h> 21#include <asm/irq.h> 22 23 24/** 25 * ide_match_hwif - match a PCI IDE against an ide_hwif 26 * @io_base: I/O base of device 27 * @bootable: set if its bootable 28 * @name: name of device 29 * 30 * Match a PCI IDE port against an entry in ide_hwifs[], 31 * based on io_base port if possible. Return the matching hwif, 32 * or a new hwif. If we find an error (clashing, out of devices, etc) 33 * return NULL 34 * 35 * FIXME: we need to handle mmio matches here too 36 */ 37 38static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name) 39{ 40 int h; 41 ide_hwif_t *hwif; 42 43 /* 44 * Look for a hwif with matching io_base specified using 45 * parameters to ide_setup(). 46 */ 47 for (h = 0; h < MAX_HWIFS; ++h) { 48 hwif = &ide_hwifs[h]; 49 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 50 if (hwif->chipset == ide_forced) 51 return hwif; /* a perfect match */ 52 } 53 } 54 /* 55 * Look for a hwif with matching io_base default value. 56 * If chipset is "ide_unknown", then claim that hwif slot. 57 * Otherwise, some other chipset has already claimed it.. :( 58 */ 59 for (h = 0; h < MAX_HWIFS; ++h) { 60 hwif = &ide_hwifs[h]; 61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) { 62 if (hwif->chipset == ide_unknown) 63 return hwif; /* match */ 64 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n", 65 name, io_base, hwif->name); 66 return NULL; /* already claimed */ 67 } 68 } 69 /* 70 * Okay, there is no hwif matching our io_base, 71 * so we'll just claim an unassigned slot. 72 * Give preference to claiming other slots before claiming ide0/ide1, 73 * just in case there's another interface yet-to-be-scanned 74 * which uses ports 1f0/170 (the ide0/ide1 defaults). 75 * 76 * Unless there is a bootable card that does not use the standard 77 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag. 78 */ 79 if (bootable) { 80 for (h = 0; h < MAX_HWIFS; ++h) { 81 hwif = &ide_hwifs[h]; 82 if (hwif->chipset == ide_unknown) 83 return hwif; /* pick an unused entry */ 84 } 85 } else { 86 for (h = 2; h < MAX_HWIFS; ++h) { 87 hwif = ide_hwifs + h; 88 if (hwif->chipset == ide_unknown) 89 return hwif; /* pick an unused entry */ 90 } 91 } 92 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) { 93 hwif = ide_hwifs + h; 94 if (hwif->chipset == ide_unknown) 95 return hwif; /* pick an unused entry */ 96 } 97 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name); 98 return NULL; 99} 100 101/** 102 * ide_setup_pci_baseregs - place a PCI IDE controller native 103 * @dev: PCI device of interface to switch native 104 * @name: Name of interface 105 * 106 * We attempt to place the PCI interface into PCI native mode. If 107 * we succeed the BARs are ok and the controller is in PCI mode. 108 * Returns 0 on success or an errno code. 109 * 110 * FIXME: if we program the interface and then fail to set the BARS 111 * we don't switch it back to legacy mode. Do we actually care ?? 112 */ 113 114static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name) 115{ 116 u8 progif = 0; 117 118 /* 119 * Place both IDE interfaces into PCI "native" mode: 120 */ 121 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 122 (progif & 5) != 5) { 123 if ((progif & 0xa) != 0xa) { 124 printk(KERN_INFO "%s: device not capable of full " 125 "native PCI mode\n", name); 126 return -EOPNOTSUPP; 127 } 128 printk("%s: placing both ports into native PCI mode\n", name); 129 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 130 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 131 (progif & 5) != 5) { 132 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " 133 "0x%04x, got 0x%04x\n", 134 name, progif|5, progif); 135 return -EOPNOTSUPP; 136 } 137 } 138 return 0; 139} 140 141#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 142static void ide_pci_clear_simplex(unsigned long dma_base, const char *name) 143{ 144 u8 dma_stat = inb(dma_base + 2); 145 146 outb(dma_stat & 0x60, dma_base + 2); 147 dma_stat = inb(dma_base + 2); 148 if (dma_stat & 0x80) 149 printk(KERN_INFO "%s: simplex device: DMA forced\n", name); 150} 151 152/** 153 * ide_get_or_set_dma_base - setup BMIBA 154 * @d: IDE port info 155 * @hwif: IDE interface 156 * 157 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 158 * Where a device has a partner that is already in DMA mode we check 159 * and enforce IDE simplex rules. 160 */ 161 162static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif) 163{ 164 struct pci_dev *dev = to_pci_dev(hwif->dev); 165 unsigned long dma_base = 0; 166 u8 dma_stat = 0; 167 168 if (hwif->mmio) 169 return hwif->dma_base; 170 171 if (hwif->mate && hwif->mate->dma_base) { 172 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 173 } else { 174 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 175 176 dma_base = pci_resource_start(dev, baridx); 177 178 if (dma_base == 0) { 179 printk(KERN_ERR "%s: DMA base is invalid\n", d->name); 180 return 0; 181 } 182 } 183 184 if (hwif->channel) 185 dma_base += 8; 186 187 if (d->host_flags & IDE_HFLAG_CS5520) 188 goto out; 189 190 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { 191 ide_pci_clear_simplex(dma_base, d->name); 192 goto out; 193 } 194 195 /* 196 * If the device claims "simplex" DMA, this means that only one of 197 * the two interfaces can be trusted with DMA at any point in time 198 * (so we should enable DMA only on one of the two interfaces). 199 * 200 * FIXME: At this point we haven't probed the drives so we can't make 201 * the appropriate decision. Really we should defer this problem until 202 * we tune the drive then try to grab DMA ownership if we want to be 203 * the DMA end. This has to be become dynamic to handle hot-plug. 204 */ 205 dma_stat = hwif->INB(dma_base + 2); 206 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { 207 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name); 208 dma_base = 0; 209 } 210out: 211 return dma_base; 212} 213#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 214 215void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) 216{ 217 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at " 218 " PCI slot %s\n", d->name, dev->vendor, dev->device, 219 dev->revision, pci_name(dev)); 220} 221 222EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 223 224 225/** 226 * ide_pci_enable - do PCI enables 227 * @dev: PCI device 228 * @d: IDE port info 229 * 230 * Enable the IDE PCI device. We attempt to enable the device in full 231 * but if that fails then we only need IO space. The PCI code should 232 * have setup the proper resources for us already for controllers in 233 * legacy mode. 234 * 235 * Returns zero on success or an error code 236 */ 237 238static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) 239{ 240 int ret; 241 242 if (pci_enable_device(dev)) { 243 ret = pci_enable_device_io(dev); 244 if (ret < 0) { 245 printk(KERN_WARNING "%s: (ide_setup_pci_device:) " 246 "Could not enable device.\n", d->name); 247 goto out; 248 } 249 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); 250 } 251 252 /* 253 * assume all devices can do 32-bit DMA for now, we can add 254 * a DMA mask field to the struct ide_port_info if we need it 255 * (or let lower level driver set the DMA mask) 256 */ 257 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); 258 if (ret < 0) { 259 printk(KERN_ERR "%s: can't set dma mask\n", d->name); 260 goto out; 261 } 262 263 /* FIXME: Temporary - until we put in the hotplug interface logic 264 Check that the bits we want are not in use by someone else. */ 265 ret = pci_request_region(dev, 4, "ide_tmp"); 266 if (ret < 0) 267 goto out; 268 269 pci_release_region(dev, 4); 270out: 271 return ret; 272} 273 274/** 275 * ide_pci_configure - configure an unconfigured device 276 * @dev: PCI device 277 * @d: IDE port info 278 * 279 * Enable and configure the PCI device we have been passed. 280 * Returns zero on success or an error code. 281 */ 282 283static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) 284{ 285 u16 pcicmd = 0; 286 /* 287 * PnP BIOS was *supposed* to have setup this device, but we 288 * can do it ourselves, so long as the BIOS has assigned an IRQ 289 * (or possibly the device is using a "legacy header" for IRQs). 290 * Maybe the user deliberately *disabled* the device, 291 * but we'll eventually ignore it again if no drives respond. 292 */ 293 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO)) 294 { 295 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); 296 return -ENODEV; 297 } 298 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 299 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 300 return -EIO; 301 } 302 if (!(pcicmd & PCI_COMMAND_IO)) { 303 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); 304 return -ENXIO; 305 } 306 return 0; 307} 308 309/** 310 * ide_pci_check_iomem - check a register is I/O 311 * @dev: PCI device 312 * @d: IDE port info 313 * @bar: BAR number 314 * 315 * Checks if a BAR is configured and points to MMIO space. If so 316 * print an error and return an error code. Otherwise return 0 317 */ 318 319static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar) 320{ 321 ulong flags = pci_resource_flags(dev, bar); 322 323 /* Unconfigured ? */ 324 if (!flags || pci_resource_len(dev, bar) == 0) 325 return 0; 326 327 /* I/O space */ 328 if(flags & PCI_BASE_ADDRESS_IO_MASK) 329 return 0; 330 331 /* Bad */ 332 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported " 333 "as MEM, report to " 334 "<andre@linux-ide.org>.\n", d->name); 335 return -EINVAL; 336} 337 338/** 339 * ide_hwif_configure - configure an IDE interface 340 * @dev: PCI device holding interface 341 * @d: IDE port info 342 * @mate: Paired interface if any 343 * 344 * Perform the initial set up for the hardware interface structure. This 345 * is done per interface port rather than per PCI device. There may be 346 * more than one port per device. 347 * 348 * Returns the new hardware interface structure, or NULL on a failure 349 */ 350 351static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq) 352{ 353 unsigned long ctl = 0, base = 0; 354 ide_hwif_t *hwif; 355 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; 356 u8 oldnoprobe = 0; 357 struct hw_regs_s hw; 358 359 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 360 /* Possibly we should fail if these checks report true */ 361 ide_pci_check_iomem(dev, d, 2*port); 362 ide_pci_check_iomem(dev, d, 2*port+1); 363 364 ctl = pci_resource_start(dev, 2*port+1); 365 base = pci_resource_start(dev, 2*port); 366 if ((ctl && !base) || (base && !ctl)) { 367 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) " 368 "for port %d, skipping\n", d->name, port); 369 return NULL; 370 } 371 } 372 if (!ctl) 373 { 374 /* Use default values */ 375 ctl = port ? 0x374 : 0x3f4; 376 base = port ? 0x170 : 0x1f0; 377 } 378 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) 379 return NULL; /* no room in ide_hwifs[] */ 380 381 memset(&hw, 0, sizeof(hw)); 382 hw.irq = hwif->irq ? hwif->irq : irq; 383 hw.dev = &dev->dev; 384 hw.chipset = d->chipset ? d->chipset : ide_pci; 385 ide_std_init_ports(&hw, base, ctl | 2); 386 387 if (hwif->io_ports[IDE_DATA_OFFSET] == base && 388 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2)) 389 oldnoprobe = hwif->noprobe; 390 391 ide_init_port_hw(hwif, &hw); 392 393 hwif->noprobe = oldnoprobe; 394 395 hwif->dev = &dev->dev; 396 hwif->cds = d; 397 hwif->channel = port; 398 399 if (mate) { 400 hwif->mate = mate; 401 mate->mate = hwif; 402 } 403 return hwif; 404} 405 406/** 407 * ide_hwif_setup_dma - configure DMA interface 408 * @dev: PCI device 409 * @d: IDE port info 410 * @hwif: IDE interface 411 * 412 * Set up the DMA base for the interface. Enable the master bits as 413 * necessary and attempt to bring the device DMA into a ready to use 414 * state 415 */ 416 417static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif) 418{ 419#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 420 u16 pcicmd; 421 422 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 423 424 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 425 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 426 (dev->class & 0x80))) { 427 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif); 428 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) { 429 /* 430 * Set up BM-DMA capability 431 * (PnP BIOS should have done this) 432 */ 433 pci_set_master(dev); 434 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) { 435 printk(KERN_ERR "%s: %s error updating PCICMD\n", 436 hwif->name, d->name); 437 dma_base = 0; 438 } 439 } 440 if (dma_base) { 441 if (d->init_dma) { 442 d->init_dma(hwif, dma_base); 443 } else { 444 ide_setup_dma(hwif, dma_base); 445 } 446 } else { 447 printk(KERN_INFO "%s: %s Bus-Master DMA disabled " 448 "(BIOS)\n", hwif->name, d->name); 449 } 450 } 451#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/ 452} 453 454/** 455 * ide_setup_pci_controller - set up IDE PCI 456 * @dev: PCI device 457 * @d: IDE port info 458 * @noisy: verbose flag 459 * @config: returned as 1 if we configured the hardware 460 * 461 * Set up the PCI and controller side of the IDE interface. This brings 462 * up the PCI side of the device, checks that the device is enabled 463 * and enables it if need be 464 */ 465 466static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config) 467{ 468 int ret; 469 u16 pcicmd; 470 471 if (noisy) 472 ide_setup_pci_noise(dev, d); 473 474 ret = ide_pci_enable(dev, d); 475 if (ret < 0) 476 goto out; 477 478 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 479 if (ret < 0) { 480 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 481 goto out; 482 } 483 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 484 ret = ide_pci_configure(dev, d); 485 if (ret < 0) 486 goto out; 487 *config = 1; 488 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 489 } 490 491out: 492 return ret; 493} 494 495/** 496 * ide_pci_setup_ports - configure ports/devices on PCI IDE 497 * @dev: PCI device 498 * @d: IDE port info 499 * @pciirq: IRQ line 500 * @idx: ATA index table to update 501 * 502 * Scan the interfaces attached to this device and do any 503 * necessary per port setup. Attach the devices and ask the 504 * generic DMA layer to do its work for us. 505 * 506 * Normally called automaticall from do_ide_pci_setup_device, 507 * but is also used directly as a helper function by some controllers 508 * where the chipset setup is not the default PCI IDE one. 509 */ 510 511void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx) 512{ 513 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 514 ide_hwif_t *hwif, *mate = NULL; 515 u8 tmp; 516 517 /* 518 * Set up the IDE ports 519 */ 520 521 for (port = 0; port < channels; ++port) { 522 const ide_pci_enablebit_t *e = &(d->enablebits[port]); 523 524 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 525 (tmp & e->mask) != e->val)) { 526 printk(KERN_INFO "%s: IDE port disabled\n", d->name); 527 continue; /* port not enabled */ 528 } 529 530 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) 531 continue; 532 533 *(idx + port) = hwif->index; 534 535 if (d->init_iops) 536 d->init_iops(hwif); 537 538 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) 539 ide_hwif_setup_dma(dev, d, hwif); 540 541 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) || 542 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS)) 543 hwif->irq = port ? 15 : 14; 544 545 hwif->host_flags = d->host_flags; 546 hwif->pio_mask = d->pio_mask; 547 548 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate) 549 hwif->mate->serialized = hwif->serialized = 1; 550 551 if (d->host_flags & IDE_HFLAG_IO_32BIT) { 552 hwif->drives[0].io_32bit = 1; 553 hwif->drives[1].io_32bit = 1; 554 } 555 556 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) { 557 hwif->drives[0].unmask = 1; 558 hwif->drives[1].unmask = 1; 559 } 560 561 hwif->swdma_mask = d->swdma_mask; 562 hwif->mwdma_mask = d->mwdma_mask; 563 hwif->ultra_mask = d->udma_mask; 564 565 if ((d->host_flags && IDE_HFLAG_NO_DMA) == 0 && 566 hwif->dma_base == 0) { 567 hwif->swdma_mask = 0; 568 hwif->mwdma_mask = 0; 569 hwif->ultra_mask = 0; 570 } 571 572 hwif->drives[0].autotune = 1; 573 hwif->drives[1].autotune = 1; 574 575 if (d->host_flags & IDE_HFLAG_RQSIZE_256) 576 hwif->rqsize = 256; 577 578 if (d->init_hwif) 579 /* Call chipset-specific routine 580 * for each enabled hwif 581 */ 582 d->init_hwif(hwif); 583 584 mate = hwif; 585 } 586} 587 588EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 589 590/* 591 * ide_setup_pci_device() looks at the primary/secondary interfaces 592 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 593 * for use with them. This generic code works for most PCI chipsets. 594 * 595 * One thing that is not standardized is the location of the 596 * primary/secondary interface "enable/disable" bits. For chipsets that 597 * we "know" about, this information is in the struct ide_port_info; 598 * for all other chipsets, we just assume both interfaces are enabled. 599 */ 600static int do_ide_setup_pci_device(struct pci_dev *dev, 601 const struct ide_port_info *d, 602 u8 *idx, u8 noisy) 603{ 604 int tried_config = 0; 605 int pciirq, ret; 606 607 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); 608 if (ret < 0) 609 goto out; 610 611 /* 612 * Can we trust the reported IRQ? 613 */ 614 pciirq = dev->irq; 615 616 /* Is it an "IDE storage" device in non-PCI mode? */ 617 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { 618 if (noisy) 619 printk(KERN_INFO "%s: not 100%% native mode: " 620 "will probe irqs later\n", d->name); 621 /* 622 * This allows offboard ide-pci cards the enable a BIOS, 623 * verify interrupt settings of split-mirror pci-config 624 * space, place chipset into init-mode, and/or preserve 625 * an interrupt if the card is not native ide support. 626 */ 627 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; 628 if (ret < 0) 629 goto out; 630 pciirq = ret; 631 } else if (tried_config) { 632 if (noisy) 633 printk(KERN_INFO "%s: will probe irqs later\n", d->name); 634 pciirq = 0; 635 } else if (!pciirq) { 636 if (noisy) 637 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", 638 d->name, pciirq); 639 pciirq = 0; 640 } else { 641 if (d->init_chipset) { 642 ret = d->init_chipset(dev, d->name); 643 if (ret < 0) 644 goto out; 645 } 646 if (noisy) 647 printk(KERN_INFO "%s: 100%% native mode on irq %d\n", 648 d->name, pciirq); 649 } 650 651 /* FIXME: silent failure can happen */ 652 653 ide_pci_setup_ports(dev, d, pciirq, idx); 654out: 655 return ret; 656} 657 658int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d) 659{ 660 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 661 int ret; 662 663 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1); 664 665 if (ret >= 0) 666 ide_device_add(idx); 667 668 return ret; 669} 670 671EXPORT_SYMBOL_GPL(ide_setup_pci_device); 672 673int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, 674 const struct ide_port_info *d) 675{ 676 struct pci_dev *pdev[] = { dev1, dev2 }; 677 int ret, i; 678 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 679 680 for (i = 0; i < 2; i++) { 681 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i); 682 /* 683 * FIXME: Mom, mom, they stole me the helper function to undo 684 * do_ide_setup_pci_device() on the first device! 685 */ 686 if (ret < 0) 687 goto out; 688 } 689 690 ide_device_add(idx); 691out: 692 return ret; 693} 694 695EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 696