setup-pci.c revision c97c6aca75fd5f718056fde7cff798b8cbdb07c0
1/* 2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 3 * Copyright (C) 1995-1998 Mark Lord 4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz 5 * 6 * May be copied or modified under the terms of the GNU General Public License 7 */ 8 9#include <linux/types.h> 10#include <linux/kernel.h> 11#include <linux/pci.h> 12#include <linux/init.h> 13#include <linux/interrupt.h> 14#include <linux/ide.h> 15#include <linux/dma-mapping.h> 16 17#include <asm/io.h> 18 19/** 20 * ide_setup_pci_baseregs - place a PCI IDE controller native 21 * @dev: PCI device of interface to switch native 22 * @name: Name of interface 23 * 24 * We attempt to place the PCI interface into PCI native mode. If 25 * we succeed the BARs are ok and the controller is in PCI mode. 26 * Returns 0 on success or an errno code. 27 * 28 * FIXME: if we program the interface and then fail to set the BARS 29 * we don't switch it back to legacy mode. Do we actually care ?? 30 */ 31 32static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name) 33{ 34 u8 progif = 0; 35 36 /* 37 * Place both IDE interfaces into PCI "native" mode: 38 */ 39 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 40 (progif & 5) != 5) { 41 if ((progif & 0xa) != 0xa) { 42 printk(KERN_INFO "%s: device not capable of full " 43 "native PCI mode\n", name); 44 return -EOPNOTSUPP; 45 } 46 printk("%s: placing both ports into native PCI mode\n", name); 47 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); 48 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || 49 (progif & 5) != 5) { 50 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted " 51 "0x%04x, got 0x%04x\n", 52 name, progif|5, progif); 53 return -EOPNOTSUPP; 54 } 55 } 56 return 0; 57} 58 59#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 60static void ide_pci_clear_simplex(unsigned long dma_base, const char *name) 61{ 62 u8 dma_stat = inb(dma_base + 2); 63 64 outb(dma_stat & 0x60, dma_base + 2); 65 dma_stat = inb(dma_base + 2); 66 if (dma_stat & 0x80) 67 printk(KERN_INFO "%s: simplex device: DMA forced\n", name); 68} 69 70/** 71 * ide_pci_dma_base - setup BMIBA 72 * @hwif: IDE interface 73 * @d: IDE port info 74 * 75 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space. 76 * Where a device has a partner that is already in DMA mode we check 77 * and enforce IDE simplex rules. 78 */ 79 80unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d) 81{ 82 struct pci_dev *dev = to_pci_dev(hwif->dev); 83 unsigned long dma_base = 0; 84 u8 dma_stat = 0; 85 86 if (hwif->host_flags & IDE_HFLAG_MMIO) 87 return hwif->dma_base; 88 89 if (hwif->mate && hwif->mate->dma_base) { 90 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); 91 } else { 92 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4; 93 94 dma_base = pci_resource_start(dev, baridx); 95 96 if (dma_base == 0) { 97 printk(KERN_ERR "%s: DMA base is invalid\n", d->name); 98 return 0; 99 } 100 } 101 102 if (hwif->channel) 103 dma_base += 8; 104 105 if (d->host_flags & IDE_HFLAG_CS5520) 106 goto out; 107 108 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) { 109 ide_pci_clear_simplex(dma_base, d->name); 110 goto out; 111 } 112 113 /* 114 * If the device claims "simplex" DMA, this means that only one of 115 * the two interfaces can be trusted with DMA at any point in time 116 * (so we should enable DMA only on one of the two interfaces). 117 * 118 * FIXME: At this point we haven't probed the drives so we can't make 119 * the appropriate decision. Really we should defer this problem until 120 * we tune the drive then try to grab DMA ownership if we want to be 121 * the DMA end. This has to be become dynamic to handle hot-plug. 122 */ 123 dma_stat = hwif->INB(dma_base + 2); 124 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { 125 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name); 126 dma_base = 0; 127 } 128out: 129 return dma_base; 130} 131EXPORT_SYMBOL_GPL(ide_pci_dma_base); 132 133/* 134 * Set up BM-DMA capability (PnP BIOS should have done this) 135 */ 136int ide_pci_set_master(struct pci_dev *dev, const char *name) 137{ 138 u16 pcicmd; 139 140 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 141 142 if ((pcicmd & PCI_COMMAND_MASTER) == 0) { 143 pci_set_master(dev); 144 145 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || 146 (pcicmd & PCI_COMMAND_MASTER) == 0) { 147 printk(KERN_ERR "%s: error updating PCICMD on %s\n", 148 name, pci_name(dev)); 149 return -EIO; 150 } 151 } 152 153 return 0; 154} 155EXPORT_SYMBOL_GPL(ide_pci_set_master); 156#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 157 158void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d) 159{ 160 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at " 161 " PCI slot %s\n", d->name, dev->vendor, dev->device, 162 dev->revision, pci_name(dev)); 163} 164EXPORT_SYMBOL_GPL(ide_setup_pci_noise); 165 166 167/** 168 * ide_pci_enable - do PCI enables 169 * @dev: PCI device 170 * @d: IDE port info 171 * 172 * Enable the IDE PCI device. We attempt to enable the device in full 173 * but if that fails then we only need IO space. The PCI code should 174 * have setup the proper resources for us already for controllers in 175 * legacy mode. 176 * 177 * Returns zero on success or an error code 178 */ 179 180static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d) 181{ 182 int ret, bars; 183 184 if (pci_enable_device(dev)) { 185 ret = pci_enable_device_io(dev); 186 if (ret < 0) { 187 printk(KERN_WARNING "%s: (ide_setup_pci_device:) " 188 "Could not enable device.\n", d->name); 189 goto out; 190 } 191 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name); 192 } 193 194 /* 195 * assume all devices can do 32-bit DMA for now, we can add 196 * a DMA mask field to the struct ide_port_info if we need it 197 * (or let lower level driver set the DMA mask) 198 */ 199 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK); 200 if (ret < 0) { 201 printk(KERN_ERR "%s: can't set dma mask\n", d->name); 202 goto out; 203 } 204 205 if (d->host_flags & IDE_HFLAG_SINGLE) 206 bars = (1 << 2) - 1; 207 else 208 bars = (1 << 4) - 1; 209 210 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) { 211 if (d->host_flags & IDE_HFLAG_CS5520) 212 bars |= (1 << 2); 213 else 214 bars |= (1 << 4); 215 } 216 217 ret = pci_request_selected_regions(dev, bars, d->name); 218 if (ret < 0) 219 printk(KERN_ERR "%s: can't reserve resources\n", d->name); 220out: 221 return ret; 222} 223 224/** 225 * ide_pci_configure - configure an unconfigured device 226 * @dev: PCI device 227 * @d: IDE port info 228 * 229 * Enable and configure the PCI device we have been passed. 230 * Returns zero on success or an error code. 231 */ 232 233static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d) 234{ 235 u16 pcicmd = 0; 236 /* 237 * PnP BIOS was *supposed* to have setup this device, but we 238 * can do it ourselves, so long as the BIOS has assigned an IRQ 239 * (or possibly the device is using a "legacy header" for IRQs). 240 * Maybe the user deliberately *disabled* the device, 241 * but we'll eventually ignore it again if no drives respond. 242 */ 243 if (ide_setup_pci_baseregs(dev, d->name) || 244 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) { 245 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name); 246 return -ENODEV; 247 } 248 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) { 249 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 250 return -EIO; 251 } 252 if (!(pcicmd & PCI_COMMAND_IO)) { 253 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name); 254 return -ENXIO; 255 } 256 return 0; 257} 258 259/** 260 * ide_pci_check_iomem - check a register is I/O 261 * @dev: PCI device 262 * @d: IDE port info 263 * @bar: BAR number 264 * 265 * Checks if a BAR is configured and points to MMIO space. If so, 266 * return an error code. Otherwise return 0 267 */ 268 269static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, 270 int bar) 271{ 272 ulong flags = pci_resource_flags(dev, bar); 273 274 /* Unconfigured ? */ 275 if (!flags || pci_resource_len(dev, bar) == 0) 276 return 0; 277 278 /* I/O space */ 279 if (flags & IORESOURCE_IO) 280 return 0; 281 282 /* Bad */ 283 return -EINVAL; 284} 285 286/** 287 * ide_hwif_configure - configure an IDE interface 288 * @dev: PCI device holding interface 289 * @d: IDE port info 290 * @port: port number 291 * @irq: PCI IRQ 292 * @hw: hw_regs_t instance corresponding to this port 293 * 294 * Perform the initial set up for the hardware interface structure. This 295 * is done per interface port rather than per PCI device. There may be 296 * more than one port per device. 297 * 298 * Returns the new hardware interface structure, or NULL on a failure 299 */ 300 301static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, 302 const struct ide_port_info *d, 303 unsigned int port, int irq, 304 hw_regs_t *hw) 305{ 306 unsigned long ctl = 0, base = 0; 307 ide_hwif_t *hwif; 308 309 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 310 if (ide_pci_check_iomem(dev, d, 2 * port) || 311 ide_pci_check_iomem(dev, d, 2 * port + 1)) { 312 printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported " 313 "as MEM for port %d!\n", d->name, port); 314 return NULL; 315 } 316 317 ctl = pci_resource_start(dev, 2*port+1); 318 base = pci_resource_start(dev, 2*port); 319 } else { 320 /* Use default values */ 321 ctl = port ? 0x374 : 0x3f4; 322 base = port ? 0x170 : 0x1f0; 323 } 324 325 if (!base || !ctl) { 326 printk(KERN_ERR "%s: bad PCI BARs for port %d, skipping\n", 327 d->name, port); 328 return NULL; 329 } 330 331 memset(hw, 0, sizeof(*hw)); 332 hw->irq = irq; 333 hw->dev = &dev->dev; 334 hw->chipset = d->chipset ? d->chipset : ide_pci; 335 ide_std_init_ports(hw, base, ctl | 2); 336 337 hwif = ide_find_port_slot(d); 338 if (hwif == NULL) 339 return NULL; 340 341 hwif->chipset = hw->chipset; 342 343 return hwif; 344} 345 346#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 347/** 348 * ide_hwif_setup_dma - configure DMA interface 349 * @hwif: IDE interface 350 * @d: IDE port info 351 * 352 * Set up the DMA base for the interface. Enable the master bits as 353 * necessary and attempt to bring the device DMA into a ready to use 354 * state 355 */ 356 357int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d) 358{ 359 struct pci_dev *dev = to_pci_dev(hwif->dev); 360 361 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 || 362 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 363 (dev->class & 0x80))) { 364 unsigned long base = ide_pci_dma_base(hwif, d); 365 366 if (base == 0 || ide_pci_set_master(dev, d->name) < 0) 367 return -1; 368 369 if (hwif->host_flags & IDE_HFLAG_MMIO) 370 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); 371 else 372 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 373 hwif->name, base, base + 7); 374 375 hwif->extra_base = base + (hwif->channel ? 8 : 16); 376 377 if (ide_allocate_dma_engine(hwif)) 378 return -1; 379 380 ide_setup_dma(hwif, base); 381 } 382 383 return 0; 384} 385#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 386 387/** 388 * ide_setup_pci_controller - set up IDE PCI 389 * @dev: PCI device 390 * @d: IDE port info 391 * @noisy: verbose flag 392 * @config: returned as 1 if we configured the hardware 393 * 394 * Set up the PCI and controller side of the IDE interface. This brings 395 * up the PCI side of the device, checks that the device is enabled 396 * and enables it if need be 397 */ 398 399static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config) 400{ 401 int ret; 402 u16 pcicmd; 403 404 if (noisy) 405 ide_setup_pci_noise(dev, d); 406 407 ret = ide_pci_enable(dev, d); 408 if (ret < 0) 409 goto out; 410 411 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 412 if (ret < 0) { 413 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name); 414 goto out; 415 } 416 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */ 417 ret = ide_pci_configure(dev, d); 418 if (ret < 0) 419 goto out; 420 *config = 1; 421 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name); 422 } 423 424out: 425 return ret; 426} 427 428/** 429 * ide_pci_setup_ports - configure ports/devices on PCI IDE 430 * @dev: PCI device 431 * @d: IDE port info 432 * @pciirq: IRQ line 433 * @idx: ATA index table to update 434 * @hw: hw_regs_t instances corresponding to this PCI IDE device 435 * @hws: hw_regs_t pointers table to update 436 * 437 * Scan the interfaces attached to this device and do any 438 * necessary per port setup. Attach the devices and ask the 439 * generic DMA layer to do its work for us. 440 * 441 * Normally called automaticall from do_ide_pci_setup_device, 442 * but is also used directly as a helper function by some controllers 443 * where the chipset setup is not the default PCI IDE one. 444 */ 445 446void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, 447 int pciirq, u8 *idx, hw_regs_t *hw, hw_regs_t **hws) 448{ 449 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port; 450 ide_hwif_t *hwif; 451 u8 tmp; 452 453 /* 454 * Set up the IDE ports 455 */ 456 457 for (port = 0; port < channels; ++port) { 458 const ide_pci_enablebit_t *e = &(d->enablebits[port]); 459 460 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) || 461 (tmp & e->mask) != e->val)) { 462 printk(KERN_INFO "%s: IDE port disabled\n", d->name); 463 continue; /* port not enabled */ 464 } 465 466 hwif = ide_hwif_configure(dev, d, port, pciirq, hw + port); 467 if (hwif == NULL) 468 continue; 469 470 *(hws + port) = hw + port; 471 *(idx + port) = hwif->index; 472 } 473} 474EXPORT_SYMBOL_GPL(ide_pci_setup_ports); 475 476/* 477 * ide_setup_pci_device() looks at the primary/secondary interfaces 478 * on a PCI IDE device and, if they are enabled, prepares the IDE driver 479 * for use with them. This generic code works for most PCI chipsets. 480 * 481 * One thing that is not standardized is the location of the 482 * primary/secondary interface "enable/disable" bits. For chipsets that 483 * we "know" about, this information is in the struct ide_port_info; 484 * for all other chipsets, we just assume both interfaces are enabled. 485 */ 486static int do_ide_setup_pci_device(struct pci_dev *dev, 487 const struct ide_port_info *d, 488 u8 noisy) 489{ 490 int tried_config = 0; 491 int pciirq, ret; 492 493 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config); 494 if (ret < 0) 495 goto out; 496 497 /* 498 * Can we trust the reported IRQ? 499 */ 500 pciirq = dev->irq; 501 502 /* Is it an "IDE storage" device in non-PCI mode? */ 503 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) { 504 if (noisy) 505 printk(KERN_INFO "%s: not 100%% native mode: " 506 "will probe irqs later\n", d->name); 507 /* 508 * This allows offboard ide-pci cards the enable a BIOS, 509 * verify interrupt settings of split-mirror pci-config 510 * space, place chipset into init-mode, and/or preserve 511 * an interrupt if the card is not native ide support. 512 */ 513 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0; 514 if (ret < 0) 515 goto out; 516 pciirq = ret; 517 } else if (tried_config) { 518 if (noisy) 519 printk(KERN_INFO "%s: will probe irqs later\n", d->name); 520 pciirq = 0; 521 } else if (!pciirq) { 522 if (noisy) 523 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n", 524 d->name, pciirq); 525 pciirq = 0; 526 } else { 527 if (d->init_chipset) { 528 ret = d->init_chipset(dev, d->name); 529 if (ret < 0) 530 goto out; 531 } 532 if (noisy) 533 printk(KERN_INFO "%s: 100%% native mode on irq %d\n", 534 d->name, pciirq); 535 } 536 537 ret = pciirq; 538out: 539 return ret; 540} 541 542int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d) 543{ 544 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 545 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 546 int ret; 547 548 ret = do_ide_setup_pci_device(dev, d, 1); 549 550 if (ret >= 0) { 551 /* FIXME: silent failure can happen */ 552 ide_pci_setup_ports(dev, d, ret, &idx[0], &hw[0], &hws[0]); 553 554 ide_device_add(idx, d, hws); 555 } 556 557 return ret; 558} 559EXPORT_SYMBOL_GPL(ide_setup_pci_device); 560 561int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2, 562 const struct ide_port_info *d) 563{ 564 struct pci_dev *pdev[] = { dev1, dev2 }; 565 int ret, i; 566 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 567 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 568 569 for (i = 0; i < 2; i++) { 570 ret = do_ide_setup_pci_device(pdev[i], d, !i); 571 572 /* 573 * FIXME: Mom, mom, they stole me the helper function to undo 574 * do_ide_setup_pci_device() on the first device! 575 */ 576 if (ret < 0) 577 goto out; 578 579 /* FIXME: silent failure can happen */ 580 ide_pci_setup_ports(pdev[i], d, ret, &idx[i*2], &hw[i*2], 581 &hws[i*2]); 582 } 583 584 ide_device_add(idx, d, hws); 585out: 586 return ret; 587} 588EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 589