sl82c105.c revision fe31edc8a3b6081f3580c9ae4c5c61103f3412a5 
1/*
2 * SL82C105/Winbond 553 IDE driver
3 *
4 * Maintainer unknown.
5 *
6 * Drive tuning added from Rebel.com's kernel sources
7 *  -- Russell King (15/11/98) linux@arm.linux.org.uk
8 *
9 * Merge in Russell's HW workarounds, fix various problems
10 * with the timing registers setup.
11 *  -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
12 *
13 * Copyright (C) 2006-2007,2009 MontaVista Software, Inc. <source@mvista.com>
14 * Copyright (C)      2007 Bartlomiej Zolnierkiewicz
15 */
16
17#include <linux/types.h>
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/pci.h>
21#include <linux/ide.h>
22
23#include <asm/io.h>
24
25#define DRV_NAME "sl82c105"
26
27/*
28 * SL82C105 PCI config register 0x40 bits.
29 */
30#define CTRL_IDE_IRQB   (1 << 30)
31#define CTRL_IDE_IRQA   (1 << 28)
32#define CTRL_LEGIRQ     (1 << 11)
33#define CTRL_P1F16      (1 << 5)
34#define CTRL_P1EN       (1 << 4)
35#define CTRL_P0F16      (1 << 1)
36#define CTRL_P0EN       (1 << 0)
37
38/*
39 * Convert a PIO mode and cycle time to the required on/off times
40 * for the interface.  This has protection against runaway timings.
41 */
42static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
43{
44	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
45	unsigned int cmd_on, cmd_off;
46	u8 iordy = 0;
47
48	cmd_on  = (t->active + 29) / 30;
49	cmd_off = (ide_pio_cycle_time(drive, pio) - 30 * cmd_on + 29) / 30;
50
51	if (cmd_on == 0)
52		cmd_on = 1;
53
54	if (cmd_off == 0)
55		cmd_off = 1;
56
57	if (ide_pio_need_iordy(drive, pio))
58		iordy = 0x40;
59
60	return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;
61}
62
63/*
64 * Configure the chipset for PIO mode.
65 */
66static void sl82c105_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
67{
68	struct pci_dev *dev	= to_pci_dev(hwif->dev);
69	unsigned long timings	= (unsigned long)ide_get_drivedata(drive);
70	int reg			= 0x44 + drive->dn * 4;
71	u16 drv_ctrl;
72	const u8 pio		= drive->pio_mode - XFER_PIO_0;
73
74	drv_ctrl = get_pio_timings(drive, pio);
75
76	/*
77	 * Store the PIO timings so that we can restore them
78	 * in case DMA will be turned off...
79	 */
80	timings &= 0xffff0000;
81	timings |= drv_ctrl;
82	ide_set_drivedata(drive, (void *)timings);
83
84	pci_write_config_word(dev, reg,  drv_ctrl);
85	pci_read_config_word (dev, reg, &drv_ctrl);
86
87	printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
88			  ide_xfer_verbose(pio + XFER_PIO_0),
89			  ide_pio_cycle_time(drive, pio), drv_ctrl);
90}
91
92/*
93 * Configure the chipset for DMA mode.
94 */
95static void sl82c105_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
96{
97	static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
98	unsigned long timings = (unsigned long)ide_get_drivedata(drive);
99	u16 drv_ctrl;
100	const u8 speed = drive->dma_mode;
101
102	drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
103
104	/*
105	 * Store the DMA timings so that we can actually program
106	 * them when DMA will be turned on...
107	 */
108	timings &= 0x0000ffff;
109	timings |= (unsigned long)drv_ctrl << 16;
110	ide_set_drivedata(drive, (void *)timings);
111}
112
113static int sl82c105_test_irq(ide_hwif_t *hwif)
114{
115	struct pci_dev *dev	= to_pci_dev(hwif->dev);
116	u32 val, mask		= hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
117
118	pci_read_config_dword(dev, 0x40, &val);
119
120	return (val & mask) ? 1 : 0;
121}
122
123/*
124 * The SL82C105 holds off all IDE interrupts while in DMA mode until
125 * all DMA activity is completed.  Sometimes this causes problems (eg,
126 * when the drive wants to report an error condition).
127 *
128 * 0x7e is a "chip testing" register.  Bit 2 resets the DMA controller
129 * state machine.  We need to kick this to work around various bugs.
130 */
131static inline void sl82c105_reset_host(struct pci_dev *dev)
132{
133	u16 val;
134
135	pci_read_config_word(dev, 0x7e, &val);
136	pci_write_config_word(dev, 0x7e, val | (1 << 2));
137	pci_write_config_word(dev, 0x7e, val & ~(1 << 2));
138}
139
140/*
141 * If we get an IRQ timeout, it might be that the DMA state machine
142 * got confused.  Fix from Todd Inglett.  Details from Winbond.
143 *
144 * This function is called when the IDE timer expires, the drive
145 * indicates that it is READY, and we were waiting for DMA to complete.
146 */
147static void sl82c105_dma_lost_irq(ide_drive_t *drive)
148{
149	ide_hwif_t *hwif	= drive->hwif;
150	struct pci_dev *dev	= to_pci_dev(hwif->dev);
151	u32 val, mask		= hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
152	u8 dma_cmd;
153
154	printk(KERN_WARNING "sl82c105: lost IRQ, resetting host\n");
155
156	/*
157	 * Check the raw interrupt from the drive.
158	 */
159	pci_read_config_dword(dev, 0x40, &val);
160	if (val & mask)
161		printk(KERN_INFO "sl82c105: drive was requesting IRQ, "
162		       "but host lost it\n");
163
164	/*
165	 * Was DMA enabled?  If so, disable it - we're resetting the
166	 * host.  The IDE layer will be handling the drive for us.
167	 */
168	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
169	if (dma_cmd & 1) {
170		outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
171		printk(KERN_INFO "sl82c105: DMA was enabled\n");
172	}
173
174	sl82c105_reset_host(dev);
175}
176
177/*
178 * ATAPI devices can cause the SL82C105 DMA state machine to go gaga.
179 * Winbond recommend that the DMA state machine is reset prior to
180 * setting the bus master DMA enable bit.
181 *
182 * The generic IDE core will have disabled the BMEN bit before this
183 * function is called.
184 */
185static void sl82c105_dma_start(ide_drive_t *drive)
186{
187	ide_hwif_t *hwif	= drive->hwif;
188	struct pci_dev *dev	= to_pci_dev(hwif->dev);
189	int reg 		= 0x44 + drive->dn * 4;
190
191	pci_write_config_word(dev, reg,
192			      (unsigned long)ide_get_drivedata(drive) >> 16);
193
194	sl82c105_reset_host(dev);
195	ide_dma_start(drive);
196}
197
198static void sl82c105_dma_clear(ide_drive_t *drive)
199{
200	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
201
202	sl82c105_reset_host(dev);
203}
204
205static int sl82c105_dma_end(ide_drive_t *drive)
206{
207	struct pci_dev *dev	= to_pci_dev(drive->hwif->dev);
208	int reg 		= 0x44 + drive->dn * 4;
209	int ret			= ide_dma_end(drive);
210
211	pci_write_config_word(dev, reg,
212			      (unsigned long)ide_get_drivedata(drive));
213
214	return ret;
215}
216
217/*
218 * ATA reset will clear the 16 bits mode in the control
219 * register, we need to reprogram it
220 */
221static void sl82c105_resetproc(ide_drive_t *drive)
222{
223	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
224	u32 val;
225
226	pci_read_config_dword(dev, 0x40, &val);
227	val |= (CTRL_P1F16 | CTRL_P0F16);
228	pci_write_config_dword(dev, 0x40, val);
229}
230
231/*
232 * Return the revision of the Winbond bridge
233 * which this function is part of.
234 */
235static u8 sl82c105_bridge_revision(struct pci_dev *dev)
236{
237	struct pci_dev *bridge;
238
239	/*
240	 * The bridge should be part of the same device, but function 0.
241	 */
242	bridge = pci_get_bus_and_slot(dev->bus->number,
243			       PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
244	if (!bridge)
245		return -1;
246
247	/*
248	 * Make sure it is a Winbond 553 and is an ISA bridge.
249	 */
250	if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
251	    bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
252	    bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
253	    	pci_dev_put(bridge);
254		return -1;
255	}
256	/*
257	 * We need to find function 0's revision, not function 1
258	 */
259	pci_dev_put(bridge);
260
261	return bridge->revision;
262}
263
264/*
265 * Enable the PCI device
266 *
267 * --BenH: It's arch fixup code that should enable channels that
268 * have not been enabled by firmware. I decided we can still enable
269 * channel 0 here at least, but channel 1 has to be enabled by
270 * firmware or arch code. We still set both to 16 bits mode.
271 */
272static int init_chipset_sl82c105(struct pci_dev *dev)
273{
274	u32 val;
275
276	pci_read_config_dword(dev, 0x40, &val);
277	val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
278	pci_write_config_dword(dev, 0x40, val);
279
280	return 0;
281}
282
283static const struct ide_port_ops sl82c105_port_ops = {
284	.set_pio_mode		= sl82c105_set_pio_mode,
285	.set_dma_mode		= sl82c105_set_dma_mode,
286	.resetproc		= sl82c105_resetproc,
287	.test_irq		= sl82c105_test_irq,
288};
289
290static const struct ide_dma_ops sl82c105_dma_ops = {
291	.dma_host_set		= ide_dma_host_set,
292	.dma_setup		= ide_dma_setup,
293	.dma_start		= sl82c105_dma_start,
294	.dma_end		= sl82c105_dma_end,
295	.dma_test_irq		= ide_dma_test_irq,
296	.dma_lost_irq		= sl82c105_dma_lost_irq,
297	.dma_timer_expiry	= ide_dma_sff_timer_expiry,
298	.dma_clear		= sl82c105_dma_clear,
299	.dma_sff_read_status	= ide_dma_sff_read_status,
300};
301
302static const struct ide_port_info sl82c105_chipset = {
303	.name		= DRV_NAME,
304	.init_chipset	= init_chipset_sl82c105,
305	.enablebits	= {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
306	.port_ops	= &sl82c105_port_ops,
307	.dma_ops	= &sl82c105_dma_ops,
308	.host_flags	= IDE_HFLAG_IO_32BIT |
309			  IDE_HFLAG_UNMASK_IRQS |
310			  IDE_HFLAG_SERIALIZE_DMA |
311			  IDE_HFLAG_NO_AUTODMA,
312	.pio_mask	= ATA_PIO5,
313	.mwdma_mask	= ATA_MWDMA2,
314};
315
316static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
317{
318	struct ide_port_info d = sl82c105_chipset;
319	u8 rev = sl82c105_bridge_revision(dev);
320
321	if (rev <= 5) {
322		/*
323		 * Never ever EVER under any circumstances enable
324		 * DMA when the bridge is this old.
325		 */
326		printk(KERN_INFO DRV_NAME ": Winbond W83C553 bridge "
327				 "revision %d, BM-DMA disabled\n", rev);
328		d.dma_ops = NULL;
329		d.mwdma_mask = 0;
330		d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA;
331	}
332
333	return ide_pci_init_one(dev, &d, NULL);
334}
335
336static const struct pci_device_id sl82c105_pci_tbl[] = {
337	{ PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0 },
338	{ 0, },
339};
340MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl);
341
342static struct pci_driver sl82c105_pci_driver = {
343	.name		= "W82C105_IDE",
344	.id_table	= sl82c105_pci_tbl,
345	.probe		= sl82c105_init_one,
346	.remove		= ide_pci_remove,
347	.suspend	= ide_pci_suspend,
348	.resume		= ide_pci_resume,
349};
350
351static int __init sl82c105_ide_init(void)
352{
353	return ide_pci_register_driver(&sl82c105_pci_driver);
354}
355
356static void __exit sl82c105_ide_exit(void)
357{
358	pci_unregister_driver(&sl82c105_pci_driver);
359}
360
361module_init(sl82c105_ide_init);
362module_exit(sl82c105_ide_exit);
363
364MODULE_DESCRIPTION("PCI driver module for W82C105 IDE");
365MODULE_LICENSE("GPL");
366