kxcjk-1013.c revision ca801795b17b13a105b5209cf451abac3a6529ff
1/* 2 * KXCJK-1013 3-axis accelerometer driver 3 * Copyright (c) 2014, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15#include <linux/module.h> 16#include <linux/i2c.h> 17#include <linux/interrupt.h> 18#include <linux/delay.h> 19#include <linux/bitops.h> 20#include <linux/slab.h> 21#include <linux/string.h> 22#include <linux/acpi.h> 23#include <linux/gpio/consumer.h> 24#include <linux/pm.h> 25#include <linux/pm_runtime.h> 26#include <linux/iio/iio.h> 27#include <linux/iio/sysfs.h> 28#include <linux/iio/buffer.h> 29#include <linux/iio/trigger.h> 30#include <linux/iio/events.h> 31#include <linux/iio/trigger_consumer.h> 32#include <linux/iio/triggered_buffer.h> 33#include <linux/iio/accel/kxcjk_1013.h> 34 35#define KXCJK1013_DRV_NAME "kxcjk1013" 36#define KXCJK1013_IRQ_NAME "kxcjk1013_event" 37 38#define KXCJK1013_REG_XOUT_L 0x06 39/* 40 * From low byte X axis register, all the other addresses of Y and Z can be 41 * obtained by just applying axis offset. The following axis defines are just 42 * provide clarity, but not used. 43 */ 44#define KXCJK1013_REG_XOUT_H 0x07 45#define KXCJK1013_REG_YOUT_L 0x08 46#define KXCJK1013_REG_YOUT_H 0x09 47#define KXCJK1013_REG_ZOUT_L 0x0A 48#define KXCJK1013_REG_ZOUT_H 0x0B 49 50#define KXCJK1013_REG_DCST_RESP 0x0C 51#define KXCJK1013_REG_WHO_AM_I 0x0F 52#define KXCJK1013_REG_INT_SRC1 0x16 53#define KXCJK1013_REG_INT_SRC2 0x17 54#define KXCJK1013_REG_STATUS_REG 0x18 55#define KXCJK1013_REG_INT_REL 0x1A 56#define KXCJK1013_REG_CTRL1 0x1B 57#define KXCJK1013_REG_CTRL2 0x1D 58#define KXCJK1013_REG_INT_CTRL1 0x1E 59#define KXCJK1013_REG_INT_CTRL2 0x1F 60#define KXCJK1013_REG_DATA_CTRL 0x21 61#define KXCJK1013_REG_WAKE_TIMER 0x29 62#define KXCJK1013_REG_SELF_TEST 0x3A 63#define KXCJK1013_REG_WAKE_THRES 0x6A 64 65#define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 66#define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 67#define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 68#define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 69#define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 70#define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 71#define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4) 72#define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5) 73 74#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 75#define KXCJK1013_MAX_STARTUP_TIME_US 100000 76 77#define KXCJK1013_SLEEP_DELAY_MS 2000 78 79#define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 80#define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 81#define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 82#define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 83#define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 84#define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 85 86#define KXCJK1013_DEFAULT_WAKE_THRES 1 87 88struct kxcjk1013_data { 89 struct i2c_client *client; 90 struct iio_trigger *dready_trig; 91 struct iio_trigger *motion_trig; 92 struct mutex mutex; 93 s16 buffer[8]; 94 u8 odr_bits; 95 u8 range; 96 int wake_thres; 97 int wake_dur; 98 bool active_high_intr; 99 bool dready_trigger_on; 100 int ev_enable_state; 101 bool motion_trigger_on; 102 int64_t timestamp; 103}; 104 105enum kxcjk1013_axis { 106 AXIS_X, 107 AXIS_Y, 108 AXIS_Z, 109}; 110 111enum kxcjk1013_mode { 112 STANDBY, 113 OPERATION, 114}; 115 116enum kxcjk1013_range { 117 KXCJK1013_RANGE_2G, 118 KXCJK1013_RANGE_4G, 119 KXCJK1013_RANGE_8G, 120}; 121 122static const struct { 123 int val; 124 int val2; 125 int odr_bits; 126} samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09}, 127 {3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0}, 128 {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03}, 129 {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06}, 130 {1600, 0, 0x07} }; 131 132/* Refer to section 4 of the specification */ 133static const struct { 134 int odr_bits; 135 int usec; 136} odr_start_up_times[] = { {0x08, 100000}, {0x09, 100000}, {0x0A, 100000}, 137 {0x0B, 100000}, { 0, 80000}, {0x01, 41000}, 138 {0x02, 21000}, {0x03, 11000}, {0x04, 6400}, 139 {0x05, 3900}, {0x06, 2700}, {0x07, 2100} }; 140 141static const struct { 142 u16 scale; 143 u8 gsel_0; 144 u8 gsel_1; 145} KXCJK1013_scale_table[] = { {9582, 0, 0}, 146 {19163, 1, 0}, 147 {38326, 0, 1} }; 148 149static const struct { 150 int val; 151 int val2; 152 int odr_bits; 153} wake_odr_data_rate_table[] = { {0, 781000, 0x00}, 154 {1, 563000, 0x01}, 155 {3, 125000, 0x02}, 156 {6, 250000, 0x03}, 157 {12, 500000, 0x04}, 158 {25, 0, 0x05}, 159 {50, 0, 0x06}, 160 {100, 0, 0x06}, 161 {200, 0, 0x06}, 162 {400, 0, 0x06}, 163 {800, 0, 0x06}, 164 {1600, 0, 0x06} }; 165 166static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 167 enum kxcjk1013_mode mode) 168{ 169 int ret; 170 171 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 172 if (ret < 0) { 173 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 174 return ret; 175 } 176 177 if (mode == STANDBY) 178 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 179 else 180 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 181 182 ret = i2c_smbus_write_byte_data(data->client, 183 KXCJK1013_REG_CTRL1, ret); 184 if (ret < 0) { 185 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 186 return ret; 187 } 188 189 return 0; 190} 191 192static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 193 enum kxcjk1013_mode *mode) 194{ 195 int ret; 196 197 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 198 if (ret < 0) { 199 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 200 return ret; 201 } 202 203 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 204 *mode = OPERATION; 205 else 206 *mode = STANDBY; 207 208 return 0; 209} 210 211static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 212{ 213 int ret; 214 215 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 216 if (ret < 0) { 217 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 218 return ret; 219 } 220 221 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 222 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 223 224 ret = i2c_smbus_write_byte_data(data->client, 225 KXCJK1013_REG_CTRL1, 226 ret); 227 if (ret < 0) { 228 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 229 return ret; 230 } 231 232 data->range = range_index; 233 234 return 0; 235} 236 237static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 238{ 239 int ret; 240 241 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 242 if (ret < 0) { 243 dev_err(&data->client->dev, "Error reading who_am_i\n"); 244 return ret; 245 } 246 247 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 248 249 ret = kxcjk1013_set_mode(data, STANDBY); 250 if (ret < 0) 251 return ret; 252 253 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 254 if (ret < 0) { 255 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 256 return ret; 257 } 258 259 /* Set 12 bit mode */ 260 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 261 262 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1, 263 ret); 264 if (ret < 0) { 265 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 266 return ret; 267 } 268 269 /* Setting range to 4G */ 270 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 271 if (ret < 0) 272 return ret; 273 274 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 275 if (ret < 0) { 276 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 277 return ret; 278 } 279 280 data->odr_bits = ret; 281 282 /* Set up INT polarity */ 283 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 284 if (ret < 0) { 285 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 286 return ret; 287 } 288 289 if (data->active_high_intr) 290 ret |= KXCJK1013_REG_INT_REG1_BIT_IEA; 291 else 292 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA; 293 294 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 295 ret); 296 if (ret < 0) { 297 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 298 return ret; 299 } 300 301 ret = kxcjk1013_set_mode(data, OPERATION); 302 if (ret < 0) 303 return ret; 304 305 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 306 307 return 0; 308} 309 310static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 311{ 312 int i; 313 314 for (i = 0; i < ARRAY_SIZE(odr_start_up_times); ++i) { 315 if (odr_start_up_times[i].odr_bits == data->odr_bits) 316 return odr_start_up_times[i].usec; 317 } 318 319 return KXCJK1013_MAX_STARTUP_TIME_US; 320} 321 322static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 323{ 324 int ret; 325 326 if (on) 327 ret = pm_runtime_get_sync(&data->client->dev); 328 else { 329 pm_runtime_mark_last_busy(&data->client->dev); 330 ret = pm_runtime_put_autosuspend(&data->client->dev); 331 } 332 if (ret < 0) { 333 dev_err(&data->client->dev, 334 "Failed: kxcjk1013_set_power_state for %d\n", on); 335 return ret; 336 } 337 338 return 0; 339} 340 341static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 342{ 343 int ret; 344 345 ret = i2c_smbus_write_byte_data(data->client, 346 KXCJK1013_REG_WAKE_TIMER, 347 data->wake_dur); 348 if (ret < 0) { 349 dev_err(&data->client->dev, 350 "Error writing reg_wake_timer\n"); 351 return ret; 352 } 353 354 ret = i2c_smbus_write_byte_data(data->client, 355 KXCJK1013_REG_WAKE_THRES, 356 data->wake_thres); 357 if (ret < 0) { 358 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 359 return ret; 360 } 361 362 return 0; 363} 364 365static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 366 bool status) 367{ 368 int ret; 369 enum kxcjk1013_mode store_mode; 370 371 ret = kxcjk1013_get_mode(data, &store_mode); 372 if (ret < 0) 373 return ret; 374 375 /* This is requirement by spec to change state to STANDBY */ 376 ret = kxcjk1013_set_mode(data, STANDBY); 377 if (ret < 0) 378 return ret; 379 380 ret = kxcjk1013_chip_update_thresholds(data); 381 if (ret < 0) 382 return ret; 383 384 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 385 if (ret < 0) { 386 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 387 return ret; 388 } 389 390 if (status) 391 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; 392 else 393 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; 394 395 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 396 ret); 397 if (ret < 0) { 398 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 399 return ret; 400 } 401 402 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 403 if (ret < 0) { 404 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 405 return ret; 406 } 407 408 if (status) 409 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 410 else 411 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 412 413 ret = i2c_smbus_write_byte_data(data->client, 414 KXCJK1013_REG_CTRL1, ret); 415 if (ret < 0) { 416 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 417 return ret; 418 } 419 420 if (store_mode == OPERATION) { 421 ret = kxcjk1013_set_mode(data, OPERATION); 422 if (ret < 0) 423 return ret; 424 } 425 426 return 0; 427} 428 429static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 430 bool status) 431{ 432 int ret; 433 enum kxcjk1013_mode store_mode; 434 435 ret = kxcjk1013_get_mode(data, &store_mode); 436 if (ret < 0) 437 return ret; 438 439 /* This is requirement by spec to change state to STANDBY */ 440 ret = kxcjk1013_set_mode(data, STANDBY); 441 if (ret < 0) 442 return ret; 443 444 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 445 if (ret < 0) { 446 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 447 return ret; 448 } 449 450 if (status) 451 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; 452 else 453 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; 454 455 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 456 ret); 457 if (ret < 0) { 458 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 459 return ret; 460 } 461 462 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 463 if (ret < 0) { 464 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 465 return ret; 466 } 467 468 if (status) 469 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 470 else 471 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 472 473 ret = i2c_smbus_write_byte_data(data->client, 474 KXCJK1013_REG_CTRL1, ret); 475 if (ret < 0) { 476 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 477 return ret; 478 } 479 480 if (store_mode == OPERATION) { 481 ret = kxcjk1013_set_mode(data, OPERATION); 482 if (ret < 0) 483 return ret; 484 } 485 486 return 0; 487} 488 489static int kxcjk1013_convert_freq_to_bit(int val, int val2) 490{ 491 int i; 492 493 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { 494 if (samp_freq_table[i].val == val && 495 samp_freq_table[i].val2 == val2) { 496 return samp_freq_table[i].odr_bits; 497 } 498 } 499 500 return -EINVAL; 501} 502 503static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2) 504{ 505 int i; 506 507 for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) { 508 if (wake_odr_data_rate_table[i].val == val && 509 wake_odr_data_rate_table[i].val2 == val2) { 510 return wake_odr_data_rate_table[i].odr_bits; 511 } 512 } 513 514 return -EINVAL; 515} 516 517static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 518{ 519 int ret; 520 int odr_bits; 521 enum kxcjk1013_mode store_mode; 522 523 ret = kxcjk1013_get_mode(data, &store_mode); 524 if (ret < 0) 525 return ret; 526 527 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2); 528 if (odr_bits < 0) 529 return odr_bits; 530 531 /* To change ODR, the chip must be set to STANDBY as per spec */ 532 ret = kxcjk1013_set_mode(data, STANDBY); 533 if (ret < 0) 534 return ret; 535 536 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL, 537 odr_bits); 538 if (ret < 0) { 539 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 540 return ret; 541 } 542 543 data->odr_bits = odr_bits; 544 545 odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2); 546 if (odr_bits < 0) 547 return odr_bits; 548 549 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2, 550 odr_bits); 551 if (ret < 0) { 552 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 553 return ret; 554 } 555 556 if (store_mode == OPERATION) { 557 ret = kxcjk1013_set_mode(data, OPERATION); 558 if (ret < 0) 559 return ret; 560 } 561 562 return 0; 563} 564 565static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 566{ 567 int i; 568 569 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { 570 if (samp_freq_table[i].odr_bits == data->odr_bits) { 571 *val = samp_freq_table[i].val; 572 *val2 = samp_freq_table[i].val2; 573 return IIO_VAL_INT_PLUS_MICRO; 574 } 575 } 576 577 return -EINVAL; 578} 579 580static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 581{ 582 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 583 int ret; 584 585 ret = i2c_smbus_read_word_data(data->client, reg); 586 if (ret < 0) { 587 dev_err(&data->client->dev, 588 "failed to read accel_%c registers\n", 'x' + axis); 589 return ret; 590 } 591 592 return ret; 593} 594 595static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 596{ 597 int ret, i; 598 enum kxcjk1013_mode store_mode; 599 600 601 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 602 if (KXCJK1013_scale_table[i].scale == val) { 603 604 ret = kxcjk1013_get_mode(data, &store_mode); 605 if (ret < 0) 606 return ret; 607 608 ret = kxcjk1013_set_mode(data, STANDBY); 609 if (ret < 0) 610 return ret; 611 612 ret = kxcjk1013_set_range(data, i); 613 if (ret < 0) 614 return ret; 615 616 if (store_mode == OPERATION) { 617 ret = kxcjk1013_set_mode(data, OPERATION); 618 if (ret) 619 return ret; 620 } 621 622 return 0; 623 } 624 } 625 626 return -EINVAL; 627} 628 629static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 630 struct iio_chan_spec const *chan, int *val, 631 int *val2, long mask) 632{ 633 struct kxcjk1013_data *data = iio_priv(indio_dev); 634 int ret; 635 636 switch (mask) { 637 case IIO_CHAN_INFO_RAW: 638 mutex_lock(&data->mutex); 639 if (iio_buffer_enabled(indio_dev)) 640 ret = -EBUSY; 641 else { 642 ret = kxcjk1013_set_power_state(data, true); 643 if (ret < 0) { 644 mutex_unlock(&data->mutex); 645 return ret; 646 } 647 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 648 if (ret < 0) { 649 kxcjk1013_set_power_state(data, false); 650 mutex_unlock(&data->mutex); 651 return ret; 652 } 653 *val = sign_extend32(ret >> 4, 11); 654 ret = kxcjk1013_set_power_state(data, false); 655 } 656 mutex_unlock(&data->mutex); 657 658 if (ret < 0) 659 return ret; 660 661 return IIO_VAL_INT; 662 663 case IIO_CHAN_INFO_SCALE: 664 *val = 0; 665 *val2 = KXCJK1013_scale_table[data->range].scale; 666 return IIO_VAL_INT_PLUS_MICRO; 667 668 case IIO_CHAN_INFO_SAMP_FREQ: 669 mutex_lock(&data->mutex); 670 ret = kxcjk1013_get_odr(data, val, val2); 671 mutex_unlock(&data->mutex); 672 return ret; 673 674 default: 675 return -EINVAL; 676 } 677} 678 679static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 680 struct iio_chan_spec const *chan, int val, 681 int val2, long mask) 682{ 683 struct kxcjk1013_data *data = iio_priv(indio_dev); 684 int ret; 685 686 switch (mask) { 687 case IIO_CHAN_INFO_SAMP_FREQ: 688 mutex_lock(&data->mutex); 689 ret = kxcjk1013_set_odr(data, val, val2); 690 mutex_unlock(&data->mutex); 691 break; 692 case IIO_CHAN_INFO_SCALE: 693 if (val) 694 return -EINVAL; 695 696 mutex_lock(&data->mutex); 697 ret = kxcjk1013_set_scale(data, val2); 698 mutex_unlock(&data->mutex); 699 break; 700 default: 701 ret = -EINVAL; 702 } 703 704 return ret; 705} 706 707static int kxcjk1013_read_event(struct iio_dev *indio_dev, 708 const struct iio_chan_spec *chan, 709 enum iio_event_type type, 710 enum iio_event_direction dir, 711 enum iio_event_info info, 712 int *val, int *val2) 713{ 714 struct kxcjk1013_data *data = iio_priv(indio_dev); 715 716 *val2 = 0; 717 switch (info) { 718 case IIO_EV_INFO_VALUE: 719 *val = data->wake_thres; 720 break; 721 case IIO_EV_INFO_PERIOD: 722 *val = data->wake_dur; 723 break; 724 default: 725 return -EINVAL; 726 } 727 728 return IIO_VAL_INT; 729} 730 731static int kxcjk1013_write_event(struct iio_dev *indio_dev, 732 const struct iio_chan_spec *chan, 733 enum iio_event_type type, 734 enum iio_event_direction dir, 735 enum iio_event_info info, 736 int val, int val2) 737{ 738 struct kxcjk1013_data *data = iio_priv(indio_dev); 739 740 if (data->ev_enable_state) 741 return -EBUSY; 742 743 switch (info) { 744 case IIO_EV_INFO_VALUE: 745 data->wake_thres = val; 746 break; 747 case IIO_EV_INFO_PERIOD: 748 data->wake_dur = val; 749 break; 750 default: 751 return -EINVAL; 752 } 753 754 return 0; 755} 756 757static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 758 const struct iio_chan_spec *chan, 759 enum iio_event_type type, 760 enum iio_event_direction dir) 761{ 762 763 struct kxcjk1013_data *data = iio_priv(indio_dev); 764 765 return data->ev_enable_state; 766} 767 768static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 769 const struct iio_chan_spec *chan, 770 enum iio_event_type type, 771 enum iio_event_direction dir, 772 int state) 773{ 774 struct kxcjk1013_data *data = iio_priv(indio_dev); 775 int ret; 776 777 if (state && data->ev_enable_state) 778 return 0; 779 780 mutex_lock(&data->mutex); 781 782 if (!state && data->motion_trigger_on) { 783 data->ev_enable_state = 0; 784 mutex_unlock(&data->mutex); 785 return 0; 786 } 787 788 /* 789 * We will expect the enable and disable to do operation in 790 * in reverse order. This will happen here anyway as our 791 * resume operation uses sync mode runtime pm calls, the 792 * suspend operation will be delayed by autosuspend delay 793 * So the disable operation will still happen in reverse of 794 * enable operation. When runtime pm is disabled the mode 795 * is always on so sequence doesn't matter 796 */ 797 ret = kxcjk1013_set_power_state(data, state); 798 if (ret < 0) { 799 mutex_unlock(&data->mutex); 800 return ret; 801 } 802 803 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 804 if (ret < 0) { 805 mutex_unlock(&data->mutex); 806 return ret; 807 } 808 809 data->ev_enable_state = state; 810 mutex_unlock(&data->mutex); 811 812 return 0; 813} 814 815static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev, 816 struct iio_trigger *trig) 817{ 818 struct kxcjk1013_data *data = iio_priv(indio_dev); 819 820 if (data->dready_trig != trig && data->motion_trig != trig) 821 return -EINVAL; 822 823 return 0; 824} 825 826static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 827 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"); 828 829static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 830 831static struct attribute *kxcjk1013_attributes[] = { 832 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 833 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 834 NULL, 835}; 836 837static const struct attribute_group kxcjk1013_attrs_group = { 838 .attrs = kxcjk1013_attributes, 839}; 840 841static const struct iio_event_spec kxcjk1013_event = { 842 .type = IIO_EV_TYPE_THRESH, 843 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING, 844 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 845 BIT(IIO_EV_INFO_ENABLE) | 846 BIT(IIO_EV_INFO_PERIOD) 847}; 848 849#define KXCJK1013_CHANNEL(_axis) { \ 850 .type = IIO_ACCEL, \ 851 .modified = 1, \ 852 .channel2 = IIO_MOD_##_axis, \ 853 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 854 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 855 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 856 .scan_index = AXIS_##_axis, \ 857 .scan_type = { \ 858 .sign = 's', \ 859 .realbits = 12, \ 860 .storagebits = 16, \ 861 .shift = 4, \ 862 .endianness = IIO_CPU, \ 863 }, \ 864 .event_spec = &kxcjk1013_event, \ 865 .num_event_specs = 1 \ 866} 867 868static const struct iio_chan_spec kxcjk1013_channels[] = { 869 KXCJK1013_CHANNEL(X), 870 KXCJK1013_CHANNEL(Y), 871 KXCJK1013_CHANNEL(Z), 872 IIO_CHAN_SOFT_TIMESTAMP(3), 873}; 874 875static const struct iio_info kxcjk1013_info = { 876 .attrs = &kxcjk1013_attrs_group, 877 .read_raw = kxcjk1013_read_raw, 878 .write_raw = kxcjk1013_write_raw, 879 .read_event_value = kxcjk1013_read_event, 880 .write_event_value = kxcjk1013_write_event, 881 .write_event_config = kxcjk1013_write_event_config, 882 .read_event_config = kxcjk1013_read_event_config, 883 .validate_trigger = kxcjk1013_validate_trigger, 884 .driver_module = THIS_MODULE, 885}; 886 887static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 888{ 889 struct iio_poll_func *pf = p; 890 struct iio_dev *indio_dev = pf->indio_dev; 891 struct kxcjk1013_data *data = iio_priv(indio_dev); 892 int bit, ret, i = 0; 893 894 mutex_lock(&data->mutex); 895 896 for_each_set_bit(bit, indio_dev->buffer->scan_mask, 897 indio_dev->masklength) { 898 ret = kxcjk1013_get_acc_reg(data, bit); 899 if (ret < 0) { 900 mutex_unlock(&data->mutex); 901 goto err; 902 } 903 data->buffer[i++] = ret; 904 } 905 mutex_unlock(&data->mutex); 906 907 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 908 data->timestamp); 909err: 910 iio_trigger_notify_done(indio_dev->trig); 911 912 return IRQ_HANDLED; 913} 914 915static int kxcjk1013_trig_try_reen(struct iio_trigger *trig) 916{ 917 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 918 struct kxcjk1013_data *data = iio_priv(indio_dev); 919 int ret; 920 921 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 922 if (ret < 0) { 923 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 924 return ret; 925 } 926 927 return 0; 928} 929 930static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 931 bool state) 932{ 933 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 934 struct kxcjk1013_data *data = iio_priv(indio_dev); 935 int ret; 936 937 mutex_lock(&data->mutex); 938 939 if (!state && data->ev_enable_state && data->motion_trigger_on) { 940 data->motion_trigger_on = false; 941 mutex_unlock(&data->mutex); 942 return 0; 943 } 944 945 ret = kxcjk1013_set_power_state(data, state); 946 if (ret < 0) { 947 mutex_unlock(&data->mutex); 948 return ret; 949 } 950 if (data->motion_trig == trig) 951 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 952 else 953 ret = kxcjk1013_setup_new_data_interrupt(data, state); 954 if (ret < 0) { 955 mutex_unlock(&data->mutex); 956 return ret; 957 } 958 if (data->motion_trig == trig) 959 data->motion_trigger_on = state; 960 else 961 data->dready_trigger_on = state; 962 963 mutex_unlock(&data->mutex); 964 965 return 0; 966} 967 968static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 969 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 970 .try_reenable = kxcjk1013_trig_try_reen, 971 .owner = THIS_MODULE, 972}; 973 974static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 975{ 976 struct iio_dev *indio_dev = private; 977 struct kxcjk1013_data *data = iio_priv(indio_dev); 978 int ret; 979 980 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1); 981 if (ret < 0) { 982 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 983 goto ack_intr; 984 } 985 986 if (ret & 0x02) { 987 ret = i2c_smbus_read_byte_data(data->client, 988 KXCJK1013_REG_INT_SRC2); 989 if (ret < 0) { 990 dev_err(&data->client->dev, 991 "Error reading reg_int_src2\n"); 992 goto ack_intr; 993 } 994 995 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 996 iio_push_event(indio_dev, 997 IIO_MOD_EVENT_CODE(IIO_ACCEL, 998 0, 999 IIO_MOD_X, 1000 IIO_EV_TYPE_THRESH, 1001 IIO_EV_DIR_FALLING), 1002 data->timestamp); 1003 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1004 iio_push_event(indio_dev, 1005 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1006 0, 1007 IIO_MOD_X, 1008 IIO_EV_TYPE_THRESH, 1009 IIO_EV_DIR_RISING), 1010 data->timestamp); 1011 1012 1013 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1014 iio_push_event(indio_dev, 1015 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1016 0, 1017 IIO_MOD_Y, 1018 IIO_EV_TYPE_THRESH, 1019 IIO_EV_DIR_FALLING), 1020 data->timestamp); 1021 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1022 iio_push_event(indio_dev, 1023 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1024 0, 1025 IIO_MOD_Y, 1026 IIO_EV_TYPE_THRESH, 1027 IIO_EV_DIR_RISING), 1028 data->timestamp); 1029 1030 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1031 iio_push_event(indio_dev, 1032 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1033 0, 1034 IIO_MOD_Z, 1035 IIO_EV_TYPE_THRESH, 1036 IIO_EV_DIR_FALLING), 1037 data->timestamp); 1038 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1039 iio_push_event(indio_dev, 1040 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1041 0, 1042 IIO_MOD_Z, 1043 IIO_EV_TYPE_THRESH, 1044 IIO_EV_DIR_RISING), 1045 data->timestamp); 1046 } 1047 1048ack_intr: 1049 if (data->dready_trigger_on) 1050 return IRQ_HANDLED; 1051 1052 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1053 if (ret < 0) 1054 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1055 1056 return IRQ_HANDLED; 1057} 1058 1059static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1060{ 1061 struct iio_dev *indio_dev = private; 1062 struct kxcjk1013_data *data = iio_priv(indio_dev); 1063 1064 data->timestamp = iio_get_time_ns(); 1065 1066 if (data->dready_trigger_on) 1067 iio_trigger_poll(data->dready_trig); 1068 else if (data->motion_trigger_on) 1069 iio_trigger_poll(data->motion_trig); 1070 1071 if (data->ev_enable_state) 1072 return IRQ_WAKE_THREAD; 1073 else 1074 return IRQ_HANDLED; 1075} 1076 1077static int kxcjk1013_acpi_gpio_probe(struct i2c_client *client, 1078 struct kxcjk1013_data *data) 1079{ 1080 const struct acpi_device_id *id; 1081 struct device *dev; 1082 struct gpio_desc *gpio; 1083 int ret; 1084 1085 if (!client) 1086 return -EINVAL; 1087 1088 dev = &client->dev; 1089 if (!ACPI_HANDLE(dev)) 1090 return -ENODEV; 1091 1092 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1093 if (!id) 1094 return -ENODEV; 1095 1096 /* data ready gpio interrupt pin */ 1097 gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0); 1098 if (IS_ERR(gpio)) { 1099 dev_err(dev, "acpi gpio get index failed\n"); 1100 return PTR_ERR(gpio); 1101 } 1102 1103 ret = gpiod_direction_input(gpio); 1104 if (ret) 1105 return ret; 1106 1107 ret = gpiod_to_irq(gpio); 1108 1109 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret); 1110 1111 return ret; 1112} 1113 1114static int kxcjk1013_probe(struct i2c_client *client, 1115 const struct i2c_device_id *id) 1116{ 1117 struct kxcjk1013_data *data; 1118 struct iio_dev *indio_dev; 1119 struct kxcjk_1013_platform_data *pdata; 1120 int ret; 1121 1122 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1123 if (!indio_dev) 1124 return -ENOMEM; 1125 1126 data = iio_priv(indio_dev); 1127 i2c_set_clientdata(client, indio_dev); 1128 data->client = client; 1129 1130 pdata = dev_get_platdata(&client->dev); 1131 if (pdata) 1132 data->active_high_intr = pdata->active_high_intr; 1133 else 1134 data->active_high_intr = true; /* default polarity */ 1135 1136 ret = kxcjk1013_chip_init(data); 1137 if (ret < 0) 1138 return ret; 1139 1140 mutex_init(&data->mutex); 1141 1142 indio_dev->dev.parent = &client->dev; 1143 indio_dev->channels = kxcjk1013_channels; 1144 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1145 indio_dev->name = KXCJK1013_DRV_NAME; 1146 indio_dev->modes = INDIO_DIRECT_MODE; 1147 indio_dev->info = &kxcjk1013_info; 1148 1149 if (client->irq < 0) 1150 client->irq = kxcjk1013_acpi_gpio_probe(client, data); 1151 1152 if (client->irq >= 0) { 1153 ret = devm_request_threaded_irq(&client->dev, client->irq, 1154 kxcjk1013_data_rdy_trig_poll, 1155 kxcjk1013_event_handler, 1156 IRQF_TRIGGER_RISING, 1157 KXCJK1013_IRQ_NAME, 1158 indio_dev); 1159 if (ret) 1160 return ret; 1161 1162 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1163 "%s-dev%d", 1164 indio_dev->name, 1165 indio_dev->id); 1166 if (!data->dready_trig) 1167 return -ENOMEM; 1168 1169 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1170 "%s-any-motion-dev%d", 1171 indio_dev->name, 1172 indio_dev->id); 1173 if (!data->motion_trig) 1174 return -ENOMEM; 1175 1176 data->dready_trig->dev.parent = &client->dev; 1177 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1178 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1179 indio_dev->trig = data->dready_trig; 1180 iio_trigger_get(indio_dev->trig); 1181 ret = iio_trigger_register(data->dready_trig); 1182 if (ret) 1183 return ret; 1184 1185 data->motion_trig->dev.parent = &client->dev; 1186 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1187 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1188 ret = iio_trigger_register(data->motion_trig); 1189 if (ret) { 1190 data->motion_trig = NULL; 1191 goto err_trigger_unregister; 1192 } 1193 1194 ret = iio_triggered_buffer_setup(indio_dev, 1195 &iio_pollfunc_store_time, 1196 kxcjk1013_trigger_handler, 1197 NULL); 1198 if (ret < 0) { 1199 dev_err(&client->dev, 1200 "iio triggered buffer setup failed\n"); 1201 goto err_trigger_unregister; 1202 } 1203 } 1204 1205 ret = iio_device_register(indio_dev); 1206 if (ret < 0) { 1207 dev_err(&client->dev, "unable to register iio device\n"); 1208 goto err_buffer_cleanup; 1209 } 1210 1211 ret = pm_runtime_set_active(&client->dev); 1212 if (ret) 1213 goto err_iio_unregister; 1214 1215 pm_runtime_enable(&client->dev); 1216 pm_runtime_set_autosuspend_delay(&client->dev, 1217 KXCJK1013_SLEEP_DELAY_MS); 1218 pm_runtime_use_autosuspend(&client->dev); 1219 1220 return 0; 1221 1222err_iio_unregister: 1223 iio_device_unregister(indio_dev); 1224err_buffer_cleanup: 1225 if (data->dready_trig) 1226 iio_triggered_buffer_cleanup(indio_dev); 1227err_trigger_unregister: 1228 if (data->dready_trig) 1229 iio_trigger_unregister(data->dready_trig); 1230 if (data->motion_trig) 1231 iio_trigger_unregister(data->motion_trig); 1232 1233 return ret; 1234} 1235 1236static int kxcjk1013_remove(struct i2c_client *client) 1237{ 1238 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1239 struct kxcjk1013_data *data = iio_priv(indio_dev); 1240 1241 pm_runtime_disable(&client->dev); 1242 pm_runtime_set_suspended(&client->dev); 1243 pm_runtime_put_noidle(&client->dev); 1244 1245 iio_device_unregister(indio_dev); 1246 1247 if (data->dready_trig) { 1248 iio_triggered_buffer_cleanup(indio_dev); 1249 iio_trigger_unregister(data->dready_trig); 1250 iio_trigger_unregister(data->motion_trig); 1251 } 1252 1253 mutex_lock(&data->mutex); 1254 kxcjk1013_set_mode(data, STANDBY); 1255 mutex_unlock(&data->mutex); 1256 1257 return 0; 1258} 1259 1260#ifdef CONFIG_PM_SLEEP 1261static int kxcjk1013_suspend(struct device *dev) 1262{ 1263 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1264 struct kxcjk1013_data *data = iio_priv(indio_dev); 1265 int ret; 1266 1267 mutex_lock(&data->mutex); 1268 ret = kxcjk1013_set_mode(data, STANDBY); 1269 mutex_unlock(&data->mutex); 1270 1271 return ret; 1272} 1273 1274static int kxcjk1013_resume(struct device *dev) 1275{ 1276 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1277 struct kxcjk1013_data *data = iio_priv(indio_dev); 1278 int ret = 0; 1279 1280 mutex_lock(&data->mutex); 1281 /* Check, if the suspend occured while active */ 1282 if (data->dready_trigger_on || data->motion_trigger_on || 1283 data->ev_enable_state) 1284 ret = kxcjk1013_set_mode(data, OPERATION); 1285 mutex_unlock(&data->mutex); 1286 1287 return ret; 1288} 1289#endif 1290 1291#ifdef CONFIG_PM_RUNTIME 1292static int kxcjk1013_runtime_suspend(struct device *dev) 1293{ 1294 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1295 struct kxcjk1013_data *data = iio_priv(indio_dev); 1296 1297 return kxcjk1013_set_mode(data, STANDBY); 1298} 1299 1300static int kxcjk1013_runtime_resume(struct device *dev) 1301{ 1302 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1303 struct kxcjk1013_data *data = iio_priv(indio_dev); 1304 int ret; 1305 int sleep_val; 1306 1307 ret = kxcjk1013_set_mode(data, OPERATION); 1308 if (ret < 0) 1309 return ret; 1310 1311 sleep_val = kxcjk1013_get_startup_times(data); 1312 if (sleep_val < 20000) 1313 usleep_range(sleep_val, 20000); 1314 else 1315 msleep_interruptible(sleep_val/1000); 1316 1317 return 0; 1318} 1319#endif 1320 1321static const struct dev_pm_ops kxcjk1013_pm_ops = { 1322 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1323 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1324 kxcjk1013_runtime_resume, NULL) 1325}; 1326 1327static const struct acpi_device_id kx_acpi_match[] = { 1328 {"KXCJ1013", 0}, 1329 {"KXCJ1008", 0}, 1330 { }, 1331}; 1332MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1333 1334static const struct i2c_device_id kxcjk1013_id[] = { 1335 {"kxcjk1013", 0}, 1336 {"kxcj91008", 0}, 1337 {} 1338}; 1339 1340MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1341 1342static struct i2c_driver kxcjk1013_driver = { 1343 .driver = { 1344 .name = KXCJK1013_DRV_NAME, 1345 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1346 .pm = &kxcjk1013_pm_ops, 1347 }, 1348 .probe = kxcjk1013_probe, 1349 .remove = kxcjk1013_remove, 1350 .id_table = kxcjk1013_id, 1351}; 1352module_i2c_driver(kxcjk1013_driver); 1353 1354MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1355MODULE_LICENSE("GPL v2"); 1356MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1357