ad7266.c revision 8ec4cf5303e03941fa5fd91bbb9c85bd4ae88c47
1/*
2 * AD7266/65 SPI ADC driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/spi/spi.h>
13#include <linux/regulator/consumer.h>
14#include <linux/err.h>
15#include <linux/gpio.h>
16#include <linux/module.h>
17
18#include <linux/interrupt.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/buffer.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24
25#include <linux/platform_data/ad7266.h>
26
27struct ad7266_state {
28	struct spi_device	*spi;
29	struct regulator	*reg;
30	unsigned long		vref_uv;
31
32	struct spi_transfer	single_xfer[3];
33	struct spi_message	single_msg;
34
35	enum ad7266_range	range;
36	enum ad7266_mode	mode;
37	bool			fixed_addr;
38	struct gpio		gpios[3];
39
40	/*
41	 * DMA (thus cache coherency maintenance) requires the
42	 * transfer buffers to live in their own cache lines.
43	 * The buffer needs to be large enough to hold two samples (4 bytes) and
44	 * the naturally aligned timestamp (8 bytes).
45	 */
46	uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
47};
48
49static int ad7266_wakeup(struct ad7266_state *st)
50{
51	/* Any read with >= 2 bytes will wake the device */
52	return spi_read(st->spi, st->data, 2);
53}
54
55static int ad7266_powerdown(struct ad7266_state *st)
56{
57	/* Any read with < 2 bytes will powerdown the device */
58	return spi_read(st->spi, st->data, 1);
59}
60
61static int ad7266_preenable(struct iio_dev *indio_dev)
62{
63	struct ad7266_state *st = iio_priv(indio_dev);
64	int ret;
65
66	ret = ad7266_wakeup(st);
67	if (ret)
68		return ret;
69
70	ret = iio_sw_buffer_preenable(indio_dev);
71	if (ret)
72		ad7266_powerdown(st);
73
74	return ret;
75}
76
77static int ad7266_postdisable(struct iio_dev *indio_dev)
78{
79	struct ad7266_state *st = iio_priv(indio_dev);
80	return ad7266_powerdown(st);
81}
82
83static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
84	.preenable = &ad7266_preenable,
85	.postenable = &iio_triggered_buffer_postenable,
86	.predisable = &iio_triggered_buffer_predisable,
87	.postdisable = &ad7266_postdisable,
88};
89
90static irqreturn_t ad7266_trigger_handler(int irq, void *p)
91{
92	struct iio_poll_func *pf = p;
93	struct iio_dev *indio_dev = pf->indio_dev;
94	struct iio_buffer *buffer = indio_dev->buffer;
95	struct ad7266_state *st = iio_priv(indio_dev);
96	int ret;
97
98	ret = spi_read(st->spi, st->data, 4);
99	if (ret == 0) {
100		if (indio_dev->scan_timestamp)
101			((s64 *)st->data)[1] = pf->timestamp;
102		iio_push_to_buffer(buffer, (u8 *)st->data, pf->timestamp);
103	}
104
105	iio_trigger_notify_done(indio_dev->trig);
106
107	return IRQ_HANDLED;
108}
109
110static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
111{
112	unsigned int i;
113
114	if (st->fixed_addr)
115		return;
116
117	switch (st->mode) {
118	case AD7266_MODE_SINGLE_ENDED:
119		nr >>= 1;
120		break;
121	case AD7266_MODE_PSEUDO_DIFF:
122		nr |= 1;
123		break;
124	case AD7266_MODE_DIFF:
125		nr &= ~1;
126		break;
127	}
128
129	for (i = 0; i < 3; ++i)
130		gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
131}
132
133static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
134	const unsigned long *scan_mask)
135{
136	struct ad7266_state *st = iio_priv(indio_dev);
137	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
138
139	ad7266_select_input(st, nr);
140
141	return 0;
142}
143
144static int ad7266_read_single(struct ad7266_state *st, int *val,
145	unsigned int address)
146{
147	int ret;
148
149	ad7266_select_input(st, address);
150
151	ret = spi_sync(st->spi, &st->single_msg);
152	*val = be16_to_cpu(st->data[address % 2]);
153
154	return ret;
155}
156
157static int ad7266_read_raw(struct iio_dev *indio_dev,
158	struct iio_chan_spec const *chan, int *val, int *val2, long m)
159{
160	struct ad7266_state *st = iio_priv(indio_dev);
161	unsigned long scale_uv;
162	int ret;
163
164	switch (m) {
165	case IIO_CHAN_INFO_RAW:
166		if (iio_buffer_enabled(indio_dev))
167			return -EBUSY;
168
169		ret = ad7266_read_single(st, val, chan->address);
170		if (ret)
171			return ret;
172
173		*val = (*val >> 2) & 0xfff;
174		if (chan->scan_type.sign == 's')
175			*val = sign_extend32(*val, 11);
176
177		return IIO_VAL_INT;
178	case IIO_CHAN_INFO_SCALE:
179		scale_uv = (st->vref_uv * 100);
180		if (st->mode == AD7266_MODE_DIFF)
181			scale_uv *= 2;
182		if (st->range == AD7266_RANGE_2VREF)
183			scale_uv *= 2;
184
185		scale_uv >>= chan->scan_type.realbits;
186		*val =  scale_uv / 100000;
187		*val2 = (scale_uv % 100000) * 10;
188		return IIO_VAL_INT_PLUS_MICRO;
189	case IIO_CHAN_INFO_OFFSET:
190		if (st->range == AD7266_RANGE_2VREF &&
191			st->mode != AD7266_MODE_DIFF)
192			*val = 2048;
193		else
194			*val = 0;
195		return IIO_VAL_INT;
196	}
197	return -EINVAL;
198}
199
200#define AD7266_CHAN(_chan, _sign) {			\
201	.type = IIO_VOLTAGE,				\
202	.indexed = 1,					\
203	.channel = (_chan),				\
204	.address = (_chan),				\
205	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT	\
206		| IIO_CHAN_INFO_SCALE_SHARED_BIT	\
207		| IIO_CHAN_INFO_OFFSET_SHARED_BIT,	\
208	.scan_index = (_chan),				\
209	.scan_type = {					\
210		.sign = (_sign),			\
211		.realbits = 12,				\
212		.storagebits = 16,			\
213		.shift = 2,				\
214		.endianness = IIO_BE,			\
215	},						\
216}
217
218#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
219const struct iio_chan_spec ad7266_channels_##_name[] = { \
220	AD7266_CHAN(0, (_sign)), \
221	AD7266_CHAN(1, (_sign)), \
222	AD7266_CHAN(2, (_sign)), \
223	AD7266_CHAN(3, (_sign)), \
224	AD7266_CHAN(4, (_sign)), \
225	AD7266_CHAN(5, (_sign)), \
226	AD7266_CHAN(6, (_sign)), \
227	AD7266_CHAN(7, (_sign)), \
228	AD7266_CHAN(8, (_sign)), \
229	AD7266_CHAN(9, (_sign)), \
230	AD7266_CHAN(10, (_sign)), \
231	AD7266_CHAN(11, (_sign)), \
232	IIO_CHAN_SOFT_TIMESTAMP(13), \
233}
234
235#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
236const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
237	AD7266_CHAN(0, (_sign)), \
238	AD7266_CHAN(1, (_sign)), \
239	IIO_CHAN_SOFT_TIMESTAMP(2), \
240}
241
242static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
243static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
244static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
245static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
246
247#define AD7266_CHAN_DIFF(_chan, _sign) {			\
248	.type = IIO_VOLTAGE,				\
249	.indexed = 1,					\
250	.channel = (_chan) * 2,				\
251	.channel2 = (_chan) * 2 + 1,			\
252	.address = (_chan),				\
253	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT	\
254		| IIO_CHAN_INFO_SCALE_SHARED_BIT	\
255		| IIO_CHAN_INFO_OFFSET_SHARED_BIT,	\
256	.scan_index = (_chan),				\
257	.scan_type = {					\
258		.sign = _sign,			\
259		.realbits = 12,				\
260		.storagebits = 16,			\
261		.shift = 2,				\
262		.endianness = IIO_BE,			\
263	},						\
264	.differential = 1,				\
265}
266
267#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
268const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
269	AD7266_CHAN_DIFF(0, (_sign)), \
270	AD7266_CHAN_DIFF(1, (_sign)), \
271	AD7266_CHAN_DIFF(2, (_sign)), \
272	AD7266_CHAN_DIFF(3, (_sign)), \
273	AD7266_CHAN_DIFF(4, (_sign)), \
274	AD7266_CHAN_DIFF(5, (_sign)), \
275	IIO_CHAN_SOFT_TIMESTAMP(6), \
276}
277
278static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
279static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
280
281#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
282const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
283	AD7266_CHAN_DIFF(0, (_sign)), \
284	AD7266_CHAN_DIFF(1, (_sign)), \
285	IIO_CHAN_SOFT_TIMESTAMP(2), \
286}
287
288static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
289static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
290
291static const struct iio_info ad7266_info = {
292	.read_raw = &ad7266_read_raw,
293	.update_scan_mode = &ad7266_update_scan_mode,
294	.driver_module = THIS_MODULE,
295};
296
297static unsigned long ad7266_available_scan_masks[] = {
298	0x003,
299	0x00c,
300	0x030,
301	0x0c0,
302	0x300,
303	0xc00,
304	0x000,
305};
306
307static unsigned long ad7266_available_scan_masks_diff[] = {
308	0x003,
309	0x00c,
310	0x030,
311	0x000,
312};
313
314static unsigned long ad7266_available_scan_masks_fixed[] = {
315	0x003,
316	0x000,
317};
318
319struct ad7266_chan_info {
320	const struct iio_chan_spec *channels;
321	unsigned int num_channels;
322	unsigned long *scan_masks;
323};
324
325#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
326	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
327
328static const struct ad7266_chan_info ad7266_chan_infos[] = {
329	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
330		.channels = ad7266_channels_u,
331		.num_channels = ARRAY_SIZE(ad7266_channels_u),
332		.scan_masks = ad7266_available_scan_masks,
333	},
334	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
335		.channels = ad7266_channels_u_fixed,
336		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
337		.scan_masks = ad7266_available_scan_masks_fixed,
338	},
339	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
340		.channels = ad7266_channels_s,
341		.num_channels = ARRAY_SIZE(ad7266_channels_s),
342		.scan_masks = ad7266_available_scan_masks,
343	},
344	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
345		.channels = ad7266_channels_s_fixed,
346		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
347		.scan_masks = ad7266_available_scan_masks_fixed,
348	},
349	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
350		.channels = ad7266_channels_diff_u,
351		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
352		.scan_masks = ad7266_available_scan_masks_diff,
353	},
354	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
355		.channels = ad7266_channels_diff_fixed_u,
356		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
357		.scan_masks = ad7266_available_scan_masks_fixed,
358	},
359	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
360		.channels = ad7266_channels_diff_s,
361		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
362		.scan_masks = ad7266_available_scan_masks_diff,
363	},
364	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
365		.channels = ad7266_channels_diff_fixed_s,
366		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
367		.scan_masks = ad7266_available_scan_masks_fixed,
368	},
369};
370
371static void __devinit ad7266_init_channels(struct iio_dev *indio_dev)
372{
373	struct ad7266_state *st = iio_priv(indio_dev);
374	bool is_differential, is_signed;
375	const struct ad7266_chan_info *chan_info;
376	int i;
377
378	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
379	is_signed = (st->range == AD7266_RANGE_2VREF) |
380		    (st->mode == AD7266_MODE_DIFF);
381
382	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
383	chan_info = &ad7266_chan_infos[i];
384
385	indio_dev->channels = chan_info->channels;
386	indio_dev->num_channels = chan_info->num_channels;
387	indio_dev->available_scan_masks = chan_info->scan_masks;
388	indio_dev->masklength = chan_info->num_channels - 1;
389}
390
391static const char * const ad7266_gpio_labels[] = {
392	"AD0", "AD1", "AD2",
393};
394
395static int __devinit ad7266_probe(struct spi_device *spi)
396{
397	struct ad7266_platform_data *pdata = spi->dev.platform_data;
398	struct iio_dev *indio_dev;
399	struct ad7266_state *st;
400	unsigned int i;
401	int ret;
402
403	indio_dev = iio_device_alloc(sizeof(*st));
404	if (indio_dev == NULL)
405		return -ENOMEM;
406
407	st = iio_priv(indio_dev);
408
409	st->reg = regulator_get(&spi->dev, "vref");
410	if (!IS_ERR_OR_NULL(st->reg)) {
411		ret = regulator_enable(st->reg);
412		if (ret)
413			goto error_put_reg;
414
415		st->vref_uv = regulator_get_voltage(st->reg);
416	} else {
417		/* Use internal reference */
418		st->vref_uv = 2500000;
419	}
420
421	if (pdata) {
422		st->fixed_addr = pdata->fixed_addr;
423		st->mode = pdata->mode;
424		st->range = pdata->range;
425
426		if (!st->fixed_addr) {
427			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
428				st->gpios[i].gpio = pdata->addr_gpios[i];
429				st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
430				st->gpios[i].label = ad7266_gpio_labels[i];
431			}
432			ret = gpio_request_array(st->gpios,
433				ARRAY_SIZE(st->gpios));
434			if (ret)
435				goto error_disable_reg;
436		}
437	} else {
438		st->fixed_addr = true;
439		st->range = AD7266_RANGE_VREF;
440		st->mode = AD7266_MODE_DIFF;
441	}
442
443	spi_set_drvdata(spi, indio_dev);
444	st->spi = spi;
445
446	indio_dev->dev.parent = &spi->dev;
447	indio_dev->name = spi_get_device_id(spi)->name;
448	indio_dev->modes = INDIO_DIRECT_MODE;
449	indio_dev->info = &ad7266_info;
450
451	ad7266_init_channels(indio_dev);
452
453	/* wakeup */
454	st->single_xfer[0].rx_buf = &st->data;
455	st->single_xfer[0].len = 2;
456	st->single_xfer[0].cs_change = 1;
457	/* conversion */
458	st->single_xfer[1].rx_buf = &st->data;
459	st->single_xfer[1].len = 4;
460	st->single_xfer[1].cs_change = 1;
461	/* powerdown */
462	st->single_xfer[2].tx_buf = &st->data;
463	st->single_xfer[2].len = 1;
464
465	spi_message_init(&st->single_msg);
466	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
467	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
468	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
469
470	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
471		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
472	if (ret)
473		goto error_free_gpios;
474
475	ret = iio_device_register(indio_dev);
476	if (ret)
477		goto error_buffer_cleanup;
478
479	return 0;
480
481error_buffer_cleanup:
482	iio_triggered_buffer_cleanup(indio_dev);
483error_free_gpios:
484	if (!st->fixed_addr)
485		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
486error_disable_reg:
487	if (!IS_ERR_OR_NULL(st->reg))
488		regulator_disable(st->reg);
489error_put_reg:
490	if (!IS_ERR_OR_NULL(st->reg))
491		regulator_put(st->reg);
492
493	iio_device_free(indio_dev);
494
495	return ret;
496}
497
498static int __devexit ad7266_remove(struct spi_device *spi)
499{
500	struct iio_dev *indio_dev = spi_get_drvdata(spi);
501	struct ad7266_state *st = iio_priv(indio_dev);
502
503	iio_device_unregister(indio_dev);
504	iio_triggered_buffer_cleanup(indio_dev);
505	if (!st->fixed_addr)
506		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
507	if (!IS_ERR_OR_NULL(st->reg)) {
508		regulator_disable(st->reg);
509		regulator_put(st->reg);
510	}
511	iio_device_free(indio_dev);
512
513	return 0;
514}
515
516static const struct spi_device_id ad7266_id[] = {
517	{"ad7265", 0},
518	{"ad7266", 0},
519	{ }
520};
521MODULE_DEVICE_TABLE(spi, ad7266_id);
522
523static struct spi_driver ad7266_driver = {
524	.driver = {
525		.name	= "ad7266",
526		.owner	= THIS_MODULE,
527	},
528	.probe		= ad7266_probe,
529	.remove		= __devexit_p(ad7266_remove),
530	.id_table	= ad7266_id,
531};
532module_spi_driver(ad7266_driver);
533
534MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
535MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
536MODULE_LICENSE("GPL v2");
537