ad7266.c revision fce8abfda40a764f4662ee354c1646ec78061371 
1/*
2 * AD7266/65 SPI ADC driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/spi/spi.h>
13#include <linux/regulator/consumer.h>
14#include <linux/err.h>
15#include <linux/gpio.h>
16#include <linux/module.h>
17
18#include <linux/interrupt.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/buffer.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24
25#include <linux/platform_data/ad7266.h>
26
27struct ad7266_state {
28	struct spi_device	*spi;
29	struct regulator	*reg;
30	unsigned long		vref_uv;
31
32	struct spi_transfer	single_xfer[3];
33	struct spi_message	single_msg;
34
35	enum ad7266_range	range;
36	enum ad7266_mode	mode;
37	bool			fixed_addr;
38	struct gpio		gpios[3];
39
40	/*
41	 * DMA (thus cache coherency maintenance) requires the
42	 * transfer buffers to live in their own cache lines.
43	 * The buffer needs to be large enough to hold two samples (4 bytes) and
44	 * the naturally aligned timestamp (8 bytes).
45	 */
46	uint8_t data[ALIGN(4, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
47};
48
49static int ad7266_wakeup(struct ad7266_state *st)
50{
51	/* Any read with >= 2 bytes will wake the device */
52	return spi_read(st->spi, st->data, 2);
53}
54
55static int ad7266_powerdown(struct ad7266_state *st)
56{
57	/* Any read with < 2 bytes will powerdown the device */
58	return spi_read(st->spi, st->data, 1);
59}
60
61static int ad7266_preenable(struct iio_dev *indio_dev)
62{
63	struct ad7266_state *st = iio_priv(indio_dev);
64	int ret;
65
66	ret = ad7266_wakeup(st);
67	if (ret)
68		return ret;
69
70	ret = iio_sw_buffer_preenable(indio_dev);
71	if (ret)
72		ad7266_powerdown(st);
73
74	return ret;
75}
76
77static int ad7266_postdisable(struct iio_dev *indio_dev)
78{
79	struct ad7266_state *st = iio_priv(indio_dev);
80	return ad7266_powerdown(st);
81}
82
83static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
84	.preenable = &ad7266_preenable,
85	.postenable = &iio_triggered_buffer_postenable,
86	.predisable = &iio_triggered_buffer_predisable,
87	.postdisable = &ad7266_postdisable,
88};
89
90static irqreturn_t ad7266_trigger_handler(int irq, void *p)
91{
92	struct iio_poll_func *pf = p;
93	struct iio_dev *indio_dev = pf->indio_dev;
94	struct ad7266_state *st = iio_priv(indio_dev);
95	int ret;
96
97	ret = spi_read(st->spi, st->data, 4);
98	if (ret == 0) {
99		iio_push_to_buffers_with_timestamp(indio_dev, st->data,
100			    pf->timestamp);
101	}
102
103	iio_trigger_notify_done(indio_dev->trig);
104
105	return IRQ_HANDLED;
106}
107
108static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
109{
110	unsigned int i;
111
112	if (st->fixed_addr)
113		return;
114
115	switch (st->mode) {
116	case AD7266_MODE_SINGLE_ENDED:
117		nr >>= 1;
118		break;
119	case AD7266_MODE_PSEUDO_DIFF:
120		nr |= 1;
121		break;
122	case AD7266_MODE_DIFF:
123		nr &= ~1;
124		break;
125	}
126
127	for (i = 0; i < 3; ++i)
128		gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
129}
130
131static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
132	const unsigned long *scan_mask)
133{
134	struct ad7266_state *st = iio_priv(indio_dev);
135	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
136
137	ad7266_select_input(st, nr);
138
139	return 0;
140}
141
142static int ad7266_read_single(struct ad7266_state *st, int *val,
143	unsigned int address)
144{
145	int ret;
146
147	ad7266_select_input(st, address);
148
149	ret = spi_sync(st->spi, &st->single_msg);
150	*val = be16_to_cpu(st->data[address % 2]);
151
152	return ret;
153}
154
155static int ad7266_read_raw(struct iio_dev *indio_dev,
156	struct iio_chan_spec const *chan, int *val, int *val2, long m)
157{
158	struct ad7266_state *st = iio_priv(indio_dev);
159	unsigned long scale_uv;
160	int ret;
161
162	switch (m) {
163	case IIO_CHAN_INFO_RAW:
164		if (iio_buffer_enabled(indio_dev))
165			return -EBUSY;
166
167		ret = ad7266_read_single(st, val, chan->address);
168		if (ret)
169			return ret;
170
171		*val = (*val >> 2) & 0xfff;
172		if (chan->scan_type.sign == 's')
173			*val = sign_extend32(*val, 11);
174
175		return IIO_VAL_INT;
176	case IIO_CHAN_INFO_SCALE:
177		scale_uv = (st->vref_uv * 100);
178		if (st->mode == AD7266_MODE_DIFF)
179			scale_uv *= 2;
180		if (st->range == AD7266_RANGE_2VREF)
181			scale_uv *= 2;
182
183		scale_uv >>= chan->scan_type.realbits;
184		*val =  scale_uv / 100000;
185		*val2 = (scale_uv % 100000) * 10;
186		return IIO_VAL_INT_PLUS_MICRO;
187	case IIO_CHAN_INFO_OFFSET:
188		if (st->range == AD7266_RANGE_2VREF &&
189			st->mode != AD7266_MODE_DIFF)
190			*val = 2048;
191		else
192			*val = 0;
193		return IIO_VAL_INT;
194	}
195	return -EINVAL;
196}
197
198#define AD7266_CHAN(_chan, _sign) {			\
199	.type = IIO_VOLTAGE,				\
200	.indexed = 1,					\
201	.channel = (_chan),				\
202	.address = (_chan),				\
203	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
204	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
205		| BIT(IIO_CHAN_INFO_OFFSET),			\
206	.scan_index = (_chan),				\
207	.scan_type = {					\
208		.sign = (_sign),			\
209		.realbits = 12,				\
210		.storagebits = 16,			\
211		.shift = 2,				\
212		.endianness = IIO_BE,			\
213	},						\
214}
215
216#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
217const struct iio_chan_spec ad7266_channels_##_name[] = { \
218	AD7266_CHAN(0, (_sign)), \
219	AD7266_CHAN(1, (_sign)), \
220	AD7266_CHAN(2, (_sign)), \
221	AD7266_CHAN(3, (_sign)), \
222	AD7266_CHAN(4, (_sign)), \
223	AD7266_CHAN(5, (_sign)), \
224	AD7266_CHAN(6, (_sign)), \
225	AD7266_CHAN(7, (_sign)), \
226	AD7266_CHAN(8, (_sign)), \
227	AD7266_CHAN(9, (_sign)), \
228	AD7266_CHAN(10, (_sign)), \
229	AD7266_CHAN(11, (_sign)), \
230	IIO_CHAN_SOFT_TIMESTAMP(13), \
231}
232
233#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
234const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
235	AD7266_CHAN(0, (_sign)), \
236	AD7266_CHAN(1, (_sign)), \
237	IIO_CHAN_SOFT_TIMESTAMP(2), \
238}
239
240static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
241static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
242static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
243static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
244
245#define AD7266_CHAN_DIFF(_chan, _sign) {			\
246	.type = IIO_VOLTAGE,				\
247	.indexed = 1,					\
248	.channel = (_chan) * 2,				\
249	.channel2 = (_chan) * 2 + 1,			\
250	.address = (_chan),				\
251	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
252	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
253		| BIT(IIO_CHAN_INFO_OFFSET),			\
254	.scan_index = (_chan),				\
255	.scan_type = {					\
256		.sign = _sign,			\
257		.realbits = 12,				\
258		.storagebits = 16,			\
259		.shift = 2,				\
260		.endianness = IIO_BE,			\
261	},						\
262	.differential = 1,				\
263}
264
265#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
266const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
267	AD7266_CHAN_DIFF(0, (_sign)), \
268	AD7266_CHAN_DIFF(1, (_sign)), \
269	AD7266_CHAN_DIFF(2, (_sign)), \
270	AD7266_CHAN_DIFF(3, (_sign)), \
271	AD7266_CHAN_DIFF(4, (_sign)), \
272	AD7266_CHAN_DIFF(5, (_sign)), \
273	IIO_CHAN_SOFT_TIMESTAMP(6), \
274}
275
276static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
277static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
278
279#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
280const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
281	AD7266_CHAN_DIFF(0, (_sign)), \
282	AD7266_CHAN_DIFF(1, (_sign)), \
283	IIO_CHAN_SOFT_TIMESTAMP(2), \
284}
285
286static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
287static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
288
289static const struct iio_info ad7266_info = {
290	.read_raw = &ad7266_read_raw,
291	.update_scan_mode = &ad7266_update_scan_mode,
292	.driver_module = THIS_MODULE,
293};
294
295static const unsigned long ad7266_available_scan_masks[] = {
296	0x003,
297	0x00c,
298	0x030,
299	0x0c0,
300	0x300,
301	0xc00,
302	0x000,
303};
304
305static const unsigned long ad7266_available_scan_masks_diff[] = {
306	0x003,
307	0x00c,
308	0x030,
309	0x000,
310};
311
312static const unsigned long ad7266_available_scan_masks_fixed[] = {
313	0x003,
314	0x000,
315};
316
317struct ad7266_chan_info {
318	const struct iio_chan_spec *channels;
319	unsigned int num_channels;
320	const unsigned long *scan_masks;
321};
322
323#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
324	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
325
326static const struct ad7266_chan_info ad7266_chan_infos[] = {
327	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
328		.channels = ad7266_channels_u,
329		.num_channels = ARRAY_SIZE(ad7266_channels_u),
330		.scan_masks = ad7266_available_scan_masks,
331	},
332	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
333		.channels = ad7266_channels_u_fixed,
334		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
335		.scan_masks = ad7266_available_scan_masks_fixed,
336	},
337	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
338		.channels = ad7266_channels_s,
339		.num_channels = ARRAY_SIZE(ad7266_channels_s),
340		.scan_masks = ad7266_available_scan_masks,
341	},
342	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
343		.channels = ad7266_channels_s_fixed,
344		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
345		.scan_masks = ad7266_available_scan_masks_fixed,
346	},
347	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
348		.channels = ad7266_channels_diff_u,
349		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
350		.scan_masks = ad7266_available_scan_masks_diff,
351	},
352	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
353		.channels = ad7266_channels_diff_fixed_u,
354		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
355		.scan_masks = ad7266_available_scan_masks_fixed,
356	},
357	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
358		.channels = ad7266_channels_diff_s,
359		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
360		.scan_masks = ad7266_available_scan_masks_diff,
361	},
362	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
363		.channels = ad7266_channels_diff_fixed_s,
364		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
365		.scan_masks = ad7266_available_scan_masks_fixed,
366	},
367};
368
369static void ad7266_init_channels(struct iio_dev *indio_dev)
370{
371	struct ad7266_state *st = iio_priv(indio_dev);
372	bool is_differential, is_signed;
373	const struct ad7266_chan_info *chan_info;
374	int i;
375
376	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
377	is_signed = (st->range == AD7266_RANGE_2VREF) |
378		    (st->mode == AD7266_MODE_DIFF);
379
380	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
381	chan_info = &ad7266_chan_infos[i];
382
383	indio_dev->channels = chan_info->channels;
384	indio_dev->num_channels = chan_info->num_channels;
385	indio_dev->available_scan_masks = chan_info->scan_masks;
386	indio_dev->masklength = chan_info->num_channels - 1;
387}
388
389static const char * const ad7266_gpio_labels[] = {
390	"AD0", "AD1", "AD2",
391};
392
393static int ad7266_probe(struct spi_device *spi)
394{
395	struct ad7266_platform_data *pdata = spi->dev.platform_data;
396	struct iio_dev *indio_dev;
397	struct ad7266_state *st;
398	unsigned int i;
399	int ret;
400
401	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
402	if (indio_dev == NULL)
403		return -ENOMEM;
404
405	st = iio_priv(indio_dev);
406
407	st->reg = devm_regulator_get(&spi->dev, "vref");
408	if (!IS_ERR_OR_NULL(st->reg)) {
409		ret = regulator_enable(st->reg);
410		if (ret)
411			return ret;
412
413		ret = regulator_get_voltage(st->reg);
414		if (ret < 0)
415			goto error_disable_reg;
416
417		st->vref_uv = ret;
418	} else {
419		/* Use internal reference */
420		st->vref_uv = 2500000;
421	}
422
423	if (pdata) {
424		st->fixed_addr = pdata->fixed_addr;
425		st->mode = pdata->mode;
426		st->range = pdata->range;
427
428		if (!st->fixed_addr) {
429			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
430				st->gpios[i].gpio = pdata->addr_gpios[i];
431				st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
432				st->gpios[i].label = ad7266_gpio_labels[i];
433			}
434			ret = gpio_request_array(st->gpios,
435				ARRAY_SIZE(st->gpios));
436			if (ret)
437				goto error_disable_reg;
438		}
439	} else {
440		st->fixed_addr = true;
441		st->range = AD7266_RANGE_VREF;
442		st->mode = AD7266_MODE_DIFF;
443	}
444
445	spi_set_drvdata(spi, indio_dev);
446	st->spi = spi;
447
448	indio_dev->dev.parent = &spi->dev;
449	indio_dev->name = spi_get_device_id(spi)->name;
450	indio_dev->modes = INDIO_DIRECT_MODE;
451	indio_dev->info = &ad7266_info;
452
453	ad7266_init_channels(indio_dev);
454
455	/* wakeup */
456	st->single_xfer[0].rx_buf = &st->data;
457	st->single_xfer[0].len = 2;
458	st->single_xfer[0].cs_change = 1;
459	/* conversion */
460	st->single_xfer[1].rx_buf = &st->data;
461	st->single_xfer[1].len = 4;
462	st->single_xfer[1].cs_change = 1;
463	/* powerdown */
464	st->single_xfer[2].tx_buf = &st->data;
465	st->single_xfer[2].len = 1;
466
467	spi_message_init(&st->single_msg);
468	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
469	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
470	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
471
472	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
473		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
474	if (ret)
475		goto error_free_gpios;
476
477	ret = iio_device_register(indio_dev);
478	if (ret)
479		goto error_buffer_cleanup;
480
481	return 0;
482
483error_buffer_cleanup:
484	iio_triggered_buffer_cleanup(indio_dev);
485error_free_gpios:
486	if (!st->fixed_addr)
487		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
488error_disable_reg:
489	if (!IS_ERR_OR_NULL(st->reg))
490		regulator_disable(st->reg);
491
492	return ret;
493}
494
495static int ad7266_remove(struct spi_device *spi)
496{
497	struct iio_dev *indio_dev = spi_get_drvdata(spi);
498	struct ad7266_state *st = iio_priv(indio_dev);
499
500	iio_device_unregister(indio_dev);
501	iio_triggered_buffer_cleanup(indio_dev);
502	if (!st->fixed_addr)
503		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
504	if (!IS_ERR_OR_NULL(st->reg))
505		regulator_disable(st->reg);
506
507	return 0;
508}
509
510static const struct spi_device_id ad7266_id[] = {
511	{"ad7265", 0},
512	{"ad7266", 0},
513	{ }
514};
515MODULE_DEVICE_TABLE(spi, ad7266_id);
516
517static struct spi_driver ad7266_driver = {
518	.driver = {
519		.name	= "ad7266",
520		.owner	= THIS_MODULE,
521	},
522	.probe		= ad7266_probe,
523	.remove		= ad7266_remove,
524	.id_table	= ad7266_id,
525};
526module_spi_driver(ad7266_driver);
527
528MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
529MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
530MODULE_LICENSE("GPL v2");
531