1cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* 2cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * AD9523 SPI Low Jitter Clock Generator 3cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * 4cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * Copyright 2012 Analog Devices Inc. 5cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * 6cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * Licensed under the GPL-2. 7cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich */ 8cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 9cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/device.h> 10cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/kernel.h> 11cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/slab.h> 12cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/sysfs.h> 13cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/spi/spi.h> 14cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/regulator/consumer.h> 15cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/err.h> 16cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/module.h> 17cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/delay.h> 18cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 19cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/iio/iio.h> 20cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/iio/sysfs.h> 21cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#include <linux/iio/frequency/ad9523.h> 22cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 23cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READ (1 << 15) 24cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_WRITE (0 << 15) 25cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CNT(x) (((x) - 1) << 13) 26cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_ADDR(x) ((x) & 0xFFF) 27cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 28cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_R1B (1 << 16) 29cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_R2B (2 << 16) 30cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_R3B (3 << 16) 31cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_TRANSF_LEN(x) ((x) >> 16) 32cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 33cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_SERIAL_PORT_CONFIG (AD9523_R1B | 0x0) 34cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_VERSION_REGISTER (AD9523_R1B | 0x2) 35cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PART_REGISTER (AD9523_R1B | 0x3) 36cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_CTRL (AD9523_R1B | 0x4) 37cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 38cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CUSTOMER_VERSION_ID (AD9523_R2B | 0x6) 39cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 40cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_A_DIVIDER (AD9523_R2B | 0x11) 41cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_B_DIVIDER (AD9523_R2B | 0x13) 42cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_TEST_DIVIDER (AD9523_R1B | 0x14) 43cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_FEEDBACK_DIVIDER (AD9523_R2B | 0x17) 44cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_CTRL (AD9523_R2B | 0x19) 45cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_INPUT_RECEIVERS_CTRL (AD9523_R1B | 0x1A) 46cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_CTRL (AD9523_R1B | 0x1B) 47cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_MISC_CTRL (AD9523_R1B | 0x1C) 48cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_LOOP_FILTER_CTRL (AD9523_R1B | 0x1D) 49cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 50cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP (AD9523_R1B | 0xF0) 51cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FEEDBACK_DIVIDER_AB (AD9523_R1B | 0xF1) 52cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CTRL (AD9523_R1B | 0xF2) 53cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_CTRL (AD9523_R1B | 0xF3) 54cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_DIVIDER (AD9523_R1B | 0xF4) 55cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOOP_FILTER_CTRL (AD9523_R2B | 0xF6) 56cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_R2_DIVIDER (AD9523_R1B | 0xF7) 57cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 58cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CHANNEL_CLOCK_DIST(ch) (AD9523_R3B | (0x192 + 3 * ch)) 59cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 60cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTPUT_CTRL (AD9523_R1B | 0x1BA) 61cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTPUT_CHANNEL_CTRL (AD9523_R1B | 0x1BB) 62cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 63cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0 (AD9523_R1B | 0x22C) 64cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_1 (AD9523_R1B | 0x22D) 65cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 66cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_STATUS_SIGNALS (AD9523_R3B | 0x232) 67cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_POWER_DOWN_CTRL (AD9523_R1B | 0x233) 68cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_IO_UPDATE (AD9523_R1B | 0x234) 69cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 70cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_DATA_XFER_STATUS (AD9523_R1B | 0xB00) 71cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_ERROR_READBACK (AD9523_R1B | 0xB01) 72cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CTRL1 (AD9523_R1B | 0xB02) 73cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CTRL2 (AD9523_R1B | 0xB03) 74cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 75cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_SERIAL_PORT_CONFIG */ 76cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 77cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_SER_CONF_SDO_ACTIVE (1 << 7) 78cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_SER_CONF_SOFT_RESET (1 << 5) 79cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 80cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_READBACK_CTRL */ 81cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_CTRL_READ_BUFFERED (1 << 0) 82cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 83cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_CHARGE_PUMP_CTRL */ 84cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_CURRENT_nA(x) (((x) / 500) & 0x7F) 85cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_TRISTATE (1 << 7) 86cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_MODE_NORMAL (3 << 8) 87cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_MODE_PUMP_DOWN (2 << 8) 88cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_MODE_PUMP_UP (1 << 8) 89cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_CHARGE_PUMP_MODE_TRISTATE (0 << 8) 90cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BACKLASH_PW_MIN (0 << 10) 91cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BACKLASH_PW_LOW (1 << 10) 92cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BACKLASH_PW_HIGH (2 << 10) 93cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BACKLASH_PW_MAX (3 << 10) 94cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 95cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_INPUT_RECEIVERS_CTRL */ 96cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_TEST_RCV_EN (1 << 7) 97cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFB_DIFF_RCV_EN (1 << 6) 98cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFA_DIFF_RCV_EN (1 << 5) 99cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFB_RCV_EN (1 << 4) 100cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFA_RCV_EN (1 << 3) 101cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFA_REFB_PWR_CTRL_EN (1 << 2) 102cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OSC_IN_CMOS_NEG_INP_EN (1 << 1) 103cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OSC_IN_DIFF_EN (1 << 0) 104cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 105cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_REF_CTRL */ 106cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BYPASS_REF_TEST_DIV_EN (1 << 7) 107cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BYPASS_FEEDBACK_DIV_EN (1 << 6) 108cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_ZERO_DELAY_MODE_INT (1 << 5) 109cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_ZERO_DELAY_MODE_EXT (0 << 5) 110cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OSC_IN_PLL_FEEDBACK_EN (1 << 4) 111cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_ZD_IN_CMOS_NEG_INP_EN (1 << 3) 112cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_ZD_IN_DIFF_EN (1 << 2) 113cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFB_CMOS_NEG_INP_EN (1 << 1) 114cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFA_CMOS_NEG_INP_EN (1 << 0) 115cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 116cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_MISC_CTRL */ 117cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REFB_INDEP_DIV_CTRL_EN (1 << 7) 118cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OSC_CTRL_FAIL_VCC_BY2_EN (1 << 6) 119cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_REF_MODE(x) ((x) << 2) 120cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BYPASS_REFB_DIV (1 << 1) 121cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_BYPASS_REFA_DIV (1 << 0) 122cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 123cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_LOOP_FILTER_CTRL */ 124cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_LOOP_FILTER_RZERO(x) ((x) & 0xF) 125cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 126cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_CHARGE_PUMP */ 127cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP_CURRENT_nA(x) ((x) / 3500) 128cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 129cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_FEEDBACK_DIVIDER_AB */ 130cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FB_NDIV_A_CNT(x) (((x) & 0x3) << 6) 131cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FB_NDIV_B_CNT(x) (((x) & 0x3F) << 0) 132cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FB_NDIV(a, b) (4 * (b) + (a)) 133cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 134cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_CTRL */ 135cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP_MODE_NORMAL (3 << 0) 136cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP_MODE_PUMP_DOWN (2 << 0) 137cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP_MODE_PUMP_UP (1 << 0) 138cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_CHARGE_PUMP_MODE_TRISTATE (0 << 0) 139cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_BACKLASH_PW_MIN (0 << 2) 140cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_BACKLASH_PW_LOW (1 << 2) 141cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_BACKLASH_PW_HIGH (2 << 2) 142cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_BACKLASH_PW_MAX (3 << 1) 143cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_BACKLASH_CTRL_EN (1 << 4) 144cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FREQ_DOUBLER_EN (1 << 5) 145cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOCK_DETECT_PWR_DOWN_EN (1 << 7) 146cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 147cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_VCO_CTRL */ 148cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_CALIBRATE (1 << 1) 149cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FORCE_VCO_MIDSCALE (1 << 2) 150cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FORCE_REFERENCE_VALID (1 << 3) 151cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_FORCE_RELEASE_SYNC (1 << 4) 152cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 153cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_VCO_DIVIDER */ 154cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_DIV_M1(x) ((((x) - 3) & 0x3) << 0) 155cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_DIV_M2(x) ((((x) - 3) & 0x3) << 4) 156cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_DIV_M1_PWR_DOWN_EN (1 << 2) 157cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_VCO_DIV_M2_PWR_DOWN_EN (1 << 6) 158cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 159cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_LOOP_FILTER_CTRL */ 160cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOOP_FILTER_CPOLE1(x) (((x) & 0x7) << 0) 161cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOOP_FILTER_RZERO(x) (((x) & 0x7) << 3) 162cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOOP_FILTER_RPOLE2(x) (((x) & 0x7) << 6) 163cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_LOOP_FILTER_RZERO_BYPASS_EN (1 << 8) 164cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 165cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL2_R2_DIVIDER */ 166cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL2_R2_DIVIDER_VAL(x) (((x) & 0x1F) << 0) 167cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 168cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_CHANNEL_CLOCK_DIST */ 169cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_DIV_PHASE(x) (((x) & 0x3F) << 18) 170cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_DIV_PHASE_REV(x) ((ret >> 18) & 0x3F) 171cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_DIV(x) ((((x) - 1) & 0x3FF) << 8) 172cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_DIV_REV(x) (((ret >> 8) & 0x3FF) + 1) 173cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_INV_DIV_OUTPUT_EN (1 << 7) 174cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_IGNORE_SYNC_EN (1 << 6) 175cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_PWR_DOWN_EN (1 << 5) 176cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_LOW_PWR_MODE_EN (1 << 4) 177cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_CLK_DIST_DRIVER_MODE(x) (((x) & 0xF) << 0) 178cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 179cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_OUTPUT_CTRL */ 180cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_VCO_DIV_SEL_CH6_M2 (1 << 7) 181cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_VCO_DIV_SEL_CH5_M2 (1 << 6) 182cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_VCO_DIV_SEL_CH4_M2 (1 << 5) 183cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_CMOS_DRV_WEAK (1 << 4) 184cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_OUTPUT_DIV_1 (0 << 0) 185cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_OUTPUT_DIV_2 (1 << 0) 186cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_OUTPUT_DIV_4 (2 << 0) 187cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_OUTPUT_DIV_8 (4 << 0) 188cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CTRL_OUTPUT_DIV_16 (8 << 0) 189cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 190cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_PLL1_OUTPUT_CHANNEL_CTRL */ 191cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_OUTPUT_PWR_DOWN_EN (1 << 7) 192cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCO_DIV_SEL_CH9_M2 (1 << 6) 193cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCO_DIV_SEL_CH8_M2 (1 << 5) 194cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCO_DIV_SEL_CH7_M2 (1 << 4) 195cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCXO_SRC_SEL_CH3 (1 << 3) 196cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCXO_SRC_SEL_CH2 (1 << 2) 197cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCXO_SRC_SEL_CH1 (1 << 1) 198cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_PLL1_OUTP_CH_CTRL_VCXO_SRC_SEL_CH0 (1 << 0) 199cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 200cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_READBACK_0 */ 201cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_PLL2_REF_CLK (1 << 7) 202cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_PLL2_FB_CLK (1 << 6) 203cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_VCXO (1 << 5) 204cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_REF_TEST (1 << 4) 205cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_REFB (1 << 3) 206cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_REFA (1 << 2) 207cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_PLL2_LD (1 << 1) 208cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_0_STAT_PLL1_LD (1 << 0) 209cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 210cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_READBACK_1 */ 211cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_1_HOLDOVER_ACTIVE (1 << 3) 212cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_1_AUTOMODE_SEL_REFB (1 << 2) 213cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_READBACK_1_VCO_CALIB_IN_PROGRESS (1 << 0) 214cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 215cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_STATUS_SIGNALS */ 216cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_STATUS_SIGNALS_SYNC_MAN_CTRL (1 << 16) 217cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_STATUS_MONITOR_01_PLL12_LOCKED (0x302) 218cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_POWER_DOWN_CTRL */ 219cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_POWER_DOWN_CTRL_PLL1_PWR_DOWN (1 << 2) 220cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_POWER_DOWN_CTRL_PLL2_PWR_DOWN (1 << 1) 221cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_POWER_DOWN_CTRL_DIST_PWR_DOWN (1 << 0) 222cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 223cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_IO_UPDATE */ 224cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_IO_UPDATE_EN (1 << 0) 225cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 226cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_EEPROM_DATA_XFER_STATUS */ 227cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_DATA_XFER_IN_PROGRESS (1 << 0) 228cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 229cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_EEPROM_ERROR_READBACK */ 230cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_ERROR_READBACK_FAIL (1 << 0) 231cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 232cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_EEPROM_CTRL1 */ 233cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CTRL1_SOFT_EEPROM (1 << 1) 234cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CTRL1_EEPROM_WRITE_PROT_DIS (1 << 0) 235cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 236cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* AD9523_EEPROM_CTRL2 */ 237cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_EEPROM_CTRL2_REG2EEPROM (1 << 0) 238cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 239cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_NUM_CHAN 14 240cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD9523_NUM_CHAN_ALT_CLK_SRC 10 241cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 242cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich/* Helpers to avoid excess line breaks */ 243cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD_IFE(_pde, _a, _b) ((pdata->_pde) ? _a : _b) 244cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich#define AD_IF(_pde, _a) AD_IFE(_pde, _a, 0) 245cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 246cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichenum { 247cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL1_LD, 248cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_LD, 249cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REFA, 250cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REFB, 251cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REF_TEST, 252cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_VCXO, 253cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_FB_CLK, 254cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_REF_CLK, 255cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_SYNC, 256cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_EEPROM, 257cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 258cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 259cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichenum { 260cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_VCO1, 261cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_VCO2, 262cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_VCXO, 263cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_NUM_CLK_SRC, 264cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 265cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 266cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstruct ad9523_state { 267cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct spi_device *spi; 268cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct regulator *reg; 269cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_platform_data *pdata; 270cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_chan_spec ad9523_channels[AD9523_NUM_CHAN]; 271cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 272cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned long vcxo_freq; 273cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned long vco_freq; 274cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned long vco_out_freq[AD9523_NUM_CLK_SRC]; 275cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned char vco_out_map[AD9523_NUM_CHAN_ALT_CLK_SRC]; 276cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 277cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich /* 278cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * DMA (thus cache coherency maintenance) requires the 279cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * transfer buffers to live in their own cache lines. 280cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich */ 281cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich union { 282cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich __be32 d32; 283cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich u8 d8[4]; 284cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } data[2] ____cacheline_aligned; 285cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 286cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 287cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_read(struct iio_dev *indio_dev, unsigned addr) 288cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 289cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 290cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 291cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 292cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich /* We encode the register size 1..3 bytes into the register address. 293cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * On transfer we get the size from the register datum, and make sure 294cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * the result is properly aligned. 295cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich */ 296cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 297cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct spi_transfer t[] = { 298cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich { 299cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .tx_buf = &st->data[0].d8[2], 300cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .len = 2, 301cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }, { 302cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .rx_buf = &st->data[1].d8[4 - AD9523_TRANSF_LEN(addr)], 303cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .len = AD9523_TRANSF_LEN(addr), 304cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }, 305cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }; 306cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 307cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->data[0].d32 = cpu_to_be32(AD9523_READ | 308cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CNT(AD9523_TRANSF_LEN(addr)) | 309cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_ADDR(addr)); 310cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 31114543a00fc3ce6dac9f297535c502a0085a50467Lars-Peter Clausen ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 312cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 313cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich dev_err(&indio_dev->dev, "read failed (%d)", ret); 314cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich else 315cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = be32_to_cpu(st->data[1].d32) & (0xFFFFFF >> 316cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (8 * (3 - AD9523_TRANSF_LEN(addr)))); 317cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 318cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 319cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 320cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 321cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_write(struct iio_dev *indio_dev, unsigned addr, unsigned val) 322cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 323cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 324cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 325cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct spi_transfer t[] = { 326cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich { 327cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .tx_buf = &st->data[0].d8[2], 328cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .len = 2, 329cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }, { 330cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .tx_buf = &st->data[1].d8[4 - AD9523_TRANSF_LEN(addr)], 331cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .len = AD9523_TRANSF_LEN(addr), 332cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }, 333cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }; 334cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 335cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->data[0].d32 = cpu_to_be32(AD9523_WRITE | 336cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CNT(AD9523_TRANSF_LEN(addr)) | 337cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_ADDR(addr)); 338cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->data[1].d32 = cpu_to_be32(val); 339cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 34014543a00fc3ce6dac9f297535c502a0085a50467Lars-Peter Clausen ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 341cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 342cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 343cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich dev_err(&indio_dev->dev, "write failed (%d)", ret); 344cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 345cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 346cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 347cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 348cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_io_update(struct iio_dev *indio_dev) 349cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 350cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ad9523_write(indio_dev, AD9523_IO_UPDATE, AD9523_IO_UPDATE_EN); 351cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 352cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 353cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_vco_out_map(struct iio_dev *indio_dev, 354011c10c351f3f081b496e2197db2948d120cc26cMichael Hennerich unsigned ch, unsigned out) 355cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 356cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 357cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 358cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned mask; 359cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 360cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich switch (ch) { 361cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case 0 ... 3: 362cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_PLL1_OUTPUT_CHANNEL_CTRL); 363cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 364cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 365cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mask = AD9523_PLL1_OUTP_CH_CTRL_VCXO_SRC_SEL_CH0 << ch; 366cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (out) { 367cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret |= mask; 368cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich out = 2; 369cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } else { 370cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret &= ~mask; 371cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 372cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, 373cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_OUTPUT_CHANNEL_CTRL, ret); 374cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 375cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case 4 ... 6: 376cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_PLL1_OUTPUT_CTRL); 377cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 378cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 379cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mask = AD9523_PLL1_OUTP_CTRL_VCO_DIV_SEL_CH4_M2 << (ch - 4); 380cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (out) 381cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret |= mask; 382cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich else 383cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret &= ~mask; 384cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_OUTPUT_CTRL, ret); 385cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 386cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case 7 ... 9: 387cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_PLL1_OUTPUT_CHANNEL_CTRL); 388cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 389cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 390cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mask = AD9523_PLL1_OUTP_CH_CTRL_VCO_DIV_SEL_CH7_M2 << (ch - 7); 391cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (out) 392cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret |= mask; 393cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich else 394cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret &= ~mask; 395cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, 396cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_OUTPUT_CHANNEL_CTRL, ret); 397cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 398cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich default: 399cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 400cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 401cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 402cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_out_map[ch] = out; 403cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 404cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 405cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 406cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 407cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_set_clock_provider(struct iio_dev *indio_dev, 408cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned ch, unsigned long freq) 409cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 410cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 411cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich long tmp1, tmp2; 412cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich bool use_alt_clk_src; 413cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 414cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich switch (ch) { 415cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case 0 ... 3: 416cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich use_alt_clk_src = (freq == st->vco_out_freq[AD9523_VCXO]); 417cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 418cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case 4 ... 9: 419cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp1 = st->vco_out_freq[AD9523_VCO1] / freq; 420cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp2 = st->vco_out_freq[AD9523_VCO2] / freq; 421cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp1 *= freq; 422cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp2 *= freq; 423cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich use_alt_clk_src = (abs(tmp1 - freq) > abs(tmp2 - freq)); 424cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 425cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich default: 426cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich /* Ch 10..14: No action required, return success */ 427cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 428cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 429cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 430cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ad9523_vco_out_map(indio_dev, ch, use_alt_clk_src); 431cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 432cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 433cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_store_eeprom(struct iio_dev *indio_dev) 434cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 435cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret, tmp; 436cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 437cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_EEPROM_CTRL1, 438cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_EEPROM_CTRL1_EEPROM_WRITE_PROT_DIS); 439cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 440cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 441cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_EEPROM_CTRL2, 442cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_EEPROM_CTRL2_REG2EEPROM); 443cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 444cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 445cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 446cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = 4; 447cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich do { 448cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich msleep(16); 449cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, 450cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_EEPROM_DATA_XFER_STATUS); 451cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 452cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 453cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } while ((ret & AD9523_EEPROM_DATA_XFER_IN_PROGRESS) && tmp--); 454cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 455cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_EEPROM_CTRL1, 0); 456cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 457cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 458cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 459cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_EEPROM_ERROR_READBACK); 460cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 461cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 462cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 463cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret & AD9523_EEPROM_ERROR_READBACK_FAIL) { 464cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich dev_err(&indio_dev->dev, "Verify EEPROM failed"); 465cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = -EIO; 466cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 467cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 468cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 469cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 470cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 471cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_sync(struct iio_dev *indio_dev) 472cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 473cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret, tmp; 474cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 475cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_STATUS_SIGNALS); 476cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 477cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 478cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 479cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = ret; 480cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp |= AD9523_STATUS_SIGNALS_SYNC_MAN_CTRL; 481cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 482cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_STATUS_SIGNALS, tmp); 483cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 484cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 485cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 486cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_io_update(indio_dev); 487cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp &= ~AD9523_STATUS_SIGNALS_SYNC_MAN_CTRL; 488cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 489cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_STATUS_SIGNALS, tmp); 490cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 491cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 492cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 493cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ad9523_io_update(indio_dev); 494cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 495cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 496cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic ssize_t ad9523_store(struct device *dev, 497cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct device_attribute *attr, 498cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich const char *buf, size_t len) 499cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 500cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev *indio_dev = dev_to_iio_dev(dev); 501cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 502cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich bool state; 503cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 504cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 505cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = strtobool(buf, &state); 506cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 507cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 508cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 509cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (!state) 510cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 511cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 512cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_lock(&indio_dev->mlock); 513cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich switch ((u32)this_attr->address) { 514cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case AD9523_SYNC: 515cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_sync(indio_dev); 516cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 517cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case AD9523_EEPROM: 518cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_store_eeprom(indio_dev); 519cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 520cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich default: 521cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = -ENODEV; 522cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 523cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_unlock(&indio_dev->mlock); 524cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 525cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret ? ret : len; 526cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 527cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 528cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic ssize_t ad9523_show(struct device *dev, 529cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct device_attribute *attr, 530cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich char *buf) 531cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 532cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev *indio_dev = dev_to_iio_dev(dev); 533cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 534cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 535cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 536cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_lock(&indio_dev->mlock); 537cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_READBACK_0); 538cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret >= 0) { 539cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = sprintf(buf, "%d\n", !!(ret & (1 << 540cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (u32)this_attr->address))); 541cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 542cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_unlock(&indio_dev->mlock); 543cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 544cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 545cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 546cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 547cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll1_locked, S_IRUGO, 548cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 549cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 550cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL1_LD); 551cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 552cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll2_locked, S_IRUGO, 553cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 554cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 555cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_LD); 556cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 557cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll1_reference_clk_a_present, S_IRUGO, 558cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 559cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 560cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REFA); 561cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 562cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll1_reference_clk_b_present, S_IRUGO, 563cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 564cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 565cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REFB); 566cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 567cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll1_reference_clk_test_present, S_IRUGO, 568cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 569cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 570cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_REF_TEST); 571cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 572cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(vcxo_clk_present, S_IRUGO, 573cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 574cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 575cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_VCXO); 576cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 577cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll2_feedback_clk_present, S_IRUGO, 578cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 579cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 580cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_FB_CLK); 581cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 582cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(pll2_reference_clk_present, S_IRUGO, 583cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_show, 584cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 585cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STAT_PLL2_REF_CLK); 586cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 587cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(sync_dividers, S_IWUSR, 588cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 589cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_store, 590cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_SYNC); 591cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 592cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic IIO_DEVICE_ATTR(store_eeprom, S_IWUSR, 593cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 594cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_store, 595cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_EEPROM); 596cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 597cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic struct attribute *ad9523_attributes[] = { 598cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_sync_dividers.dev_attr.attr, 599cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_store_eeprom.dev_attr.attr, 600cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll2_feedback_clk_present.dev_attr.attr, 601cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll2_reference_clk_present.dev_attr.attr, 602cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll1_reference_clk_a_present.dev_attr.attr, 603cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll1_reference_clk_b_present.dev_attr.attr, 604cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll1_reference_clk_test_present.dev_attr.attr, 605cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_vcxo_clk_present.dev_attr.attr, 606cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll1_locked.dev_attr.attr, 607cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich &iio_dev_attr_pll2_locked.dev_attr.attr, 608cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich NULL, 609cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 610cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 611cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic const struct attribute_group ad9523_attribute_group = { 612cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .attrs = ad9523_attributes, 613cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 614cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 615cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_read_raw(struct iio_dev *indio_dev, 616cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_chan_spec const *chan, 617cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int *val, 618cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int *val2, 619cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich long m) 620cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 621cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 622cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned code; 623cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 624cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 625cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_lock(&indio_dev->mlock); 626cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_CHANNEL_CLOCK_DIST(chan->channel)); 627cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_unlock(&indio_dev->mlock); 628cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 629cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 630cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 631cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 632cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich switch (m) { 633cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_RAW: 634cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich *val = !(ret & AD9523_CLK_DIST_PWR_DOWN_EN); 635cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return IIO_VAL_INT; 636cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_FREQUENCY: 637cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich *val = st->vco_out_freq[st->vco_out_map[chan->channel]] / 638cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DIV_REV(ret); 639cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return IIO_VAL_INT; 640cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_PHASE: 641cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich code = (AD9523_CLK_DIST_DIV_PHASE_REV(ret) * 3141592) / 642cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DIV_REV(ret); 643cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich *val = code / 1000000; 644cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich *val2 = (code % 1000000) * 10; 645cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return IIO_VAL_INT_PLUS_MICRO; 646cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich default: 647cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return -EINVAL; 648cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 649cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 650cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 651cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_write_raw(struct iio_dev *indio_dev, 652cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_chan_spec const *chan, 653cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int val, 654cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int val2, 655cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich long mask) 656cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 657cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 658cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned reg; 659cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret, tmp, code; 660cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 661cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_lock(&indio_dev->mlock); 662cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, AD9523_CHANNEL_CLOCK_DIST(chan->channel)); 663cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 664cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto out; 665cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 666cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg = ret; 667cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 668cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich switch (mask) { 669cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_RAW: 670cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (val) 671cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg &= ~AD9523_CLK_DIST_PWR_DOWN_EN; 672cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich else 673cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg |= AD9523_CLK_DIST_PWR_DOWN_EN; 674cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 675cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_FREQUENCY: 676cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (val <= 0) { 677cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = -EINVAL; 678cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto out; 679cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 680cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_set_clock_provider(indio_dev, chan->channel, val); 681cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 682cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto out; 683cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = st->vco_out_freq[st->vco_out_map[chan->channel]] / val; 684cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = clamp(tmp, 1, 1024); 685cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg &= ~(0x3FF << 8); 686cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg |= AD9523_CLK_DIST_DIV(tmp); 687cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 688cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich case IIO_CHAN_INFO_PHASE: 689cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich code = val * 1000000 + val2 % 1000000; 690cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = (code * AD9523_CLK_DIST_DIV_REV(ret)) / 3141592; 691cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich tmp = clamp(tmp, 0, 63); 692cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg &= ~AD9523_CLK_DIST_DIV_PHASE(~0); 693cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg |= AD9523_CLK_DIST_DIV_PHASE(tmp); 694cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich break; 695cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich default: 696cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = -EINVAL; 697cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto out; 698cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 699cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 700cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_CHANNEL_CLOCK_DIST(chan->channel), 701cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich reg); 702cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 703cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto out; 704cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 705cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_io_update(indio_dev); 706cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichout: 707cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_unlock(&indio_dev->mlock); 708cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 709cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 710cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 711cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_reg_access(struct iio_dev *indio_dev, 712cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned reg, unsigned writeval, 713cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned *readval) 714cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 715cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 716cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 717cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_lock(&indio_dev->mlock); 718cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (readval == NULL) { 719cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, reg | AD9523_R1B, writeval); 720cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_io_update(indio_dev); 721cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } else { 722cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_read(indio_dev, reg | AD9523_R1B); 723cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 72417c88eb6a09bafb75644b8c37fd65c89c8f49becDan Carpenter goto out_unlock; 725cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich *readval = ret; 726cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = 0; 727cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 72817c88eb6a09bafb75644b8c37fd65c89c8f49becDan Carpenter 72917c88eb6a09bafb75644b8c37fd65c89c8f49becDan Carpenterout_unlock: 730cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich mutex_unlock(&indio_dev->mlock); 731cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 732cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 733cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 734cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 735cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic const struct iio_info ad9523_info = { 736cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .read_raw = &ad9523_read_raw, 737cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .write_raw = &ad9523_write_raw, 738cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .debugfs_reg_access = &ad9523_reg_access, 739cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .attrs = &ad9523_attribute_group, 740cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .driver_module = THIS_MODULE, 741cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 742cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 743cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic int ad9523_setup(struct iio_dev *indio_dev) 744cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 745cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 746cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_platform_data *pdata = st->pdata; 747cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_channel_spec *chan; 748cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich unsigned long active_mask = 0; 749cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret, i; 750cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 751cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_SERIAL_PORT_CONFIG, 752cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_SER_CONF_SOFT_RESET | 753cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (st->spi->mode & SPI_3WIRE ? 0 : 754cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_SER_CONF_SDO_ACTIVE)); 755cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 756cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 757cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 758cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_READBACK_CTRL, 759cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_READBACK_CTRL_READ_BUFFERED); 760cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 761cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 762cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 763cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_io_update(indio_dev); 764cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 765cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 766cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 767cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich /* 768cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * PLL1 Setup 769cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich */ 770cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_REF_A_DIVIDER, 771cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pdata->refa_r_div); 772cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 773cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 774cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 775cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_REF_B_DIVIDER, 776cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pdata->refb_r_div); 777cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 778cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 779cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 780cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_FEEDBACK_DIVIDER, 781cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pdata->pll1_feedback_div); 782cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 783cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 784cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 785cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_CHARGE_PUMP_CTRL, 786cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_CHARGE_PUMP_CURRENT_nA(pdata-> 787cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pll1_charge_pump_current_nA) | 788cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_CHARGE_PUMP_MODE_NORMAL | 789cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_BACKLASH_PW_MIN); 790cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 791cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 792cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 793cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_INPUT_RECEIVERS_CTRL, 794cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refa_diff_rcv_en, AD9523_PLL1_REFA_RCV_EN) | 795cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refb_diff_rcv_en, AD9523_PLL1_REFB_RCV_EN) | 796cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(osc_in_diff_en, AD9523_PLL1_OSC_IN_DIFF_EN) | 797cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(osc_in_cmos_neg_inp_en, 798cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_OSC_IN_CMOS_NEG_INP_EN) | 799cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refa_diff_rcv_en, AD9523_PLL1_REFA_DIFF_RCV_EN) | 800cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refb_diff_rcv_en, AD9523_PLL1_REFB_DIFF_RCV_EN)); 801cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 802cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 803cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 804cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_REF_CTRL, 805cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(zd_in_diff_en, AD9523_PLL1_ZD_IN_DIFF_EN) | 806cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(zd_in_cmos_neg_inp_en, 807cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_ZD_IN_CMOS_NEG_INP_EN) | 808cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(zero_delay_mode_internal_en, 809cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_ZERO_DELAY_MODE_INT) | 810cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(osc_in_feedback_en, AD9523_PLL1_OSC_IN_PLL_FEEDBACK_EN) | 811cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refa_cmos_neg_inp_en, AD9523_PLL1_REFA_CMOS_NEG_INP_EN) | 812cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(refb_cmos_neg_inp_en, AD9523_PLL1_REFB_CMOS_NEG_INP_EN)); 813cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 814cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 815cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 816cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_MISC_CTRL, 817cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_REFB_INDEP_DIV_CTRL_EN | 818cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_REF_MODE(pdata->ref_mode)); 819cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 820cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 821cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 822cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL1_LOOP_FILTER_CTRL, 823cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL1_LOOP_FILTER_RZERO(pdata->pll1_loop_filter_rzero)); 824cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 825cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 826cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich /* 827cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich * PLL2 Setup 828cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich */ 829cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 830cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_CHARGE_PUMP, 831cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_CHARGE_PUMP_CURRENT_nA(pdata-> 832cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pll2_charge_pump_current_nA)); 833cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 834cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 835cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 836cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_FEEDBACK_DIVIDER_AB, 837cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_FB_NDIV_A_CNT(pdata->pll2_ndiv_a_cnt) | 838cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_FB_NDIV_B_CNT(pdata->pll2_ndiv_b_cnt)); 839cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 840cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 841cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 842cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_CTRL, 843cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_CHARGE_PUMP_MODE_NORMAL | 844cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_BACKLASH_CTRL_EN | 845cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(pll2_freq_doubler_en, AD9523_PLL2_FREQ_DOUBLER_EN)); 846cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 847cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 848cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 849cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_freq = (pdata->vcxo_freq * (pdata->pll2_freq_doubler_en ? 2 : 1) 850cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich / pdata->pll2_r2_div) * AD9523_PLL2_FB_NDIV(pdata-> 851cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich pll2_ndiv_a_cnt, pdata->pll2_ndiv_b_cnt); 852cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 853cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_VCO_CTRL, 854cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_VCO_CALIBRATE); 855cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 856cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 857cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 858cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_VCO_DIVIDER, 859cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_diff_m1) | 860cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_diff_m2) | 861cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IFE(pll2_vco_diff_m1, 0, 862cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_VCO_DIV_M1_PWR_DOWN_EN) | 863cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IFE(pll2_vco_diff_m2, 0, 864cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_VCO_DIV_M2_PWR_DOWN_EN)); 865cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 866cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 867cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 868cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (pdata->pll2_vco_diff_m1) 869cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_out_freq[AD9523_VCO1] = 870cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_freq / pdata->pll2_vco_diff_m1; 871cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 872cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (pdata->pll2_vco_diff_m2) 873cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_out_freq[AD9523_VCO2] = 874cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_freq / pdata->pll2_vco_diff_m2; 875cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 876cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->vco_out_freq[AD9523_VCXO] = pdata->vcxo_freq; 877cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 878cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_R2_DIVIDER, 879cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_R2_DIVIDER_VAL(pdata->pll2_r2_div)); 880cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 881cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 882cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 883cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_PLL2_LOOP_FILTER_CTRL, 884cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_LOOP_FILTER_CPOLE1(pdata->cpole1) | 885cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_LOOP_FILTER_RZERO(pdata->rzero) | 886cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_LOOP_FILTER_RPOLE2(pdata->rpole2) | 887cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD_IF(rzero_bypass_en, 888cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_PLL2_LOOP_FILTER_RZERO_BYPASS_EN)); 889cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 890cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 891cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 892cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich for (i = 0; i < pdata->num_channels; i++) { 893cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich chan = &pdata->channels[i]; 894cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (chan->channel_num < AD9523_NUM_CHAN) { 895cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich __set_bit(chan->channel_num, &active_mask); 896cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, 897cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CHANNEL_CLOCK_DIST(chan->channel_num), 898cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DRIVER_MODE(chan->driver_mode) | 899cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DIV(chan->channel_divider) | 900cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DIV_PHASE(chan->divider_phase) | 901cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (chan->sync_ignore_en ? 902cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_IGNORE_SYNC_EN : 0) | 903cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (chan->divider_output_invert_en ? 904cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_INV_DIV_OUTPUT_EN : 0) | 905cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (chan->low_power_mode_en ? 906cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_LOW_PWR_MODE_EN : 0) | 907cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich (chan->output_dis ? 908cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_PWR_DOWN_EN : 0)); 909cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 910cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 911cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 912cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_vco_out_map(indio_dev, chan->channel_num, 913cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich chan->use_alt_clock_src); 914cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 915cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 916cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 917cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->ad9523_channels[i].type = IIO_ALTVOLTAGE; 918cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->ad9523_channels[i].output = 1; 919cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->ad9523_channels[i].indexed = 1; 920cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->ad9523_channels[i].channel = chan->channel_num; 921cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->ad9523_channels[i].extend_name = 922cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich chan->extended_name; 923beacbaac9909d1b68887c01017d52bd14574d050Jonathan Cameron st->ad9523_channels[i].info_mask_separate = 924beacbaac9909d1b68887c01017d52bd14574d050Jonathan Cameron BIT(IIO_CHAN_INFO_RAW) | 925beacbaac9909d1b68887c01017d52bd14574d050Jonathan Cameron BIT(IIO_CHAN_INFO_PHASE) | 926beacbaac9909d1b68887c01017d52bd14574d050Jonathan Cameron BIT(IIO_CHAN_INFO_FREQUENCY); 927cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 928cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 929cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 930cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich for_each_clear_bit(i, &active_mask, AD9523_NUM_CHAN) 931cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ad9523_write(indio_dev, 932cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CHANNEL_CLOCK_DIST(i), 933cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_DRIVER_MODE(TRISTATE) | 934cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_CLK_DIST_PWR_DOWN_EN); 935cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 936cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_POWER_DOWN_CTRL, 0); 937cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 938cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 939cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 940cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_write(indio_dev, AD9523_STATUS_SIGNALS, 941cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich AD9523_STATUS_MONITOR_01_PLL12_LOCKED); 942cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 943cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 944cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 945cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_io_update(indio_dev); 946cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 947cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 948cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 949cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 950cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 951cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 952fc52692c49969ec72595766929b9f54ac402da34Greg Kroah-Hartmanstatic int ad9523_probe(struct spi_device *spi) 953cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 954cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_platform_data *pdata = spi->dev.platform_data; 955cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev *indio_dev; 956cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st; 957cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich int ret; 958cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 959cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (!pdata) { 960cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich dev_err(&spi->dev, "no platform data?\n"); 961cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return -EINVAL; 962cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 963cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 964b46400c639de7b0b3abce226b7ba0cbb253a4806Sachin Kamat indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 965cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (indio_dev == NULL) 966cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return -ENOMEM; 967cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 968cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st = iio_priv(indio_dev); 969cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 970b46400c639de7b0b3abce226b7ba0cbb253a4806Sachin Kamat st->reg = devm_regulator_get(&spi->dev, "vcc"); 971cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (!IS_ERR(st->reg)) { 972cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = regulator_enable(st->reg); 973cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret) 974b46400c639de7b0b3abce226b7ba0cbb253a4806Sachin Kamat return ret; 975cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich } 976cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 977cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich spi_set_drvdata(spi, indio_dev); 978cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->spi = spi; 979cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich st->pdata = pdata; 980cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 981cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->dev.parent = &spi->dev; 982cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->name = (pdata->name[0] != 0) ? pdata->name : 983cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich spi_get_device_id(spi)->name; 984cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->info = &ad9523_info; 985cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->modes = INDIO_DIRECT_MODE; 986cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->channels = st->ad9523_channels; 987cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich indio_dev->num_channels = pdata->num_channels; 988cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 989cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = ad9523_setup(indio_dev); 990cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret < 0) 991cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto error_disable_reg; 992cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 993cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich ret = iio_device_register(indio_dev); 994cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (ret) 995cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich goto error_disable_reg; 996cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 997cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich dev_info(&spi->dev, "probed %s\n", indio_dev->name); 998cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 999cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 1000cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1001cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennericherror_disable_reg: 1002cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich if (!IS_ERR(st->reg)) 1003cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich regulator_disable(st->reg); 1004cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1005cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return ret; 1006cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 1007cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1008fc52692c49969ec72595766929b9f54ac402da34Greg Kroah-Hartmanstatic int ad9523_remove(struct spi_device *spi) 1009cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich{ 1010cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct iio_dev *indio_dev = spi_get_drvdata(spi); 1011cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich struct ad9523_state *st = iio_priv(indio_dev); 1012cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1013cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich iio_device_unregister(indio_dev); 1014cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1015b46400c639de7b0b3abce226b7ba0cbb253a4806Sachin Kamat if (!IS_ERR(st->reg)) 1016cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich regulator_disable(st->reg); 1017cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1018cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich return 0; 1019cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich} 1020cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1021cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic const struct spi_device_id ad9523_id[] = { 1022cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich {"ad9523-1", 9523}, 1023cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich {} 1024cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 1025cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael HennerichMODULE_DEVICE_TABLE(spi, ad9523_id); 1026cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1027cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichstatic struct spi_driver ad9523_driver = { 1028cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .driver = { 1029cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .name = "ad9523", 1030cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .owner = THIS_MODULE, 1031cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich }, 1032cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .probe = ad9523_probe, 1033fc52692c49969ec72595766929b9f54ac402da34Greg Kroah-Hartman .remove = ad9523_remove, 1034cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich .id_table = ad9523_id, 1035cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich}; 1036cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerichmodule_spi_driver(ad9523_driver); 1037cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael Hennerich 1038cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael HennerichMODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 1039cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael HennerichMODULE_DESCRIPTION("Analog Devices AD9523 CLOCKDIST/PLL"); 1040cd1678f963298a9e777f3edb72d28bc18a3a32c2Michael HennerichMODULE_LICENSE("GPL v2"); 1041