ipath_intr.c revision 13aef4942c291742064c1d5ac71df6493c4a00a9
1/* 2 * Copyright (c) 2006 QLogic, Inc. All rights reserved. 3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34#include <linux/pci.h> 35 36#include "ipath_kernel.h" 37#include "ips_common.h" 38#include "ipath_layer.h" 39 40/* These are all rcv-related errors which we want to count for stats */ 41#define E_SUM_PKTERRS \ 42 (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \ 43 INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \ 44 INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \ 45 INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \ 46 INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \ 47 INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP) 48 49/* These are all send-related errors which we want to count for stats */ 50#define E_SUM_ERRS \ 51 (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \ 52 INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \ 53 INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \ 54 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \ 55 INFINIPATH_E_INVALIDADDR) 56 57/* 58 * these are errors that can occur when the link changes state while 59 * a packet is being sent or received. This doesn't cover things 60 * like EBP or VCRC that can be the result of a sending having the 61 * link change state, so we receive a "known bad" packet. 62 */ 63#define E_SUM_LINK_PKTERRS \ 64 (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \ 65 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \ 66 INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \ 67 INFINIPATH_E_RUNEXPCHAR) 68 69static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs) 70{ 71 unsigned long sbuf[4]; 72 u64 ignore_this_time = 0; 73 u32 piobcnt; 74 75 /* if possible that sendbuffererror could be valid */ 76 piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k; 77 /* read these before writing errorclear */ 78 sbuf[0] = ipath_read_kreg64( 79 dd, dd->ipath_kregs->kr_sendbuffererror); 80 sbuf[1] = ipath_read_kreg64( 81 dd, dd->ipath_kregs->kr_sendbuffererror + 1); 82 if (piobcnt > 128) { 83 sbuf[2] = ipath_read_kreg64( 84 dd, dd->ipath_kregs->kr_sendbuffererror + 2); 85 sbuf[3] = ipath_read_kreg64( 86 dd, dd->ipath_kregs->kr_sendbuffererror + 3); 87 } 88 89 if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) { 90 int i; 91 92 ipath_cdbg(PKT, "SendbufErrs %lx %lx ", sbuf[0], sbuf[1]); 93 if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128) 94 printk("%lx %lx ", sbuf[2], sbuf[3]); 95 for (i = 0; i < piobcnt; i++) { 96 if (test_bit(i, sbuf)) { 97 u32 __iomem *piobuf; 98 if (i < dd->ipath_piobcnt2k) 99 piobuf = (u32 __iomem *) 100 (dd->ipath_pio2kbase + 101 i * dd->ipath_palign); 102 else 103 piobuf = (u32 __iomem *) 104 (dd->ipath_pio4kbase + 105 (i - dd->ipath_piobcnt2k) * 106 dd->ipath_4kalign); 107 108 ipath_cdbg(PKT, 109 "PIObuf[%u] @%p pbc is %x; ", 110 i, piobuf, readl(piobuf)); 111 112 ipath_disarm_piobufs(dd, i, 1); 113 } 114 } 115 if (ipath_debug & __IPATH_PKTDBG) 116 printk("\n"); 117 } 118 if ((errs & E_SUM_LINK_PKTERRS) && 119 !(dd->ipath_flags & IPATH_LINKACTIVE)) { 120 /* 121 * This can happen when SMA is trying to bring the link 122 * up, but the IB link changes state at the "wrong" time. 123 * The IB logic then complains that the packet isn't 124 * valid. We don't want to confuse people, so we just 125 * don't print them, except at debug 126 */ 127 ipath_dbg("Ignoring packet errors %llx, because link not " 128 "ACTIVE\n", (unsigned long long) errs); 129 ignore_this_time = errs & E_SUM_LINK_PKTERRS; 130 } 131 132 return ignore_this_time; 133} 134 135/* return the strings for the most common link states */ 136static char *ib_linkstate(u32 linkstate) 137{ 138 char *ret; 139 140 switch (linkstate) { 141 case IPATH_IBSTATE_INIT: 142 ret = "Init"; 143 break; 144 case IPATH_IBSTATE_ARM: 145 ret = "Arm"; 146 break; 147 case IPATH_IBSTATE_ACTIVE: 148 ret = "Active"; 149 break; 150 default: 151 ret = "Down"; 152 } 153 154 return ret; 155} 156 157static void handle_e_ibstatuschanged(struct ipath_devdata *dd, 158 ipath_err_t errs, int noprint) 159{ 160 u64 val; 161 u32 ltstate, lstate; 162 163 /* 164 * even if diags are enabled, we want to notice LINKINIT, etc. 165 * We just don't want to change the LED state, or 166 * dd->ipath_kregs->kr_ibcctrl 167 */ 168 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus); 169 lstate = val & IPATH_IBSTATE_MASK; 170 171 /* 172 * this is confusing enough when it happens that I want to always put it 173 * on the console and in the logs. If it was a requested state change, 174 * we'll have already cleared the flags, so we won't print this warning 175 */ 176 if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE) 177 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) { 178 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n", 179 (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE", 180 ib_linkstate(lstate)); 181 /* 182 * Flush all queued sends when link went to DOWN or INIT, 183 * to be sure that they don't block SMA and other MAD packets 184 */ 185 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 186 INFINIPATH_S_ABORT); 187 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf, 188 (unsigned)(dd->ipath_piobcnt2k + 189 dd->ipath_piobcnt4k) - 190 dd->ipath_lastport_piobuf); 191 } 192 else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM || 193 lstate == IPATH_IBSTATE_ACTIVE) { 194 /* 195 * only print at SMA if there is a change, debug if not 196 * (sometimes we want to know that, usually not). 197 */ 198 if (lstate == ((unsigned) dd->ipath_lastibcstat 199 & IPATH_IBSTATE_MASK)) { 200 ipath_dbg("Status change intr but no change (%s)\n", 201 ib_linkstate(lstate)); 202 } 203 else 204 ipath_cdbg(SMA, "Unit %u link state %s, last " 205 "was %s\n", dd->ipath_unit, 206 ib_linkstate(lstate), 207 ib_linkstate((unsigned) 208 dd->ipath_lastibcstat 209 & IPATH_IBSTATE_MASK)); 210 } 211 else { 212 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK; 213 if (lstate == IPATH_IBSTATE_INIT || 214 lstate == IPATH_IBSTATE_ARM || 215 lstate == IPATH_IBSTATE_ACTIVE) 216 ipath_cdbg(SMA, "Unit %u link state down" 217 " (state 0x%x), from %s\n", 218 dd->ipath_unit, 219 (u32)val & IPATH_IBSTATE_MASK, 220 ib_linkstate(lstate)); 221 else 222 ipath_cdbg(VERBOSE, "Unit %u link state changed " 223 "to 0x%x from down (%x)\n", 224 dd->ipath_unit, (u32) val, lstate); 225 } 226 ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) & 227 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK; 228 lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) & 229 INFINIPATH_IBCS_LINKSTATE_MASK; 230 231 if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE || 232 ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) { 233 u32 last_ltstate; 234 235 /* 236 * Ignore cycling back and forth from Polling.Active 237 * to Polling.Quiet while waiting for the other end of 238 * the link to come up. We will cycle back and forth 239 * between them if no cable is plugged in, 240 * the other device is powered off or disabled, etc. 241 */ 242 last_ltstate = (dd->ipath_lastibcstat >> 243 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) 244 & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK; 245 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE 246 || last_ltstate == 247 INFINIPATH_IBCS_LT_STATE_POLLQUIET) { 248 if (dd->ipath_ibpollcnt > 40) { 249 dd->ipath_flags |= IPATH_NOCABLE; 250 *dd->ipath_statusp |= 251 IPATH_STATUS_IB_NOCABLE; 252 } else 253 dd->ipath_ibpollcnt++; 254 goto skip_ibchange; 255 } 256 } 257 dd->ipath_ibpollcnt = 0; /* some state other than 2 or 3 */ 258 ipath_stats.sps_iblink++; 259 if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) { 260 dd->ipath_flags |= IPATH_LINKDOWN; 261 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT 262 | IPATH_LINKACTIVE | 263 IPATH_LINKARMED); 264 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY; 265 if (!noprint) { 266 if (((dd->ipath_lastibcstat >> 267 INFINIPATH_IBCS_LINKSTATE_SHIFT) & 268 INFINIPATH_IBCS_LINKSTATE_MASK) 269 == INFINIPATH_IBCS_L_STATE_ACTIVE) 270 /* if from up to down be more vocal */ 271 ipath_cdbg(SMA, 272 "Unit %u link now down (%s)\n", 273 dd->ipath_unit, 274 ipath_ibcstatus_str[ltstate]); 275 else 276 ipath_cdbg(VERBOSE, "Unit %u link is " 277 "down (%s)\n", dd->ipath_unit, 278 ipath_ibcstatus_str[ltstate]); 279 } 280 281 dd->ipath_f_setextled(dd, lstate, ltstate); 282 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) { 283 dd->ipath_flags |= IPATH_LINKACTIVE; 284 dd->ipath_flags &= 285 ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN | 286 IPATH_LINKARMED | IPATH_NOCABLE); 287 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE; 288 *dd->ipath_statusp |= 289 IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF; 290 dd->ipath_f_setextled(dd, lstate, ltstate); 291 292 __ipath_layer_intr(dd, IPATH_LAYER_INT_IF_UP); 293 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) { 294 /* 295 * set INIT and DOWN. Down is checked by most of the other 296 * code, but INIT is useful to know in a few places. 297 */ 298 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN; 299 dd->ipath_flags &= 300 ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED 301 | IPATH_NOCABLE); 302 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE 303 | IPATH_STATUS_IB_READY); 304 dd->ipath_f_setextled(dd, lstate, ltstate); 305 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) { 306 dd->ipath_flags |= IPATH_LINKARMED; 307 dd->ipath_flags &= 308 ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT | 309 IPATH_LINKACTIVE | IPATH_NOCABLE); 310 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE 311 | IPATH_STATUS_IB_READY); 312 dd->ipath_f_setextled(dd, lstate, ltstate); 313 } else { 314 if (!noprint) 315 ipath_dbg("IBstatuschange unit %u: %s (%x)\n", 316 dd->ipath_unit, 317 ipath_ibcstatus_str[ltstate], ltstate); 318 } 319skip_ibchange: 320 dd->ipath_lastibcstat = val; 321} 322 323static void handle_supp_msgs(struct ipath_devdata *dd, 324 unsigned supp_msgs, char msg[512]) 325{ 326 /* 327 * Print the message unless it's ibc status change only, which 328 * happens so often we never want to count it. 329 */ 330 if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) { 331 ipath_decode_err(msg, sizeof msg, dd->ipath_lasterror & 332 ~INFINIPATH_E_IBSTATUSCHANGED); 333 if (dd->ipath_lasterror & 334 ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL)) 335 ipath_dev_err(dd, "Suppressed %u messages for " 336 "fast-repeating errors (%s) (%llx)\n", 337 supp_msgs, msg, 338 (unsigned long long) 339 dd->ipath_lasterror); 340 else { 341 /* 342 * rcvegrfull and rcvhdrqfull are "normal", for some 343 * types of processes (mostly benchmarks) that send 344 * huge numbers of messages, while not processing 345 * them. So only complain about these at debug 346 * level. 347 */ 348 ipath_dbg("Suppressed %u messages for %s\n", 349 supp_msgs, msg); 350 } 351 } 352} 353 354static unsigned handle_frequent_errors(struct ipath_devdata *dd, 355 ipath_err_t errs, char msg[512], 356 int *noprint) 357{ 358 unsigned long nc; 359 static unsigned long nextmsg_time; 360 static unsigned nmsgs, supp_msgs; 361 362 /* 363 * Throttle back "fast" messages to no more than 10 per 5 seconds. 364 * This isn't perfect, but it's a reasonable heuristic. If we get 365 * more than 10, give a 6x longer delay. 366 */ 367 nc = jiffies; 368 if (nmsgs > 10) { 369 if (time_before(nc, nextmsg_time)) { 370 *noprint = 1; 371 if (!supp_msgs++) 372 nextmsg_time = nc + HZ * 3; 373 } 374 else if (supp_msgs) { 375 handle_supp_msgs(dd, supp_msgs, msg); 376 supp_msgs = 0; 377 nmsgs = 0; 378 } 379 } 380 else if (!nmsgs++ || time_after(nc, nextmsg_time)) 381 nextmsg_time = nc + HZ / 2; 382 383 return supp_msgs; 384} 385 386static void handle_errors(struct ipath_devdata *dd, ipath_err_t errs) 387{ 388 char msg[512]; 389 u64 ignore_this_time = 0; 390 int i; 391 int chkerrpkts = 0, noprint = 0; 392 unsigned supp_msgs; 393 394 supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint); 395 396 /* 397 * don't report errors that are masked (includes those always 398 * ignored) 399 */ 400 errs &= ~dd->ipath_maskederrs; 401 402 /* do these first, they are most important */ 403 if (errs & INFINIPATH_E_HARDWARE) { 404 /* reuse same msg buf */ 405 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg); 406 } 407 408 if (!noprint && (errs & ~infinipath_e_bitsextant)) 409 ipath_dev_err(dd, "error interrupt with unknown errors " 410 "%llx set\n", (unsigned long long) 411 (errs & ~infinipath_e_bitsextant)); 412 413 if (errs & E_SUM_ERRS) 414 ignore_this_time = handle_e_sum_errs(dd, errs); 415 else if ((errs & E_SUM_LINK_PKTERRS) && 416 !(dd->ipath_flags & IPATH_LINKACTIVE)) { 417 /* 418 * This can happen when SMA is trying to bring the link 419 * up, but the IB link changes state at the "wrong" time. 420 * The IB logic then complains that the packet isn't 421 * valid. We don't want to confuse people, so we just 422 * don't print them, except at debug 423 */ 424 ipath_dbg("Ignoring packet errors %llx, because link not " 425 "ACTIVE\n", (unsigned long long) errs); 426 ignore_this_time = errs & E_SUM_LINK_PKTERRS; 427 } 428 429 if (supp_msgs == 250000) { 430 /* 431 * It's not entirely reasonable assuming that the errors set 432 * in the last clear period are all responsible for the 433 * problem, but the alternative is to assume it's the only 434 * ones on this particular interrupt, which also isn't great 435 */ 436 dd->ipath_maskederrs |= dd->ipath_lasterror | errs; 437 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 438 ~dd->ipath_maskederrs); 439 ipath_decode_err(msg, sizeof msg, 440 (dd->ipath_maskederrs & ~dd-> 441 ipath_ignorederrs)); 442 443 if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) & 444 ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL)) 445 ipath_dev_err(dd, "Disabling error(s) %llx because " 446 "occurring too frequently (%s)\n", 447 (unsigned long long) 448 (dd->ipath_maskederrs & 449 ~dd->ipath_ignorederrs), msg); 450 else { 451 /* 452 * rcvegrfull and rcvhdrqfull are "normal", 453 * for some types of processes (mostly benchmarks) 454 * that send huge numbers of messages, while not 455 * processing them. So only complain about 456 * these at debug level. 457 */ 458 ipath_dbg("Disabling frequent queue full errors " 459 "(%s)\n", msg); 460 } 461 462 /* 463 * Re-enable the masked errors after around 3 minutes. in 464 * ipath_get_faststats(). If we have a series of fast 465 * repeating but different errors, the interval will keep 466 * stretching out, but that's OK, as that's pretty 467 * catastrophic. 468 */ 469 dd->ipath_unmasktime = jiffies + HZ * 180; 470 } 471 472 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs); 473 if (ignore_this_time) 474 errs &= ~ignore_this_time; 475 if (errs & ~dd->ipath_lasterror) { 476 errs &= ~dd->ipath_lasterror; 477 /* never suppress duplicate hwerrors or ibstatuschange */ 478 dd->ipath_lasterror |= errs & 479 ~(INFINIPATH_E_HARDWARE | 480 INFINIPATH_E_IBSTATUSCHANGED); 481 } 482 if (!errs) 483 return; 484 485 if (!noprint) 486 /* 487 * the ones we mask off are handled specially below or above 488 */ 489 ipath_decode_err(msg, sizeof msg, 490 errs & ~(INFINIPATH_E_IBSTATUSCHANGED | 491 INFINIPATH_E_RRCVEGRFULL | 492 INFINIPATH_E_RRCVHDRFULL | 493 INFINIPATH_E_HARDWARE)); 494 else 495 /* so we don't need if (!noprint) at strlcat's below */ 496 *msg = 0; 497 498 if (errs & E_SUM_PKTERRS) { 499 ipath_stats.sps_pkterrs++; 500 chkerrpkts = 1; 501 } 502 if (errs & E_SUM_ERRS) 503 ipath_stats.sps_errs++; 504 505 if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) { 506 ipath_stats.sps_crcerrs++; 507 chkerrpkts = 1; 508 } 509 510 /* 511 * We don't want to print these two as they happen, or we can make 512 * the situation even worse, because it takes so long to print 513 * messages to serial consoles. Kernel ports get printed from 514 * fast_stats, no more than every 5 seconds, user ports get printed 515 * on close 516 */ 517 if (errs & INFINIPATH_E_RRCVHDRFULL) { 518 int any; 519 u32 hd, tl; 520 ipath_stats.sps_hdrqfull++; 521 for (any = i = 0; i < dd->ipath_cfgports; i++) { 522 struct ipath_portdata *pd = dd->ipath_pd[i]; 523 if (i == 0) { 524 hd = dd->ipath_port0head; 525 tl = (u32) le64_to_cpu( 526 *dd->ipath_hdrqtailptr); 527 } else if (pd && pd->port_cnt && 528 pd->port_rcvhdrtail_kvaddr) { 529 /* 530 * don't report same point multiple times, 531 * except kernel 532 */ 533 tl = (u32) * pd->port_rcvhdrtail_kvaddr; 534 if (tl == dd->ipath_lastrcvhdrqtails[i]) 535 continue; 536 hd = ipath_read_ureg32(dd, ur_rcvhdrhead, 537 i); 538 } else 539 continue; 540 if (hd == (tl + 1) || 541 (!hd && tl == dd->ipath_hdrqlast)) { 542 if (i == 0) 543 chkerrpkts = 1; 544 dd->ipath_lastrcvhdrqtails[i] = tl; 545 pd->port_hdrqfull++; 546 } 547 } 548 } 549 if (errs & INFINIPATH_E_RRCVEGRFULL) { 550 /* 551 * since this is of less importance and not likely to 552 * happen without also getting hdrfull, only count 553 * occurrences; don't check each port (or even the kernel 554 * vs user) 555 */ 556 ipath_stats.sps_etidfull++; 557 if (dd->ipath_port0head != 558 (u32) le64_to_cpu(*dd->ipath_hdrqtailptr)) 559 chkerrpkts = 1; 560 } 561 562 /* 563 * do this before IBSTATUSCHANGED, in case both bits set in a single 564 * interrupt; we want the STATUSCHANGE to "win", so we do our 565 * internal copy of state machine correctly 566 */ 567 if (errs & INFINIPATH_E_RIBLOSTLINK) { 568 /* 569 * force through block below 570 */ 571 errs |= INFINIPATH_E_IBSTATUSCHANGED; 572 ipath_stats.sps_iblink++; 573 dd->ipath_flags |= IPATH_LINKDOWN; 574 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT 575 | IPATH_LINKARMED | IPATH_LINKACTIVE); 576 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY; 577 if (!noprint) { 578 u64 st = ipath_read_kreg64( 579 dd, dd->ipath_kregs->kr_ibcstatus); 580 581 ipath_dbg("Lost link, link now down (%s)\n", 582 ipath_ibcstatus_str[st & 0xf]); 583 } 584 } 585 if (errs & INFINIPATH_E_IBSTATUSCHANGED) 586 handle_e_ibstatuschanged(dd, errs, noprint); 587 588 if (errs & INFINIPATH_E_RESET) { 589 if (!noprint) 590 ipath_dev_err(dd, "Got reset, requires re-init " 591 "(unload and reload driver)\n"); 592 dd->ipath_flags &= ~IPATH_INITTED; /* needs re-init */ 593 /* mark as having had error */ 594 *dd->ipath_statusp |= IPATH_STATUS_HWERROR; 595 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF; 596 } 597 598 if (!noprint && *msg) 599 ipath_dev_err(dd, "%s error\n", msg); 600 if (dd->ipath_sma_state_wanted & dd->ipath_flags) { 601 ipath_cdbg(VERBOSE, "sma wanted state %x, iflags now %x, " 602 "waking\n", dd->ipath_sma_state_wanted, 603 dd->ipath_flags); 604 wake_up_interruptible(&ipath_sma_state_wait); 605 } 606 607 if (chkerrpkts) 608 /* process possible error packets in hdrq */ 609 ipath_kreceive(dd); 610} 611 612/* this is separate to allow for better optimization of ipath_intr() */ 613 614static void ipath_bad_intr(struct ipath_devdata *dd, u32 * unexpectp) 615{ 616 /* 617 * sometimes happen during driver init and unload, don't want 618 * to process any interrupts at that point 619 */ 620 621 /* this is just a bandaid, not a fix, if something goes badly 622 * wrong */ 623 if (++*unexpectp > 100) { 624 if (++*unexpectp > 105) { 625 /* 626 * ok, we must be taking somebody else's interrupts, 627 * due to a messed up mptable and/or PIRQ table, so 628 * unregister the interrupt. We've seen this during 629 * linuxbios development work, and it may happen in 630 * the future again. 631 */ 632 if (dd->pcidev && dd->pcidev->irq) { 633 ipath_dev_err(dd, "Now %u unexpected " 634 "interrupts, unregistering " 635 "interrupt handler\n", 636 *unexpectp); 637 ipath_dbg("free_irq of irq %x\n", 638 dd->pcidev->irq); 639 free_irq(dd->pcidev->irq, dd); 640 } 641 } 642 if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) { 643 ipath_dev_err(dd, "%u unexpected interrupts, " 644 "disabling interrupts completely\n", 645 *unexpectp); 646 /* 647 * disable all interrupts, something is very wrong 648 */ 649 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 650 0ULL); 651 } 652 } else if (*unexpectp > 1) 653 ipath_dbg("Interrupt when not ready, should not happen, " 654 "ignoring\n"); 655} 656 657static void ipath_bad_regread(struct ipath_devdata *dd) 658{ 659 static int allbits; 660 661 /* separate routine, for better optimization of ipath_intr() */ 662 663 /* 664 * We print the message and disable interrupts, in hope of 665 * having a better chance of debugging the problem. 666 */ 667 ipath_dev_err(dd, 668 "Read of interrupt status failed (all bits set)\n"); 669 if (allbits++) { 670 /* disable all interrupts, something is very wrong */ 671 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL); 672 if (allbits == 2) { 673 ipath_dev_err(dd, "Still bad interrupt status, " 674 "unregistering interrupt\n"); 675 free_irq(dd->pcidev->irq, dd); 676 } else if (allbits > 2) { 677 if ((allbits % 10000) == 0) 678 printk("."); 679 } else 680 ipath_dev_err(dd, "Disabling interrupts, " 681 "multiple errors\n"); 682 } 683} 684 685static void handle_port_pioavail(struct ipath_devdata *dd) 686{ 687 u32 i; 688 /* 689 * start from port 1, since for now port 0 is never using 690 * wait_event for PIO 691 */ 692 for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) { 693 struct ipath_portdata *pd = dd->ipath_pd[i]; 694 695 if (pd && pd->port_cnt && 696 dd->ipath_portpiowait & (1U << i)) { 697 clear_bit(i, &dd->ipath_portpiowait); 698 if (test_bit(IPATH_PORT_WAITING_PIO, 699 &pd->port_flag)) { 700 clear_bit(IPATH_PORT_WAITING_PIO, 701 &pd->port_flag); 702 wake_up_interruptible(&pd->port_wait); 703 } 704 } 705 } 706} 707 708static void handle_layer_pioavail(struct ipath_devdata *dd) 709{ 710 int ret; 711 712 ret = __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE); 713 if (ret > 0) 714 goto set; 715 716 ret = __ipath_verbs_piobufavail(dd); 717 if (ret > 0) 718 goto set; 719 720 return; 721set: 722 set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl); 723 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 724 dd->ipath_sendctrl); 725} 726 727/* 728 * Handle receive interrupts for user ports; this means a user 729 * process was waiting for a packet to arrive, and didn't want 730 * to poll 731 */ 732static void handle_urcv(struct ipath_devdata *dd, u32 istat) 733{ 734 u64 portr; 735 int i; 736 int rcvdint = 0; 737 738 portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) & 739 infinipath_i_rcvavail_mask) 740 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) & 741 infinipath_i_rcvurg_mask); 742 for (i = 1; i < dd->ipath_cfgports; i++) { 743 struct ipath_portdata *pd = dd->ipath_pd[i]; 744 if (portr & (1 << i) && pd && pd->port_cnt && 745 test_bit(IPATH_PORT_WAITING_RCV, &pd->port_flag)) { 746 int rcbit; 747 clear_bit(IPATH_PORT_WAITING_RCV, 748 &pd->port_flag); 749 rcbit = i + INFINIPATH_R_INTRAVAIL_SHIFT; 750 clear_bit(1UL << rcbit, &dd->ipath_rcvctrl); 751 wake_up_interruptible(&pd->port_wait); 752 rcvdint = 1; 753 } 754 } 755 if (rcvdint) { 756 /* only want to take one interrupt, so turn off the rcv 757 * interrupt for all the ports that we did the wakeup on 758 * (but never for kernel port) 759 */ 760 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 761 dd->ipath_rcvctrl); 762 } 763} 764 765irqreturn_t ipath_intr(int irq, void *data, struct pt_regs *regs) 766{ 767 struct ipath_devdata *dd = data; 768 u32 istat; 769 ipath_err_t estat = 0; 770 irqreturn_t ret; 771 u32 p0bits; 772 static unsigned unexpected = 0; 773 static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) | 774 (1U<<INFINIPATH_I_RCVURG_SHIFT); 775 776 ipath_stats.sps_ints++; 777 778 if (!(dd->ipath_flags & IPATH_PRESENT)) { 779 /* 780 * This return value is not great, but we do not want the 781 * interrupt core code to remove our interrupt handler 782 * because we don't appear to be handling an interrupt 783 * during a chip reset. 784 */ 785 return IRQ_HANDLED; 786 } 787 788 /* 789 * this needs to be flags&initted, not statusp, so we keep 790 * taking interrupts even after link goes down, etc. 791 * Also, we *must* clear the interrupt at some point, or we won't 792 * take it again, which can be real bad for errors, etc... 793 */ 794 795 if (!(dd->ipath_flags & IPATH_INITTED)) { 796 ipath_bad_intr(dd, &unexpected); 797 ret = IRQ_NONE; 798 goto bail; 799 } 800 801 /* 802 * We try to avoid reading the interrupt status register, since 803 * that's a PIO read, and stalls the processor for up to about 804 * ~0.25 usec. The idea is that if we processed a port0 packet, 805 * we blindly clear the port 0 receive interrupt bits, and nothing 806 * else, then return. If other interrupts are pending, the chip 807 * will re-interrupt us as soon as we write the intclear register. 808 * We then won't process any more kernel packets (if not the 2nd 809 * time, then the 3rd or 4th) and we'll then handle the other 810 * interrupts. We clear the interrupts first so that we don't 811 * lose intr for later packets that arrive while we are processing. 812 */ 813 if (dd->ipath_port0head != 814 (u32)le64_to_cpu(*dd->ipath_hdrqtailptr)) { 815 u32 oldhead = dd->ipath_port0head; 816 if (dd->ipath_flags & IPATH_GPIO_INTR) { 817 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear, 818 (u64) (1 << 2)); 819 p0bits = port0rbits | INFINIPATH_I_GPIO; 820 } 821 else 822 p0bits = port0rbits; 823 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, p0bits); 824 ipath_kreceive(dd); 825 if (oldhead != dd->ipath_port0head) { 826 ipath_stats.sps_fastrcvint++; 827 goto done; 828 } 829 istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus); 830 } 831 832 istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus); 833 if (unlikely(!istat)) { 834 ipath_stats.sps_nullintr++; 835 ret = IRQ_NONE; /* not our interrupt, or already handled */ 836 goto bail; 837 } 838 if (unlikely(istat == -1)) { 839 ipath_bad_regread(dd); 840 /* don't know if it was our interrupt or not */ 841 ret = IRQ_NONE; 842 goto bail; 843 } 844 845 if (unexpected) 846 unexpected = 0; 847 848 if (unlikely(istat & ~infinipath_i_bitsextant)) 849 ipath_dev_err(dd, 850 "interrupt with unknown interrupts %x set\n", 851 istat & (u32) ~ infinipath_i_bitsextant); 852 else 853 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat); 854 855 if (unlikely(istat & INFINIPATH_I_ERROR)) { 856 ipath_stats.sps_errints++; 857 estat = ipath_read_kreg64(dd, 858 dd->ipath_kregs->kr_errorstatus); 859 if (!estat) 860 dev_info(&dd->pcidev->dev, "error interrupt (%x), " 861 "but no error bits set!\n", istat); 862 else if (estat == -1LL) 863 /* 864 * should we try clearing all, or hope next read 865 * works? 866 */ 867 ipath_dev_err(dd, "Read of error status failed " 868 "(all bits set); ignoring\n"); 869 else 870 handle_errors(dd, estat); 871 } 872 873 p0bits = port0rbits; 874 if (istat & INFINIPATH_I_GPIO) { 875 /* 876 * Packets are available in the port 0 rcv queue. 877 * Eventually this needs to be generalized to check 878 * IPATH_GPIO_INTR, and the specific GPIO bit, if 879 * GPIO interrupts are used for anything else. 880 */ 881 if (unlikely(!(dd->ipath_flags & IPATH_GPIO_INTR))) { 882 u32 gpiostatus; 883 gpiostatus = ipath_read_kreg32( 884 dd, dd->ipath_kregs->kr_gpio_status); 885 ipath_dbg("Unexpected GPIO interrupt bits %x\n", 886 gpiostatus); 887 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear, 888 gpiostatus); 889 } 890 else { 891 /* Clear GPIO status bit 2 */ 892 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear, 893 (u64) (1 << 2)); 894 p0bits |= INFINIPATH_I_GPIO; 895 } 896 } 897 898 /* 899 * clear the ones we will deal with on this round 900 * We clear it early, mostly for receive interrupts, so we 901 * know the chip will have seen this by the time we process 902 * the queue, and will re-interrupt if necessary. The processor 903 * itself won't take the interrupt again until we return. 904 */ 905 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat); 906 907 /* 908 * we check for both transition from empty to non-empty, and urgent 909 * packets (those with the interrupt bit set in the header), and 910 * if enabled, the GPIO bit 2 interrupt used for port0 on some 911 * HT-400 boards. 912 * Do this before checking for pio buffers available, since 913 * receives can overflow; piobuf waiters can afford a few 914 * extra cycles, since they were waiting anyway. 915 */ 916 if (istat & p0bits) { 917 ipath_kreceive(dd); 918 istat &= ~port0rbits; 919 } 920 if (istat & ((infinipath_i_rcvavail_mask << 921 INFINIPATH_I_RCVAVAIL_SHIFT) 922 | (infinipath_i_rcvurg_mask << 923 INFINIPATH_I_RCVURG_SHIFT))) 924 handle_urcv(dd, istat); 925 926 if (istat & INFINIPATH_I_SPIOBUFAVAIL) { 927 clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl); 928 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 929 dd->ipath_sendctrl); 930 931 if (dd->ipath_portpiowait) 932 handle_port_pioavail(dd); 933 934 handle_layer_pioavail(dd); 935 } 936 937done: 938 ret = IRQ_HANDLED; 939 940bail: 941 return ret; 942} 943