ipath_intr.c revision 7d12e780e003f93433d49ce78cfedf4b4c52adc5
1/* 2 * Copyright (c) 2006 QLogic, Inc. All rights reserved. 3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34#include <linux/pci.h> 35 36#include "ipath_kernel.h" 37#include "ipath_verbs.h" 38#include "ipath_common.h" 39 40/* 41 * Called when we might have an error that is specific to a particular 42 * PIO buffer, and may need to cancel that buffer, so it can be re-used. 43 */ 44void ipath_disarm_senderrbufs(struct ipath_devdata *dd) 45{ 46 u32 piobcnt; 47 unsigned long sbuf[4]; 48 /* 49 * it's possible that sendbuffererror could have bits set; might 50 * have already done this as a result of hardware error handling 51 */ 52 piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k; 53 /* read these before writing errorclear */ 54 sbuf[0] = ipath_read_kreg64( 55 dd, dd->ipath_kregs->kr_sendbuffererror); 56 sbuf[1] = ipath_read_kreg64( 57 dd, dd->ipath_kregs->kr_sendbuffererror + 1); 58 if (piobcnt > 128) { 59 sbuf[2] = ipath_read_kreg64( 60 dd, dd->ipath_kregs->kr_sendbuffererror + 2); 61 sbuf[3] = ipath_read_kreg64( 62 dd, dd->ipath_kregs->kr_sendbuffererror + 3); 63 } 64 65 if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) { 66 int i; 67 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG)) { 68 __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG, 69 "SendbufErrs %lx %lx", sbuf[0], 70 sbuf[1]); 71 if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128) 72 printk(" %lx %lx ", sbuf[2], sbuf[3]); 73 printk("\n"); 74 } 75 76 for (i = 0; i < piobcnt; i++) 77 if (test_bit(i, sbuf)) 78 ipath_disarm_piobufs(dd, i, 1); 79 dd->ipath_lastcancel = jiffies+3; /* no armlaunch for a bit */ 80 } 81} 82 83 84/* These are all rcv-related errors which we want to count for stats */ 85#define E_SUM_PKTERRS \ 86 (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \ 87 INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \ 88 INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \ 89 INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \ 90 INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \ 91 INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP) 92 93/* These are all send-related errors which we want to count for stats */ 94#define E_SUM_ERRS \ 95 (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \ 96 INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \ 97 INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \ 98 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \ 99 INFINIPATH_E_INVALIDADDR) 100 101/* 102 * these are errors that can occur when the link changes state while 103 * a packet is being sent or received. This doesn't cover things 104 * like EBP or VCRC that can be the result of a sending having the 105 * link change state, so we receive a "known bad" packet. 106 */ 107#define E_SUM_LINK_PKTERRS \ 108 (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \ 109 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \ 110 INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \ 111 INFINIPATH_E_RUNEXPCHAR) 112 113static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs) 114{ 115 u64 ignore_this_time = 0; 116 117 ipath_disarm_senderrbufs(dd); 118 if ((errs & E_SUM_LINK_PKTERRS) && 119 !(dd->ipath_flags & IPATH_LINKACTIVE)) { 120 /* 121 * This can happen when SMA is trying to bring the link 122 * up, but the IB link changes state at the "wrong" time. 123 * The IB logic then complains that the packet isn't 124 * valid. We don't want to confuse people, so we just 125 * don't print them, except at debug 126 */ 127 ipath_dbg("Ignoring packet errors %llx, because link not " 128 "ACTIVE\n", (unsigned long long) errs); 129 ignore_this_time = errs & E_SUM_LINK_PKTERRS; 130 } 131 132 return ignore_this_time; 133} 134 135/* generic hw error messages... */ 136#define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \ 137 { \ 138 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a << \ 139 INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ), \ 140 .msg = "TXE " #a " Memory Parity" \ 141 } 142#define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \ 143 { \ 144 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a << \ 145 INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ), \ 146 .msg = "RXE " #a " Memory Parity" \ 147 } 148 149static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = { 150 INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"), 151 INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"), 152 153 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF), 154 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC), 155 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO), 156 157 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF), 158 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ), 159 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID), 160 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID), 161 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF), 162 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO), 163 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO), 164}; 165 166/** 167 * ipath_format_hwmsg - format a single hwerror message 168 * @msg message buffer 169 * @msgl length of message buffer 170 * @hwmsg message to add to message buffer 171 */ 172static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg) 173{ 174 strlcat(msg, "[", msgl); 175 strlcat(msg, hwmsg, msgl); 176 strlcat(msg, "]", msgl); 177} 178 179/** 180 * ipath_format_hwerrors - format hardware error messages for display 181 * @hwerrs hardware errors bit vector 182 * @hwerrmsgs hardware error descriptions 183 * @nhwerrmsgs number of hwerrmsgs 184 * @msg message buffer 185 * @msgl message buffer length 186 */ 187void ipath_format_hwerrors(u64 hwerrs, 188 const struct ipath_hwerror_msgs *hwerrmsgs, 189 size_t nhwerrmsgs, 190 char *msg, size_t msgl) 191{ 192 int i; 193 const int glen = 194 sizeof(ipath_generic_hwerror_msgs) / 195 sizeof(ipath_generic_hwerror_msgs[0]); 196 197 for (i=0; i<glen; i++) { 198 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) { 199 ipath_format_hwmsg(msg, msgl, 200 ipath_generic_hwerror_msgs[i].msg); 201 } 202 } 203 204 for (i=0; i<nhwerrmsgs; i++) { 205 if (hwerrs & hwerrmsgs[i].mask) { 206 ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg); 207 } 208 } 209} 210 211/* return the strings for the most common link states */ 212static char *ib_linkstate(u32 linkstate) 213{ 214 char *ret; 215 216 switch (linkstate) { 217 case IPATH_IBSTATE_INIT: 218 ret = "Init"; 219 break; 220 case IPATH_IBSTATE_ARM: 221 ret = "Arm"; 222 break; 223 case IPATH_IBSTATE_ACTIVE: 224 ret = "Active"; 225 break; 226 default: 227 ret = "Down"; 228 } 229 230 return ret; 231} 232 233static void handle_e_ibstatuschanged(struct ipath_devdata *dd, 234 ipath_err_t errs, int noprint) 235{ 236 u64 val; 237 u32 ltstate, lstate; 238 239 /* 240 * even if diags are enabled, we want to notice LINKINIT, etc. 241 * We just don't want to change the LED state, or 242 * dd->ipath_kregs->kr_ibcctrl 243 */ 244 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus); 245 lstate = val & IPATH_IBSTATE_MASK; 246 247 /* 248 * this is confusing enough when it happens that I want to always put it 249 * on the console and in the logs. If it was a requested state change, 250 * we'll have already cleared the flags, so we won't print this warning 251 */ 252 if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE) 253 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) { 254 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n", 255 (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE", 256 ib_linkstate(lstate)); 257 /* 258 * Flush all queued sends when link went to DOWN or INIT, 259 * to be sure that they don't block SMA and other MAD packets 260 */ 261 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 262 INFINIPATH_S_ABORT); 263 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf, 264 (unsigned)(dd->ipath_piobcnt2k + 265 dd->ipath_piobcnt4k) - 266 dd->ipath_lastport_piobuf); 267 } 268 else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM || 269 lstate == IPATH_IBSTATE_ACTIVE) { 270 /* 271 * only print at SMA if there is a change, debug if not 272 * (sometimes we want to know that, usually not). 273 */ 274 if (lstate == ((unsigned) dd->ipath_lastibcstat 275 & IPATH_IBSTATE_MASK)) { 276 ipath_dbg("Status change intr but no change (%s)\n", 277 ib_linkstate(lstate)); 278 } 279 else 280 ipath_cdbg(VERBOSE, "Unit %u link state %s, last " 281 "was %s\n", dd->ipath_unit, 282 ib_linkstate(lstate), 283 ib_linkstate((unsigned) 284 dd->ipath_lastibcstat 285 & IPATH_IBSTATE_MASK)); 286 } 287 else { 288 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK; 289 if (lstate == IPATH_IBSTATE_INIT || 290 lstate == IPATH_IBSTATE_ARM || 291 lstate == IPATH_IBSTATE_ACTIVE) 292 ipath_cdbg(VERBOSE, "Unit %u link state down" 293 " (state 0x%x), from %s\n", 294 dd->ipath_unit, 295 (u32)val & IPATH_IBSTATE_MASK, 296 ib_linkstate(lstate)); 297 else 298 ipath_cdbg(VERBOSE, "Unit %u link state changed " 299 "to 0x%x from down (%x)\n", 300 dd->ipath_unit, (u32) val, lstate); 301 } 302 ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) & 303 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK; 304 lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) & 305 INFINIPATH_IBCS_LINKSTATE_MASK; 306 307 if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE || 308 ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) { 309 u32 last_ltstate; 310 311 /* 312 * Ignore cycling back and forth from Polling.Active 313 * to Polling.Quiet while waiting for the other end of 314 * the link to come up. We will cycle back and forth 315 * between them if no cable is plugged in, 316 * the other device is powered off or disabled, etc. 317 */ 318 last_ltstate = (dd->ipath_lastibcstat >> 319 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) 320 & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK; 321 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE 322 || last_ltstate == 323 INFINIPATH_IBCS_LT_STATE_POLLQUIET) { 324 if (dd->ipath_ibpollcnt > 40) { 325 dd->ipath_flags |= IPATH_NOCABLE; 326 *dd->ipath_statusp |= 327 IPATH_STATUS_IB_NOCABLE; 328 } else 329 dd->ipath_ibpollcnt++; 330 goto skip_ibchange; 331 } 332 } 333 dd->ipath_ibpollcnt = 0; /* some state other than 2 or 3 */ 334 ipath_stats.sps_iblink++; 335 if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) { 336 dd->ipath_flags |= IPATH_LINKDOWN; 337 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT 338 | IPATH_LINKACTIVE | 339 IPATH_LINKARMED); 340 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY; 341 dd->ipath_lli_counter = 0; 342 if (!noprint) { 343 if (((dd->ipath_lastibcstat >> 344 INFINIPATH_IBCS_LINKSTATE_SHIFT) & 345 INFINIPATH_IBCS_LINKSTATE_MASK) 346 == INFINIPATH_IBCS_L_STATE_ACTIVE) 347 /* if from up to down be more vocal */ 348 ipath_cdbg(VERBOSE, 349 "Unit %u link now down (%s)\n", 350 dd->ipath_unit, 351 ipath_ibcstatus_str[ltstate]); 352 else 353 ipath_cdbg(VERBOSE, "Unit %u link is " 354 "down (%s)\n", dd->ipath_unit, 355 ipath_ibcstatus_str[ltstate]); 356 } 357 358 dd->ipath_f_setextled(dd, lstate, ltstate); 359 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) { 360 dd->ipath_flags |= IPATH_LINKACTIVE; 361 dd->ipath_flags &= 362 ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN | 363 IPATH_LINKARMED | IPATH_NOCABLE); 364 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE; 365 *dd->ipath_statusp |= 366 IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF; 367 dd->ipath_f_setextled(dd, lstate, ltstate); 368 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) { 369 /* 370 * set INIT and DOWN. Down is checked by most of the other 371 * code, but INIT is useful to know in a few places. 372 */ 373 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN; 374 dd->ipath_flags &= 375 ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED 376 | IPATH_NOCABLE); 377 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE 378 | IPATH_STATUS_IB_READY); 379 dd->ipath_f_setextled(dd, lstate, ltstate); 380 } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) { 381 dd->ipath_flags |= IPATH_LINKARMED; 382 dd->ipath_flags &= 383 ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT | 384 IPATH_LINKACTIVE | IPATH_NOCABLE); 385 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE 386 | IPATH_STATUS_IB_READY); 387 dd->ipath_f_setextled(dd, lstate, ltstate); 388 } else { 389 if (!noprint) 390 ipath_dbg("IBstatuschange unit %u: %s (%x)\n", 391 dd->ipath_unit, 392 ipath_ibcstatus_str[ltstate], ltstate); 393 } 394skip_ibchange: 395 dd->ipath_lastibcstat = val; 396} 397 398static void handle_supp_msgs(struct ipath_devdata *dd, 399 unsigned supp_msgs, char msg[512]) 400{ 401 /* 402 * Print the message unless it's ibc status change only, which 403 * happens so often we never want to count it. 404 */ 405 if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) { 406 ipath_decode_err(msg, sizeof msg, dd->ipath_lasterror & 407 ~INFINIPATH_E_IBSTATUSCHANGED); 408 if (dd->ipath_lasterror & 409 ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL)) 410 ipath_dev_err(dd, "Suppressed %u messages for " 411 "fast-repeating errors (%s) (%llx)\n", 412 supp_msgs, msg, 413 (unsigned long long) 414 dd->ipath_lasterror); 415 else { 416 /* 417 * rcvegrfull and rcvhdrqfull are "normal", for some 418 * types of processes (mostly benchmarks) that send 419 * huge numbers of messages, while not processing 420 * them. So only complain about these at debug 421 * level. 422 */ 423 ipath_dbg("Suppressed %u messages for %s\n", 424 supp_msgs, msg); 425 } 426 } 427} 428 429static unsigned handle_frequent_errors(struct ipath_devdata *dd, 430 ipath_err_t errs, char msg[512], 431 int *noprint) 432{ 433 unsigned long nc; 434 static unsigned long nextmsg_time; 435 static unsigned nmsgs, supp_msgs; 436 437 /* 438 * Throttle back "fast" messages to no more than 10 per 5 seconds. 439 * This isn't perfect, but it's a reasonable heuristic. If we get 440 * more than 10, give a 6x longer delay. 441 */ 442 nc = jiffies; 443 if (nmsgs > 10) { 444 if (time_before(nc, nextmsg_time)) { 445 *noprint = 1; 446 if (!supp_msgs++) 447 nextmsg_time = nc + HZ * 3; 448 } 449 else if (supp_msgs) { 450 handle_supp_msgs(dd, supp_msgs, msg); 451 supp_msgs = 0; 452 nmsgs = 0; 453 } 454 } 455 else if (!nmsgs++ || time_after(nc, nextmsg_time)) 456 nextmsg_time = nc + HZ / 2; 457 458 return supp_msgs; 459} 460 461static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs) 462{ 463 char msg[512]; 464 u64 ignore_this_time = 0; 465 int i; 466 int chkerrpkts = 0, noprint = 0; 467 unsigned supp_msgs; 468 469 supp_msgs = handle_frequent_errors(dd, errs, msg, &noprint); 470 471 /* 472 * don't report errors that are masked (includes those always 473 * ignored) 474 */ 475 errs &= ~dd->ipath_maskederrs; 476 477 /* do these first, they are most important */ 478 if (errs & INFINIPATH_E_HARDWARE) { 479 /* reuse same msg buf */ 480 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg); 481 } 482 483 if (!noprint && (errs & ~dd->ipath_e_bitsextant)) 484 ipath_dev_err(dd, "error interrupt with unknown errors " 485 "%llx set\n", (unsigned long long) 486 (errs & ~dd->ipath_e_bitsextant)); 487 488 if (errs & E_SUM_ERRS) 489 ignore_this_time = handle_e_sum_errs(dd, errs); 490 else if ((errs & E_SUM_LINK_PKTERRS) && 491 !(dd->ipath_flags & IPATH_LINKACTIVE)) { 492 /* 493 * This can happen when SMA is trying to bring the link 494 * up, but the IB link changes state at the "wrong" time. 495 * The IB logic then complains that the packet isn't 496 * valid. We don't want to confuse people, so we just 497 * don't print them, except at debug 498 */ 499 ipath_dbg("Ignoring packet errors %llx, because link not " 500 "ACTIVE\n", (unsigned long long) errs); 501 ignore_this_time = errs & E_SUM_LINK_PKTERRS; 502 } 503 504 if (supp_msgs == 250000) { 505 /* 506 * It's not entirely reasonable assuming that the errors set 507 * in the last clear period are all responsible for the 508 * problem, but the alternative is to assume it's the only 509 * ones on this particular interrupt, which also isn't great 510 */ 511 dd->ipath_maskederrs |= dd->ipath_lasterror | errs; 512 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 513 ~dd->ipath_maskederrs); 514 ipath_decode_err(msg, sizeof msg, 515 (dd->ipath_maskederrs & ~dd-> 516 ipath_ignorederrs)); 517 518 if ((dd->ipath_maskederrs & ~dd->ipath_ignorederrs) & 519 ~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL)) 520 ipath_dev_err(dd, "Disabling error(s) %llx because " 521 "occurring too frequently (%s)\n", 522 (unsigned long long) 523 (dd->ipath_maskederrs & 524 ~dd->ipath_ignorederrs), msg); 525 else { 526 /* 527 * rcvegrfull and rcvhdrqfull are "normal", 528 * for some types of processes (mostly benchmarks) 529 * that send huge numbers of messages, while not 530 * processing them. So only complain about 531 * these at debug level. 532 */ 533 ipath_dbg("Disabling frequent queue full errors " 534 "(%s)\n", msg); 535 } 536 537 /* 538 * Re-enable the masked errors after around 3 minutes. in 539 * ipath_get_faststats(). If we have a series of fast 540 * repeating but different errors, the interval will keep 541 * stretching out, but that's OK, as that's pretty 542 * catastrophic. 543 */ 544 dd->ipath_unmasktime = jiffies + HZ * 180; 545 } 546 547 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs); 548 if (ignore_this_time) 549 errs &= ~ignore_this_time; 550 if (errs & ~dd->ipath_lasterror) { 551 errs &= ~dd->ipath_lasterror; 552 /* never suppress duplicate hwerrors or ibstatuschange */ 553 dd->ipath_lasterror |= errs & 554 ~(INFINIPATH_E_HARDWARE | 555 INFINIPATH_E_IBSTATUSCHANGED); 556 } 557 558 /* likely due to cancel, so suppress */ 559 if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) && 560 dd->ipath_lastcancel > jiffies) { 561 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n"); 562 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN); 563 } 564 565 if (!errs) 566 return 0; 567 568 if (!noprint) 569 /* 570 * the ones we mask off are handled specially below or above 571 */ 572 ipath_decode_err(msg, sizeof msg, 573 errs & ~(INFINIPATH_E_IBSTATUSCHANGED | 574 INFINIPATH_E_RRCVEGRFULL | 575 INFINIPATH_E_RRCVHDRFULL | 576 INFINIPATH_E_HARDWARE)); 577 else 578 /* so we don't need if (!noprint) at strlcat's below */ 579 *msg = 0; 580 581 if (errs & E_SUM_PKTERRS) { 582 ipath_stats.sps_pkterrs++; 583 chkerrpkts = 1; 584 } 585 if (errs & E_SUM_ERRS) 586 ipath_stats.sps_errs++; 587 588 if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) { 589 ipath_stats.sps_crcerrs++; 590 chkerrpkts = 1; 591 } 592 593 /* 594 * We don't want to print these two as they happen, or we can make 595 * the situation even worse, because it takes so long to print 596 * messages to serial consoles. Kernel ports get printed from 597 * fast_stats, no more than every 5 seconds, user ports get printed 598 * on close 599 */ 600 if (errs & INFINIPATH_E_RRCVHDRFULL) { 601 int any; 602 u32 hd, tl; 603 ipath_stats.sps_hdrqfull++; 604 for (any = i = 0; i < dd->ipath_cfgports; i++) { 605 struct ipath_portdata *pd = dd->ipath_pd[i]; 606 if (i == 0) { 607 hd = dd->ipath_port0head; 608 tl = (u32) le64_to_cpu( 609 *dd->ipath_hdrqtailptr); 610 } else if (pd && pd->port_cnt && 611 pd->port_rcvhdrtail_kvaddr) { 612 /* 613 * don't report same point multiple times, 614 * except kernel 615 */ 616 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr; 617 if (tl == dd->ipath_lastrcvhdrqtails[i]) 618 continue; 619 hd = ipath_read_ureg32(dd, ur_rcvhdrhead, 620 i); 621 } else 622 continue; 623 if (hd == (tl + 1) || 624 (!hd && tl == dd->ipath_hdrqlast)) { 625 if (i == 0) 626 chkerrpkts = 1; 627 dd->ipath_lastrcvhdrqtails[i] = tl; 628 pd->port_hdrqfull++; 629 } 630 } 631 } 632 if (errs & INFINIPATH_E_RRCVEGRFULL) { 633 /* 634 * since this is of less importance and not likely to 635 * happen without also getting hdrfull, only count 636 * occurrences; don't check each port (or even the kernel 637 * vs user) 638 */ 639 ipath_stats.sps_etidfull++; 640 if (dd->ipath_port0head != 641 (u32) le64_to_cpu(*dd->ipath_hdrqtailptr)) 642 chkerrpkts = 1; 643 } 644 645 /* 646 * do this before IBSTATUSCHANGED, in case both bits set in a single 647 * interrupt; we want the STATUSCHANGE to "win", so we do our 648 * internal copy of state machine correctly 649 */ 650 if (errs & INFINIPATH_E_RIBLOSTLINK) { 651 /* 652 * force through block below 653 */ 654 errs |= INFINIPATH_E_IBSTATUSCHANGED; 655 ipath_stats.sps_iblink++; 656 dd->ipath_flags |= IPATH_LINKDOWN; 657 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT 658 | IPATH_LINKARMED | IPATH_LINKACTIVE); 659 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY; 660 if (!noprint) { 661 u64 st = ipath_read_kreg64( 662 dd, dd->ipath_kregs->kr_ibcstatus); 663 664 ipath_dbg("Lost link, link now down (%s)\n", 665 ipath_ibcstatus_str[st & 0xf]); 666 } 667 } 668 if (errs & INFINIPATH_E_IBSTATUSCHANGED) 669 handle_e_ibstatuschanged(dd, errs, noprint); 670 671 if (errs & INFINIPATH_E_RESET) { 672 if (!noprint) 673 ipath_dev_err(dd, "Got reset, requires re-init " 674 "(unload and reload driver)\n"); 675 dd->ipath_flags &= ~IPATH_INITTED; /* needs re-init */ 676 /* mark as having had error */ 677 *dd->ipath_statusp |= IPATH_STATUS_HWERROR; 678 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF; 679 } 680 681 if (!noprint && *msg) 682 ipath_dev_err(dd, "%s error\n", msg); 683 if (dd->ipath_state_wanted & dd->ipath_flags) { 684 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, " 685 "waking\n", dd->ipath_state_wanted, 686 dd->ipath_flags); 687 wake_up_interruptible(&ipath_state_wait); 688 } 689 690 return chkerrpkts; 691} 692 693/* this is separate to allow for better optimization of ipath_intr() */ 694 695static void ipath_bad_intr(struct ipath_devdata *dd, u32 * unexpectp) 696{ 697 /* 698 * sometimes happen during driver init and unload, don't want 699 * to process any interrupts at that point 700 */ 701 702 /* this is just a bandaid, not a fix, if something goes badly 703 * wrong */ 704 if (++*unexpectp > 100) { 705 if (++*unexpectp > 105) { 706 /* 707 * ok, we must be taking somebody else's interrupts, 708 * due to a messed up mptable and/or PIRQ table, so 709 * unregister the interrupt. We've seen this during 710 * linuxbios development work, and it may happen in 711 * the future again. 712 */ 713 if (dd->pcidev && dd->pcidev->irq) { 714 ipath_dev_err(dd, "Now %u unexpected " 715 "interrupts, unregistering " 716 "interrupt handler\n", 717 *unexpectp); 718 ipath_dbg("free_irq of irq %x\n", 719 dd->pcidev->irq); 720 free_irq(dd->pcidev->irq, dd); 721 } 722 } 723 if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) { 724 ipath_dev_err(dd, "%u unexpected interrupts, " 725 "disabling interrupts completely\n", 726 *unexpectp); 727 /* 728 * disable all interrupts, something is very wrong 729 */ 730 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 731 0ULL); 732 } 733 } else if (*unexpectp > 1) 734 ipath_dbg("Interrupt when not ready, should not happen, " 735 "ignoring\n"); 736} 737 738static void ipath_bad_regread(struct ipath_devdata *dd) 739{ 740 static int allbits; 741 742 /* separate routine, for better optimization of ipath_intr() */ 743 744 /* 745 * We print the message and disable interrupts, in hope of 746 * having a better chance of debugging the problem. 747 */ 748 ipath_dev_err(dd, 749 "Read of interrupt status failed (all bits set)\n"); 750 if (allbits++) { 751 /* disable all interrupts, something is very wrong */ 752 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL); 753 if (allbits == 2) { 754 ipath_dev_err(dd, "Still bad interrupt status, " 755 "unregistering interrupt\n"); 756 free_irq(dd->pcidev->irq, dd); 757 } else if (allbits > 2) { 758 if ((allbits % 10000) == 0) 759 printk("."); 760 } else 761 ipath_dev_err(dd, "Disabling interrupts, " 762 "multiple errors\n"); 763 } 764} 765 766static void handle_port_pioavail(struct ipath_devdata *dd) 767{ 768 u32 i; 769 /* 770 * start from port 1, since for now port 0 is never using 771 * wait_event for PIO 772 */ 773 for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) { 774 struct ipath_portdata *pd = dd->ipath_pd[i]; 775 776 if (pd && pd->port_cnt && 777 dd->ipath_portpiowait & (1U << i)) { 778 clear_bit(i, &dd->ipath_portpiowait); 779 if (test_bit(IPATH_PORT_WAITING_PIO, 780 &pd->port_flag)) { 781 clear_bit(IPATH_PORT_WAITING_PIO, 782 &pd->port_flag); 783 wake_up_interruptible(&pd->port_wait); 784 } 785 } 786 } 787} 788 789static void handle_layer_pioavail(struct ipath_devdata *dd) 790{ 791 int ret; 792 793 ret = ipath_ib_piobufavail(dd->verbs_dev); 794 if (ret > 0) 795 goto set; 796 797 return; 798set: 799 set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl); 800 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 801 dd->ipath_sendctrl); 802} 803 804/* 805 * Handle receive interrupts for user ports; this means a user 806 * process was waiting for a packet to arrive, and didn't want 807 * to poll 808 */ 809static void handle_urcv(struct ipath_devdata *dd, u32 istat) 810{ 811 u64 portr; 812 int i; 813 int rcvdint = 0; 814 815 portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) & 816 dd->ipath_i_rcvavail_mask) 817 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) & 818 dd->ipath_i_rcvurg_mask); 819 for (i = 1; i < dd->ipath_cfgports; i++) { 820 struct ipath_portdata *pd = dd->ipath_pd[i]; 821 if (portr & (1 << i) && pd && pd->port_cnt && 822 test_bit(IPATH_PORT_WAITING_RCV, &pd->port_flag)) { 823 int rcbit; 824 clear_bit(IPATH_PORT_WAITING_RCV, 825 &pd->port_flag); 826 rcbit = i + INFINIPATH_R_INTRAVAIL_SHIFT; 827 clear_bit(1UL << rcbit, &dd->ipath_rcvctrl); 828 wake_up_interruptible(&pd->port_wait); 829 rcvdint = 1; 830 } 831 } 832 if (rcvdint) { 833 /* only want to take one interrupt, so turn off the rcv 834 * interrupt for all the ports that we did the wakeup on 835 * (but never for kernel port) 836 */ 837 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 838 dd->ipath_rcvctrl); 839 } 840} 841 842irqreturn_t ipath_intr(int irq, void *data) 843{ 844 struct ipath_devdata *dd = data; 845 u32 istat, chk0rcv = 0; 846 ipath_err_t estat = 0; 847 irqreturn_t ret; 848 u32 oldhead, curtail; 849 static unsigned unexpected = 0; 850 static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) | 851 (1U<<INFINIPATH_I_RCVURG_SHIFT); 852 853 ipath_stats.sps_ints++; 854 855 if (!(dd->ipath_flags & IPATH_PRESENT)) { 856 /* 857 * This return value is not great, but we do not want the 858 * interrupt core code to remove our interrupt handler 859 * because we don't appear to be handling an interrupt 860 * during a chip reset. 861 */ 862 return IRQ_HANDLED; 863 } 864 865 /* 866 * this needs to be flags&initted, not statusp, so we keep 867 * taking interrupts even after link goes down, etc. 868 * Also, we *must* clear the interrupt at some point, or we won't 869 * take it again, which can be real bad for errors, etc... 870 */ 871 872 if (!(dd->ipath_flags & IPATH_INITTED)) { 873 ipath_bad_intr(dd, &unexpected); 874 ret = IRQ_NONE; 875 goto bail; 876 } 877 878 /* 879 * We try to avoid reading the interrupt status register, since 880 * that's a PIO read, and stalls the processor for up to about 881 * ~0.25 usec. The idea is that if we processed a port0 packet, 882 * we blindly clear the port 0 receive interrupt bits, and nothing 883 * else, then return. If other interrupts are pending, the chip 884 * will re-interrupt us as soon as we write the intclear register. 885 * We then won't process any more kernel packets (if not the 2nd 886 * time, then the 3rd or 4th) and we'll then handle the other 887 * interrupts. We clear the interrupts first so that we don't 888 * lose intr for later packets that arrive while we are processing. 889 */ 890 oldhead = dd->ipath_port0head; 891 curtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr); 892 if (oldhead != curtail) { 893 if (dd->ipath_flags & IPATH_GPIO_INTR) { 894 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear, 895 (u64) (1 << IPATH_GPIO_PORT0_BIT)); 896 istat = port0rbits | INFINIPATH_I_GPIO; 897 } 898 else 899 istat = port0rbits; 900 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat); 901 ipath_kreceive(dd); 902 if (oldhead != dd->ipath_port0head) { 903 ipath_stats.sps_fastrcvint++; 904 goto done; 905 } 906 } 907 908 istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus); 909 910 if (unlikely(!istat)) { 911 ipath_stats.sps_nullintr++; 912 ret = IRQ_NONE; /* not our interrupt, or already handled */ 913 goto bail; 914 } 915 if (unlikely(istat == -1)) { 916 ipath_bad_regread(dd); 917 /* don't know if it was our interrupt or not */ 918 ret = IRQ_NONE; 919 goto bail; 920 } 921 922 if (unexpected) 923 unexpected = 0; 924 925 if (unlikely(istat & ~dd->ipath_i_bitsextant)) 926 ipath_dev_err(dd, 927 "interrupt with unknown interrupts %x set\n", 928 istat & (u32) ~ dd->ipath_i_bitsextant); 929 else 930 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat); 931 932 if (unlikely(istat & INFINIPATH_I_ERROR)) { 933 ipath_stats.sps_errints++; 934 estat = ipath_read_kreg64(dd, 935 dd->ipath_kregs->kr_errorstatus); 936 if (!estat) 937 dev_info(&dd->pcidev->dev, "error interrupt (%x), " 938 "but no error bits set!\n", istat); 939 else if (estat == -1LL) 940 /* 941 * should we try clearing all, or hope next read 942 * works? 943 */ 944 ipath_dev_err(dd, "Read of error status failed " 945 "(all bits set); ignoring\n"); 946 else 947 if (handle_errors(dd, estat)) 948 /* force calling ipath_kreceive() */ 949 chk0rcv = 1; 950 } 951 952 if (istat & INFINIPATH_I_GPIO) { 953 /* 954 * GPIO interrupts fall in two broad classes: 955 * GPIO_2 indicates (on some HT4xx boards) that a packet 956 * has arrived for Port 0. Checking for this 957 * is controlled by flag IPATH_GPIO_INTR. 958 * GPIO_3..5 on IBA6120 Rev2 chips indicate errors 959 * that we need to count. Checking for this 960 * is controlled by flag IPATH_GPIO_ERRINTRS. 961 */ 962 u32 gpiostatus; 963 u32 to_clear = 0; 964 965 gpiostatus = ipath_read_kreg32( 966 dd, dd->ipath_kregs->kr_gpio_status); 967 /* First the error-counter case. 968 */ 969 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) && 970 (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) { 971 /* want to clear the bits we see asserted. */ 972 to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK); 973 974 /* 975 * Count appropriately, clear bits out of our copy, 976 * as they have been "handled". 977 */ 978 if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) { 979 ipath_dbg("FlowCtl on UnsupVL\n"); 980 dd->ipath_rxfc_unsupvl_errs++; 981 } 982 if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) { 983 ipath_dbg("Overrun Threshold exceeded\n"); 984 dd->ipath_overrun_thresh_errs++; 985 } 986 if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) { 987 ipath_dbg("Local Link Integrity error\n"); 988 dd->ipath_lli_errs++; 989 } 990 gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK; 991 } 992 /* Now the Port0 Receive case */ 993 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) && 994 (dd->ipath_flags & IPATH_GPIO_INTR)) { 995 /* 996 * GPIO status bit 2 is set, and we expected it. 997 * clear it and indicate in p0bits. 998 * This probably only happens if a Port0 pkt 999 * arrives at _just_ the wrong time, and we 1000 * handle that by seting chk0rcv; 1001 */ 1002 to_clear |= (1 << IPATH_GPIO_PORT0_BIT); 1003 gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT); 1004 chk0rcv = 1; 1005 } 1006 if (unlikely(gpiostatus)) { 1007 /* 1008 * Some unexpected bits remain. If they could have 1009 * caused the interrupt, complain and clear. 1010 * MEA: this is almost certainly non-ideal. 1011 * we should look into auto-disable of unexpected 1012 * GPIO interrupts, possibly on a "three strikes" 1013 * basis. 1014 */ 1015 u32 mask; 1016 mask = ipath_read_kreg32( 1017 dd, dd->ipath_kregs->kr_gpio_mask); 1018 if (mask & gpiostatus) { 1019 ipath_dbg("Unexpected GPIO IRQ bits %x\n", 1020 gpiostatus & mask); 1021 to_clear |= (gpiostatus & mask); 1022 } 1023 } 1024 if (to_clear) { 1025 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear, 1026 (u64) to_clear); 1027 } 1028 } 1029 chk0rcv |= istat & port0rbits; 1030 1031 /* 1032 * Clear the interrupt bits we found set, unless they are receive 1033 * related, in which case we already cleared them above, and don't 1034 * want to clear them again, because we might lose an interrupt. 1035 * Clear it early, so we "know" know the chip will have seen this by 1036 * the time we process the queue, and will re-interrupt if necessary. 1037 * The processor itself won't take the interrupt again until we return. 1038 */ 1039 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat); 1040 1041 /* 1042 * handle port0 receive before checking for pio buffers available, 1043 * since receives can overflow; piobuf waiters can afford a few 1044 * extra cycles, since they were waiting anyway, and user's waiting 1045 * for receive are at the bottom. 1046 */ 1047 if (chk0rcv) { 1048 ipath_kreceive(dd); 1049 istat &= ~port0rbits; 1050 } 1051 1052 if (istat & ((dd->ipath_i_rcvavail_mask << 1053 INFINIPATH_I_RCVAVAIL_SHIFT) 1054 | (dd->ipath_i_rcvurg_mask << 1055 INFINIPATH_I_RCVURG_SHIFT))) 1056 handle_urcv(dd, istat); 1057 1058 if (istat & INFINIPATH_I_SPIOBUFAVAIL) { 1059 clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl); 1060 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 1061 dd->ipath_sendctrl); 1062 1063 if (dd->ipath_portpiowait) 1064 handle_port_pioavail(dd); 1065 1066 handle_layer_pioavail(dd); 1067 } 1068 1069done: 1070 ret = IRQ_HANDLED; 1071 1072bail: 1073 return ret; 1074} 1075