mthca_main.c revision 0b0df6f2079e731c44226a0673b07a166509a5de
1/* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ 35 */ 36 37#include <linux/module.h> 38#include <linux/init.h> 39#include <linux/errno.h> 40#include <linux/pci.h> 41#include <linux/interrupt.h> 42 43#include "mthca_dev.h" 44#include "mthca_config_reg.h" 45#include "mthca_cmd.h" 46#include "mthca_profile.h" 47#include "mthca_memfree.h" 48 49MODULE_AUTHOR("Roland Dreier"); 50MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 51MODULE_LICENSE("Dual BSD/GPL"); 52MODULE_VERSION(DRV_VERSION); 53 54#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 55 56int mthca_debug_level = 0; 57module_param_named(debug_level, mthca_debug_level, int, 0644); 58MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 59 60#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 61 62#ifdef CONFIG_PCI_MSI 63 64static int msi_x = 0; 65module_param(msi_x, int, 0444); 66MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 67 68static int msi = 0; 69module_param(msi, int, 0444); 70MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero"); 71 72#else /* CONFIG_PCI_MSI */ 73 74#define msi_x (0) 75#define msi (0) 76 77#endif /* CONFIG_PCI_MSI */ 78 79static int tune_pci = 0; 80module_param(tune_pci, int, 0444); 81MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 82 83DEFINE_MUTEX(mthca_device_mutex); 84 85#define MTHCA_DEFAULT_NUM_QP (1 << 16) 86#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 87#define MTHCA_DEFAULT_NUM_CQ (1 << 16) 88#define MTHCA_DEFAULT_NUM_MCG (1 << 13) 89#define MTHCA_DEFAULT_NUM_MPT (1 << 17) 90#define MTHCA_DEFAULT_NUM_MTT (1 << 20) 91#define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 92#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 93#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 94 95static struct mthca_profile hca_profile = { 96 .num_qp = MTHCA_DEFAULT_NUM_QP, 97 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 98 .num_cq = MTHCA_DEFAULT_NUM_CQ, 99 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 100 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 101 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 102 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 103 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 104 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 105}; 106 107module_param_named(num_qp, hca_profile.num_qp, int, 0444); 108MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 109 110module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 111MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 112 113module_param_named(num_cq, hca_profile.num_cq, int, 0444); 114MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 115 116module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 117MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 118 119module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 120MODULE_PARM_DESC(num_mpt, 121 "maximum number of memory protection table entries per HCA"); 122 123module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 124MODULE_PARM_DESC(num_mtt, 125 "maximum number of memory translation table segments per HCA"); 126 127module_param_named(num_udav, hca_profile.num_udav, int, 0444); 128MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 129 130module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 131MODULE_PARM_DESC(fmr_reserved_mtts, 132 "number of memory translation table segments reserved for FMR"); 133 134static const char mthca_version[] __devinitdata = 135 DRV_NAME ": Mellanox InfiniBand HCA driver v" 136 DRV_VERSION " (" DRV_RELDATE ")\n"; 137 138static int mthca_tune_pci(struct mthca_dev *mdev) 139{ 140 int cap; 141 u16 val; 142 143 if (!tune_pci) 144 return 0; 145 146 /* First try to max out Read Byte Count */ 147 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); 148 if (cap) { 149 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { 150 mthca_err(mdev, "Couldn't read PCI-X command register, " 151 "aborting.\n"); 152 return -ENODEV; 153 } 154 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2); 155 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) { 156 mthca_err(mdev, "Couldn't write PCI-X command register, " 157 "aborting.\n"); 158 return -ENODEV; 159 } 160 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 161 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 162 163 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); 164 if (cap) { 165 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { 166 mthca_err(mdev, "Couldn't read PCI Express device control " 167 "register, aborting.\n"); 168 return -ENODEV; 169 } 170 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); 171 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) { 172 mthca_err(mdev, "Couldn't write PCI Express device control " 173 "register, aborting.\n"); 174 return -ENODEV; 175 } 176 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 177 mthca_info(mdev, "No PCI Express capability, " 178 "not setting Max Read Request Size.\n"); 179 180 return 0; 181} 182 183static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 184{ 185 int err; 186 u8 status; 187 188 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 189 if (err) { 190 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 191 return err; 192 } 193 if (status) { 194 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 195 "aborting.\n", status); 196 return -EINVAL; 197 } 198 if (dev_lim->min_page_sz > PAGE_SIZE) { 199 mthca_err(mdev, "HCA minimum page size of %d bigger than " 200 "kernel PAGE_SIZE of %ld, aborting.\n", 201 dev_lim->min_page_sz, PAGE_SIZE); 202 return -ENODEV; 203 } 204 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 205 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 206 "aborting.\n", 207 dev_lim->num_ports, MTHCA_MAX_PORTS); 208 return -ENODEV; 209 } 210 211 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 212 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 213 "PCI resource 2 size of 0x%llx, aborting.\n", 214 dev_lim->uar_size, 215 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 216 return -ENODEV; 217 } 218 219 mdev->limits.num_ports = dev_lim->num_ports; 220 mdev->limits.vl_cap = dev_lim->max_vl; 221 mdev->limits.mtu_cap = dev_lim->max_mtu; 222 mdev->limits.gid_table_len = dev_lim->max_gids; 223 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 224 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 225 mdev->limits.max_sg = dev_lim->max_sg; 226 mdev->limits.max_wqes = dev_lim->max_qp_sz; 227 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 228 mdev->limits.reserved_qps = dev_lim->reserved_qps; 229 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 230 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 231 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 232 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 233 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 234 /* 235 * Subtract 1 from the limit because we need to allocate a 236 * spare CQE so the HCA HW can tell the difference between an 237 * empty CQ and a full CQ. 238 */ 239 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 240 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 241 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 242 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 243 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 244 mdev->limits.reserved_uars = dev_lim->reserved_uars; 245 mdev->limits.reserved_pds = dev_lim->reserved_pds; 246 mdev->limits.port_width_cap = dev_lim->max_port_width; 247 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 248 mdev->limits.flags = dev_lim->flags; 249 /* 250 * For old FW that doesn't return static rate support, use a 251 * value of 0x3 (only static rate values of 0 or 1 are handled), 252 * except on Sinai, where even old FW can handle static rate 253 * values of 2 and 3. 254 */ 255 if (dev_lim->stat_rate_support) 256 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 257 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 258 mdev->limits.stat_rate_support = 0xf; 259 else 260 mdev->limits.stat_rate_support = 0x3; 261 262 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 263 May be doable since hardware supports it for SRQ. 264 265 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 266 267 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 268 supported by driver. */ 269 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 270 IB_DEVICE_PORT_ACTIVE_EVENT | 271 IB_DEVICE_SYS_IMAGE_GUID | 272 IB_DEVICE_RC_RNR_NAK_GEN; 273 274 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 275 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 276 277 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 278 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 279 280 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 281 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 282 283 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 284 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 285 286 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 287 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 288 289 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 290 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 291 292 return 0; 293} 294 295static int mthca_init_tavor(struct mthca_dev *mdev) 296{ 297 u8 status; 298 int err; 299 struct mthca_dev_lim dev_lim; 300 struct mthca_profile profile; 301 struct mthca_init_hca_param init_hca; 302 303 err = mthca_SYS_EN(mdev, &status); 304 if (err) { 305 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 306 return err; 307 } 308 if (status) { 309 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 310 "aborting.\n", status); 311 return -EINVAL; 312 } 313 314 err = mthca_QUERY_FW(mdev, &status); 315 if (err) { 316 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 317 goto err_disable; 318 } 319 if (status) { 320 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 321 "aborting.\n", status); 322 err = -EINVAL; 323 goto err_disable; 324 } 325 err = mthca_QUERY_DDR(mdev, &status); 326 if (err) { 327 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 328 goto err_disable; 329 } 330 if (status) { 331 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 332 "aborting.\n", status); 333 err = -EINVAL; 334 goto err_disable; 335 } 336 337 err = mthca_dev_lim(mdev, &dev_lim); 338 if (err) { 339 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 340 goto err_disable; 341 } 342 343 profile = hca_profile; 344 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 345 profile.uarc_size = 0; 346 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 347 profile.num_srq = dev_lim.max_srqs; 348 349 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 350 if (err < 0) 351 goto err_disable; 352 353 err = mthca_INIT_HCA(mdev, &init_hca, &status); 354 if (err) { 355 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 356 goto err_disable; 357 } 358 if (status) { 359 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 360 "aborting.\n", status); 361 err = -EINVAL; 362 goto err_disable; 363 } 364 365 return 0; 366 367err_disable: 368 mthca_SYS_DIS(mdev, &status); 369 370 return err; 371} 372 373static int mthca_load_fw(struct mthca_dev *mdev) 374{ 375 u8 status; 376 int err; 377 378 /* FIXME: use HCA-attached memory for FW if present */ 379 380 mdev->fw.arbel.fw_icm = 381 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 382 GFP_HIGHUSER | __GFP_NOWARN); 383 if (!mdev->fw.arbel.fw_icm) { 384 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 385 return -ENOMEM; 386 } 387 388 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 389 if (err) { 390 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 391 goto err_free; 392 } 393 if (status) { 394 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 395 err = -EINVAL; 396 goto err_free; 397 } 398 err = mthca_RUN_FW(mdev, &status); 399 if (err) { 400 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 401 goto err_unmap_fa; 402 } 403 if (status) { 404 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 405 err = -EINVAL; 406 goto err_unmap_fa; 407 } 408 409 return 0; 410 411err_unmap_fa: 412 mthca_UNMAP_FA(mdev, &status); 413 414err_free: 415 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 416 return err; 417} 418 419static int mthca_init_icm(struct mthca_dev *mdev, 420 struct mthca_dev_lim *dev_lim, 421 struct mthca_init_hca_param *init_hca, 422 u64 icm_size) 423{ 424 u64 aux_pages; 425 u8 status; 426 int err; 427 428 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 429 if (err) { 430 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 431 return err; 432 } 433 if (status) { 434 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 435 "aborting.\n", status); 436 return -EINVAL; 437 } 438 439 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 440 (unsigned long long) icm_size >> 10, 441 (unsigned long long) aux_pages << 2); 442 443 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 444 GFP_HIGHUSER | __GFP_NOWARN); 445 if (!mdev->fw.arbel.aux_icm) { 446 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 447 return -ENOMEM; 448 } 449 450 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 451 if (err) { 452 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 453 goto err_free_aux; 454 } 455 if (status) { 456 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 457 err = -EINVAL; 458 goto err_free_aux; 459 } 460 461 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 462 if (err) { 463 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 464 goto err_unmap_aux; 465 } 466 467 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 468 MTHCA_MTT_SEG_SIZE, 469 mdev->limits.num_mtt_segs, 470 mdev->limits.reserved_mtts, 1); 471 if (!mdev->mr_table.mtt_table) { 472 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 473 err = -ENOMEM; 474 goto err_unmap_eq; 475 } 476 477 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 478 dev_lim->mpt_entry_sz, 479 mdev->limits.num_mpts, 480 mdev->limits.reserved_mrws, 1); 481 if (!mdev->mr_table.mpt_table) { 482 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 483 err = -ENOMEM; 484 goto err_unmap_mtt; 485 } 486 487 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 488 dev_lim->qpc_entry_sz, 489 mdev->limits.num_qps, 490 mdev->limits.reserved_qps, 0); 491 if (!mdev->qp_table.qp_table) { 492 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 493 err = -ENOMEM; 494 goto err_unmap_mpt; 495 } 496 497 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 498 dev_lim->eqpc_entry_sz, 499 mdev->limits.num_qps, 500 mdev->limits.reserved_qps, 0); 501 if (!mdev->qp_table.eqp_table) { 502 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 503 err = -ENOMEM; 504 goto err_unmap_qp; 505 } 506 507 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 508 MTHCA_RDB_ENTRY_SIZE, 509 mdev->limits.num_qps << 510 mdev->qp_table.rdb_shift, 511 0, 0); 512 if (!mdev->qp_table.rdb_table) { 513 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 514 err = -ENOMEM; 515 goto err_unmap_eqp; 516 } 517 518 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 519 dev_lim->cqc_entry_sz, 520 mdev->limits.num_cqs, 521 mdev->limits.reserved_cqs, 0); 522 if (!mdev->cq_table.table) { 523 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 524 err = -ENOMEM; 525 goto err_unmap_rdb; 526 } 527 528 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 529 mdev->srq_table.table = 530 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 531 dev_lim->srq_entry_sz, 532 mdev->limits.num_srqs, 533 mdev->limits.reserved_srqs, 0); 534 if (!mdev->srq_table.table) { 535 mthca_err(mdev, "Failed to map SRQ context memory, " 536 "aborting.\n"); 537 err = -ENOMEM; 538 goto err_unmap_cq; 539 } 540 } 541 542 /* 543 * It's not strictly required, but for simplicity just map the 544 * whole multicast group table now. The table isn't very big 545 * and it's a lot easier than trying to track ref counts. 546 */ 547 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 548 MTHCA_MGM_ENTRY_SIZE, 549 mdev->limits.num_mgms + 550 mdev->limits.num_amgms, 551 mdev->limits.num_mgms + 552 mdev->limits.num_amgms, 553 0); 554 if (!mdev->mcg_table.table) { 555 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 556 err = -ENOMEM; 557 goto err_unmap_srq; 558 } 559 560 return 0; 561 562err_unmap_srq: 563 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 564 mthca_free_icm_table(mdev, mdev->srq_table.table); 565 566err_unmap_cq: 567 mthca_free_icm_table(mdev, mdev->cq_table.table); 568 569err_unmap_rdb: 570 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 571 572err_unmap_eqp: 573 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 574 575err_unmap_qp: 576 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 577 578err_unmap_mpt: 579 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 580 581err_unmap_mtt: 582 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 583 584err_unmap_eq: 585 mthca_unmap_eq_icm(mdev); 586 587err_unmap_aux: 588 mthca_UNMAP_ICM_AUX(mdev, &status); 589 590err_free_aux: 591 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 592 593 return err; 594} 595 596static void mthca_free_icms(struct mthca_dev *mdev) 597{ 598 u8 status; 599 600 mthca_free_icm_table(mdev, mdev->mcg_table.table); 601 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 602 mthca_free_icm_table(mdev, mdev->srq_table.table); 603 mthca_free_icm_table(mdev, mdev->cq_table.table); 604 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 605 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 606 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 607 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 608 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 609 mthca_unmap_eq_icm(mdev); 610 611 mthca_UNMAP_ICM_AUX(mdev, &status); 612 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 613} 614 615static int mthca_init_arbel(struct mthca_dev *mdev) 616{ 617 struct mthca_dev_lim dev_lim; 618 struct mthca_profile profile; 619 struct mthca_init_hca_param init_hca; 620 u64 icm_size; 621 u8 status; 622 int err; 623 624 err = mthca_QUERY_FW(mdev, &status); 625 if (err) { 626 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 627 return err; 628 } 629 if (status) { 630 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 631 "aborting.\n", status); 632 return -EINVAL; 633 } 634 635 err = mthca_ENABLE_LAM(mdev, &status); 636 if (err) { 637 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 638 return err; 639 } 640 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 641 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 642 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 643 } else if (status) { 644 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 645 "aborting.\n", status); 646 return -EINVAL; 647 } 648 649 err = mthca_load_fw(mdev); 650 if (err) { 651 mthca_err(mdev, "Failed to start FW, aborting.\n"); 652 goto err_disable; 653 } 654 655 err = mthca_dev_lim(mdev, &dev_lim); 656 if (err) { 657 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 658 goto err_stop_fw; 659 } 660 661 profile = hca_profile; 662 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 663 profile.num_udav = 0; 664 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 665 profile.num_srq = dev_lim.max_srqs; 666 667 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 668 if ((int) icm_size < 0) { 669 err = icm_size; 670 goto err_stop_fw; 671 } 672 673 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 674 if (err) 675 goto err_stop_fw; 676 677 err = mthca_INIT_HCA(mdev, &init_hca, &status); 678 if (err) { 679 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 680 goto err_free_icm; 681 } 682 if (status) { 683 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 684 "aborting.\n", status); 685 err = -EINVAL; 686 goto err_free_icm; 687 } 688 689 return 0; 690 691err_free_icm: 692 mthca_free_icms(mdev); 693 694err_stop_fw: 695 mthca_UNMAP_FA(mdev, &status); 696 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 697 698err_disable: 699 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 700 mthca_DISABLE_LAM(mdev, &status); 701 702 return err; 703} 704 705static void mthca_close_hca(struct mthca_dev *mdev) 706{ 707 u8 status; 708 709 mthca_CLOSE_HCA(mdev, 0, &status); 710 711 if (mthca_is_memfree(mdev)) { 712 mthca_free_icms(mdev); 713 714 mthca_UNMAP_FA(mdev, &status); 715 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 716 717 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 718 mthca_DISABLE_LAM(mdev, &status); 719 } else 720 mthca_SYS_DIS(mdev, &status); 721} 722 723static int mthca_init_hca(struct mthca_dev *mdev) 724{ 725 u8 status; 726 int err; 727 struct mthca_adapter adapter; 728 729 if (mthca_is_memfree(mdev)) 730 err = mthca_init_arbel(mdev); 731 else 732 err = mthca_init_tavor(mdev); 733 734 if (err) 735 return err; 736 737 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 738 if (err) { 739 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 740 goto err_close; 741 } 742 if (status) { 743 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 744 "aborting.\n", status); 745 err = -EINVAL; 746 goto err_close; 747 } 748 749 mdev->eq_table.inta_pin = adapter.inta_pin; 750 mdev->rev_id = adapter.revision_id; 751 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 752 753 return 0; 754 755err_close: 756 mthca_close_hca(mdev); 757 return err; 758} 759 760static int mthca_setup_hca(struct mthca_dev *dev) 761{ 762 int err; 763 u8 status; 764 765 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 766 767 err = mthca_init_uar_table(dev); 768 if (err) { 769 mthca_err(dev, "Failed to initialize " 770 "user access region table, aborting.\n"); 771 return err; 772 } 773 774 err = mthca_uar_alloc(dev, &dev->driver_uar); 775 if (err) { 776 mthca_err(dev, "Failed to allocate driver access region, " 777 "aborting.\n"); 778 goto err_uar_table_free; 779 } 780 781 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 782 if (!dev->kar) { 783 mthca_err(dev, "Couldn't map kernel access region, " 784 "aborting.\n"); 785 err = -ENOMEM; 786 goto err_uar_free; 787 } 788 789 err = mthca_init_pd_table(dev); 790 if (err) { 791 mthca_err(dev, "Failed to initialize " 792 "protection domain table, aborting.\n"); 793 goto err_kar_unmap; 794 } 795 796 err = mthca_init_mr_table(dev); 797 if (err) { 798 mthca_err(dev, "Failed to initialize " 799 "memory region table, aborting.\n"); 800 goto err_pd_table_free; 801 } 802 803 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 804 if (err) { 805 mthca_err(dev, "Failed to create driver PD, " 806 "aborting.\n"); 807 goto err_mr_table_free; 808 } 809 810 err = mthca_init_eq_table(dev); 811 if (err) { 812 mthca_err(dev, "Failed to initialize " 813 "event queue table, aborting.\n"); 814 goto err_pd_free; 815 } 816 817 err = mthca_cmd_use_events(dev); 818 if (err) { 819 mthca_err(dev, "Failed to switch to event-driven " 820 "firmware commands, aborting.\n"); 821 goto err_eq_table_free; 822 } 823 824 err = mthca_NOP(dev, &status); 825 if (err || status) { 826 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n", 827 dev->mthca_flags & MTHCA_FLAG_MSI_X ? 828 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : 829 dev->pdev->irq); 830 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) 831 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n"); 832 else 833 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 834 835 goto err_cmd_poll; 836 } 837 838 mthca_dbg(dev, "NOP command IRQ test passed\n"); 839 840 err = mthca_init_cq_table(dev); 841 if (err) { 842 mthca_err(dev, "Failed to initialize " 843 "completion queue table, aborting.\n"); 844 goto err_cmd_poll; 845 } 846 847 err = mthca_init_srq_table(dev); 848 if (err) { 849 mthca_err(dev, "Failed to initialize " 850 "shared receive queue table, aborting.\n"); 851 goto err_cq_table_free; 852 } 853 854 err = mthca_init_qp_table(dev); 855 if (err) { 856 mthca_err(dev, "Failed to initialize " 857 "queue pair table, aborting.\n"); 858 goto err_srq_table_free; 859 } 860 861 err = mthca_init_av_table(dev); 862 if (err) { 863 mthca_err(dev, "Failed to initialize " 864 "address vector table, aborting.\n"); 865 goto err_qp_table_free; 866 } 867 868 err = mthca_init_mcg_table(dev); 869 if (err) { 870 mthca_err(dev, "Failed to initialize " 871 "multicast group table, aborting.\n"); 872 goto err_av_table_free; 873 } 874 875 return 0; 876 877err_av_table_free: 878 mthca_cleanup_av_table(dev); 879 880err_qp_table_free: 881 mthca_cleanup_qp_table(dev); 882 883err_srq_table_free: 884 mthca_cleanup_srq_table(dev); 885 886err_cq_table_free: 887 mthca_cleanup_cq_table(dev); 888 889err_cmd_poll: 890 mthca_cmd_use_polling(dev); 891 892err_eq_table_free: 893 mthca_cleanup_eq_table(dev); 894 895err_pd_free: 896 mthca_pd_free(dev, &dev->driver_pd); 897 898err_mr_table_free: 899 mthca_cleanup_mr_table(dev); 900 901err_pd_table_free: 902 mthca_cleanup_pd_table(dev); 903 904err_kar_unmap: 905 iounmap(dev->kar); 906 907err_uar_free: 908 mthca_uar_free(dev, &dev->driver_uar); 909 910err_uar_table_free: 911 mthca_cleanup_uar_table(dev); 912 return err; 913} 914 915static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden) 916{ 917 int err; 918 919 /* 920 * We can't just use pci_request_regions() because the MSI-X 921 * table is right in the middle of the first BAR. If we did 922 * pci_request_region and grab all of the first BAR, then 923 * setting up MSI-X would fail, since the PCI core wants to do 924 * request_mem_region on the MSI-X vector table. 925 * 926 * So just request what we need right now, and request any 927 * other regions we need when setting up EQs. 928 */ 929 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 930 MTHCA_HCR_SIZE, DRV_NAME)) 931 return -EBUSY; 932 933 err = pci_request_region(pdev, 2, DRV_NAME); 934 if (err) 935 goto err_bar2_failed; 936 937 if (!ddr_hidden) { 938 err = pci_request_region(pdev, 4, DRV_NAME); 939 if (err) 940 goto err_bar4_failed; 941 } 942 943 return 0; 944 945err_bar4_failed: 946 pci_release_region(pdev, 2); 947 948err_bar2_failed: 949 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 950 MTHCA_HCR_SIZE); 951 952 return err; 953} 954 955static void mthca_release_regions(struct pci_dev *pdev, 956 int ddr_hidden) 957{ 958 if (!ddr_hidden) 959 pci_release_region(pdev, 4); 960 961 pci_release_region(pdev, 2); 962 963 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 964 MTHCA_HCR_SIZE); 965} 966 967static int mthca_enable_msi_x(struct mthca_dev *mdev) 968{ 969 struct msix_entry entries[3]; 970 int err; 971 972 entries[0].entry = 0; 973 entries[1].entry = 1; 974 entries[2].entry = 2; 975 976 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 977 if (err) { 978 if (err > 0) 979 mthca_info(mdev, "Only %d MSI-X vectors available, " 980 "not using MSI-X\n", err); 981 return err; 982 } 983 984 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 985 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 986 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 987 988 return 0; 989} 990 991/* Types of supported HCA */ 992enum { 993 TAVOR, /* MT23108 */ 994 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 995 ARBEL_NATIVE, /* MT25208 with extended features */ 996 SINAI /* MT25204 */ 997}; 998 999#define MTHCA_FW_VER(major, minor, subminor) \ 1000 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 1001 1002static struct { 1003 u64 latest_fw; 1004 u32 flags; 1005} mthca_hca_table[] = { 1006 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 4, 0), 1007 .flags = 0 }, 1008 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 600), 1009 .flags = MTHCA_FLAG_PCIE }, 1010 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 400), 1011 .flags = MTHCA_FLAG_MEMFREE | 1012 MTHCA_FLAG_PCIE }, 1013 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 1, 0), 1014 .flags = MTHCA_FLAG_MEMFREE | 1015 MTHCA_FLAG_PCIE | 1016 MTHCA_FLAG_SINAI_OPT } 1017}; 1018 1019static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 1020{ 1021 int ddr_hidden = 0; 1022 int err; 1023 struct mthca_dev *mdev; 1024 1025 printk(KERN_INFO PFX "Initializing %s\n", 1026 pci_name(pdev)); 1027 1028 err = pci_enable_device(pdev); 1029 if (err) { 1030 dev_err(&pdev->dev, "Cannot enable PCI device, " 1031 "aborting.\n"); 1032 return err; 1033 } 1034 1035 /* 1036 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 1037 * be present) 1038 */ 1039 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1040 pci_resource_len(pdev, 0) != 1 << 20) { 1041 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1042 err = -ENODEV; 1043 goto err_disable_pdev; 1044 } 1045 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1046 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1047 err = -ENODEV; 1048 goto err_disable_pdev; 1049 } 1050 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1051 ddr_hidden = 1; 1052 1053 err = mthca_request_regions(pdev, ddr_hidden); 1054 if (err) { 1055 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1056 "aborting.\n"); 1057 goto err_disable_pdev; 1058 } 1059 1060 pci_set_master(pdev); 1061 1062 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 1063 if (err) { 1064 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1065 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1066 if (err) { 1067 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1068 goto err_free_res; 1069 } 1070 } 1071 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1072 if (err) { 1073 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1074 "consistent PCI DMA mask.\n"); 1075 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1076 if (err) { 1077 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1078 "aborting.\n"); 1079 goto err_free_res; 1080 } 1081 } 1082 1083 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1084 if (!mdev) { 1085 dev_err(&pdev->dev, "Device struct alloc failed, " 1086 "aborting.\n"); 1087 err = -ENOMEM; 1088 goto err_free_res; 1089 } 1090 1091 mdev->pdev = pdev; 1092 1093 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1094 if (ddr_hidden) 1095 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1096 1097 /* 1098 * Now reset the HCA before we touch the PCI capabilities or 1099 * attempt a firmware command, since a boot ROM may have left 1100 * the HCA in an undefined state. 1101 */ 1102 err = mthca_reset(mdev); 1103 if (err) { 1104 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1105 goto err_free_dev; 1106 } 1107 1108 if (msi_x && !mthca_enable_msi_x(mdev)) 1109 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1110 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) && 1111 !pci_enable_msi(pdev)) 1112 mdev->mthca_flags |= MTHCA_FLAG_MSI; 1113 1114 if (mthca_cmd_init(mdev)) { 1115 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1116 goto err_free_dev; 1117 } 1118 1119 err = mthca_tune_pci(mdev); 1120 if (err) 1121 goto err_cmd; 1122 1123 err = mthca_init_hca(mdev); 1124 if (err) 1125 goto err_cmd; 1126 1127 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1128 mthca_warn(mdev, "HCA FW version %d.%d.%d is old (%d.%d.%d is current).\n", 1129 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1130 (int) (mdev->fw_ver & 0xffff), 1131 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1132 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1133 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1134 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1135 } 1136 1137 err = mthca_setup_hca(mdev); 1138 if (err) 1139 goto err_close; 1140 1141 err = mthca_register_device(mdev); 1142 if (err) 1143 goto err_cleanup; 1144 1145 err = mthca_create_agents(mdev); 1146 if (err) 1147 goto err_unregister; 1148 1149 pci_set_drvdata(pdev, mdev); 1150 mdev->hca_type = hca_type; 1151 1152 return 0; 1153 1154err_unregister: 1155 mthca_unregister_device(mdev); 1156 1157err_cleanup: 1158 mthca_cleanup_mcg_table(mdev); 1159 mthca_cleanup_av_table(mdev); 1160 mthca_cleanup_qp_table(mdev); 1161 mthca_cleanup_srq_table(mdev); 1162 mthca_cleanup_cq_table(mdev); 1163 mthca_cmd_use_polling(mdev); 1164 mthca_cleanup_eq_table(mdev); 1165 1166 mthca_pd_free(mdev, &mdev->driver_pd); 1167 1168 mthca_cleanup_mr_table(mdev); 1169 mthca_cleanup_pd_table(mdev); 1170 mthca_cleanup_uar_table(mdev); 1171 1172err_close: 1173 mthca_close_hca(mdev); 1174 1175err_cmd: 1176 mthca_cmd_cleanup(mdev); 1177 1178err_free_dev: 1179 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1180 pci_disable_msix(pdev); 1181 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1182 pci_disable_msi(pdev); 1183 1184 ib_dealloc_device(&mdev->ib_dev); 1185 1186err_free_res: 1187 mthca_release_regions(pdev, ddr_hidden); 1188 1189err_disable_pdev: 1190 pci_disable_device(pdev); 1191 pci_set_drvdata(pdev, NULL); 1192 return err; 1193} 1194 1195static void __mthca_remove_one(struct pci_dev *pdev) 1196{ 1197 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1198 u8 status; 1199 int p; 1200 1201 if (mdev) { 1202 mthca_free_agents(mdev); 1203 mthca_unregister_device(mdev); 1204 1205 for (p = 1; p <= mdev->limits.num_ports; ++p) 1206 mthca_CLOSE_IB(mdev, p, &status); 1207 1208 mthca_cleanup_mcg_table(mdev); 1209 mthca_cleanup_av_table(mdev); 1210 mthca_cleanup_qp_table(mdev); 1211 mthca_cleanup_srq_table(mdev); 1212 mthca_cleanup_cq_table(mdev); 1213 mthca_cmd_use_polling(mdev); 1214 mthca_cleanup_eq_table(mdev); 1215 1216 mthca_pd_free(mdev, &mdev->driver_pd); 1217 1218 mthca_cleanup_mr_table(mdev); 1219 mthca_cleanup_pd_table(mdev); 1220 1221 iounmap(mdev->kar); 1222 mthca_uar_free(mdev, &mdev->driver_uar); 1223 mthca_cleanup_uar_table(mdev); 1224 mthca_close_hca(mdev); 1225 mthca_cmd_cleanup(mdev); 1226 1227 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1228 pci_disable_msix(pdev); 1229 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1230 pci_disable_msi(pdev); 1231 1232 ib_dealloc_device(&mdev->ib_dev); 1233 mthca_release_regions(pdev, mdev->mthca_flags & 1234 MTHCA_FLAG_DDR_HIDDEN); 1235 pci_disable_device(pdev); 1236 pci_set_drvdata(pdev, NULL); 1237 } 1238} 1239 1240int __mthca_restart_one(struct pci_dev *pdev) 1241{ 1242 struct mthca_dev *mdev; 1243 1244 mdev = pci_get_drvdata(pdev); 1245 if (!mdev) 1246 return -ENODEV; 1247 __mthca_remove_one(pdev); 1248 return __mthca_init_one(pdev, mdev->hca_type); 1249} 1250 1251static int __devinit mthca_init_one(struct pci_dev *pdev, 1252 const struct pci_device_id *id) 1253{ 1254 static int mthca_version_printed = 0; 1255 int ret; 1256 1257 mutex_lock(&mthca_device_mutex); 1258 1259 if (!mthca_version_printed) { 1260 printk(KERN_INFO "%s", mthca_version); 1261 ++mthca_version_printed; 1262 } 1263 1264 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1265 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 1266 pci_name(pdev), id->driver_data); 1267 mutex_unlock(&mthca_device_mutex); 1268 return -ENODEV; 1269 } 1270 1271 ret = __mthca_init_one(pdev, id->driver_data); 1272 1273 mutex_unlock(&mthca_device_mutex); 1274 1275 return ret; 1276} 1277 1278static void __devexit mthca_remove_one(struct pci_dev *pdev) 1279{ 1280 mutex_lock(&mthca_device_mutex); 1281 __mthca_remove_one(pdev); 1282 mutex_unlock(&mthca_device_mutex); 1283} 1284 1285static struct pci_device_id mthca_pci_table[] = { 1286 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1287 .driver_data = TAVOR }, 1288 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1289 .driver_data = TAVOR }, 1290 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1291 .driver_data = ARBEL_COMPAT }, 1292 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1293 .driver_data = ARBEL_COMPAT }, 1294 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1295 .driver_data = ARBEL_NATIVE }, 1296 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1297 .driver_data = ARBEL_NATIVE }, 1298 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1299 .driver_data = SINAI }, 1300 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1301 .driver_data = SINAI }, 1302 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1303 .driver_data = SINAI }, 1304 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1305 .driver_data = SINAI }, 1306 { 0, } 1307}; 1308 1309MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1310 1311static struct pci_driver mthca_driver = { 1312 .name = DRV_NAME, 1313 .id_table = mthca_pci_table, 1314 .probe = mthca_init_one, 1315 .remove = __devexit_p(mthca_remove_one) 1316}; 1317 1318static void __init __mthca_check_profile_val(const char *name, int *pval, 1319 int pval_default) 1320{ 1321 /* value must be positive and power of 2 */ 1322 int old_pval = *pval; 1323 1324 if (old_pval <= 0) 1325 *pval = pval_default; 1326 else 1327 *pval = roundup_pow_of_two(old_pval); 1328 1329 if (old_pval != *pval) { 1330 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1331 old_pval, name); 1332 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1333 } 1334} 1335 1336#define mthca_check_profile_val(name, default) \ 1337 __mthca_check_profile_val(#name, &hca_profile.name, default) 1338 1339static void __init mthca_validate_profile(void) 1340{ 1341 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1342 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1343 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1344 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1345 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1346 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1347 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1348 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1349 1350 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1351 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1352 hca_profile.fmr_reserved_mtts); 1353 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1354 hca_profile.num_mtt); 1355 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1356 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1357 hca_profile.fmr_reserved_mtts); 1358 } 1359} 1360 1361static int __init mthca_init(void) 1362{ 1363 int ret; 1364 1365 mthca_validate_profile(); 1366 1367 ret = mthca_catas_init(); 1368 if (ret) 1369 return ret; 1370 1371 ret = pci_register_driver(&mthca_driver); 1372 if (ret < 0) { 1373 mthca_catas_cleanup(); 1374 return ret; 1375 } 1376 1377 return 0; 1378} 1379 1380static void __exit mthca_cleanup(void) 1381{ 1382 pci_unregister_driver(&mthca_driver); 1383 mthca_catas_cleanup(); 1384} 1385 1386module_init(mthca_init); 1387module_exit(mthca_cleanup); 1388