mthca_main.c revision 5a0e3ad6af8660be21ca98a971cd00f331318c05
1/* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35#include <linux/module.h> 36#include <linux/init.h> 37#include <linux/errno.h> 38#include <linux/pci.h> 39#include <linux/interrupt.h> 40#include <linux/gfp.h> 41 42#include "mthca_dev.h" 43#include "mthca_config_reg.h" 44#include "mthca_cmd.h" 45#include "mthca_profile.h" 46#include "mthca_memfree.h" 47#include "mthca_wqe.h" 48 49MODULE_AUTHOR("Roland Dreier"); 50MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 51MODULE_LICENSE("Dual BSD/GPL"); 52MODULE_VERSION(DRV_VERSION); 53 54#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 55 56int mthca_debug_level = 0; 57module_param_named(debug_level, mthca_debug_level, int, 0644); 58MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 59 60#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 61 62#ifdef CONFIG_PCI_MSI 63 64static int msi_x = 1; 65module_param(msi_x, int, 0444); 66MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 67 68#else /* CONFIG_PCI_MSI */ 69 70#define msi_x (0) 71 72#endif /* CONFIG_PCI_MSI */ 73 74static int tune_pci = 0; 75module_param(tune_pci, int, 0444); 76MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 77 78DEFINE_MUTEX(mthca_device_mutex); 79 80#define MTHCA_DEFAULT_NUM_QP (1 << 16) 81#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 82#define MTHCA_DEFAULT_NUM_CQ (1 << 16) 83#define MTHCA_DEFAULT_NUM_MCG (1 << 13) 84#define MTHCA_DEFAULT_NUM_MPT (1 << 17) 85#define MTHCA_DEFAULT_NUM_MTT (1 << 20) 86#define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 87#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 88#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 89 90static struct mthca_profile hca_profile = { 91 .num_qp = MTHCA_DEFAULT_NUM_QP, 92 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 93 .num_cq = MTHCA_DEFAULT_NUM_CQ, 94 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 95 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 96 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 97 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 98 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 99 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 100}; 101 102module_param_named(num_qp, hca_profile.num_qp, int, 0444); 103MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 104 105module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 106MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 107 108module_param_named(num_cq, hca_profile.num_cq, int, 0444); 109MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 110 111module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 112MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 113 114module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 115MODULE_PARM_DESC(num_mpt, 116 "maximum number of memory protection table entries per HCA"); 117 118module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 119MODULE_PARM_DESC(num_mtt, 120 "maximum number of memory translation table segments per HCA"); 121 122module_param_named(num_udav, hca_profile.num_udav, int, 0444); 123MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 124 125module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 126MODULE_PARM_DESC(fmr_reserved_mtts, 127 "number of memory translation table segments reserved for FMR"); 128 129static int log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8); 130module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); 131MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); 132 133static char mthca_version[] __devinitdata = 134 DRV_NAME ": Mellanox InfiniBand HCA driver v" 135 DRV_VERSION " (" DRV_RELDATE ")\n"; 136 137static int mthca_tune_pci(struct mthca_dev *mdev) 138{ 139 if (!tune_pci) 140 return 0; 141 142 /* First try to max out Read Byte Count */ 143 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { 144 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { 145 mthca_err(mdev, "Couldn't set PCI-X max read count, " 146 "aborting.\n"); 147 return -ENODEV; 148 } 149 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 150 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 151 152 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) { 153 if (pcie_set_readrq(mdev->pdev, 4096)) { 154 mthca_err(mdev, "Couldn't write PCI Express read request, " 155 "aborting.\n"); 156 return -ENODEV; 157 } 158 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 159 mthca_info(mdev, "No PCI Express capability, " 160 "not setting Max Read Request Size.\n"); 161 162 return 0; 163} 164 165static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 166{ 167 int err; 168 u8 status; 169 170 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; 171 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 172 if (err) { 173 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 174 return err; 175 } 176 if (status) { 177 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 178 "aborting.\n", status); 179 return -EINVAL; 180 } 181 if (dev_lim->min_page_sz > PAGE_SIZE) { 182 mthca_err(mdev, "HCA minimum page size of %d bigger than " 183 "kernel PAGE_SIZE of %ld, aborting.\n", 184 dev_lim->min_page_sz, PAGE_SIZE); 185 return -ENODEV; 186 } 187 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 188 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 189 "aborting.\n", 190 dev_lim->num_ports, MTHCA_MAX_PORTS); 191 return -ENODEV; 192 } 193 194 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 195 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 196 "PCI resource 2 size of 0x%llx, aborting.\n", 197 dev_lim->uar_size, 198 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 199 return -ENODEV; 200 } 201 202 mdev->limits.num_ports = dev_lim->num_ports; 203 mdev->limits.vl_cap = dev_lim->max_vl; 204 mdev->limits.mtu_cap = dev_lim->max_mtu; 205 mdev->limits.gid_table_len = dev_lim->max_gids; 206 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 207 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 208 /* 209 * Need to allow for worst case send WQE overhead and check 210 * whether max_desc_sz imposes a lower limit than max_sg; UD 211 * send has the biggest overhead. 212 */ 213 mdev->limits.max_sg = min_t(int, dev_lim->max_sg, 214 (dev_lim->max_desc_sz - 215 sizeof (struct mthca_next_seg) - 216 (mthca_is_memfree(mdev) ? 217 sizeof (struct mthca_arbel_ud_seg) : 218 sizeof (struct mthca_tavor_ud_seg))) / 219 sizeof (struct mthca_data_seg)); 220 mdev->limits.max_wqes = dev_lim->max_qp_sz; 221 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 222 mdev->limits.reserved_qps = dev_lim->reserved_qps; 223 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 224 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 225 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 226 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 227 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 228 /* 229 * Subtract 1 from the limit because we need to allocate a 230 * spare CQE so the HCA HW can tell the difference between an 231 * empty CQ and a full CQ. 232 */ 233 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 234 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 235 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 236 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 237 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 238 mdev->limits.reserved_uars = dev_lim->reserved_uars; 239 mdev->limits.reserved_pds = dev_lim->reserved_pds; 240 mdev->limits.port_width_cap = dev_lim->max_port_width; 241 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 242 mdev->limits.flags = dev_lim->flags; 243 /* 244 * For old FW that doesn't return static rate support, use a 245 * value of 0x3 (only static rate values of 0 or 1 are handled), 246 * except on Sinai, where even old FW can handle static rate 247 * values of 2 and 3. 248 */ 249 if (dev_lim->stat_rate_support) 250 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 251 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 252 mdev->limits.stat_rate_support = 0xf; 253 else 254 mdev->limits.stat_rate_support = 0x3; 255 256 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 257 May be doable since hardware supports it for SRQ. 258 259 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 260 261 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 262 supported by driver. */ 263 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 264 IB_DEVICE_PORT_ACTIVE_EVENT | 265 IB_DEVICE_SYS_IMAGE_GUID | 266 IB_DEVICE_RC_RNR_NAK_GEN; 267 268 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 269 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 270 271 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 272 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 273 274 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 275 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 276 277 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 278 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 279 280 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 281 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 282 283 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 284 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 285 286 if (mthca_is_memfree(mdev)) 287 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM) 288 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 289 290 return 0; 291} 292 293static int mthca_init_tavor(struct mthca_dev *mdev) 294{ 295 s64 size; 296 u8 status; 297 int err; 298 struct mthca_dev_lim dev_lim; 299 struct mthca_profile profile; 300 struct mthca_init_hca_param init_hca; 301 302 err = mthca_SYS_EN(mdev, &status); 303 if (err) { 304 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 305 return err; 306 } 307 if (status) { 308 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 309 "aborting.\n", status); 310 return -EINVAL; 311 } 312 313 err = mthca_QUERY_FW(mdev, &status); 314 if (err) { 315 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 316 goto err_disable; 317 } 318 if (status) { 319 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 320 "aborting.\n", status); 321 err = -EINVAL; 322 goto err_disable; 323 } 324 err = mthca_QUERY_DDR(mdev, &status); 325 if (err) { 326 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 327 goto err_disable; 328 } 329 if (status) { 330 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 331 "aborting.\n", status); 332 err = -EINVAL; 333 goto err_disable; 334 } 335 336 err = mthca_dev_lim(mdev, &dev_lim); 337 if (err) { 338 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 339 goto err_disable; 340 } 341 342 profile = hca_profile; 343 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 344 profile.uarc_size = 0; 345 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 346 profile.num_srq = dev_lim.max_srqs; 347 348 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 349 if (size < 0) { 350 err = size; 351 goto err_disable; 352 } 353 354 err = mthca_INIT_HCA(mdev, &init_hca, &status); 355 if (err) { 356 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 357 goto err_disable; 358 } 359 if (status) { 360 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 361 "aborting.\n", status); 362 err = -EINVAL; 363 goto err_disable; 364 } 365 366 return 0; 367 368err_disable: 369 mthca_SYS_DIS(mdev, &status); 370 371 return err; 372} 373 374static int mthca_load_fw(struct mthca_dev *mdev) 375{ 376 u8 status; 377 int err; 378 379 /* FIXME: use HCA-attached memory for FW if present */ 380 381 mdev->fw.arbel.fw_icm = 382 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 383 GFP_HIGHUSER | __GFP_NOWARN, 0); 384 if (!mdev->fw.arbel.fw_icm) { 385 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 386 return -ENOMEM; 387 } 388 389 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 390 if (err) { 391 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 392 goto err_free; 393 } 394 if (status) { 395 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 396 err = -EINVAL; 397 goto err_free; 398 } 399 err = mthca_RUN_FW(mdev, &status); 400 if (err) { 401 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 402 goto err_unmap_fa; 403 } 404 if (status) { 405 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 406 err = -EINVAL; 407 goto err_unmap_fa; 408 } 409 410 return 0; 411 412err_unmap_fa: 413 mthca_UNMAP_FA(mdev, &status); 414 415err_free: 416 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 417 return err; 418} 419 420static int mthca_init_icm(struct mthca_dev *mdev, 421 struct mthca_dev_lim *dev_lim, 422 struct mthca_init_hca_param *init_hca, 423 u64 icm_size) 424{ 425 u64 aux_pages; 426 u8 status; 427 int err; 428 429 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 430 if (err) { 431 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 432 return err; 433 } 434 if (status) { 435 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 436 "aborting.\n", status); 437 return -EINVAL; 438 } 439 440 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 441 (unsigned long long) icm_size >> 10, 442 (unsigned long long) aux_pages << 2); 443 444 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 445 GFP_HIGHUSER | __GFP_NOWARN, 0); 446 if (!mdev->fw.arbel.aux_icm) { 447 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 448 return -ENOMEM; 449 } 450 451 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 452 if (err) { 453 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 454 goto err_free_aux; 455 } 456 if (status) { 457 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 458 err = -EINVAL; 459 goto err_free_aux; 460 } 461 462 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 463 if (err) { 464 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 465 goto err_unmap_aux; 466 } 467 468 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ 469 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * mdev->limits.mtt_seg_size, 470 dma_get_cache_alignment()) / mdev->limits.mtt_seg_size; 471 472 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 473 mdev->limits.mtt_seg_size, 474 mdev->limits.num_mtt_segs, 475 mdev->limits.reserved_mtts, 476 1, 0); 477 if (!mdev->mr_table.mtt_table) { 478 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 479 err = -ENOMEM; 480 goto err_unmap_eq; 481 } 482 483 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 484 dev_lim->mpt_entry_sz, 485 mdev->limits.num_mpts, 486 mdev->limits.reserved_mrws, 487 1, 1); 488 if (!mdev->mr_table.mpt_table) { 489 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 490 err = -ENOMEM; 491 goto err_unmap_mtt; 492 } 493 494 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 495 dev_lim->qpc_entry_sz, 496 mdev->limits.num_qps, 497 mdev->limits.reserved_qps, 498 0, 0); 499 if (!mdev->qp_table.qp_table) { 500 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 501 err = -ENOMEM; 502 goto err_unmap_mpt; 503 } 504 505 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 506 dev_lim->eqpc_entry_sz, 507 mdev->limits.num_qps, 508 mdev->limits.reserved_qps, 509 0, 0); 510 if (!mdev->qp_table.eqp_table) { 511 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 512 err = -ENOMEM; 513 goto err_unmap_qp; 514 } 515 516 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 517 MTHCA_RDB_ENTRY_SIZE, 518 mdev->limits.num_qps << 519 mdev->qp_table.rdb_shift, 0, 520 0, 0); 521 if (!mdev->qp_table.rdb_table) { 522 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 523 err = -ENOMEM; 524 goto err_unmap_eqp; 525 } 526 527 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 528 dev_lim->cqc_entry_sz, 529 mdev->limits.num_cqs, 530 mdev->limits.reserved_cqs, 531 0, 0); 532 if (!mdev->cq_table.table) { 533 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 534 err = -ENOMEM; 535 goto err_unmap_rdb; 536 } 537 538 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 539 mdev->srq_table.table = 540 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 541 dev_lim->srq_entry_sz, 542 mdev->limits.num_srqs, 543 mdev->limits.reserved_srqs, 544 0, 0); 545 if (!mdev->srq_table.table) { 546 mthca_err(mdev, "Failed to map SRQ context memory, " 547 "aborting.\n"); 548 err = -ENOMEM; 549 goto err_unmap_cq; 550 } 551 } 552 553 /* 554 * It's not strictly required, but for simplicity just map the 555 * whole multicast group table now. The table isn't very big 556 * and it's a lot easier than trying to track ref counts. 557 */ 558 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 559 MTHCA_MGM_ENTRY_SIZE, 560 mdev->limits.num_mgms + 561 mdev->limits.num_amgms, 562 mdev->limits.num_mgms + 563 mdev->limits.num_amgms, 564 0, 0); 565 if (!mdev->mcg_table.table) { 566 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 567 err = -ENOMEM; 568 goto err_unmap_srq; 569 } 570 571 return 0; 572 573err_unmap_srq: 574 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 575 mthca_free_icm_table(mdev, mdev->srq_table.table); 576 577err_unmap_cq: 578 mthca_free_icm_table(mdev, mdev->cq_table.table); 579 580err_unmap_rdb: 581 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 582 583err_unmap_eqp: 584 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 585 586err_unmap_qp: 587 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 588 589err_unmap_mpt: 590 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 591 592err_unmap_mtt: 593 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 594 595err_unmap_eq: 596 mthca_unmap_eq_icm(mdev); 597 598err_unmap_aux: 599 mthca_UNMAP_ICM_AUX(mdev, &status); 600 601err_free_aux: 602 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 603 604 return err; 605} 606 607static void mthca_free_icms(struct mthca_dev *mdev) 608{ 609 u8 status; 610 611 mthca_free_icm_table(mdev, mdev->mcg_table.table); 612 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 613 mthca_free_icm_table(mdev, mdev->srq_table.table); 614 mthca_free_icm_table(mdev, mdev->cq_table.table); 615 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 616 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 617 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 618 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 619 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 620 mthca_unmap_eq_icm(mdev); 621 622 mthca_UNMAP_ICM_AUX(mdev, &status); 623 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 624} 625 626static int mthca_init_arbel(struct mthca_dev *mdev) 627{ 628 struct mthca_dev_lim dev_lim; 629 struct mthca_profile profile; 630 struct mthca_init_hca_param init_hca; 631 s64 icm_size; 632 u8 status; 633 int err; 634 635 err = mthca_QUERY_FW(mdev, &status); 636 if (err) { 637 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 638 return err; 639 } 640 if (status) { 641 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 642 "aborting.\n", status); 643 return -EINVAL; 644 } 645 646 err = mthca_ENABLE_LAM(mdev, &status); 647 if (err) { 648 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 649 return err; 650 } 651 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 652 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 653 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 654 } else if (status) { 655 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 656 "aborting.\n", status); 657 return -EINVAL; 658 } 659 660 err = mthca_load_fw(mdev); 661 if (err) { 662 mthca_err(mdev, "Failed to start FW, aborting.\n"); 663 goto err_disable; 664 } 665 666 err = mthca_dev_lim(mdev, &dev_lim); 667 if (err) { 668 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 669 goto err_stop_fw; 670 } 671 672 profile = hca_profile; 673 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 674 profile.num_udav = 0; 675 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 676 profile.num_srq = dev_lim.max_srqs; 677 678 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 679 if (icm_size < 0) { 680 err = icm_size; 681 goto err_stop_fw; 682 } 683 684 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 685 if (err) 686 goto err_stop_fw; 687 688 err = mthca_INIT_HCA(mdev, &init_hca, &status); 689 if (err) { 690 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 691 goto err_free_icm; 692 } 693 if (status) { 694 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 695 "aborting.\n", status); 696 err = -EINVAL; 697 goto err_free_icm; 698 } 699 700 return 0; 701 702err_free_icm: 703 mthca_free_icms(mdev); 704 705err_stop_fw: 706 mthca_UNMAP_FA(mdev, &status); 707 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 708 709err_disable: 710 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 711 mthca_DISABLE_LAM(mdev, &status); 712 713 return err; 714} 715 716static void mthca_close_hca(struct mthca_dev *mdev) 717{ 718 u8 status; 719 720 mthca_CLOSE_HCA(mdev, 0, &status); 721 722 if (mthca_is_memfree(mdev)) { 723 mthca_free_icms(mdev); 724 725 mthca_UNMAP_FA(mdev, &status); 726 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 727 728 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 729 mthca_DISABLE_LAM(mdev, &status); 730 } else 731 mthca_SYS_DIS(mdev, &status); 732} 733 734static int mthca_init_hca(struct mthca_dev *mdev) 735{ 736 u8 status; 737 int err; 738 struct mthca_adapter adapter; 739 740 if (mthca_is_memfree(mdev)) 741 err = mthca_init_arbel(mdev); 742 else 743 err = mthca_init_tavor(mdev); 744 745 if (err) 746 return err; 747 748 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 749 if (err) { 750 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 751 goto err_close; 752 } 753 if (status) { 754 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 755 "aborting.\n", status); 756 err = -EINVAL; 757 goto err_close; 758 } 759 760 mdev->eq_table.inta_pin = adapter.inta_pin; 761 if (!mthca_is_memfree(mdev)) 762 mdev->rev_id = adapter.revision_id; 763 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 764 765 return 0; 766 767err_close: 768 mthca_close_hca(mdev); 769 return err; 770} 771 772static int mthca_setup_hca(struct mthca_dev *dev) 773{ 774 int err; 775 u8 status; 776 777 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 778 779 err = mthca_init_uar_table(dev); 780 if (err) { 781 mthca_err(dev, "Failed to initialize " 782 "user access region table, aborting.\n"); 783 return err; 784 } 785 786 err = mthca_uar_alloc(dev, &dev->driver_uar); 787 if (err) { 788 mthca_err(dev, "Failed to allocate driver access region, " 789 "aborting.\n"); 790 goto err_uar_table_free; 791 } 792 793 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 794 if (!dev->kar) { 795 mthca_err(dev, "Couldn't map kernel access region, " 796 "aborting.\n"); 797 err = -ENOMEM; 798 goto err_uar_free; 799 } 800 801 err = mthca_init_pd_table(dev); 802 if (err) { 803 mthca_err(dev, "Failed to initialize " 804 "protection domain table, aborting.\n"); 805 goto err_kar_unmap; 806 } 807 808 err = mthca_init_mr_table(dev); 809 if (err) { 810 mthca_err(dev, "Failed to initialize " 811 "memory region table, aborting.\n"); 812 goto err_pd_table_free; 813 } 814 815 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 816 if (err) { 817 mthca_err(dev, "Failed to create driver PD, " 818 "aborting.\n"); 819 goto err_mr_table_free; 820 } 821 822 err = mthca_init_eq_table(dev); 823 if (err) { 824 mthca_err(dev, "Failed to initialize " 825 "event queue table, aborting.\n"); 826 goto err_pd_free; 827 } 828 829 err = mthca_cmd_use_events(dev); 830 if (err) { 831 mthca_err(dev, "Failed to switch to event-driven " 832 "firmware commands, aborting.\n"); 833 goto err_eq_table_free; 834 } 835 836 err = mthca_NOP(dev, &status); 837 if (err || status) { 838 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { 839 mthca_warn(dev, "NOP command failed to generate interrupt " 840 "(IRQ %d).\n", 841 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector); 842 mthca_warn(dev, "Trying again with MSI-X disabled.\n"); 843 } else { 844 mthca_err(dev, "NOP command failed to generate interrupt " 845 "(IRQ %d), aborting.\n", 846 dev->pdev->irq); 847 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 848 } 849 850 goto err_cmd_poll; 851 } 852 853 mthca_dbg(dev, "NOP command IRQ test passed\n"); 854 855 err = mthca_init_cq_table(dev); 856 if (err) { 857 mthca_err(dev, "Failed to initialize " 858 "completion queue table, aborting.\n"); 859 goto err_cmd_poll; 860 } 861 862 err = mthca_init_srq_table(dev); 863 if (err) { 864 mthca_err(dev, "Failed to initialize " 865 "shared receive queue table, aborting.\n"); 866 goto err_cq_table_free; 867 } 868 869 err = mthca_init_qp_table(dev); 870 if (err) { 871 mthca_err(dev, "Failed to initialize " 872 "queue pair table, aborting.\n"); 873 goto err_srq_table_free; 874 } 875 876 err = mthca_init_av_table(dev); 877 if (err) { 878 mthca_err(dev, "Failed to initialize " 879 "address vector table, aborting.\n"); 880 goto err_qp_table_free; 881 } 882 883 err = mthca_init_mcg_table(dev); 884 if (err) { 885 mthca_err(dev, "Failed to initialize " 886 "multicast group table, aborting.\n"); 887 goto err_av_table_free; 888 } 889 890 return 0; 891 892err_av_table_free: 893 mthca_cleanup_av_table(dev); 894 895err_qp_table_free: 896 mthca_cleanup_qp_table(dev); 897 898err_srq_table_free: 899 mthca_cleanup_srq_table(dev); 900 901err_cq_table_free: 902 mthca_cleanup_cq_table(dev); 903 904err_cmd_poll: 905 mthca_cmd_use_polling(dev); 906 907err_eq_table_free: 908 mthca_cleanup_eq_table(dev); 909 910err_pd_free: 911 mthca_pd_free(dev, &dev->driver_pd); 912 913err_mr_table_free: 914 mthca_cleanup_mr_table(dev); 915 916err_pd_table_free: 917 mthca_cleanup_pd_table(dev); 918 919err_kar_unmap: 920 iounmap(dev->kar); 921 922err_uar_free: 923 mthca_uar_free(dev, &dev->driver_uar); 924 925err_uar_table_free: 926 mthca_cleanup_uar_table(dev); 927 return err; 928} 929 930static int mthca_enable_msi_x(struct mthca_dev *mdev) 931{ 932 struct msix_entry entries[3]; 933 int err; 934 935 entries[0].entry = 0; 936 entries[1].entry = 1; 937 entries[2].entry = 2; 938 939 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 940 if (err) { 941 if (err > 0) 942 mthca_info(mdev, "Only %d MSI-X vectors available, " 943 "not using MSI-X\n", err); 944 return err; 945 } 946 947 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 948 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 949 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 950 951 return 0; 952} 953 954/* Types of supported HCA */ 955enum { 956 TAVOR, /* MT23108 */ 957 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 958 ARBEL_NATIVE, /* MT25208 with extended features */ 959 SINAI /* MT25204 */ 960}; 961 962#define MTHCA_FW_VER(major, minor, subminor) \ 963 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 964 965static struct { 966 u64 latest_fw; 967 u32 flags; 968} mthca_hca_table[] = { 969 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0), 970 .flags = 0 }, 971 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200), 972 .flags = MTHCA_FLAG_PCIE }, 973 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0), 974 .flags = MTHCA_FLAG_MEMFREE | 975 MTHCA_FLAG_PCIE }, 976 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0), 977 .flags = MTHCA_FLAG_MEMFREE | 978 MTHCA_FLAG_PCIE | 979 MTHCA_FLAG_SINAI_OPT } 980}; 981 982static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 983{ 984 int ddr_hidden = 0; 985 int err; 986 struct mthca_dev *mdev; 987 988 printk(KERN_INFO PFX "Initializing %s\n", 989 pci_name(pdev)); 990 991 err = pci_enable_device(pdev); 992 if (err) { 993 dev_err(&pdev->dev, "Cannot enable PCI device, " 994 "aborting.\n"); 995 return err; 996 } 997 998 /* 999 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 1000 * be present) 1001 */ 1002 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1003 pci_resource_len(pdev, 0) != 1 << 20) { 1004 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1005 err = -ENODEV; 1006 goto err_disable_pdev; 1007 } 1008 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1009 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1010 err = -ENODEV; 1011 goto err_disable_pdev; 1012 } 1013 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1014 ddr_hidden = 1; 1015 1016 err = pci_request_regions(pdev, DRV_NAME); 1017 if (err) { 1018 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1019 "aborting.\n"); 1020 goto err_disable_pdev; 1021 } 1022 1023 pci_set_master(pdev); 1024 1025 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 1026 if (err) { 1027 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1028 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1029 if (err) { 1030 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1031 goto err_free_res; 1032 } 1033 } 1034 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 1035 if (err) { 1036 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1037 "consistent PCI DMA mask.\n"); 1038 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 1039 if (err) { 1040 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1041 "aborting.\n"); 1042 goto err_free_res; 1043 } 1044 } 1045 1046 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1047 if (!mdev) { 1048 dev_err(&pdev->dev, "Device struct alloc failed, " 1049 "aborting.\n"); 1050 err = -ENOMEM; 1051 goto err_free_res; 1052 } 1053 1054 mdev->pdev = pdev; 1055 1056 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1057 if (ddr_hidden) 1058 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1059 1060 /* 1061 * Now reset the HCA before we touch the PCI capabilities or 1062 * attempt a firmware command, since a boot ROM may have left 1063 * the HCA in an undefined state. 1064 */ 1065 err = mthca_reset(mdev); 1066 if (err) { 1067 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1068 goto err_free_dev; 1069 } 1070 1071 if (mthca_cmd_init(mdev)) { 1072 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1073 goto err_free_dev; 1074 } 1075 1076 err = mthca_tune_pci(mdev); 1077 if (err) 1078 goto err_cmd; 1079 1080 err = mthca_init_hca(mdev); 1081 if (err) 1082 goto err_cmd; 1083 1084 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1085 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n", 1086 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1087 (int) (mdev->fw_ver & 0xffff), 1088 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1089 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1090 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1091 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1092 } 1093 1094 if (msi_x && !mthca_enable_msi_x(mdev)) 1095 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1096 1097 err = mthca_setup_hca(mdev); 1098 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) { 1099 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1100 pci_disable_msix(pdev); 1101 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X; 1102 1103 err = mthca_setup_hca(mdev); 1104 } 1105 1106 if (err) 1107 goto err_close; 1108 1109 err = mthca_register_device(mdev); 1110 if (err) 1111 goto err_cleanup; 1112 1113 err = mthca_create_agents(mdev); 1114 if (err) 1115 goto err_unregister; 1116 1117 pci_set_drvdata(pdev, mdev); 1118 mdev->hca_type = hca_type; 1119 1120 mdev->active = true; 1121 1122 return 0; 1123 1124err_unregister: 1125 mthca_unregister_device(mdev); 1126 1127err_cleanup: 1128 mthca_cleanup_mcg_table(mdev); 1129 mthca_cleanup_av_table(mdev); 1130 mthca_cleanup_qp_table(mdev); 1131 mthca_cleanup_srq_table(mdev); 1132 mthca_cleanup_cq_table(mdev); 1133 mthca_cmd_use_polling(mdev); 1134 mthca_cleanup_eq_table(mdev); 1135 1136 mthca_pd_free(mdev, &mdev->driver_pd); 1137 1138 mthca_cleanup_mr_table(mdev); 1139 mthca_cleanup_pd_table(mdev); 1140 mthca_cleanup_uar_table(mdev); 1141 1142err_close: 1143 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1144 pci_disable_msix(pdev); 1145 1146 mthca_close_hca(mdev); 1147 1148err_cmd: 1149 mthca_cmd_cleanup(mdev); 1150 1151err_free_dev: 1152 ib_dealloc_device(&mdev->ib_dev); 1153 1154err_free_res: 1155 pci_release_regions(pdev); 1156 1157err_disable_pdev: 1158 pci_disable_device(pdev); 1159 pci_set_drvdata(pdev, NULL); 1160 return err; 1161} 1162 1163static void __mthca_remove_one(struct pci_dev *pdev) 1164{ 1165 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1166 u8 status; 1167 int p; 1168 1169 if (mdev) { 1170 mthca_free_agents(mdev); 1171 mthca_unregister_device(mdev); 1172 1173 for (p = 1; p <= mdev->limits.num_ports; ++p) 1174 mthca_CLOSE_IB(mdev, p, &status); 1175 1176 mthca_cleanup_mcg_table(mdev); 1177 mthca_cleanup_av_table(mdev); 1178 mthca_cleanup_qp_table(mdev); 1179 mthca_cleanup_srq_table(mdev); 1180 mthca_cleanup_cq_table(mdev); 1181 mthca_cmd_use_polling(mdev); 1182 mthca_cleanup_eq_table(mdev); 1183 1184 mthca_pd_free(mdev, &mdev->driver_pd); 1185 1186 mthca_cleanup_mr_table(mdev); 1187 mthca_cleanup_pd_table(mdev); 1188 1189 iounmap(mdev->kar); 1190 mthca_uar_free(mdev, &mdev->driver_uar); 1191 mthca_cleanup_uar_table(mdev); 1192 mthca_close_hca(mdev); 1193 mthca_cmd_cleanup(mdev); 1194 1195 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1196 pci_disable_msix(pdev); 1197 1198 ib_dealloc_device(&mdev->ib_dev); 1199 pci_release_regions(pdev); 1200 pci_disable_device(pdev); 1201 pci_set_drvdata(pdev, NULL); 1202 } 1203} 1204 1205int __mthca_restart_one(struct pci_dev *pdev) 1206{ 1207 struct mthca_dev *mdev; 1208 int hca_type; 1209 1210 mdev = pci_get_drvdata(pdev); 1211 if (!mdev) 1212 return -ENODEV; 1213 hca_type = mdev->hca_type; 1214 __mthca_remove_one(pdev); 1215 return __mthca_init_one(pdev, hca_type); 1216} 1217 1218static int __devinit mthca_init_one(struct pci_dev *pdev, 1219 const struct pci_device_id *id) 1220{ 1221 int ret; 1222 1223 mutex_lock(&mthca_device_mutex); 1224 1225 printk_once(KERN_INFO "%s", mthca_version); 1226 1227 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1228 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 1229 pci_name(pdev), id->driver_data); 1230 mutex_unlock(&mthca_device_mutex); 1231 return -ENODEV; 1232 } 1233 1234 ret = __mthca_init_one(pdev, id->driver_data); 1235 1236 mutex_unlock(&mthca_device_mutex); 1237 1238 return ret; 1239} 1240 1241static void __devexit mthca_remove_one(struct pci_dev *pdev) 1242{ 1243 mutex_lock(&mthca_device_mutex); 1244 __mthca_remove_one(pdev); 1245 mutex_unlock(&mthca_device_mutex); 1246} 1247 1248static struct pci_device_id mthca_pci_table[] = { 1249 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1250 .driver_data = TAVOR }, 1251 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1252 .driver_data = TAVOR }, 1253 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1254 .driver_data = ARBEL_COMPAT }, 1255 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1256 .driver_data = ARBEL_COMPAT }, 1257 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1258 .driver_data = ARBEL_NATIVE }, 1259 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1260 .driver_data = ARBEL_NATIVE }, 1261 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1262 .driver_data = SINAI }, 1263 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1264 .driver_data = SINAI }, 1265 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1266 .driver_data = SINAI }, 1267 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1268 .driver_data = SINAI }, 1269 { 0, } 1270}; 1271 1272MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1273 1274static struct pci_driver mthca_driver = { 1275 .name = DRV_NAME, 1276 .id_table = mthca_pci_table, 1277 .probe = mthca_init_one, 1278 .remove = __devexit_p(mthca_remove_one) 1279}; 1280 1281static void __init __mthca_check_profile_val(const char *name, int *pval, 1282 int pval_default) 1283{ 1284 /* value must be positive and power of 2 */ 1285 int old_pval = *pval; 1286 1287 if (old_pval <= 0) 1288 *pval = pval_default; 1289 else 1290 *pval = roundup_pow_of_two(old_pval); 1291 1292 if (old_pval != *pval) { 1293 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1294 old_pval, name); 1295 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1296 } 1297} 1298 1299#define mthca_check_profile_val(name, default) \ 1300 __mthca_check_profile_val(#name, &hca_profile.name, default) 1301 1302static void __init mthca_validate_profile(void) 1303{ 1304 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1305 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1306 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1307 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1308 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1309 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1310 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1311 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1312 1313 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1314 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1315 hca_profile.fmr_reserved_mtts); 1316 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1317 hca_profile.num_mtt); 1318 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1319 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1320 hca_profile.fmr_reserved_mtts); 1321 } 1322 1323 if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { 1324 printk(KERN_WARNING PFX "bad log_mtts_per_seg (%d). Using default - %d\n", 1325 log_mtts_per_seg, ilog2(MTHCA_MTT_SEG_SIZE / 8)); 1326 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8); 1327 } 1328} 1329 1330static int __init mthca_init(void) 1331{ 1332 int ret; 1333 1334 mthca_validate_profile(); 1335 1336 ret = mthca_catas_init(); 1337 if (ret) 1338 return ret; 1339 1340 ret = pci_register_driver(&mthca_driver); 1341 if (ret < 0) { 1342 mthca_catas_cleanup(); 1343 return ret; 1344 } 1345 1346 return 0; 1347} 1348 1349static void __exit mthca_cleanup(void) 1350{ 1351 pci_unregister_driver(&mthca_driver); 1352 mthca_catas_cleanup(); 1353} 1354 1355module_init(mthca_init); 1356module_exit(mthca_cleanup); 1357