enternow_pci.c revision 67eb5db5874076db01febed5a1a9281628fa9fb4 
1/* enternow_pci.c,v 0.99 2001/10/02
2 *
3 * enternow_pci.c       Card-specific routines for
4 *                      Formula-n enter:now ISDN PCI ab
5 *                      Gerdes AG Power ISDN PCI
6 *                      Woerltronic SA 16 PCI
7 *                      (based on HiSax driver by Karsten Keil)
8 *
9 * Author               Christoph Ersfeld <info@formula-n.de>
10 *                      Formula-n Europe AG (www.formula-n.com)
11 *                      previously Gerdes AG
12 *
13 *
14 *                      This file is (c) under GNU PUBLIC LICENSE
15 *
16 * Notes:
17 * This driver interfaces to netjet.c which performs B-channel
18 * processing.
19 *
20 * Version 0.99 is the first release of this driver and there are
21 * certainly a few bugs.
22 * It isn't testet on linux 2.4 yet, so consider this code to be
23 * beta.
24 *
25 * Please don't report me any malfunction without sending
26 * (compressed) debug-logs.
27 * It would be nearly impossible to retrace it.
28 *
29 * Log D-channel-processing as follows:
30 *
31 * 1. Load hisax with card-specific parameters, this example ist for
32 *    Formula-n enter:now ISDN PCI and compatible
33 *    (f.e. Gerdes Power ISDN PCI)
34 *
35 *    modprobe hisax type=41 protocol=2 id=gerdes
36 *
37 *    if you chose an other value for id, you need to modify the
38 *    code below, too.
39 *
40 * 2. set debug-level
41 *
42 *    hisaxctrl gerdes 1 0x3ff
43 *    hisaxctrl gerdes 11 0x4f
44 *    cat /dev/isdnctrl >> ~/log &
45 *
46 * Please take also a look into /var/log/messages if there is
47 * anything importand concerning HISAX.
48 *
49 *
50 * Credits:
51 * Programming the driver for Formula-n enter:now ISDN PCI and
52 * necessary the driver for the used Amd 7930 D-channel-controller
53 * was spnsored by Formula-n Europe AG.
54 * Thanks to Karsten Keil and Petr Novak, who gave me support in
55 * Hisax-specific questions.
56 * I want so say special thanks to Carl-Friedrich Braun, who had to
57 * answer a lot of questions about generally ISDN and about handling
58 * of the Amd-Chip.
59 *
60 */
61
62
63#include "hisax.h"
64#include "isac.h"
65#include "isdnl1.h"
66#include "amd7930_fn.h"
67#include <linux/interrupt.h>
68#include <linux/ppp_defs.h>
69#include <linux/pci.h>
70#include <linux/init.h>
71#include "netjet.h"
72
73
74
75static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
76
77
78/* f�r PowerISDN PCI */
79#define TJ_AMD_IRQ                                              0x20
80#define TJ_LED1                                                 0x40
81#define TJ_LED2                                                 0x80
82
83
84/* Das Fenster zum AMD...
85 * Ab Adresse hw.njet.base + TJ_AMD_PORT werden vom AMD jeweils 8 Bit in
86 * den TigerJet i/o-Raum gemappt
87 * -> 0x01 des AMD bei hw.njet.base + 0C4 */
88#define TJ_AMD_PORT                                             0xC0
89
90
91
92/* *************************** I/O-Interface functions ************************************* */
93
94
95/* cs->readisac, macro rByteAMD */
96static unsigned char
97ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
98{
99	/* direktes Register */
100	if(offset < 8)
101		return (inb(cs->hw.njet.isac + 4*offset));
102
103	/* indirektes Register */
104	else {
105		outb(offset, cs->hw.njet.isac + 4*AMD_CR);
106		return(inb(cs->hw.njet.isac + 4*AMD_DR));
107	}
108}
109
110/* cs->writeisac, macro wByteAMD */
111static void
112WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
113{
114	/* direktes Register */
115	if(offset < 8)
116		outb(value, cs->hw.njet.isac + 4*offset);
117
118	/* indirektes Register */
119	else {
120		outb(offset, cs->hw.njet.isac + 4*AMD_CR);
121		outb(value, cs->hw.njet.isac + 4*AMD_DR);
122	}
123}
124
125
126static void
127enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
128        if (!val)
129	        outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
130        else
131	        outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
132}
133
134
135static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
136{
137        return(5);
138}
139
140static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
141{
142
143}
144
145
146/* ******************************************************************************** */
147
148
149static void
150reset_enpci(struct IsdnCardState *cs)
151{
152	if (cs->debug & L1_DEB_ISAC)
153		debugl1(cs, "enter:now PCI: reset");
154
155	/* Reset on, (also for AMD) */
156	cs->hw.njet.ctrl_reg = 0x07;
157	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
158	mdelay(20);
159	/* Reset off */
160	cs->hw.njet.ctrl_reg = 0x30;
161	outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
162	/* 20ms delay */
163	mdelay(20);
164	cs->hw.njet.auxd = 0;  // LED-status
165	cs->hw.njet.dmactrl = 0;
166	outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
167	outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
168	outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
169}
170
171
172static int
173enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
174{
175	u_long flags;
176        unsigned char *chan;
177
178	if (cs->debug & L1_DEB_ISAC)
179		debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
180
181        switch (mt) {
182		case CARD_RESET:
183			spin_lock_irqsave(&cs->lock, flags);
184			reset_enpci(cs);
185                        Amd7930_init(cs);
186                        spin_unlock_irqrestore(&cs->lock, flags);
187			break;
188		case CARD_RELEASE:
189			release_io_netjet(cs);
190			break;
191		case CARD_INIT:
192			reset_enpci(cs);
193			inittiger(cs);
194			/* irq must be on here */
195			Amd7930_init(cs);
196			break;
197		case CARD_TEST:
198			break;
199                case MDL_ASSIGN:
200                        /* TEI assigned, LED1 on */
201                        cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
202                        outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
203                        break;
204                case MDL_REMOVE:
205                        /* TEI removed, LEDs off */
206	                cs->hw.njet.auxd = 0;
207                        outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
208                        break;
209                case MDL_BC_ASSIGN:
210                        /* activate B-channel */
211                        chan = (unsigned char *)arg;
212
213                        if (cs->debug & L1_DEB_ISAC)
214		                debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
215
216                        cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
217                        /* at least one b-channel in use, LED 2 on */
218                        cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
219                        outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
220                        break;
221                case MDL_BC_RELEASE:
222                        /* deactivate B-channel */
223                        chan = (unsigned char *)arg;
224
225                        if (cs->debug & L1_DEB_ISAC)
226		                debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
227
228                        cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
229                        /* no b-channel active -> LED2 off */
230                        if (!(cs->dc.amd7930.lmr1 & 3)) {
231                                cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
232                                outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
233                        }
234                        break;
235                default:
236                        break;
237
238	}
239	return(0);
240}
241
242static irqreturn_t
243enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
244{
245	struct IsdnCardState *cs = dev_id;
246	unsigned char s0val, s1val, ir;
247	u_long flags;
248
249	spin_lock_irqsave(&cs->lock, flags);
250	s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
251
252        /* AMD threw an interrupt */
253	if (!(s1val & TJ_AMD_IRQ)) {
254                /* read and clear interrupt-register */
255		ir = ReadByteAmd7930(cs, 0x00);
256		Amd7930_interrupt(cs, ir);
257		s1val = 1;
258	} else
259		s1val = 0;
260	s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
261	if ((s0val | s1val)==0) { // shared IRQ
262		spin_unlock_irqrestore(&cs->lock, flags);
263		return IRQ_NONE;
264	}
265	if (s0val)
266		outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
267
268	/* DMA-Interrupt: B-channel-stuff */
269	/* set bits in sval to indicate which page is free */
270	if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
271		inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
272		/* the 2nd write page is free */
273		s0val = 0x08;
274	else	/* the 1st write page is free */
275		s0val = 0x04;
276	if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
277		inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
278		/* the 2nd read page is free */
279		s0val = s0val | 0x02;
280	else	/* the 1st read page is free */
281		s0val = s0val | 0x01;
282	if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
283	{
284		if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
285			spin_unlock_irqrestore(&cs->lock, flags);
286			return IRQ_HANDLED;
287		}
288		cs->hw.njet.irqstat0 = s0val;
289		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
290			(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
291			/* we have a read dma int */
292			read_tiger(cs);
293		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
294			(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
295			/* we have a write dma int */
296			write_tiger(cs);
297		test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
298	}
299	spin_unlock_irqrestore(&cs->lock, flags);
300	return IRQ_HANDLED;
301}
302
303
304static struct pci_dev *dev_netjet __devinitdata = NULL;
305
306/* called by config.c */
307int __devinit
308setup_enternow_pci(struct IsdnCard *card)
309{
310	int bytecnt;
311	struct IsdnCardState *cs = card->cs;
312	char tmp[64];
313
314#ifdef CONFIG_PCI
315#ifdef __BIG_ENDIAN
316#error "not running on big endian machines now"
317#endif
318        strcpy(tmp, enternow_pci_rev);
319	printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
320	if (cs->typ != ISDN_CTYPE_ENTERNOW)
321		return(0);
322	test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
323
324	for ( ;; )
325	{
326		if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
327			PCI_DEVICE_ID_TIGERJET_300,  dev_netjet))) {
328			if (pci_enable_device(dev_netjet))
329				return(0);
330			cs->irq = dev_netjet->irq;
331			if (!cs->irq) {
332				printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
333				return(0);
334			}
335			cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
336			if (!cs->hw.njet.base) {
337				printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
338				return(0);
339			}
340                        /* checks Sub-Vendor ID because system crashes with Traverse-Card */
341			if ((dev_netjet->subsystem_vendor != 0x55) ||
342				(dev_netjet->subsystem_device != 0x02)) {
343				printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
344                                printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
345                                return(0);
346                        }
347		} else {
348                        printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
349			return(0);
350		}
351
352		cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
353		cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
354
355		/* Reset an */
356		cs->hw.njet.ctrl_reg = 0x07;  // ge�ndert von 0xff
357		outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
358		/* 20 ms Pause */
359		mdelay(20);
360
361		cs->hw.njet.ctrl_reg = 0x30;  /* Reset Off and status read clear */
362		outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
363		mdelay(10);
364
365		cs->hw.njet.auxd = 0x00; // war 0xc0
366		cs->hw.njet.dmactrl = 0;
367
368		outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
369		outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
370		outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
371
372		break;
373	}
374#else
375
376	printk(KERN_WARNING "enter:now PCI: NO_PCI_BIOS\n");
377	printk(KERN_WARNING "enter:now PCI: unable to config Formula-n enter:now ISDN PCI ab\n");
378	return (0);
379
380#endif /* CONFIG_PCI */
381
382	bytecnt = 256;
383
384	printk(KERN_INFO
385		"enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
386		cs->hw.njet.base, cs->irq);
387	if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
388		printk(KERN_WARNING
389			   "HiSax: %s config port %lx-%lx already in use\n",
390			   CardType[card->typ],
391			   cs->hw.njet.base,
392			   cs->hw.njet.base + bytecnt);
393		return (0);
394	}
395	setup_Amd7930(cs);
396	cs->hw.njet.last_is0 = 0;
397        /* macro rByteAMD */
398        cs->readisac = &ReadByteAmd7930;
399        /* macro wByteAMD */
400        cs->writeisac = &WriteByteAmd7930;
401        cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
402
403        cs->BC_Read_Reg  = &dummyrr;
404	cs->BC_Write_Reg = &dummywr;
405	cs->BC_Send_Data = &netjet_fill_dma;
406	cs->cardmsg = &enpci_card_msg;
407	cs->irq_func = &enpci_interrupt;
408	cs->irq_flags |= IRQF_SHARED;
409
410        return (1);
411}
412