1/*
2    TDA10021  - Single Chip Cable Channel Receiver driver module
3	       used on the Siemens DVB-C cards
4
5    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
6    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
7		   Support for TDA10021
8
9    This program is free software; you can redistribute it and/or modify
10    it under the terms of the GNU General Public License as published by
11    the Free Software Foundation; either version 2 of the License, or
12    (at your option) any later version.
13
14    This program is distributed in the hope that it will be useful,
15    but WITHOUT ANY WARRANTY; without even the implied warranty of
16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17    GNU General Public License for more details.
18
19    You should have received a copy of the GNU General Public License
20    along with this program; if not, write to the Free Software
21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24#include <linux/delay.h>
25#include <linux/errno.h>
26#include <linux/init.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/string.h>
30#include <linux/slab.h>
31
32#include "dvb_frontend.h"
33#include "tda1002x.h"
34
35
36struct tda10021_state {
37	struct i2c_adapter* i2c;
38	/* configuration settings */
39	const struct tda1002x_config* config;
40	struct dvb_frontend frontend;
41
42	u8 pwm;
43	u8 reg0;
44};
45
46
47#if 0
48#define dprintk(x...) printk(x)
49#else
50#define dprintk(x...)
51#endif
52
53static int verbose;
54
55#define XIN 57840000UL
56
57#define FIN (XIN >> 4)
58
59static int tda10021_inittab_size = 0x40;
60static u8 tda10021_inittab[0x40]=
61{
62	0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
63	0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
64	0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
65	0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
66	0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
67	0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
68	0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
69	0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
70};
71
72static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
73{
74	u8 buf[] = { reg, data };
75	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
76	int ret;
77
78	ret = i2c_transfer (state->i2c, &msg, 1);
79	if (ret != 1)
80		printk("DVB: TDA10021(%d): %s, writereg error "
81			"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
82			state->frontend.dvb->num, __func__, reg, data, ret);
83
84	msleep(10);
85	return (ret != 1) ? -EREMOTEIO : 0;
86}
87
88static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
89{
90	u8 b0 [] = { reg };
91	u8 b1 [] = { 0 };
92	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
93				  { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
94	int ret;
95
96	ret = i2c_transfer (state->i2c, msg, 2);
97	// Don't print an error message if the id is read.
98	if (ret != 2 && reg != 0x1a)
99		printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
100				__func__, ret);
101	return b1[0];
102}
103
104//get access to tuner
105static int lock_tuner(struct tda10021_state* state)
106{
107	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
108	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
109
110	if(i2c_transfer(state->i2c, &msg, 1) != 1)
111	{
112		printk("tda10021: lock tuner fails\n");
113		return -EREMOTEIO;
114	}
115	return 0;
116}
117
118//release access from tuner
119static int unlock_tuner(struct tda10021_state* state)
120{
121	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
122	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
123
124	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
125	{
126		printk("tda10021: unlock tuner fails\n");
127		return -EREMOTEIO;
128	}
129	return 0;
130}
131
132static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
133				fe_spectral_inversion_t inversion)
134{
135	reg0 |= state->reg0 & 0x63;
136
137	if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
138		reg0 &= ~0x20;
139	else
140		reg0 |= 0x20;
141
142	_tda10021_writereg (state, 0x00, reg0 & 0xfe);
143	_tda10021_writereg (state, 0x00, reg0 | 0x01);
144
145	state->reg0 = reg0;
146	return 0;
147}
148
149static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
150{
151	s32 BDR;
152	s32 BDRI;
153	s16 SFIL=0;
154	u16 NDEC = 0;
155	u32 tmp, ratio;
156
157	if (symbolrate > XIN/2)
158		symbolrate = XIN/2;
159	if (symbolrate < 500000)
160		symbolrate = 500000;
161
162	if (symbolrate < XIN/16) NDEC = 1;
163	if (symbolrate < XIN/32) NDEC = 2;
164	if (symbolrate < XIN/64) NDEC = 3;
165
166	if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
167	if (symbolrate < (u32)(XIN/16))	 SFIL = 0;
168	if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
169	if (symbolrate < (u32)(XIN/32))	 SFIL = 0;
170	if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
171	if (symbolrate < (u32)(XIN/64))	 SFIL = 0;
172	if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
173
174	symbolrate <<= NDEC;
175	ratio = (symbolrate << 4) / FIN;
176	tmp =  ((symbolrate << 4) % FIN) << 8;
177	ratio = (ratio << 8) + tmp / FIN;
178	tmp = (tmp % FIN) << 8;
179	ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);
180
181	BDR = ratio;
182	BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
183
184	if (BDRI > 0xFF)
185		BDRI = 0xFF;
186
187	SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
188
189	NDEC = (NDEC << 6) | tda10021_inittab[0x03];
190
191	_tda10021_writereg (state, 0x03, NDEC);
192	_tda10021_writereg (state, 0x0a, BDR&0xff);
193	_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
194	_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
195
196	_tda10021_writereg (state, 0x0d, BDRI);
197	_tda10021_writereg (state, 0x0e, SFIL);
198
199	return 0;
200}
201
202static int tda10021_init (struct dvb_frontend *fe)
203{
204	struct tda10021_state* state = fe->demodulator_priv;
205	int i;
206
207	dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
208
209	//_tda10021_writereg (fe, 0, 0);
210
211	for (i=0; i<tda10021_inittab_size; i++)
212		_tda10021_writereg (state, i, tda10021_inittab[i]);
213
214	_tda10021_writereg (state, 0x34, state->pwm);
215
216	//Comment by markus
217	//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
218	//0x2A[4] == BYPPLL -> Power down mode (default 1)
219	//0x2A[5] == LCK -> PLL Lock Flag
220	//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
221
222	//Activate PLL
223	_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
224	return 0;
225}
226
227struct qam_params {
228	u8 conf, agcref, lthr, mseth, aref;
229};
230
231static int tda10021_set_parameters(struct dvb_frontend *fe)
232{
233	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
234	u32 delsys  = c->delivery_system;
235	unsigned qam = c->modulation;
236	bool is_annex_c;
237	u32 reg0x3d;
238	struct tda10021_state* state = fe->demodulator_priv;
239	static const struct qam_params qam_params[] = {
240		/* Modulation  Conf  AGCref  LTHR  MSETH  AREF */
241		[QPSK]	   = { 0x14, 0x78,   0x78, 0x8c,  0x96 },
242		[QAM_16]   = { 0x00, 0x8c,   0x87, 0xa2,  0x91 },
243		[QAM_32]   = { 0x04, 0x8c,   0x64, 0x74,  0x96 },
244		[QAM_64]   = { 0x08, 0x6a,   0x46, 0x43,  0x6a },
245		[QAM_128]  = { 0x0c, 0x78,   0x36, 0x34,  0x7e },
246		[QAM_256]  = { 0x10, 0x5c,   0x26, 0x23,  0x6b },
247	};
248
249	switch (delsys) {
250	case SYS_DVBC_ANNEX_A:
251		is_annex_c = false;
252		break;
253	case SYS_DVBC_ANNEX_C:
254		is_annex_c = true;
255		break;
256	default:
257		return -EINVAL;
258	}
259
260	/*
261	 * gcc optimizes the code bellow the same way as it would code:
262	 *           "if (qam > 5) return -EINVAL;"
263	 * Yet, the code is clearer, as it shows what QAM standards are
264	 * supported by the driver, and avoids the usage of magic numbers on
265	 * it.
266	 */
267	switch (qam) {
268	case QPSK:
269	case QAM_16:
270	case QAM_32:
271	case QAM_64:
272	case QAM_128:
273	case QAM_256:
274		break;
275	default:
276		return -EINVAL;
277	}
278
279	if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
280		return -EINVAL;
281
282	/*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/
283
284	if (fe->ops.tuner_ops.set_params) {
285		fe->ops.tuner_ops.set_params(fe);
286		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
287	}
288
289	tda10021_set_symbolrate(state, c->symbol_rate);
290	_tda10021_writereg(state, 0x34, state->pwm);
291
292	_tda10021_writereg(state, 0x01, qam_params[qam].agcref);
293	_tda10021_writereg(state, 0x05, qam_params[qam].lthr);
294	_tda10021_writereg(state, 0x08, qam_params[qam].mseth);
295	_tda10021_writereg(state, 0x09, qam_params[qam].aref);
296
297	/*
298	 * Bit 0 == 0 means roll-off = 0.15 (Annex A)
299	 *	 == 1 means roll-off = 0.13 (Annex C)
300	 */
301	reg0x3d = tda10021_readreg (state, 0x3d);
302	if (is_annex_c)
303		_tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);
304	else
305		_tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
306	tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);
307
308	return 0;
309}
310
311static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
312{
313	struct tda10021_state* state = fe->demodulator_priv;
314	int sync;
315
316	*status = 0;
317	//0x11[0] == EQALGO -> Equalizer algorithms state
318	//0x11[1] == CARLOCK -> Carrier locked
319	//0x11[2] == FSYNC -> Frame synchronisation
320	//0x11[3] == FEL -> Front End locked
321	//0x11[6] == NODVB -> DVB Mode Information
322	sync = tda10021_readreg (state, 0x11);
323
324	if (sync & 2)
325		*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
326
327	if (sync & 4)
328		*status |= FE_HAS_SYNC|FE_HAS_VITERBI;
329
330	if (sync & 8)
331		*status |= FE_HAS_LOCK;
332
333	return 0;
334}
335
336static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
337{
338	struct tda10021_state* state = fe->demodulator_priv;
339
340	u32 _ber = tda10021_readreg(state, 0x14) |
341		(tda10021_readreg(state, 0x15) << 8) |
342		((tda10021_readreg(state, 0x16) & 0x0f) << 16);
343	_tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
344					| (tda10021_inittab[0x10] & 0xc0));
345	*ber = 10 * _ber;
346
347	return 0;
348}
349
350static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
351{
352	struct tda10021_state* state = fe->demodulator_priv;
353
354	u8 config = tda10021_readreg(state, 0x02);
355	u8 gain = tda10021_readreg(state, 0x17);
356	if (config & 0x02)
357		/* the agc value is inverted */
358		gain = ~gain;
359	*strength = (gain << 8) | gain;
360
361	return 0;
362}
363
364static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
365{
366	struct tda10021_state* state = fe->demodulator_priv;
367
368	u8 quality = ~tda10021_readreg(state, 0x18);
369	*snr = (quality << 8) | quality;
370
371	return 0;
372}
373
374static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
375{
376	struct tda10021_state* state = fe->demodulator_priv;
377
378	*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
379	if (*ucblocks == 0x7f)
380		*ucblocks = 0xffffffff;
381
382	/* reset uncorrected block counter */
383	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
384	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
385
386	return 0;
387}
388
389static int tda10021_get_frontend(struct dvb_frontend *fe)
390{
391	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
392	struct tda10021_state* state = fe->demodulator_priv;
393	int sync;
394	s8 afc = 0;
395
396	sync = tda10021_readreg(state, 0x11);
397	afc = tda10021_readreg(state, 0x19);
398	if (verbose) {
399		/* AFC only valid when carrier has been recovered */
400		printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
401				  "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
402			state->frontend.dvb->num, afc,
403		       -((s32)p->symbol_rate * afc) >> 10);
404	}
405
406	p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
407	p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
408
409	p->fec_inner = FEC_NONE;
410	p->frequency = ((p->frequency + 31250) / 62500) * 62500;
411
412	if (sync & 2)
413		p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
414
415	return 0;
416}
417
418static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
419{
420	struct tda10021_state* state = fe->demodulator_priv;
421
422	if (enable) {
423		lock_tuner(state);
424	} else {
425		unlock_tuner(state);
426	}
427	return 0;
428}
429
430static int tda10021_sleep(struct dvb_frontend* fe)
431{
432	struct tda10021_state* state = fe->demodulator_priv;
433
434	_tda10021_writereg (state, 0x1b, 0x02);  /* pdown ADC */
435	_tda10021_writereg (state, 0x00, 0x80);  /* standby */
436
437	return 0;
438}
439
440static void tda10021_release(struct dvb_frontend* fe)
441{
442	struct tda10021_state* state = fe->demodulator_priv;
443	kfree(state);
444}
445
446static struct dvb_frontend_ops tda10021_ops;
447
448struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
449				     struct i2c_adapter* i2c,
450				     u8 pwm)
451{
452	struct tda10021_state* state = NULL;
453	u8 id;
454
455	/* allocate memory for the internal state */
456	state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
457	if (state == NULL) goto error;
458
459	/* setup the state */
460	state->config = config;
461	state->i2c = i2c;
462	state->pwm = pwm;
463	state->reg0 = tda10021_inittab[0];
464
465	/* check if the demod is there */
466	id = tda10021_readreg(state, 0x1a);
467	if ((id & 0xf0) != 0x70) goto error;
468
469	/* Don't claim TDA10023 */
470	if (id == 0x7d)
471		goto error;
472
473	printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
474	       state->config->demod_address, id);
475
476	/* create dvb_frontend */
477	memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
478	state->frontend.demodulator_priv = state;
479	return &state->frontend;
480
481error:
482	kfree(state);
483	return NULL;
484}
485
486static struct dvb_frontend_ops tda10021_ops = {
487	.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
488	.info = {
489		.name = "Philips TDA10021 DVB-C",
490		.frequency_stepsize = 62500,
491		.frequency_min = 47000000,
492		.frequency_max = 862000000,
493		.symbol_rate_min = (XIN/2)/64,     /* SACLK/64 == (XIN/2)/64 */
494		.symbol_rate_max = (XIN/2)/4,      /* SACLK/4 */
495	#if 0
496		.frequency_tolerance = ???,
497		.symbol_rate_tolerance = ???,  /* ppm */  /* == 8% (spec p. 5) */
498	#endif
499		.caps = 0x400 | //FE_CAN_QAM_4
500			FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
501			FE_CAN_QAM_128 | FE_CAN_QAM_256 |
502			FE_CAN_FEC_AUTO
503	},
504
505	.release = tda10021_release,
506
507	.init = tda10021_init,
508	.sleep = tda10021_sleep,
509	.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
510
511	.set_frontend = tda10021_set_parameters,
512	.get_frontend = tda10021_get_frontend,
513
514	.read_status = tda10021_read_status,
515	.read_ber = tda10021_read_ber,
516	.read_signal_strength = tda10021_read_signal_strength,
517	.read_snr = tda10021_read_snr,
518	.read_ucblocks = tda10021_read_ucblocks,
519};
520
521module_param(verbose, int, 0644);
522MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
523
524MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
525MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
526MODULE_LICENSE("GPL");
527
528EXPORT_SYMBOL(tda10021_attach);
529