ths7303.c revision 8524ce558a0111762efa1a6b5ba9ce5e092b4707
140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S/*
288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar * ths7303/53- THS7303/53 Video Amplifier driver
340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S *
440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar * Copyright 2013 Cisco Systems, Inc. and/or its affiliates.
688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar *
788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar * Author: Chaithrika U S <chaithrika@ti.com>
888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar *
988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar * Contributors:
1088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar *     Hans Verkuil <hans.verkuil@cisco.com>
1188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar *     Lad, Prabhakar <prabhakar.lad@ti.com>
1288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar *     Martin Bugge <marbugge@cisco.com>
1340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S *
1440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * This program is free software; you can redistribute it and/or
1540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * modify it under the terms of the GNU General Public License as
1640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * published by the Free Software Foundation version 2.
1740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S *
1840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * This program is distributed .as is. WITHOUT ANY WARRANTY of any
1940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * kind, whether express or implied; without even the implied warranty
2040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
2140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S * GNU General Public License for more details.
2240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S */
2340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
2440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S#include <linux/i2c.h>
2540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S#include <linux/module.h>
2688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#include <linux/slab.h>
2740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
2888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#include <media/ths7303.h>
2940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S#include <media/v4l2-chip-ident.h>
3088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#include <media/v4l2-device.h>
3140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
32ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli#define THS7303_CHANNEL_1	1
33ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli#define THS7303_CHANNEL_2	2
34ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli#define THS7303_CHANNEL_3	3
35ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
3688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstruct ths7303_state {
3788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct v4l2_subdev		sd;
3888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_platform_data	pdata;
3988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct v4l2_bt_timings		bt;
4088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int std_id;
4188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int stream_on;
4288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int driver_data;
4388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar};
4488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
45ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadlienum ths7303_filter_mode {
46ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	THS7303_FILTER_MODE_480I_576I,
47ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	THS7303_FILTER_MODE_480P_576P,
48ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	THS7303_FILTER_MODE_720P_1080I,
49ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	THS7303_FILTER_MODE_1080P,
50ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	THS7303_FILTER_MODE_DISABLE
51ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli};
52ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
5340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U SMODULE_DESCRIPTION("TI THS7303 video amplifier driver");
5440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U SMODULE_AUTHOR("Chaithrika U S");
5540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U SMODULE_LICENSE("GPL");
5640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
5740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic int debug;
5840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Smodule_param(debug, int, 0644);
5940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U SMODULE_PARM_DESC(debug, "Debug level 0-1");
6040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
6188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic inline struct ths7303_state *to_state(struct v4l2_subdev *sd)
6288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
6388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return container_of(sd, struct ths7303_state, sd);
6488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
6588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
6688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_read(struct v4l2_subdev *sd, u8 reg)
6788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
6888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct i2c_client *client = v4l2_get_subdevdata(sd);
6988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
7088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return i2c_smbus_read_byte_data(client, reg);
7188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
7288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
7388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val)
7488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
7588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct i2c_client *client = v4l2_get_subdevdata(sd);
7688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int ret;
7788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int i;
7888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
7988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	for (i = 0; i < 3; i++) {
8088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		ret = i2c_smbus_write_byte_data(client, reg, val);
8188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		if (ret == 0)
8288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			return 0;
8388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
8488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return ret;
8588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
8688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
8740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S/* following function is used to set ths7303 */
88ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadliint ths7303_setval(struct v4l2_subdev *sd, enum ths7303_filter_mode mode)
8940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S{
90ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	struct i2c_client *client = v4l2_get_subdevdata(sd);
9188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
9288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_platform_data *pdata = &state->pdata;
9388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	u8 val, sel = 0;
9488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int err, disable = 0;
9540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
96ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	if (!client)
97ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		return -EINVAL;
98ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
99ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	switch (mode) {
100ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	case THS7303_FILTER_MODE_1080P:
10188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		sel = 0x3;	/*1080p and SXGA/UXGA */
102ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		break;
103ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	case THS7303_FILTER_MODE_720P_1080I:
10488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		sel = 0x2;	/*720p, 1080i and SVGA/XGA */
105ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		break;
106ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	case THS7303_FILTER_MODE_480P_576P:
10788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		sel = 0x1;	/* EDTV 480p/576p and VGA */
108ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		break;
109ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	case THS7303_FILTER_MODE_480I_576I:
11088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		sel = 0x0;	/* SDTV, S-Video, 480i/576i */
111ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		break;
112ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	default:
113ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		/* disable all channels */
114ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		disable = 1;
11540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	}
11688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
11788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	val = (sel << 6) | (sel << 3);
118ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	if (!disable)
11988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		val |= (pdata->ch_1 & 0x27);
12088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	err = ths7303_write(sd, THS7303_CHANNEL_1, val);
121ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	if (err)
122ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		goto out;
12340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
12488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	val = (sel << 6) | (sel << 3);
125ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	if (!disable)
12688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		val |= (pdata->ch_2 & 0x27);
12788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	err = ths7303_write(sd, THS7303_CHANNEL_2, val);
12840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	if (err)
129ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		goto out;
13040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
13188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	val = (sel << 6) | (sel << 3);
13288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!disable)
13388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		val |= (pdata->ch_3 & 0x27);
13488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	err = ths7303_write(sd, THS7303_CHANNEL_3, val);
135ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	if (err)
136ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		goto out;
13788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
13888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return 0;
139ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadliout:
140ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	pr_info("write byte data failed\n");
14140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	return err;
14240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S}
14340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
14440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic int ths7303_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
14540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S{
14688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
14788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
14888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (norm & (V4L2_STD_ALL & ~V4L2_STD_SECAM)) {
14988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		state->std_id = 1;
15088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		state->bt.pixelclock = 0;
151ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		return ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
15288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
15388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
15488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);
155ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli}
156ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
15788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_config(struct v4l2_subdev *sd)
158ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli{
15988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
16088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	int res;
16188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
16288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!state->stream_on) {
16388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		ths7303_write(sd, THS7303_CHANNEL_1,
16488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      (ths7303_read(sd, THS7303_CHANNEL_1) & 0xf8) |
16588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      0x00);
16688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		ths7303_write(sd, THS7303_CHANNEL_2,
16788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      (ths7303_read(sd, THS7303_CHANNEL_2) & 0xf8) |
16888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      0x00);
16988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		ths7303_write(sd, THS7303_CHANNEL_3,
17088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      (ths7303_read(sd, THS7303_CHANNEL_3) & 0xf8) |
17188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      0x00);
17288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		return 0;
17388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
174ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
17588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (state->bt.pixelclock > 120000000)
176ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		res = ths7303_setval(sd, THS7303_FILTER_MODE_1080P);
17788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	else if (state->bt.pixelclock > 70000000)
178ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		res = ths7303_setval(sd, THS7303_FILTER_MODE_720P_1080I);
17988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	else if (state->bt.pixelclock > 20000000)
180ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		res = ths7303_setval(sd, THS7303_FILTER_MODE_480P_576P);
18188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	else if (state->std_id)
18288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		res = ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
183ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	else
184ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		/* disable all channels */
185ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli		res = ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);
186ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli
187ad7dcb334a0dbba9ac611d43c4e0ff7973eaa1cfManjunath Hadli	return res;
18888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
18988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
19088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
19188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_s_stream(struct v4l2_subdev *sd, int enable)
19288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
19388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
19488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
19588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	state->stream_on = enable;
19688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
19788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return ths7303_config(sd);
19888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
19988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
20088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar/* for setting filter for HD output */
20188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_s_dv_timings(struct v4l2_subdev *sd,
20288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			       struct v4l2_dv_timings *dv_timings)
20388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
20488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
20588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
20688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!dv_timings || dv_timings->type != V4L2_DV_BT_656_1120)
20788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		return -EINVAL;
20888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
20988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	state->bt = dv_timings->bt;
21088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	state->std_id = 0;
21188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
21288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return ths7303_config(sd);
21340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S}
21440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
21540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic int ths7303_g_chip_ident(struct v4l2_subdev *sd,
21640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S				struct v4l2_dbg_chip_ident *chip)
21740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S{
21840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	struct i2c_client *client = v4l2_get_subdevdata(sd);
21988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
22040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
22188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return v4l2_chip_ident_i2c_client(client, chip, state->driver_data, 0);
22240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S}
22340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
22440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic const struct v4l2_subdev_video_ops ths7303_video_ops = {
22588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	.s_stream	= ths7303_s_stream,
22640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.s_std_output	= ths7303_s_std_output,
22788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	.s_dv_timings   = ths7303_s_dv_timings,
22840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S};
22940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
23088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#ifdef CONFIG_VIDEO_ADV_DEBUG
23188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
23288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_g_register(struct v4l2_subdev *sd,
23388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      struct v4l2_dbg_register *reg)
23488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
23588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct i2c_client *client = v4l2_get_subdevdata(sd);
23688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
23788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!v4l2_chip_match_i2c_client(client, &reg->match))
23888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		return -EINVAL;
23988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
24088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	reg->size = 1;
24188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	reg->val = ths7303_read(sd, reg->reg);
24288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return 0;
24388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
24488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
24588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_s_register(struct v4l2_subdev *sd,
246977ba3b1b73f24fae2d0c8bd59d7a4696f1e0cccHans Verkuil			      const struct v4l2_dbg_register *reg)
24788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
24888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct i2c_client *client = v4l2_get_subdevdata(sd);
24988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
25088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!v4l2_chip_match_i2c_client(client, &reg->match))
25188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		return -EINVAL;
25288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
25388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	ths7303_write(sd, reg->reg, reg->val);
25488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return 0;
25588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
25688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#endif
25788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
25888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic const char * const stc_lpf_sel_txt[4] = {
25988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"500-kHz Filter",
26088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"2.5-MHz Filter",
26188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"5-MHz Filter",
26288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"5-MHz Filter",
26388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar};
26488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
26588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic const char * const in_mux_sel_txt[2] = {
26688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Input A Select",
26788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Input B Select",
26888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar};
26988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
27088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic const char * const lpf_freq_sel_txt[4] = {
27188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"9-MHz LPF",
27288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"16-MHz LPF",
27388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"35-MHz LPF",
27488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Bypass LPF",
27588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar};
27688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
27788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic const char * const in_bias_sel_dis_cont_txt[8] = {
27888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Disable Channel",
27988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Mute Function - No Output",
28088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"DC Bias Select",
28188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"DC Bias + 250 mV Offset Select",
28288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"AC Bias Select",
28388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Sync Tip Clamp with low bias",
28488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Sync Tip Clamp with mid bias",
28588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	"Sync Tip Clamp with high bias",
28688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar};
28788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
28888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic void ths7303_log_channel_status(struct v4l2_subdev *sd, u8 reg)
28988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
29088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	u8 val = ths7303_read(sd, reg);
29188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
29288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if ((val & 0x7) == 0) {
29388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		v4l2_info(sd, "Channel %d Off\n", reg);
29488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		return;
29588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
29688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
29788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "Channel %d On\n", reg);
29888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "  value 0x%x\n", val);
29988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "  %s\n", stc_lpf_sel_txt[(val >> 6) & 0x3]);
30088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "  %s\n", in_mux_sel_txt[(val >> 5) & 0x1]);
30188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "  %s\n", lpf_freq_sel_txt[(val >> 3) & 0x3]);
30288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "  %s\n", in_bias_sel_dis_cont_txt[(val >> 0) & 0x7]);
30388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
30488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
30588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakarstatic int ths7303_log_status(struct v4l2_subdev *sd)
30688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar{
30788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state = to_state(sd);
30888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
30988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	v4l2_info(sd, "stream %s\n", state->stream_on ? "On" : "Off");
31088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
31188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (state->bt.pixelclock) {
31288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		struct v4l2_bt_timings *bt = bt = &state->bt;
31388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		u32 frame_width, frame_height;
31488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
31588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		frame_width = bt->width + bt->hfrontporch +
31688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			      bt->hsync + bt->hbackporch;
31788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		frame_height = bt->height + bt->vfrontporch +
31888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			       bt->vsync + bt->vbackporch;
31988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		v4l2_info(sd,
32088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  "timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n",
32188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  bt->width, bt->height, bt->interlaced ? "i" : "p",
32288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  (frame_height * frame_width) > 0 ?
32388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  (int)bt->pixelclock /
32488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  (frame_height * frame_width) : 0,
32588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  frame_width, frame_height,
32688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			  (int)bt->pixelclock, bt->polarities);
32788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	} else {
32888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		v4l2_info(sd, "no timings set\n");
32988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
33088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
33188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	ths7303_log_channel_status(sd, THS7303_CHANNEL_1);
33288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	ths7303_log_channel_status(sd, THS7303_CHANNEL_2);
33388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	ths7303_log_channel_status(sd, THS7303_CHANNEL_3);
33488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
33588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return 0;
33688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar}
33788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
33840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic const struct v4l2_subdev_core_ops ths7303_core_ops = {
33940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.g_chip_ident = ths7303_g_chip_ident,
34088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	.log_status = ths7303_log_status,
34188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#ifdef CONFIG_VIDEO_ADV_DEBUG
34288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	.g_register = ths7303_g_register,
34388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	.s_register = ths7303_s_register,
34488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar#endif
34540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S};
34640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
34740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic const struct v4l2_subdev_ops ths7303_ops = {
34840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.core	= &ths7303_core_ops,
34940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.video 	= &ths7303_video_ops,
35040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S};
35140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
35240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic int ths7303_probe(struct i2c_client *client,
35340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S			const struct i2c_device_id *id)
35440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S{
35588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_platform_data *pdata = client->dev.platform_data;
35688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	struct ths7303_state *state;
35740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	struct v4l2_subdev *sd;
35840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
35940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
36040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S		return -ENODEV;
36140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
36240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	v4l_info(client, "chip found @ 0x%x (%s)\n",
36340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S			client->addr << 1, client->adapter->name);
36440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
36588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	state = devm_kzalloc(&client->dev, sizeof(struct ths7303_state),
36688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar			     GFP_KERNEL);
36788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!state)
36840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S		return -ENOMEM;
36940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
37088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	if (!pdata)
37188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		v4l_warn(client, "No platform data, using default data!\n");
37288da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	else
37388da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		state->pdata = *pdata;
37488da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
37588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	sd = &state->sd;
37640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	v4l2_i2c_subdev_init(sd, client, &ths7303_ops);
37740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
37888da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	/* store the driver data to differntiate the chip */
37988da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	state->driver_data = (int)id->driver_data;
38088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
3818524ce558a0111762efa1a6b5ba9ce5e092b4707Lad, Prabhakar	/* set to default 480I_576I filter mode */
3828524ce558a0111762efa1a6b5ba9ce5e092b4707Lad, Prabhakar	if (ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I) < 0) {
3838524ce558a0111762efa1a6b5ba9ce5e092b4707Lad, Prabhakar		v4l_err(client, "Setting to 480I_576I filter mode failed!\n");
3848524ce558a0111762efa1a6b5ba9ce5e092b4707Lad, Prabhakar		return -EINVAL;
38588da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	}
38688da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar
38788da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	return 0;
38840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S}
38940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
39040199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic int ths7303_remove(struct i2c_client *client)
39140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S{
39240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	struct v4l2_subdev *sd = i2c_get_clientdata(client);
39340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
39440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	v4l2_device_unregister_subdev(sd);
39540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
39640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	return 0;
39740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S}
39840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
39940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic const struct i2c_device_id ths7303_id[] = {
40088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	{"ths7303", V4L2_IDENT_THS7303},
40188da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar	{"ths7353", V4L2_IDENT_THS7353},
40240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	{},
40340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S};
40440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
40540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U SMODULE_DEVICE_TABLE(i2c, ths7303_id);
40640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
40740199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U Sstatic struct i2c_driver ths7303_driver = {
40840199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.driver = {
40940199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S		.owner	= THIS_MODULE,
41088da0183eb2b72048099b4e0ecae1705f5309c94Lad, Prabhakar		.name	= "ths73x3",
41140199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	},
41240199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.probe		= ths7303_probe,
41340199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.remove		= ths7303_remove,
41440199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S	.id_table	= ths7303_id,
41540199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S};
41640199c50b891d24d1a8f1d480f886680a3ac9b74Chaithrika U S
417c6e8d86fffd8edf1bfccbd441b1812ee919fe3d5Axel Linmodule_i2c_driver(ths7303_driver);
418