s5p_mfc_pm.c revision 2c3fb08b3f74b8792004095a1f6881a3296ff643 
1/*
2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <linux/clk.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#ifdef CONFIG_PM_RUNTIME
17#include <linux/pm_runtime.h>
18#endif
19#include "s5p_mfc_common.h"
20#include "s5p_mfc_debug.h"
21#include "s5p_mfc_pm.h"
22
23#define MFC_CLKNAME		"sclk_mfc"
24#define MFC_GATE_CLK_NAME	"mfc"
25
26#define CLK_DEBUG
27
28static struct s5p_mfc_pm *pm;
29static struct s5p_mfc_dev *p_dev;
30
31#ifdef CLK_DEBUG
32atomic_t clk_ref;
33#endif
34
35int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
36{
37	int ret = 0;
38
39	pm = &dev->pm;
40	p_dev = dev;
41	pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME);
42	if (IS_ERR(pm->clock_gate)) {
43		mfc_err("Failed to get clock-gating control\n");
44		ret = PTR_ERR(pm->clock_gate);
45		goto err_g_ip_clk;
46	}
47
48	ret = clk_prepare(pm->clock_gate);
49	if (ret) {
50		mfc_err("Failed to preapre clock-gating control\n");
51		goto err_p_ip_clk;
52	}
53
54	pm->clock = clk_get(&dev->plat_dev->dev, MFC_CLKNAME);
55	if (IS_ERR(pm->clock)) {
56		mfc_err("Failed to get MFC clock\n");
57		ret = PTR_ERR(pm->clock);
58		goto err_g_ip_clk_2;
59	}
60
61	ret = clk_prepare(pm->clock);
62	if (ret) {
63		mfc_err("Failed to prepare MFC clock\n");
64		goto err_p_ip_clk_2;
65	}
66
67	atomic_set(&pm->power, 0);
68#ifdef CONFIG_PM_RUNTIME
69	pm->device = &dev->plat_dev->dev;
70	pm_runtime_enable(pm->device);
71#endif
72#ifdef CLK_DEBUG
73	atomic_set(&clk_ref, 0);
74#endif
75	return 0;
76err_p_ip_clk_2:
77	clk_put(pm->clock);
78err_g_ip_clk_2:
79	clk_unprepare(pm->clock_gate);
80err_p_ip_clk:
81	clk_put(pm->clock_gate);
82err_g_ip_clk:
83	return ret;
84}
85
86void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
87{
88	clk_unprepare(pm->clock_gate);
89	clk_put(pm->clock_gate);
90	clk_unprepare(pm->clock);
91	clk_put(pm->clock);
92#ifdef CONFIG_PM_RUNTIME
93	pm_runtime_disable(pm->device);
94#endif
95}
96
97int s5p_mfc_clock_on(void)
98{
99	int ret;
100#ifdef CLK_DEBUG
101	atomic_inc(&clk_ref);
102	mfc_debug(3, "+ %d", atomic_read(&clk_ref));
103#endif
104	ret = clk_enable(pm->clock_gate);
105	return ret;
106}
107
108void s5p_mfc_clock_off(void)
109{
110#ifdef CLK_DEBUG
111	atomic_dec(&clk_ref);
112	mfc_debug(3, "- %d", atomic_read(&clk_ref));
113#endif
114	clk_disable(pm->clock_gate);
115}
116
117int s5p_mfc_power_on(void)
118{
119#ifdef CONFIG_PM_RUNTIME
120	return pm_runtime_get_sync(pm->device);
121#else
122	atomic_set(&pm->power, 1);
123	return 0;
124#endif
125}
126
127int s5p_mfc_power_off(void)
128{
129#ifdef CONFIG_PM_RUNTIME
130	return pm_runtime_put_sync(pm->device);
131#else
132	atomic_set(&pm->power, 0);
133	return 0;
134#endif
135}
136
137
138