s5p_mfc_pm.c revision f96f3cfa0bb8f777fe877d7f881bf7ee58bd162a 
1/*
2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <linux/clk.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#ifdef CONFIG_PM_RUNTIME
17#include <linux/pm_runtime.h>
18#endif
19#include "s5p_mfc_common.h"
20#include "s5p_mfc_debug.h"
21#include "s5p_mfc_pm.h"
22
23#define MFC_GATE_CLK_NAME	"mfc"
24
25#define CLK_DEBUG
26
27static struct s5p_mfc_pm *pm;
28static struct s5p_mfc_dev *p_dev;
29
30#ifdef CLK_DEBUG
31atomic_t clk_ref;
32#endif
33
34int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
35{
36	int ret = 0;
37
38	pm = &dev->pm;
39	p_dev = dev;
40	pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME);
41	if (IS_ERR(pm->clock_gate)) {
42		mfc_err("Failed to get clock-gating control\n");
43		ret = PTR_ERR(pm->clock_gate);
44		goto err_g_ip_clk;
45	}
46
47	ret = clk_prepare(pm->clock_gate);
48	if (ret) {
49		mfc_err("Failed to preapre clock-gating control\n");
50		goto err_p_ip_clk;
51	}
52
53	pm->clock = clk_get(&dev->plat_dev->dev, dev->variant->mclk_name);
54	if (IS_ERR(pm->clock)) {
55		mfc_err("Failed to get MFC clock\n");
56		ret = PTR_ERR(pm->clock);
57		goto err_g_ip_clk_2;
58	}
59
60	ret = clk_prepare(pm->clock);
61	if (ret) {
62		mfc_err("Failed to prepare MFC clock\n");
63		goto err_p_ip_clk_2;
64	}
65
66	atomic_set(&pm->power, 0);
67#ifdef CONFIG_PM_RUNTIME
68	pm->device = &dev->plat_dev->dev;
69	pm_runtime_enable(pm->device);
70#endif
71#ifdef CLK_DEBUG
72	atomic_set(&clk_ref, 0);
73#endif
74	return 0;
75err_p_ip_clk_2:
76	clk_put(pm->clock);
77err_g_ip_clk_2:
78	clk_unprepare(pm->clock_gate);
79err_p_ip_clk:
80	clk_put(pm->clock_gate);
81err_g_ip_clk:
82	return ret;
83}
84
85void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
86{
87	clk_unprepare(pm->clock_gate);
88	clk_put(pm->clock_gate);
89	clk_unprepare(pm->clock);
90	clk_put(pm->clock);
91#ifdef CONFIG_PM_RUNTIME
92	pm_runtime_disable(pm->device);
93#endif
94}
95
96int s5p_mfc_clock_on(void)
97{
98	int ret;
99#ifdef CLK_DEBUG
100	atomic_inc(&clk_ref);
101	mfc_debug(3, "+ %d", atomic_read(&clk_ref));
102#endif
103	ret = clk_enable(pm->clock_gate);
104	return ret;
105}
106
107void s5p_mfc_clock_off(void)
108{
109#ifdef CLK_DEBUG
110	atomic_dec(&clk_ref);
111	mfc_debug(3, "- %d", atomic_read(&clk_ref));
112#endif
113	clk_disable(pm->clock_gate);
114}
115
116int s5p_mfc_power_on(void)
117{
118#ifdef CONFIG_PM_RUNTIME
119	return pm_runtime_get_sync(pm->device);
120#else
121	atomic_set(&pm->power, 1);
122	return 0;
123#endif
124}
125
126int s5p_mfc_power_off(void)
127{
128#ifdef CONFIG_PM_RUNTIME
129	return pm_runtime_put_sync(pm->device);
130#else
131	atomic_set(&pm->power, 0);
132	return 0;
133#endif
134}
135
136
137