19262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* 29262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * Copyright (c) 2013 Texas Instruments Inc. 39262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * 49262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * David Griego, <dagriego@biglakesoftware.com> 59262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * Dale Farnsworth, <dale@farnsworth.org> 69262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * Archit Taneja, <archit@ti.com> 79262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * 89262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * This program is free software; you can redistribute it and/or modify it 99262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * under the terms of the GNU General Public License version 2 as published by 109262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * the Free Software Foundation. 119262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja */ 129262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 139262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#ifndef __TI_VPDMA_H_ 149262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define __TI_VPDMA_H_ 159262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 169262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* 179262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * A vpdma_buf tracks the size, DMA address and mapping status of each 189262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * driver DMA area. 199262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja */ 209262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejastruct vpdma_buf { 219262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja void *addr; 229262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja dma_addr_t dma_addr; 239262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja size_t size; 249262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja bool mapped; 259262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 269262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 279262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejastruct vpdma_desc_list { 289262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja struct vpdma_buf buf; 299262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja void *next; 309262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja int type; 319262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 329262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 339262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejastruct vpdma_data { 349262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja void __iomem *base; 359262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 369262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja struct platform_device *pdev; 379262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 38b2c9472f0559ba23fa0c2cf565577d1cd9421e50Archit Taneja /* callback to VPE driver when the firmware is loaded */ 39b2c9472f0559ba23fa0c2cf565577d1cd9421e50Archit Taneja void (*cb)(struct platform_device *pdev); 409262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 419262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 42b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Tanejaenum vpdma_data_format_type { 43b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja VPDMA_DATA_FMT_TYPE_YUV, 44b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja VPDMA_DATA_FMT_TYPE_RGB, 45b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja VPDMA_DATA_FMT_TYPE_MISC, 46b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja}; 47b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja 489262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejastruct vpdma_data_format { 49b4fcdaf7654f9506f80d4e3f2b045a78333d62dcArchit Taneja enum vpdma_data_format_type type; 509262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja int data_type; 519262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja u8 depth; 529262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 539262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 549262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_DESC_ALIGN 16 /* 16-byte descriptor alignment */ 55a51cd8f5d0a21ccc8d313a9992293ab2541b40a8Archit Taneja#define VPDMA_STRIDE_ALIGN 16 /* 56a51cd8f5d0a21ccc8d313a9992293ab2541b40a8Archit Taneja * line stride of source and dest 57a51cd8f5d0a21ccc8d313a9992293ab2541b40a8Archit Taneja * buffers should be 16 byte aligned 58a51cd8f5d0a21ccc8d313a9992293ab2541b40a8Archit Taneja */ 599262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_DTD_DESC_SIZE 32 /* 8 words */ 609262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_CFD_CTD_DESC_SIZE 16 /* 4 words */ 619262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 629262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_LIST_TYPE_NORMAL 0 639262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_LIST_TYPE_SELF_MODIFYING 1 649262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#define VPDMA_LIST_TYPE_DOORBELL 2 659262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 669262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaenum vpdma_yuv_formats { 679262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_Y444 = 0, 689262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_Y422, 699262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_Y420, 709262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_C444, 719262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_C422, 729262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_C420, 739262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_YC422, 749262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_YC444, 759262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_CY422, 769262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 779262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 789262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaenum vpdma_rgb_formats { 799262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGB565 = 0, 809262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ARGB16_1555, 819262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ARGB16, 829262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGBA16_5551, 839262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGBA16, 849262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ARGB24, 859262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGB24, 869262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ARGB32, 879262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGBA24, 889262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_RGBA32, 899262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGR565, 909262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ABGR16_1555, 919262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ABGR16, 929262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGRA16_5551, 939262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGRA16, 949262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ABGR24, 959262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGR24, 969262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_ABGR32, 979262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGRA24, 989262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_BGRA32, 999262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 1009262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 1019262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaenum vpdma_misc_formats { 1029262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_DATA_FMT_MV = 0, 1039262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 1049262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 1059262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaextern const struct vpdma_data_format vpdma_yuv_fmts[]; 1069262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaextern const struct vpdma_data_format vpdma_rgb_fmts[]; 1079262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaextern const struct vpdma_data_format vpdma_misc_fmts[]; 1089262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 1099262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaenum vpdma_frame_start_event { 1109262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_HDMI_FID = 0, 1119262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_DVO2_FID, 1129262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_HDCOMP_FID, 1139262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_SD_FID, 1149262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_LM_FID0, 1159262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_LM_FID1, 1169262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_LM_FID2, 1179262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPDMA_FSEVENT_CHANNEL_ACTIVE, 1189262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 1199262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 1209262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* 1219262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja * VPDMA channel numbers 1229262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja */ 1239262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaenum vpdma_channel { 1249262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_LUMA1_IN, 1259262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_CHROMA1_IN, 1269262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_LUMA2_IN, 1279262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_CHROMA2_IN, 1289262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_LUMA3_IN, 1299262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_CHROMA3_IN, 1309262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_MV_IN, 1319262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_MV_OUT, 1329262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_LUMA_OUT, 1339262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_CHROMA_OUT, 1349262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja VPE_CHAN_RGB_OUT, 1359262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja}; 1369262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 137213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja/* flags for VPDMA data descriptors */ 138213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define VPDMA_DATA_ODD_LINE_SKIP (1 << 0) 139213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define VPDMA_DATA_EVEN_LINE_SKIP (1 << 1) 140213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define VPDMA_DATA_FRAME_1D (1 << 2) 141213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define VPDMA_DATA_MODE_TILED (1 << 3) 142213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 143213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja/* 144213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja * client identifiers used for configuration descriptors 145213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja */ 146213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define CFD_MMR_CLIENT 0 147213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define CFD_SC_CLIENT 4 148213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 149213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja/* Address data block header format */ 150213b8ee4001895dd60910c440f76682fb881b5ccArchit Tanejastruct vpdma_adb_hdr { 151213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja u32 offset; 152213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja u32 nwords; 153213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja u32 reserved0; 154213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja u32 reserved1; 155213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja}; 156213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 157213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja/* helpers for creating ADB headers for config descriptors MMRs as client */ 158213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) 159213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) 160213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 161213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja#define VPDMA_SET_MMR_ADB_HDR(buf, str, hdr, regs, offset_a) \ 162213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja do { \ 163213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja struct vpdma_adb_hdr *h; \ 164213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja struct str *adb = NULL; \ 165213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja h = MMR_ADB_ADDR(buf, str, hdr); \ 166213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja h->offset = (offset_a); \ 167213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja h->nwords = sizeof(adb->regs) >> 2; \ 168213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja } while (0) 169213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 1709262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* vpdma descriptor buffer allocation and management */ 1719262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaint vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size); 1729262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_free_desc_buf(struct vpdma_buf *buf); 1739262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaint vpdma_map_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 1749262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 1759262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 1769262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* vpdma descriptor list funcs */ 1779262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaint vpdma_create_desc_list(struct vpdma_desc_list *list, size_t size, int type); 1789262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_reset_desc_list(struct vpdma_desc_list *list); 1799262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_free_desc_list(struct vpdma_desc_list *list); 1809262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejaint vpdma_submit_descs(struct vpdma_data *vpdma, struct vpdma_desc_list *list); 1819262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 182213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja/* helpers for creating vpdma descriptors */ 183213b8ee4001895dd60910c440f76682fb881b5ccArchit Tanejavoid vpdma_add_cfd_block(struct vpdma_desc_list *list, int client, 184213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja struct vpdma_buf *blk, u32 dest_offset); 185213b8ee4001895dd60910c440f76682fb881b5ccArchit Tanejavoid vpdma_add_cfd_adb(struct vpdma_desc_list *list, int client, 186213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja struct vpdma_buf *adb); 187213b8ee4001895dd60910c440f76682fb881b5ccArchit Tanejavoid vpdma_add_sync_on_channel_ctd(struct vpdma_desc_list *list, 188213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja enum vpdma_channel chan); 189928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Tanejavoid vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, 190928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Taneja const struct v4l2_rect *c_rect, 191213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 192213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja enum vpdma_channel chan, u32 flags); 193928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Tanejavoid vpdma_add_in_dtd(struct vpdma_desc_list *list, int width, 194928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Taneja const struct v4l2_rect *c_rect, 195213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 196928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Taneja enum vpdma_channel chan, int field, u32 flags, int frame_width, 197928bf2ba2f0e65a971a60e940c69af0b02ae4a57Archit Taneja int frame_height, int start_h, int start_v); 198213b8ee4001895dd60910c440f76682fb881b5ccArchit Taneja 1999262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* vpdma list interrupt management */ 2009262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_enable_list_complete_irq(struct vpdma_data *vpdma, int list_num, 2019262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja bool enable); 2029262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_clear_list_stat(struct vpdma_data *vpdma); 2039262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 2049262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* vpdma client configuration */ 2059262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_set_line_mode(struct vpdma_data *vpdma, int line_mode, 2069262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja enum vpdma_channel chan); 2079262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_set_frame_start_event(struct vpdma_data *vpdma, 2089262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja enum vpdma_frame_start_event fs_event, enum vpdma_channel chan); 2099262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 2109262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Tanejavoid vpdma_dump_regs(struct vpdma_data *vpdma); 2119262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 2129262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja/* initialize vpdma, passed with VPE's platform device pointer */ 213b2c9472f0559ba23fa0c2cf565577d1cd9421e50Archit Tanejastruct vpdma_data *vpdma_create(struct platform_device *pdev, 214b2c9472f0559ba23fa0c2cf565577d1cd9421e50Archit Taneja void (*cb)(struct platform_device *pdev)); 2159262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja 2169262e5a2253ad055d465fcf0905a5b5f160ce6f8Archit Taneja#endif 217