pci-me.c revision 30e53bb8ffb1f3270ad89196d9799057008d9537
1/* 2 * 3 * Intel Management Engine Interface (Intel MEI) Linux driver 4 * Copyright (c) 2003-2012, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 */ 16 17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19#include <linux/module.h> 20#include <linux/moduleparam.h> 21#include <linux/kernel.h> 22#include <linux/device.h> 23#include <linux/fs.h> 24#include <linux/errno.h> 25#include <linux/types.h> 26#include <linux/fcntl.h> 27#include <linux/aio.h> 28#include <linux/pci.h> 29#include <linux/poll.h> 30#include <linux/init.h> 31#include <linux/ioctl.h> 32#include <linux/cdev.h> 33#include <linux/sched.h> 34#include <linux/uuid.h> 35#include <linux/compat.h> 36#include <linux/jiffies.h> 37#include <linux/interrupt.h> 38#include <linux/miscdevice.h> 39 40#include <linux/mei.h> 41 42#include "mei_dev.h" 43#include "hw-me.h" 44#include "client.h" 45 46/* AMT device is a singleton on the platform */ 47static struct pci_dev *mei_pdev; 48 49/* mei_pci_tbl - PCI Device ID Table */ 50static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = { 51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)}, 52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)}, 53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)}, 54 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)}, 55 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)}, 56 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)}, 57 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)}, 58 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)}, 59 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)}, 60 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)}, 61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)}, 62 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)}, 63 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)}, 64 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)}, 65 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)}, 66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)}, 67 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)}, 68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)}, 69 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)}, 70 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)}, 71 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)}, 72 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)}, 73 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)}, 74 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)}, 75 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)}, 76 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)}, 77 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)}, 78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)}, 79 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)}, 80 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)}, 81 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)}, 82 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT)}, 83 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)}, 84 85 /* required last entry */ 86 {0, } 87}; 88 89MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 90 91static DEFINE_MUTEX(mei_mutex); 92 93/** 94 * mei_quirk_probe - probe for devices that doesn't valid ME interface 95 * @pdev: PCI device structure 96 * @ent: entry into pci_device_table 97 * 98 * returns true if ME Interface is valid, false otherwise 99 */ 100static bool mei_me_quirk_probe(struct pci_dev *pdev, 101 const struct pci_device_id *ent) 102{ 103 u32 reg; 104 if (ent->device == MEI_DEV_ID_PBG_1) { 105 pci_read_config_dword(pdev, 0x48, ®); 106 /* make sure that bit 9 is up and bit 10 is down */ 107 if ((reg & 0x600) == 0x200) { 108 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 109 return false; 110 } 111 } 112 return true; 113} 114/** 115 * mei_probe - Device Initialization Routine 116 * 117 * @pdev: PCI device structure 118 * @ent: entry in kcs_pci_tbl 119 * 120 * returns 0 on success, <0 on failure. 121 */ 122static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 123{ 124 struct mei_device *dev; 125 struct mei_me_hw *hw; 126 int err; 127 128 mutex_lock(&mei_mutex); 129 130 if (!mei_me_quirk_probe(pdev, ent)) { 131 err = -ENODEV; 132 goto end; 133 } 134 135 if (mei_pdev) { 136 err = -EEXIST; 137 goto end; 138 } 139 /* enable pci dev */ 140 err = pci_enable_device(pdev); 141 if (err) { 142 dev_err(&pdev->dev, "failed to enable pci device.\n"); 143 goto end; 144 } 145 /* set PCI host mastering */ 146 pci_set_master(pdev); 147 /* pci request regions for mei driver */ 148 err = pci_request_regions(pdev, KBUILD_MODNAME); 149 if (err) { 150 dev_err(&pdev->dev, "failed to get pci regions.\n"); 151 goto disable_device; 152 } 153 /* allocates and initializes the mei dev structure */ 154 dev = mei_me_dev_init(pdev); 155 if (!dev) { 156 err = -ENOMEM; 157 goto release_regions; 158 } 159 hw = to_me_hw(dev); 160 /* mapping IO device memory */ 161 hw->mem_addr = pci_iomap(pdev, 0, 0); 162 if (!hw->mem_addr) { 163 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); 164 err = -ENOMEM; 165 goto free_device; 166 } 167 pci_enable_msi(pdev); 168 169 /* request and enable interrupt */ 170 if (pci_dev_msi_enabled(pdev)) 171 err = request_threaded_irq(pdev->irq, 172 NULL, 173 mei_me_irq_thread_handler, 174 IRQF_ONESHOT, KBUILD_MODNAME, dev); 175 else 176 err = request_threaded_irq(pdev->irq, 177 mei_me_irq_quick_handler, 178 mei_me_irq_thread_handler, 179 IRQF_SHARED, KBUILD_MODNAME, dev); 180 181 if (err) { 182 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 183 pdev->irq); 184 goto disable_msi; 185 } 186 187 if (mei_start(dev)) { 188 dev_err(&pdev->dev, "init hw failure.\n"); 189 err = -ENODEV; 190 goto release_irq; 191 } 192 193 err = mei_register(dev); 194 if (err) 195 goto release_irq; 196 197 mei_pdev = pdev; 198 pci_set_drvdata(pdev, dev); 199 200 schedule_delayed_work(&dev->timer_work, HZ); 201 202 mutex_unlock(&mei_mutex); 203 204 pr_debug("initialization successful.\n"); 205 206 return 0; 207 208release_irq: 209 mei_disable_interrupts(dev); 210 flush_scheduled_work(); 211 free_irq(pdev->irq, dev); 212disable_msi: 213 pci_disable_msi(pdev); 214 pci_iounmap(pdev, hw->mem_addr); 215free_device: 216 kfree(dev); 217release_regions: 218 pci_release_regions(pdev); 219disable_device: 220 pci_disable_device(pdev); 221end: 222 mutex_unlock(&mei_mutex); 223 dev_err(&pdev->dev, "initialization failed.\n"); 224 return err; 225} 226 227/** 228 * mei_remove - Device Removal Routine 229 * 230 * @pdev: PCI device structure 231 * 232 * mei_remove is called by the PCI subsystem to alert the driver 233 * that it should release a PCI device. 234 */ 235static void mei_me_remove(struct pci_dev *pdev) 236{ 237 struct mei_device *dev; 238 struct mei_me_hw *hw; 239 240 if (mei_pdev != pdev) 241 return; 242 243 dev = pci_get_drvdata(pdev); 244 if (!dev) 245 return; 246 247 hw = to_me_hw(dev); 248 249 250 dev_err(&pdev->dev, "stop\n"); 251 mei_stop(dev); 252 253 mei_pdev = NULL; 254 255 /* disable interrupts */ 256 mei_disable_interrupts(dev); 257 258 free_irq(pdev->irq, dev); 259 pci_disable_msi(pdev); 260 pci_set_drvdata(pdev, NULL); 261 262 if (hw->mem_addr) 263 pci_iounmap(pdev, hw->mem_addr); 264 265 mei_deregister(dev); 266 267 kfree(dev); 268 269 pci_release_regions(pdev); 270 pci_disable_device(pdev); 271 272 273} 274#ifdef CONFIG_PM 275static int mei_me_pci_suspend(struct device *device) 276{ 277 struct pci_dev *pdev = to_pci_dev(device); 278 struct mei_device *dev = pci_get_drvdata(pdev); 279 280 if (!dev) 281 return -ENODEV; 282 283 dev_err(&pdev->dev, "suspend\n"); 284 285 mei_stop(dev); 286 287 mei_disable_interrupts(dev); 288 289 free_irq(pdev->irq, dev); 290 pci_disable_msi(pdev); 291 292 return 0; 293} 294 295static int mei_me_pci_resume(struct device *device) 296{ 297 struct pci_dev *pdev = to_pci_dev(device); 298 struct mei_device *dev; 299 int err; 300 301 dev = pci_get_drvdata(pdev); 302 if (!dev) 303 return -ENODEV; 304 305 pci_enable_msi(pdev); 306 307 /* request and enable interrupt */ 308 if (pci_dev_msi_enabled(pdev)) 309 err = request_threaded_irq(pdev->irq, 310 NULL, 311 mei_me_irq_thread_handler, 312 IRQF_ONESHOT, KBUILD_MODNAME, dev); 313 else 314 err = request_threaded_irq(pdev->irq, 315 mei_me_irq_quick_handler, 316 mei_me_irq_thread_handler, 317 IRQF_SHARED, KBUILD_MODNAME, dev); 318 319 if (err) { 320 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 321 pdev->irq); 322 return err; 323 } 324 325 mutex_lock(&dev->device_lock); 326 dev->dev_state = MEI_DEV_POWER_UP; 327 mei_reset(dev, 1); 328 mutex_unlock(&dev->device_lock); 329 330 /* Start timer if stopped in suspend */ 331 schedule_delayed_work(&dev->timer_work, HZ); 332 333 return err; 334} 335static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume); 336#define MEI_ME_PM_OPS (&mei_me_pm_ops) 337#else 338#define MEI_ME_PM_OPS NULL 339#endif /* CONFIG_PM */ 340/* 341 * PCI driver structure 342 */ 343static struct pci_driver mei_me_driver = { 344 .name = KBUILD_MODNAME, 345 .id_table = mei_me_pci_tbl, 346 .probe = mei_me_probe, 347 .remove = mei_me_remove, 348 .shutdown = mei_me_remove, 349 .driver.pm = MEI_ME_PM_OPS, 350}; 351 352module_pci_driver(mei_me_driver); 353 354MODULE_AUTHOR("Intel Corporation"); 355MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 356MODULE_LICENSE("GPL v2"); 357