pci-me.c revision 52c34561415b420301f1580413a9d1891d079494 
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/kernel.h>
22#include <linux/device.h>
23#include <linux/fs.h>
24#include <linux/errno.h>
25#include <linux/types.h>
26#include <linux/fcntl.h>
27#include <linux/aio.h>
28#include <linux/pci.h>
29#include <linux/poll.h>
30#include <linux/init.h>
31#include <linux/ioctl.h>
32#include <linux/cdev.h>
33#include <linux/sched.h>
34#include <linux/uuid.h>
35#include <linux/compat.h>
36#include <linux/jiffies.h>
37#include <linux/interrupt.h>
38#include <linux/miscdevice.h>
39
40#include <linux/mei.h>
41
42#include "mei_dev.h"
43#include "hw-me.h"
44#include "client.h"
45
46/* AMT device is a singleton on the platform */
47static struct pci_dev *mei_pdev;
48
49/* mei_pci_tbl - PCI Device ID Table */
50static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = {
51	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
52	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
53	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
54	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
55	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
56	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
57	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
58	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
59	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
60	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
61	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
62	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
63	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
64	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
65	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
66	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
67	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
68	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
69	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
70	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
71	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
72	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
73	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
74	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
75	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
76	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
77	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
78	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
79	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
80	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
81	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
82	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT)},
83	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
84
85	/* required last entry */
86	{0, }
87};
88
89MODULE_DEVICE_TABLE(pci, mei_pci_tbl);
90
91static DEFINE_MUTEX(mei_mutex);
92
93/**
94 * mei_quirk_probe - probe for devices that doesn't valid ME interface
95 * @pdev: PCI device structure
96 * @ent: entry into pci_device_table
97 *
98 * returns true if ME Interface is valid, false otherwise
99 */
100static bool mei_quirk_probe(struct pci_dev *pdev,
101				const struct pci_device_id *ent)
102{
103	u32 reg;
104	if (ent->device == MEI_DEV_ID_PBG_1) {
105		pci_read_config_dword(pdev, 0x48, &reg);
106		/* make sure that bit 9 is up and bit 10 is down */
107		if ((reg & 0x600) == 0x200) {
108			dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
109			return false;
110		}
111	}
112	return true;
113}
114/**
115 * mei_probe - Device Initialization Routine
116 *
117 * @pdev: PCI device structure
118 * @ent: entry in kcs_pci_tbl
119 *
120 * returns 0 on success, <0 on failure.
121 */
122static int mei_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
123{
124	struct mei_device *dev;
125	struct mei_me_hw *hw;
126	int err;
127
128	mutex_lock(&mei_mutex);
129
130	if (!mei_quirk_probe(pdev, ent)) {
131		err = -ENODEV;
132		goto end;
133	}
134
135	if (mei_pdev) {
136		err = -EEXIST;
137		goto end;
138	}
139	/* enable pci dev */
140	err = pci_enable_device(pdev);
141	if (err) {
142		dev_err(&pdev->dev, "failed to enable pci device.\n");
143		goto end;
144	}
145	/* set PCI host mastering  */
146	pci_set_master(pdev);
147	/* pci request regions for mei driver */
148	err = pci_request_regions(pdev, KBUILD_MODNAME);
149	if (err) {
150		dev_err(&pdev->dev, "failed to get pci regions.\n");
151		goto disable_device;
152	}
153	/* allocates and initializes the mei dev structure */
154	dev = mei_me_dev_init(pdev);
155	if (!dev) {
156		err = -ENOMEM;
157		goto release_regions;
158	}
159	hw = to_me_hw(dev);
160	/* mapping  IO device memory */
161	hw->mem_addr = pci_iomap(pdev, 0, 0);
162	if (!hw->mem_addr) {
163		dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
164		err = -ENOMEM;
165		goto free_device;
166	}
167	pci_enable_msi(pdev);
168
169	 /* request and enable interrupt */
170	if (pci_dev_msi_enabled(pdev))
171		err = request_threaded_irq(pdev->irq,
172			NULL,
173			mei_interrupt_thread_handler,
174			IRQF_ONESHOT, KBUILD_MODNAME, dev);
175	else
176		err = request_threaded_irq(pdev->irq,
177			mei_interrupt_quick_handler,
178			mei_interrupt_thread_handler,
179			IRQF_SHARED, KBUILD_MODNAME, dev);
180
181	if (err) {
182		dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
183		       pdev->irq);
184		goto disable_msi;
185	}
186
187	if (mei_hw_init(dev)) {
188		dev_err(&pdev->dev, "init hw failure.\n");
189		err = -ENODEV;
190		goto release_irq;
191	}
192
193	err = mei_register(&pdev->dev);
194	if (err)
195		goto release_irq;
196
197	mei_pdev = pdev;
198	pci_set_drvdata(pdev, dev);
199
200
201	schedule_delayed_work(&dev->timer_work, HZ);
202
203	mutex_unlock(&mei_mutex);
204
205	pr_debug("initialization successful.\n");
206
207	return 0;
208
209release_irq:
210	mei_disable_interrupts(dev);
211	flush_scheduled_work();
212	free_irq(pdev->irq, dev);
213disable_msi:
214	pci_disable_msi(pdev);
215	pci_iounmap(pdev, hw->mem_addr);
216free_device:
217	kfree(dev);
218release_regions:
219	pci_release_regions(pdev);
220disable_device:
221	pci_disable_device(pdev);
222end:
223	mutex_unlock(&mei_mutex);
224	dev_err(&pdev->dev, "initialization failed.\n");
225	return err;
226}
227
228/**
229 * mei_remove - Device Removal Routine
230 *
231 * @pdev: PCI device structure
232 *
233 * mei_remove is called by the PCI subsystem to alert the driver
234 * that it should release a PCI device.
235 */
236static void mei_remove(struct pci_dev *pdev)
237{
238	struct mei_device *dev;
239	struct mei_me_hw *hw;
240
241	if (mei_pdev != pdev)
242		return;
243
244	dev = pci_get_drvdata(pdev);
245	if (!dev)
246		return;
247
248	hw = to_me_hw(dev);
249
250	mutex_lock(&dev->device_lock);
251
252	cancel_delayed_work(&dev->timer_work);
253
254	mei_wd_stop(dev);
255
256	mei_pdev = NULL;
257
258	if (dev->iamthif_cl.state == MEI_FILE_CONNECTED) {
259		dev->iamthif_cl.state = MEI_FILE_DISCONNECTING;
260		mei_cl_disconnect(&dev->iamthif_cl);
261	}
262	if (dev->wd_cl.state == MEI_FILE_CONNECTED) {
263		dev->wd_cl.state = MEI_FILE_DISCONNECTING;
264		mei_cl_disconnect(&dev->wd_cl);
265	}
266
267	/* Unregistering watchdog device */
268	mei_watchdog_unregister(dev);
269
270	/* remove entry if already in list */
271	dev_dbg(&pdev->dev, "list del iamthif and wd file list.\n");
272
273	if (dev->open_handle_count > 0)
274		dev->open_handle_count--;
275	mei_cl_unlink(&dev->wd_cl);
276
277	if (dev->open_handle_count > 0)
278		dev->open_handle_count--;
279	mei_cl_unlink(&dev->iamthif_cl);
280
281	dev->iamthif_current_cb = NULL;
282	dev->me_clients_num = 0;
283
284	mutex_unlock(&dev->device_lock);
285
286	flush_scheduled_work();
287
288	/* disable interrupts */
289	mei_disable_interrupts(dev);
290
291	free_irq(pdev->irq, dev);
292	pci_disable_msi(pdev);
293	pci_set_drvdata(pdev, NULL);
294
295	if (hw->mem_addr)
296		pci_iounmap(pdev, hw->mem_addr);
297
298	kfree(dev);
299
300	pci_release_regions(pdev);
301	pci_disable_device(pdev);
302
303	mei_deregister();
304
305}
306#ifdef CONFIG_PM
307static int mei_pci_suspend(struct device *device)
308{
309	struct pci_dev *pdev = to_pci_dev(device);
310	struct mei_device *dev = pci_get_drvdata(pdev);
311	int err;
312
313	if (!dev)
314		return -ENODEV;
315	mutex_lock(&dev->device_lock);
316
317	cancel_delayed_work(&dev->timer_work);
318
319	/* Stop watchdog if exists */
320	err = mei_wd_stop(dev);
321	/* Set new mei state */
322	if (dev->dev_state == MEI_DEV_ENABLED ||
323	    dev->dev_state == MEI_DEV_RECOVERING_FROM_RESET) {
324		dev->dev_state = MEI_DEV_POWER_DOWN;
325		mei_reset(dev, 0);
326	}
327	mutex_unlock(&dev->device_lock);
328
329	free_irq(pdev->irq, dev);
330	pci_disable_msi(pdev);
331
332	return err;
333}
334
335static int mei_pci_resume(struct device *device)
336{
337	struct pci_dev *pdev = to_pci_dev(device);
338	struct mei_device *dev;
339	int err;
340
341	dev = pci_get_drvdata(pdev);
342	if (!dev)
343		return -ENODEV;
344
345	pci_enable_msi(pdev);
346
347	/* request and enable interrupt */
348	if (pci_dev_msi_enabled(pdev))
349		err = request_threaded_irq(pdev->irq,
350			NULL,
351			mei_interrupt_thread_handler,
352			IRQF_ONESHOT, KBUILD_MODNAME, dev);
353	else
354		err = request_threaded_irq(pdev->irq,
355			mei_interrupt_quick_handler,
356			mei_interrupt_thread_handler,
357			IRQF_SHARED, KBUILD_MODNAME, dev);
358
359	if (err) {
360		dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
361				pdev->irq);
362		return err;
363	}
364
365	mutex_lock(&dev->device_lock);
366	dev->dev_state = MEI_DEV_POWER_UP;
367	mei_reset(dev, 1);
368	mutex_unlock(&dev->device_lock);
369
370	/* Start timer if stopped in suspend */
371	schedule_delayed_work(&dev->timer_work, HZ);
372
373	return err;
374}
375static SIMPLE_DEV_PM_OPS(mei_pm_ops, mei_pci_suspend, mei_pci_resume);
376#define MEI_PM_OPS	(&mei_pm_ops)
377#else
378#define MEI_PM_OPS	NULL
379#endif /* CONFIG_PM */
380/*
381 *  PCI driver structure
382 */
383static struct pci_driver mei_driver = {
384	.name = KBUILD_MODNAME,
385	.id_table = mei_pci_tbl,
386	.probe = mei_probe,
387	.remove = mei_remove,
388	.shutdown = mei_remove,
389	.driver.pm = MEI_PM_OPS,
390};
391
392module_pci_driver(mei_driver);
393
394MODULE_AUTHOR("Intel Corporation");
395MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
396MODULE_LICENSE("GPL v2");
397