pci-me.c revision 76a9635979e543f04a5885198e68ff28e3311b67 
1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/kernel.h>
22#include <linux/device.h>
23#include <linux/fs.h>
24#include <linux/errno.h>
25#include <linux/types.h>
26#include <linux/fcntl.h>
27#include <linux/aio.h>
28#include <linux/pci.h>
29#include <linux/poll.h>
30#include <linux/init.h>
31#include <linux/ioctl.h>
32#include <linux/cdev.h>
33#include <linux/sched.h>
34#include <linux/uuid.h>
35#include <linux/compat.h>
36#include <linux/jiffies.h>
37#include <linux/interrupt.h>
38#include <linux/miscdevice.h>
39
40#include <linux/mei.h>
41
42#include "mei_dev.h"
43#include "hw-me.h"
44#include "client.h"
45
46/* mei_pci_tbl - PCI Device ID Table */
47static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
48	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
49	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
50	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
51	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
52	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
53	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
54	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
55	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
56	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
57	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
58	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
59	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
60	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
61	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
62	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
63	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
64	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
65	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
66	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
67	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
68	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
69	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
70	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
71	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
72	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
73	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
74	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
75	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
76	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
77	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
78	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
79	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
80	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
81	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
82	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
83	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
84
85	/* required last entry */
86	{0, }
87};
88
89MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
90
91/**
92 * mei_quirk_probe - probe for devices that doesn't valid ME interface
93 *
94 * @pdev: PCI device structure
95 * @ent: entry into pci_device_table
96 *
97 * returns true if ME Interface is valid, false otherwise
98 */
99static bool mei_me_quirk_probe(struct pci_dev *pdev,
100				const struct pci_device_id *ent)
101{
102	u32 reg;
103	if (ent->device == MEI_DEV_ID_PBG_1) {
104		pci_read_config_dword(pdev, 0x48, &reg);
105		/* make sure that bit 9 is up and bit 10 is down */
106		if ((reg & 0x600) == 0x200) {
107			dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
108			return false;
109		}
110	}
111	return true;
112}
113/**
114 * mei_probe - Device Initialization Routine
115 *
116 * @pdev: PCI device structure
117 * @ent: entry in kcs_pci_tbl
118 *
119 * returns 0 on success, <0 on failure.
120 */
121static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
122{
123	struct mei_device *dev;
124	struct mei_me_hw *hw;
125	int err;
126
127
128	if (!mei_me_quirk_probe(pdev, ent)) {
129		err = -ENODEV;
130		goto end;
131	}
132
133	/* enable pci dev */
134	err = pci_enable_device(pdev);
135	if (err) {
136		dev_err(&pdev->dev, "failed to enable pci device.\n");
137		goto end;
138	}
139	/* set PCI host mastering  */
140	pci_set_master(pdev);
141	/* pci request regions for mei driver */
142	err = pci_request_regions(pdev, KBUILD_MODNAME);
143	if (err) {
144		dev_err(&pdev->dev, "failed to get pci regions.\n");
145		goto disable_device;
146	}
147	/* allocates and initializes the mei dev structure */
148	dev = mei_me_dev_init(pdev);
149	if (!dev) {
150		err = -ENOMEM;
151		goto release_regions;
152	}
153	hw = to_me_hw(dev);
154	/* mapping  IO device memory */
155	hw->mem_addr = pci_iomap(pdev, 0, 0);
156	if (!hw->mem_addr) {
157		dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
158		err = -ENOMEM;
159		goto free_device;
160	}
161	pci_enable_msi(pdev);
162
163	 /* request and enable interrupt */
164	if (pci_dev_msi_enabled(pdev))
165		err = request_threaded_irq(pdev->irq,
166			NULL,
167			mei_me_irq_thread_handler,
168			IRQF_ONESHOT, KBUILD_MODNAME, dev);
169	else
170		err = request_threaded_irq(pdev->irq,
171			mei_me_irq_quick_handler,
172			mei_me_irq_thread_handler,
173			IRQF_SHARED, KBUILD_MODNAME, dev);
174
175	if (err) {
176		dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
177		       pdev->irq);
178		goto disable_msi;
179	}
180
181	if (mei_start(dev)) {
182		dev_err(&pdev->dev, "init hw failure.\n");
183		err = -ENODEV;
184		goto release_irq;
185	}
186
187	err = mei_register(dev);
188	if (err)
189		goto release_irq;
190
191	pci_set_drvdata(pdev, dev);
192
193	schedule_delayed_work(&dev->timer_work, HZ);
194
195	dev_dbg(&pdev->dev, "initialization successful.\n");
196
197	return 0;
198
199release_irq:
200	mei_disable_interrupts(dev);
201	flush_scheduled_work();
202	free_irq(pdev->irq, dev);
203disable_msi:
204	pci_disable_msi(pdev);
205	pci_iounmap(pdev, hw->mem_addr);
206free_device:
207	kfree(dev);
208release_regions:
209	pci_release_regions(pdev);
210disable_device:
211	pci_disable_device(pdev);
212end:
213	dev_err(&pdev->dev, "initialization failed.\n");
214	return err;
215}
216
217/**
218 * mei_remove - Device Removal Routine
219 *
220 * @pdev: PCI device structure
221 *
222 * mei_remove is called by the PCI subsystem to alert the driver
223 * that it should release a PCI device.
224 */
225static void mei_me_remove(struct pci_dev *pdev)
226{
227	struct mei_device *dev;
228	struct mei_me_hw *hw;
229
230	dev = pci_get_drvdata(pdev);
231	if (!dev)
232		return;
233
234	hw = to_me_hw(dev);
235
236
237	dev_dbg(&pdev->dev, "stop\n");
238	mei_stop(dev);
239
240	/* disable interrupts */
241	mei_disable_interrupts(dev);
242
243	free_irq(pdev->irq, dev);
244	pci_disable_msi(pdev);
245
246	if (hw->mem_addr)
247		pci_iounmap(pdev, hw->mem_addr);
248
249	mei_deregister(dev);
250
251	kfree(dev);
252
253	pci_release_regions(pdev);
254	pci_disable_device(pdev);
255
256
257}
258#ifdef CONFIG_PM
259static int mei_me_pci_suspend(struct device *device)
260{
261	struct pci_dev *pdev = to_pci_dev(device);
262	struct mei_device *dev = pci_get_drvdata(pdev);
263
264	if (!dev)
265		return -ENODEV;
266
267	dev_dbg(&pdev->dev, "suspend\n");
268
269	mei_stop(dev);
270
271	mei_disable_interrupts(dev);
272
273	free_irq(pdev->irq, dev);
274	pci_disable_msi(pdev);
275
276	return 0;
277}
278
279static int mei_me_pci_resume(struct device *device)
280{
281	struct pci_dev *pdev = to_pci_dev(device);
282	struct mei_device *dev;
283	int err;
284
285	dev = pci_get_drvdata(pdev);
286	if (!dev)
287		return -ENODEV;
288
289	pci_enable_msi(pdev);
290
291	/* request and enable interrupt */
292	if (pci_dev_msi_enabled(pdev))
293		err = request_threaded_irq(pdev->irq,
294			NULL,
295			mei_me_irq_thread_handler,
296			IRQF_ONESHOT, KBUILD_MODNAME, dev);
297	else
298		err = request_threaded_irq(pdev->irq,
299			mei_me_irq_quick_handler,
300			mei_me_irq_thread_handler,
301			IRQF_SHARED, KBUILD_MODNAME, dev);
302
303	if (err) {
304		dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
305				pdev->irq);
306		return err;
307	}
308
309	mutex_lock(&dev->device_lock);
310	dev->dev_state = MEI_DEV_POWER_UP;
311	mei_clear_interrupts(dev);
312	mei_reset(dev, 1);
313	mutex_unlock(&dev->device_lock);
314
315	/* Start timer if stopped in suspend */
316	schedule_delayed_work(&dev->timer_work, HZ);
317
318	return err;
319}
320static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
321#define MEI_ME_PM_OPS	(&mei_me_pm_ops)
322#else
323#define MEI_ME_PM_OPS	NULL
324#endif /* CONFIG_PM */
325/*
326 *  PCI driver structure
327 */
328static struct pci_driver mei_me_driver = {
329	.name = KBUILD_MODNAME,
330	.id_table = mei_me_pci_tbl,
331	.probe = mei_me_probe,
332	.remove = mei_me_remove,
333	.shutdown = mei_me_remove,
334	.driver.pm = MEI_ME_PM_OPS,
335};
336
337module_pci_driver(mei_me_driver);
338
339MODULE_AUTHOR("Intel Corporation");
340MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
341MODULE_LICENSE("GPL v2");
342