mmci.c revision 9e6c82cd3e1a739ef48bf8c1decc8e7a7d8de3ac 
1/*
2 *  linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
3 *
4 *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/init.h>
13#include <linux/ioport.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/err.h>
18#include <linux/highmem.h>
19#include <linux/log2.h>
20#include <linux/mmc/host.h>
21#include <linux/amba/bus.h>
22#include <linux/clk.h>
23#include <linux/scatterlist.h>
24#include <linux/gpio.h>
25
26#include <asm/cacheflush.h>
27#include <asm/div64.h>
28#include <asm/io.h>
29#include <asm/sizes.h>
30#include <asm/mach/mmc.h>
31
32#include "mmci.h"
33
34#define DRIVER_NAME "mmci-pl18x"
35
36#define DBG(host,fmt,args...)	\
37	pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
38
39static unsigned int fmax = 515633;
40
41/*
42 * This must be called with host->lock held
43 */
44static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
45{
46	u32 clk = 0;
47
48	if (desired) {
49		if (desired >= host->mclk) {
50			clk = MCI_CLK_BYPASS;
51			host->cclk = host->mclk;
52		} else {
53			clk = host->mclk / (2 * desired) - 1;
54			if (clk >= 256)
55				clk = 255;
56			host->cclk = host->mclk / (2 * (clk + 1));
57		}
58		if (host->hw_designer == 0x80)
59			clk |= MCI_FCEN; /* Bug fix in ST IP block */
60		clk |= MCI_CLK_ENABLE;
61		/* This hasn't proven to be worthwhile */
62		/* clk |= MCI_CLK_PWRSAVE; */
63	}
64
65	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4)
66		clk |= MCI_WIDE_BUS;
67
68	writel(clk, host->base + MMCICLOCK);
69}
70
71static void
72mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
73{
74	writel(0, host->base + MMCICOMMAND);
75
76	BUG_ON(host->data);
77
78	host->mrq = NULL;
79	host->cmd = NULL;
80
81	if (mrq->data)
82		mrq->data->bytes_xfered = host->data_xfered;
83
84	/*
85	 * Need to drop the host lock here; mmc_request_done may call
86	 * back into the driver...
87	 */
88	spin_unlock(&host->lock);
89	mmc_request_done(host->mmc, mrq);
90	spin_lock(&host->lock);
91}
92
93static void mmci_stop_data(struct mmci_host *host)
94{
95	writel(0, host->base + MMCIDATACTRL);
96	writel(0, host->base + MMCIMASK1);
97	host->data = NULL;
98}
99
100static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
101{
102	unsigned int datactrl, timeout, irqmask;
103	unsigned long long clks;
104	void __iomem *base;
105	int blksz_bits;
106
107	DBG(host, "blksz %04x blks %04x flags %08x\n",
108	    data->blksz, data->blocks, data->flags);
109
110	host->data = data;
111	host->size = data->blksz;
112	host->data_xfered = 0;
113
114	mmci_init_sg(host, data);
115
116	clks = (unsigned long long)data->timeout_ns * host->cclk;
117	do_div(clks, 1000000000UL);
118
119	timeout = data->timeout_clks + (unsigned int)clks;
120
121	base = host->base;
122	writel(timeout, base + MMCIDATATIMER);
123	writel(host->size, base + MMCIDATALENGTH);
124
125	blksz_bits = ffs(data->blksz) - 1;
126	BUG_ON(1 << blksz_bits != data->blksz);
127
128	datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
129	if (data->flags & MMC_DATA_READ) {
130		datactrl |= MCI_DPSM_DIRECTION;
131		irqmask = MCI_RXFIFOHALFFULLMASK;
132
133		/*
134		 * If we have less than a FIFOSIZE of bytes to transfer,
135		 * trigger a PIO interrupt as soon as any data is available.
136		 */
137		if (host->size < MCI_FIFOSIZE)
138			irqmask |= MCI_RXDATAAVLBLMASK;
139	} else {
140		/*
141		 * We don't actually need to include "FIFO empty" here
142		 * since its implicit in "FIFO half empty".
143		 */
144		irqmask = MCI_TXFIFOHALFEMPTYMASK;
145	}
146
147	writel(datactrl, base + MMCIDATACTRL);
148	writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
149	writel(irqmask, base + MMCIMASK1);
150}
151
152static void
153mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
154{
155	void __iomem *base = host->base;
156
157	DBG(host, "op %02x arg %08x flags %08x\n",
158	    cmd->opcode, cmd->arg, cmd->flags);
159
160	if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
161		writel(0, base + MMCICOMMAND);
162		udelay(1);
163	}
164
165	c |= cmd->opcode | MCI_CPSM_ENABLE;
166	if (cmd->flags & MMC_RSP_PRESENT) {
167		if (cmd->flags & MMC_RSP_136)
168			c |= MCI_CPSM_LONGRSP;
169		c |= MCI_CPSM_RESPONSE;
170	}
171	if (/*interrupt*/0)
172		c |= MCI_CPSM_INTERRUPT;
173
174	host->cmd = cmd;
175
176	writel(cmd->arg, base + MMCIARGUMENT);
177	writel(c, base + MMCICOMMAND);
178}
179
180static void
181mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
182	      unsigned int status)
183{
184	if (status & MCI_DATABLOCKEND) {
185		host->data_xfered += data->blksz;
186	}
187	if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
188		if (status & MCI_DATACRCFAIL)
189			data->error = -EILSEQ;
190		else if (status & MCI_DATATIMEOUT)
191			data->error = -ETIMEDOUT;
192		else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
193			data->error = -EIO;
194		status |= MCI_DATAEND;
195
196		/*
197		 * We hit an error condition.  Ensure that any data
198		 * partially written to a page is properly coherent.
199		 */
200		if (host->sg_len && data->flags & MMC_DATA_READ)
201			flush_dcache_page(sg_page(host->sg_ptr));
202	}
203	if (status & MCI_DATAEND) {
204		mmci_stop_data(host);
205
206		if (!data->stop) {
207			mmci_request_end(host, data->mrq);
208		} else {
209			mmci_start_command(host, data->stop, 0);
210		}
211	}
212}
213
214static void
215mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
216	     unsigned int status)
217{
218	void __iomem *base = host->base;
219
220	host->cmd = NULL;
221
222	cmd->resp[0] = readl(base + MMCIRESPONSE0);
223	cmd->resp[1] = readl(base + MMCIRESPONSE1);
224	cmd->resp[2] = readl(base + MMCIRESPONSE2);
225	cmd->resp[3] = readl(base + MMCIRESPONSE3);
226
227	if (status & MCI_CMDTIMEOUT) {
228		cmd->error = -ETIMEDOUT;
229	} else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
230		cmd->error = -EILSEQ;
231	}
232
233	if (!cmd->data || cmd->error) {
234		if (host->data)
235			mmci_stop_data(host);
236		mmci_request_end(host, cmd->mrq);
237	} else if (!(cmd->data->flags & MMC_DATA_READ)) {
238		mmci_start_data(host, cmd->data);
239	}
240}
241
242static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
243{
244	void __iomem *base = host->base;
245	char *ptr = buffer;
246	u32 status;
247	int host_remain = host->size;
248
249	do {
250		int count = host_remain - (readl(base + MMCIFIFOCNT) << 2);
251
252		if (count > remain)
253			count = remain;
254
255		if (count <= 0)
256			break;
257
258		readsl(base + MMCIFIFO, ptr, count >> 2);
259
260		ptr += count;
261		remain -= count;
262		host_remain -= count;
263
264		if (remain == 0)
265			break;
266
267		status = readl(base + MMCISTATUS);
268	} while (status & MCI_RXDATAAVLBL);
269
270	return ptr - buffer;
271}
272
273static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
274{
275	void __iomem *base = host->base;
276	char *ptr = buffer;
277
278	do {
279		unsigned int count, maxcnt;
280
281		maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
282		count = min(remain, maxcnt);
283
284		writesl(base + MMCIFIFO, ptr, count >> 2);
285
286		ptr += count;
287		remain -= count;
288
289		if (remain == 0)
290			break;
291
292		status = readl(base + MMCISTATUS);
293	} while (status & MCI_TXFIFOHALFEMPTY);
294
295	return ptr - buffer;
296}
297
298/*
299 * PIO data transfer IRQ handler.
300 */
301static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
302{
303	struct mmci_host *host = dev_id;
304	void __iomem *base = host->base;
305	u32 status;
306
307	status = readl(base + MMCISTATUS);
308
309	DBG(host, "irq1 %08x\n", status);
310
311	do {
312		unsigned long flags;
313		unsigned int remain, len;
314		char *buffer;
315
316		/*
317		 * For write, we only need to test the half-empty flag
318		 * here - if the FIFO is completely empty, then by
319		 * definition it is more than half empty.
320		 *
321		 * For read, check for data available.
322		 */
323		if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
324			break;
325
326		/*
327		 * Map the current scatter buffer.
328		 */
329		buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
330		remain = host->sg_ptr->length - host->sg_off;
331
332		len = 0;
333		if (status & MCI_RXACTIVE)
334			len = mmci_pio_read(host, buffer, remain);
335		if (status & MCI_TXACTIVE)
336			len = mmci_pio_write(host, buffer, remain, status);
337
338		/*
339		 * Unmap the buffer.
340		 */
341		mmci_kunmap_atomic(host, buffer, &flags);
342
343		host->sg_off += len;
344		host->size -= len;
345		remain -= len;
346
347		if (remain)
348			break;
349
350		/*
351		 * If we were reading, and we have completed this
352		 * page, ensure that the data cache is coherent.
353		 */
354		if (status & MCI_RXACTIVE)
355			flush_dcache_page(sg_page(host->sg_ptr));
356
357		if (!mmci_next_sg(host))
358			break;
359
360		status = readl(base + MMCISTATUS);
361	} while (1);
362
363	/*
364	 * If we're nearing the end of the read, switch to
365	 * "any data available" mode.
366	 */
367	if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
368		writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
369
370	/*
371	 * If we run out of data, disable the data IRQs; this
372	 * prevents a race where the FIFO becomes empty before
373	 * the chip itself has disabled the data path, and
374	 * stops us racing with our data end IRQ.
375	 */
376	if (host->size == 0) {
377		writel(0, base + MMCIMASK1);
378		writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
379	}
380
381	return IRQ_HANDLED;
382}
383
384/*
385 * Handle completion of command and data transfers.
386 */
387static irqreturn_t mmci_irq(int irq, void *dev_id)
388{
389	struct mmci_host *host = dev_id;
390	u32 status;
391	int ret = 0;
392
393	spin_lock(&host->lock);
394
395	do {
396		struct mmc_command *cmd;
397		struct mmc_data *data;
398
399		status = readl(host->base + MMCISTATUS);
400		status &= readl(host->base + MMCIMASK0);
401		writel(status, host->base + MMCICLEAR);
402
403		DBG(host, "irq0 %08x\n", status);
404
405		data = host->data;
406		if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
407			      MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
408			mmci_data_irq(host, data, status);
409
410		cmd = host->cmd;
411		if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
412			mmci_cmd_irq(host, cmd, status);
413
414		ret = 1;
415	} while (status);
416
417	spin_unlock(&host->lock);
418
419	return IRQ_RETVAL(ret);
420}
421
422static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
423{
424	struct mmci_host *host = mmc_priv(mmc);
425	unsigned long flags;
426
427	WARN_ON(host->mrq != NULL);
428
429	if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
430		printk(KERN_ERR "%s: Unsupported block size (%d bytes)\n",
431			mmc_hostname(mmc), mrq->data->blksz);
432		mrq->cmd->error = -EINVAL;
433		mmc_request_done(mmc, mrq);
434		return;
435	}
436
437	spin_lock_irqsave(&host->lock, flags);
438
439	host->mrq = mrq;
440
441	if (mrq->data && mrq->data->flags & MMC_DATA_READ)
442		mmci_start_data(host, mrq->data);
443
444	mmci_start_command(host, mrq->cmd, 0);
445
446	spin_unlock_irqrestore(&host->lock, flags);
447}
448
449static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
450{
451	struct mmci_host *host = mmc_priv(mmc);
452	u32 pwr = 0;
453	unsigned long flags;
454
455	if (host->plat->translate_vdd)
456		pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
457
458	switch (ios->power_mode) {
459	case MMC_POWER_OFF:
460		break;
461	case MMC_POWER_UP:
462		/* The ST version does not have this, fall through to POWER_ON */
463		if (host->hw_designer != AMBA_VENDOR_ST) {
464			pwr |= MCI_PWR_UP;
465			break;
466		}
467	case MMC_POWER_ON:
468		pwr |= MCI_PWR_ON;
469		break;
470	}
471
472	if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
473		if (host->hw_designer != AMBA_VENDOR_ST)
474			pwr |= MCI_ROD;
475		else {
476			/*
477			 * The ST Micro variant use the ROD bit for something
478			 * else and only has OD (Open Drain).
479			 */
480			pwr |= MCI_OD;
481		}
482	}
483
484	spin_lock_irqsave(&host->lock, flags);
485
486	mmci_set_clkreg(host, ios->clock);
487
488	if (host->pwr != pwr) {
489		host->pwr = pwr;
490		writel(pwr, host->base + MMCIPOWER);
491	}
492
493	spin_unlock_irqrestore(&host->lock, flags);
494}
495
496static int mmci_get_ro(struct mmc_host *mmc)
497{
498	struct mmci_host *host = mmc_priv(mmc);
499
500	if (host->gpio_wp == -ENOSYS)
501		return -ENOSYS;
502
503	return gpio_get_value(host->gpio_wp);
504}
505
506static int mmci_get_cd(struct mmc_host *mmc)
507{
508	struct mmci_host *host = mmc_priv(mmc);
509	unsigned int status;
510
511	if (host->gpio_cd == -ENOSYS)
512		status = host->plat->status(mmc_dev(host->mmc));
513	else
514		status = gpio_get_value(host->gpio_cd);
515
516	return !status;
517}
518
519static const struct mmc_host_ops mmci_ops = {
520	.request	= mmci_request,
521	.set_ios	= mmci_set_ios,
522	.get_ro		= mmci_get_ro,
523	.get_cd		= mmci_get_cd,
524};
525
526static void mmci_check_status(unsigned long data)
527{
528	struct mmci_host *host = (struct mmci_host *)data;
529	unsigned int status = mmci_get_cd(host->mmc);
530
531	if (status ^ host->oldstat)
532		mmc_detect_change(host->mmc, 0);
533
534	host->oldstat = status;
535	mod_timer(&host->timer, jiffies + HZ);
536}
537
538static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
539{
540	struct mmc_platform_data *plat = dev->dev.platform_data;
541	struct mmci_host *host;
542	struct mmc_host *mmc;
543	int ret;
544
545	/* must have platform data */
546	if (!plat) {
547		ret = -EINVAL;
548		goto out;
549	}
550
551	ret = amba_request_regions(dev, DRIVER_NAME);
552	if (ret)
553		goto out;
554
555	mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
556	if (!mmc) {
557		ret = -ENOMEM;
558		goto rel_regions;
559	}
560
561	host = mmc_priv(mmc);
562	host->mmc = mmc;
563
564	host->gpio_wp = -ENOSYS;
565	host->gpio_cd = -ENOSYS;
566
567	host->hw_designer = amba_manf(dev);
568	host->hw_revision = amba_rev(dev);
569	DBG(host, "designer ID = 0x%02x\n", host->hw_designer);
570	DBG(host, "revision = 0x%01x\n", host->hw_revision);
571
572	host->clk = clk_get(&dev->dev, NULL);
573	if (IS_ERR(host->clk)) {
574		ret = PTR_ERR(host->clk);
575		host->clk = NULL;
576		goto host_free;
577	}
578
579	ret = clk_enable(host->clk);
580	if (ret)
581		goto clk_free;
582
583	host->plat = plat;
584	host->mclk = clk_get_rate(host->clk);
585	/*
586	 * According to the spec, mclk is max 100 MHz,
587	 * so we try to adjust the clock down to this,
588	 * (if possible).
589	 */
590	if (host->mclk > 100000000) {
591		ret = clk_set_rate(host->clk, 100000000);
592		if (ret < 0)
593			goto clk_disable;
594		host->mclk = clk_get_rate(host->clk);
595		DBG(host, "eventual mclk rate: %u Hz\n", host->mclk);
596	}
597	host->base = ioremap(dev->res.start, resource_size(&dev->res));
598	if (!host->base) {
599		ret = -ENOMEM;
600		goto clk_disable;
601	}
602
603	mmc->ops = &mmci_ops;
604	mmc->f_min = (host->mclk + 511) / 512;
605	mmc->f_max = min(host->mclk, fmax);
606	mmc->ocr_avail = plat->ocr_mask;
607	mmc->caps = plat->capabilities;
608
609	/*
610	 * We can do SGIO
611	 */
612	mmc->max_hw_segs = 16;
613	mmc->max_phys_segs = NR_SG;
614
615	/*
616	 * Since we only have a 16-bit data length register, we must
617	 * ensure that we don't exceed 2^16-1 bytes in a single request.
618	 */
619	mmc->max_req_size = 65535;
620
621	/*
622	 * Set the maximum segment size.  Since we aren't doing DMA
623	 * (yet) we are only limited by the data length register.
624	 */
625	mmc->max_seg_size = mmc->max_req_size;
626
627	/*
628	 * Block size can be up to 2048 bytes, but must be a power of two.
629	 */
630	mmc->max_blk_size = 2048;
631
632	/*
633	 * No limit on the number of blocks transferred.
634	 */
635	mmc->max_blk_count = mmc->max_req_size;
636
637	spin_lock_init(&host->lock);
638
639	writel(0, host->base + MMCIMASK0);
640	writel(0, host->base + MMCIMASK1);
641	writel(0xfff, host->base + MMCICLEAR);
642
643#ifdef CONFIG_GPIOLIB
644	if (gpio_is_valid(plat->gpio_cd)) {
645		ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)");
646		if (ret == 0)
647			ret = gpio_direction_input(plat->gpio_cd);
648		if (ret == 0)
649			host->gpio_cd = plat->gpio_cd;
650		else if (ret != -ENOSYS)
651			goto err_gpio_cd;
652	}
653	if (gpio_is_valid(plat->gpio_wp)) {
654		ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)");
655		if (ret == 0)
656			ret = gpio_direction_input(plat->gpio_wp);
657		if (ret == 0)
658			host->gpio_wp = plat->gpio_wp;
659		else if (ret != -ENOSYS)
660			goto err_gpio_wp;
661	}
662#endif
663
664	ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
665	if (ret)
666		goto unmap;
667
668	ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host);
669	if (ret)
670		goto irq0_free;
671
672	writel(MCI_IRQENABLE, host->base + MMCIMASK0);
673
674	amba_set_drvdata(dev, mmc);
675	host->oldstat = mmci_get_cd(host->mmc);
676
677	mmc_add_host(mmc);
678
679	printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
680		mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
681		(unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
682
683	init_timer(&host->timer);
684	host->timer.data = (unsigned long)host;
685	host->timer.function = mmci_check_status;
686	host->timer.expires = jiffies + HZ;
687	add_timer(&host->timer);
688
689	return 0;
690
691 irq0_free:
692	free_irq(dev->irq[0], host);
693 unmap:
694	if (host->gpio_wp != -ENOSYS)
695		gpio_free(host->gpio_wp);
696 err_gpio_wp:
697	if (host->gpio_cd != -ENOSYS)
698		gpio_free(host->gpio_cd);
699 err_gpio_cd:
700	iounmap(host->base);
701 clk_disable:
702	clk_disable(host->clk);
703 clk_free:
704	clk_put(host->clk);
705 host_free:
706	mmc_free_host(mmc);
707 rel_regions:
708	amba_release_regions(dev);
709 out:
710	return ret;
711}
712
713static int __devexit mmci_remove(struct amba_device *dev)
714{
715	struct mmc_host *mmc = amba_get_drvdata(dev);
716
717	amba_set_drvdata(dev, NULL);
718
719	if (mmc) {
720		struct mmci_host *host = mmc_priv(mmc);
721
722		del_timer_sync(&host->timer);
723
724		mmc_remove_host(mmc);
725
726		writel(0, host->base + MMCIMASK0);
727		writel(0, host->base + MMCIMASK1);
728
729		writel(0, host->base + MMCICOMMAND);
730		writel(0, host->base + MMCIDATACTRL);
731
732		free_irq(dev->irq[0], host);
733		free_irq(dev->irq[1], host);
734
735		if (host->gpio_wp != -ENOSYS)
736			gpio_free(host->gpio_wp);
737		if (host->gpio_cd != -ENOSYS)
738			gpio_free(host->gpio_cd);
739
740		iounmap(host->base);
741		clk_disable(host->clk);
742		clk_put(host->clk);
743
744		mmc_free_host(mmc);
745
746		amba_release_regions(dev);
747	}
748
749	return 0;
750}
751
752#ifdef CONFIG_PM
753static int mmci_suspend(struct amba_device *dev, pm_message_t state)
754{
755	struct mmc_host *mmc = amba_get_drvdata(dev);
756	int ret = 0;
757
758	if (mmc) {
759		struct mmci_host *host = mmc_priv(mmc);
760
761		ret = mmc_suspend_host(mmc, state);
762		if (ret == 0)
763			writel(0, host->base + MMCIMASK0);
764	}
765
766	return ret;
767}
768
769static int mmci_resume(struct amba_device *dev)
770{
771	struct mmc_host *mmc = amba_get_drvdata(dev);
772	int ret = 0;
773
774	if (mmc) {
775		struct mmci_host *host = mmc_priv(mmc);
776
777		writel(MCI_IRQENABLE, host->base + MMCIMASK0);
778
779		ret = mmc_resume_host(mmc);
780	}
781
782	return ret;
783}
784#else
785#define mmci_suspend	NULL
786#define mmci_resume	NULL
787#endif
788
789static struct amba_id mmci_ids[] = {
790	{
791		.id	= 0x00041180,
792		.mask	= 0x000fffff,
793	},
794	{
795		.id	= 0x00041181,
796		.mask	= 0x000fffff,
797	},
798	/* ST Micro variants */
799	{
800		.id     = 0x00180180,
801		.mask   = 0x00ffffff,
802	},
803	{
804		.id     = 0x00280180,
805		.mask   = 0x00ffffff,
806	},
807	{ 0, 0 },
808};
809
810static struct amba_driver mmci_driver = {
811	.drv		= {
812		.name	= DRIVER_NAME,
813	},
814	.probe		= mmci_probe,
815	.remove		= __devexit_p(mmci_remove),
816	.suspend	= mmci_suspend,
817	.resume		= mmci_resume,
818	.id_table	= mmci_ids,
819};
820
821static int __init mmci_init(void)
822{
823	return amba_driver_register(&mmci_driver);
824}
825
826static void __exit mmci_exit(void)
827{
828	amba_driver_unregister(&mmci_driver);
829}
830
831module_init(mmci_init);
832module_exit(mmci_exit);
833module_param(fmax, uint, 0444);
834
835MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
836MODULE_LICENSE("GPL");
837