tmio_mmc.c revision da46a0bd42c81a473618e94871500fb792c98727
1/* 2 * linux/drivers/mmc/tmio_mmc.c 3 * 4 * Copyright (C) 2004 Ian Molton 5 * Copyright (C) 2007 Ian Molton 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Driver for the MMC / SD / SDIO cell found in: 12 * 13 * TC6393XB TC6391XB TC6387XB T7L66XB 14 * 15 * This driver draws mainly on scattered spec sheets, Reverse engineering 16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 17 * support). (Further 4 bit support from a later datasheet). 18 * 19 * TODO: 20 * Investigate using a workqueue for PIO transfers 21 * Eliminate FIXMEs 22 * SDIO support 23 * Better Power management 24 * Handle MMC errors better 25 * double buffer support 26 * 27 */ 28#include <linux/module.h> 29#include <linux/irq.h> 30#include <linux/device.h> 31#include <linux/delay.h> 32#include <linux/mmc/host.h> 33#include <linux/mfd/core.h> 34#include <linux/mfd/tmio.h> 35 36#include "tmio_mmc.h" 37 38static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) 39{ 40 u32 clk = 0, clock; 41 42 if (new_clock) { 43 for (clock = host->mmc->f_min, clk = 0x80000080; 44 new_clock >= (clock<<1); clk >>= 1) 45 clock <<= 1; 46 clk |= 0x100; 47 } 48 49 sd_config_write8(host, CNF_SD_CLK_MODE, clk >> 22); 50 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); 51} 52 53static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 54{ 55 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 56 msleep(10); 57 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & 58 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 59 msleep(10); 60} 61 62static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 63{ 64 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | 65 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 66 msleep(10); 67 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 68 msleep(10); 69} 70 71static void reset(struct tmio_mmc_host *host) 72{ 73 /* FIXME - should we set stop clock reg here */ 74 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 75 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 76 msleep(10); 77 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 78 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 79 msleep(10); 80} 81 82static void 83tmio_mmc_finish_request(struct tmio_mmc_host *host) 84{ 85 struct mmc_request *mrq = host->mrq; 86 87 host->mrq = NULL; 88 host->cmd = NULL; 89 host->data = NULL; 90 91 mmc_request_done(host->mmc, mrq); 92} 93 94/* These are the bitmasks the tmio chip requires to implement the MMC response 95 * types. Note that R1 and R6 are the same in this scheme. */ 96#define APP_CMD 0x0040 97#define RESP_NONE 0x0300 98#define RESP_R1 0x0400 99#define RESP_R1B 0x0500 100#define RESP_R2 0x0600 101#define RESP_R3 0x0700 102#define DATA_PRESENT 0x0800 103#define TRANSFER_READ 0x1000 104#define TRANSFER_MULTI 0x2000 105#define SECURITY_CMD 0x4000 106 107static int 108tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) 109{ 110 struct mmc_data *data = host->data; 111 int c = cmd->opcode; 112 113 /* Command 12 is handled by hardware */ 114 if (cmd->opcode == 12 && !cmd->arg) { 115 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); 116 return 0; 117 } 118 119 switch (mmc_resp_type(cmd)) { 120 case MMC_RSP_NONE: c |= RESP_NONE; break; 121 case MMC_RSP_R1: c |= RESP_R1; break; 122 case MMC_RSP_R1B: c |= RESP_R1B; break; 123 case MMC_RSP_R2: c |= RESP_R2; break; 124 case MMC_RSP_R3: c |= RESP_R3; break; 125 default: 126 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 127 return -EINVAL; 128 } 129 130 host->cmd = cmd; 131 132/* FIXME - this seems to be ok comented out but the spec suggest this bit should 133 * be set when issuing app commands. 134 * if(cmd->flags & MMC_FLAG_ACMD) 135 * c |= APP_CMD; 136 */ 137 if (data) { 138 c |= DATA_PRESENT; 139 if (data->blocks > 1) { 140 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); 141 c |= TRANSFER_MULTI; 142 } 143 if (data->flags & MMC_DATA_READ) 144 c |= TRANSFER_READ; 145 } 146 147 enable_mmc_irqs(host, TMIO_MASK_CMD); 148 149 /* Fire off the command */ 150 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); 151 sd_ctrl_write16(host, CTL_SD_CMD, c); 152 153 return 0; 154} 155 156/* This chip always returns (at least?) as much data as you ask for. 157 * I'm unsure what happens if you ask for less than a block. This should be 158 * looked into to ensure that a funny length read doesnt hose the controller. 159 * 160 */ 161static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 162{ 163 struct mmc_data *data = host->data; 164 unsigned short *buf; 165 unsigned int count; 166 unsigned long flags; 167 168 if (!data) { 169 pr_debug("Spurious PIO IRQ\n"); 170 return; 171 } 172 173 buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) + 174 host->sg_off); 175 176 count = host->sg_ptr->length - host->sg_off; 177 if (count > data->blksz) 178 count = data->blksz; 179 180 pr_debug("count: %08x offset: %08x flags %08x\n", 181 count, host->sg_off, data->flags); 182 183 /* Transfer the data */ 184 if (data->flags & MMC_DATA_READ) 185 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 186 else 187 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 188 189 host->sg_off += count; 190 191 tmio_mmc_kunmap_atomic(host, &flags); 192 193 if (host->sg_off == host->sg_ptr->length) 194 tmio_mmc_next_sg(host); 195 196 return; 197} 198 199static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host) 200{ 201 struct mmc_data *data = host->data; 202 struct mmc_command *stop; 203 204 host->data = NULL; 205 206 if (!data) { 207 pr_debug("Spurious data end IRQ\n"); 208 return; 209 } 210 stop = data->stop; 211 212 /* FIXME - return correct transfer count on errors */ 213 if (!data->error) 214 data->bytes_xfered = data->blocks * data->blksz; 215 else 216 data->bytes_xfered = 0; 217 218 pr_debug("Completed data request\n"); 219 220 /*FIXME - other drivers allow an optional stop command of any given type 221 * which we dont do, as the chip can auto generate them. 222 * Perhaps we can be smarter about when to use auto CMD12 and 223 * only issue the auto request when we know this is the desired 224 * stop command, allowing fallback to the stop command the 225 * upper layers expect. For now, we do what works. 226 */ 227 228 if (data->flags & MMC_DATA_READ) 229 disable_mmc_irqs(host, TMIO_MASK_READOP); 230 else 231 disable_mmc_irqs(host, TMIO_MASK_WRITEOP); 232 233 if (stop) { 234 if (stop->opcode == 12 && !stop->arg) 235 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); 236 else 237 BUG(); 238 } 239 240 tmio_mmc_finish_request(host); 241} 242 243static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, 244 unsigned int stat) 245{ 246 struct mmc_command *cmd = host->cmd; 247 int i, addr; 248 249 if (!host->cmd) { 250 pr_debug("Spurious CMD irq\n"); 251 return; 252 } 253 254 host->cmd = NULL; 255 256 /* This controller is sicker than the PXA one. Not only do we need to 257 * drop the top 8 bits of the first response word, we also need to 258 * modify the order of the response for short response command types. 259 */ 260 261 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 262 cmd->resp[i] = sd_ctrl_read32(host, addr); 263 264 if (cmd->flags & MMC_RSP_136) { 265 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 266 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 267 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 268 cmd->resp[3] <<= 8; 269 } else if (cmd->flags & MMC_RSP_R3) { 270 cmd->resp[0] = cmd->resp[3]; 271 } 272 273 if (stat & TMIO_STAT_CMDTIMEOUT) 274 cmd->error = -ETIMEDOUT; 275 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) 276 cmd->error = -EILSEQ; 277 278 /* If there is data to handle we enable data IRQs here, and 279 * we will ultimatley finish the request in the data_end handler. 280 * If theres no data or we encountered an error, finish now. 281 */ 282 if (host->data && !cmd->error) { 283 if (host->data->flags & MMC_DATA_READ) 284 enable_mmc_irqs(host, TMIO_MASK_READOP); 285 else 286 enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 287 } else { 288 tmio_mmc_finish_request(host); 289 } 290 291 return; 292} 293 294 295static irqreturn_t tmio_mmc_irq(int irq, void *devid) 296{ 297 struct tmio_mmc_host *host = devid; 298 unsigned int ireg, irq_mask, status; 299 300 pr_debug("MMC IRQ begin\n"); 301 302 status = sd_ctrl_read32(host, CTL_STATUS); 303 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK); 304 ireg = status & TMIO_MASK_IRQ & ~irq_mask; 305 306 pr_debug_status(status); 307 pr_debug_status(ireg); 308 309 if (!ireg) { 310 disable_mmc_irqs(host, status & ~irq_mask); 311 312 pr_debug("tmio_mmc: Spurious irq, disabling! " 313 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg); 314 pr_debug_status(status); 315 316 goto out; 317 } 318 319 while (ireg) { 320 /* Card insert / remove attempts */ 321 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 322 ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 323 TMIO_STAT_CARD_REMOVE); 324 mmc_detect_change(host->mmc, 0); 325 } 326 327 /* CRC and other errors */ 328/* if (ireg & TMIO_STAT_ERR_IRQ) 329 * handled |= tmio_error_irq(host, irq, stat); 330 */ 331 332 /* Command completion */ 333 if (ireg & TMIO_MASK_CMD) { 334 ack_mmc_irqs(host, TMIO_MASK_CMD); 335 tmio_mmc_cmd_irq(host, status); 336 } 337 338 /* Data transfer */ 339 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 340 ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 341 tmio_mmc_pio_irq(host); 342 } 343 344 /* Data transfer completion */ 345 if (ireg & TMIO_STAT_DATAEND) { 346 ack_mmc_irqs(host, TMIO_STAT_DATAEND); 347 tmio_mmc_data_irq(host); 348 } 349 350 /* Check status - keep going until we've handled it all */ 351 status = sd_ctrl_read32(host, CTL_STATUS); 352 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK); 353 ireg = status & TMIO_MASK_IRQ & ~irq_mask; 354 355 pr_debug("Status at end of loop: %08x\n", status); 356 pr_debug_status(status); 357 } 358 pr_debug("MMC IRQ end\n"); 359 360out: 361 return IRQ_HANDLED; 362} 363 364static int tmio_mmc_start_data(struct tmio_mmc_host *host, 365 struct mmc_data *data) 366{ 367 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 368 data->blksz, data->blocks); 369 370 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */ 371 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { 372 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n", 373 mmc_hostname(host->mmc), data->blksz); 374 return -EINVAL; 375 } 376 377 tmio_mmc_init_sg(host, data); 378 host->data = data; 379 380 /* Set transfer length / blocksize */ 381 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 382 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 383 384 return 0; 385} 386 387/* Process requests from the MMC layer */ 388static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 389{ 390 struct tmio_mmc_host *host = mmc_priv(mmc); 391 int ret; 392 393 if (host->mrq) 394 pr_debug("request not null\n"); 395 396 host->mrq = mrq; 397 398 if (mrq->data) { 399 ret = tmio_mmc_start_data(host, mrq->data); 400 if (ret) 401 goto fail; 402 } 403 404 ret = tmio_mmc_start_command(host, mrq->cmd); 405 406 if (!ret) 407 return; 408 409fail: 410 mrq->cmd->error = ret; 411 mmc_request_done(mmc, mrq); 412} 413 414/* Set MMC clock / power. 415 * Note: This controller uses a simple divider scheme therefore it cannot 416 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 417 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 418 * slowest setting. 419 */ 420static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 421{ 422 struct tmio_mmc_host *host = mmc_priv(mmc); 423 424 if (ios->clock) 425 tmio_mmc_set_clock(host, ios->clock); 426 427 /* Power sequence - OFF -> ON -> UP */ 428 switch (ios->power_mode) { 429 case MMC_POWER_OFF: /* power down SD bus */ 430 sd_config_write8(host, CNF_PWR_CTL_2, 0x00); 431 tmio_mmc_clk_stop(host); 432 break; 433 case MMC_POWER_ON: /* power up SD bus */ 434 435 sd_config_write8(host, CNF_PWR_CTL_2, 0x02); 436 break; 437 case MMC_POWER_UP: /* start bus clock */ 438 tmio_mmc_clk_start(host); 439 break; 440 } 441 442 switch (ios->bus_width) { 443 case MMC_BUS_WIDTH_1: 444 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 445 break; 446 case MMC_BUS_WIDTH_4: 447 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 448 break; 449 } 450 451 /* Let things settle. delay taken from winCE driver */ 452 udelay(140); 453} 454 455static int tmio_mmc_get_ro(struct mmc_host *mmc) 456{ 457 struct tmio_mmc_host *host = mmc_priv(mmc); 458 459 return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1; 460} 461 462static struct mmc_host_ops tmio_mmc_ops = { 463 .request = tmio_mmc_request, 464 .set_ios = tmio_mmc_set_ios, 465 .get_ro = tmio_mmc_get_ro, 466}; 467 468#ifdef CONFIG_PM 469static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state) 470{ 471 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 472 struct mmc_host *mmc = platform_get_drvdata(dev); 473 int ret; 474 475 ret = mmc_suspend_host(mmc, state); 476 477 /* Tell MFD core it can disable us now.*/ 478 if (!ret && cell->disable) 479 cell->disable(dev); 480 481 return ret; 482} 483 484static int tmio_mmc_resume(struct platform_device *dev) 485{ 486 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 487 struct mmc_host *mmc = platform_get_drvdata(dev); 488 struct tmio_mmc_host *host = mmc_priv(mmc); 489 int ret = 0; 490 491 /* Tell the MFD core we are ready to be enabled */ 492 if (cell->enable) { 493 ret = cell->enable(dev); 494 if (ret) 495 goto out; 496 } 497 498 /* Enable the MMC/SD Control registers */ 499 sd_config_write16(host, CNF_CMD, SDCREN); 500 sd_config_write32(host, CNF_CTL_BASE, 501 (dev->resource[0].start >> host->bus_shift) & 0xfffe); 502 503 mmc_resume_host(mmc); 504 505out: 506 return ret; 507} 508#else 509#define tmio_mmc_suspend NULL 510#define tmio_mmc_resume NULL 511#endif 512 513static int __devinit tmio_mmc_probe(struct platform_device *dev) 514{ 515 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 516 struct tmio_mmc_data *pdata; 517 struct resource *res_ctl, *res_cnf; 518 struct tmio_mmc_host *host; 519 struct mmc_host *mmc; 520 int ret = -EINVAL; 521 522 if (dev->num_resources != 3) 523 goto out; 524 525 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0); 526 res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1); 527 if (!res_ctl || !res_cnf) 528 goto out; 529 530 pdata = cell->driver_data; 531 if (!pdata || !pdata->hclk) 532 goto out; 533 534 ret = -ENOMEM; 535 536 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev); 537 if (!mmc) 538 goto out; 539 540 host = mmc_priv(mmc); 541 host->mmc = mmc; 542 platform_set_drvdata(dev, mmc); 543 544 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ 545 host->bus_shift = resource_size(res_ctl) >> 10; 546 547 host->ctl = ioremap(res_ctl->start, resource_size(res_ctl)); 548 if (!host->ctl) 549 goto host_free; 550 551 host->cnf = ioremap(res_cnf->start, resource_size(res_cnf)); 552 if (!host->cnf) 553 goto unmap_ctl; 554 555 mmc->ops = &tmio_mmc_ops; 556 mmc->caps = MMC_CAP_4_BIT_DATA; 557 mmc->f_max = pdata->hclk; 558 mmc->f_min = mmc->f_max / 512; 559 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 560 561 /* Tell the MFD core we are ready to be enabled */ 562 if (cell->enable) { 563 ret = cell->enable(dev); 564 if (ret) 565 goto unmap_cnf; 566 } 567 568 /* Enable the MMC/SD Control registers */ 569 sd_config_write16(host, CNF_CMD, SDCREN); 570 sd_config_write32(host, CNF_CTL_BASE, 571 (dev->resource[0].start >> host->bus_shift) & 0xfffe); 572 573 /* Disable SD power during suspend */ 574 sd_config_write8(host, CNF_PWR_CTL_3, 0x01); 575 576 /* The below is required but why? FIXME */ 577 sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f); 578 579 /* Power down SD bus*/ 580 sd_config_write8(host, CNF_PWR_CTL_2, 0x00); 581 582 tmio_mmc_clk_stop(host); 583 reset(host); 584 585 ret = platform_get_irq(dev, 0); 586 if (ret >= 0) 587 host->irq = ret; 588 else 589 goto unmap_cnf; 590 591 disable_mmc_irqs(host, TMIO_MASK_ALL); 592 593 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED | 594 IRQF_TRIGGER_FALLING, "tmio-mmc", host); 595 if (ret) 596 goto unmap_cnf; 597 598 mmc_add_host(mmc); 599 600 printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc), 601 (unsigned long)host->ctl, host->irq); 602 603 /* Unmask the IRQs we want to know about */ 604 enable_mmc_irqs(host, TMIO_MASK_IRQ); 605 606 return 0; 607 608unmap_cnf: 609 iounmap(host->cnf); 610unmap_ctl: 611 iounmap(host->ctl); 612host_free: 613 mmc_free_host(mmc); 614out: 615 return ret; 616} 617 618static int __devexit tmio_mmc_remove(struct platform_device *dev) 619{ 620 struct mmc_host *mmc = platform_get_drvdata(dev); 621 622 platform_set_drvdata(dev, NULL); 623 624 if (mmc) { 625 struct tmio_mmc_host *host = mmc_priv(mmc); 626 mmc_remove_host(mmc); 627 free_irq(host->irq, host); 628 iounmap(host->ctl); 629 iounmap(host->cnf); 630 mmc_free_host(mmc); 631 } 632 633 return 0; 634} 635 636/* ------------------- device registration ----------------------- */ 637 638static struct platform_driver tmio_mmc_driver = { 639 .driver = { 640 .name = "tmio-mmc", 641 .owner = THIS_MODULE, 642 }, 643 .probe = tmio_mmc_probe, 644 .remove = __devexit_p(tmio_mmc_remove), 645 .suspend = tmio_mmc_suspend, 646 .resume = tmio_mmc_resume, 647}; 648 649 650static int __init tmio_mmc_init(void) 651{ 652 return platform_driver_register(&tmio_mmc_driver); 653} 654 655static void __exit tmio_mmc_exit(void) 656{ 657 platform_driver_unregister(&tmio_mmc_driver); 658} 659 660module_init(tmio_mmc_init); 661module_exit(tmio_mmc_exit); 662 663MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver"); 664MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); 665MODULE_LICENSE("GPL v2"); 666MODULE_ALIAS("platform:tmio-mmc"); 667