amd76xrom.c revision 1a6284cb6f44b2484505ee7567831316a90bc09f 
1/*
2 * amd76xrom.c
3 *
4 * Normal mappings of chips in physical memory
5 * $Id: amd76xrom.c,v 1.21 2005/11/07 11:14:26 gleixner Exp $
6 */
7
8#include <linux/module.h>
9#include <linux/types.h>
10#include <linux/version.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <asm/io.h>
14#include <linux/mtd/mtd.h>
15#include <linux/mtd/map.h>
16#include <linux/mtd/cfi.h>
17#include <linux/mtd/flashchip.h>
18#include <linux/pci.h>
19#include <linux/pci_ids.h>
20#include <linux/list.h>
21
22
23#define xstr(s) str(s)
24#define str(s) #s
25#define MOD_NAME xstr(KBUILD_BASENAME)
26
27#define ADDRESS_NAME_LEN 18
28
29#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
30
31struct amd76xrom_window {
32	void __iomem *virt;
33	unsigned long phys;
34	unsigned long size;
35	struct list_head maps;
36	struct resource rsrc;
37	struct pci_dev *pdev;
38};
39
40struct amd76xrom_map_info {
41	struct list_head list;
42	struct map_info map;
43	struct mtd_info *mtd;
44	struct resource rsrc;
45	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
46};
47
48/* The 2 bits controlling the window size are often set to allow reading
49 * the BIOS, but too small to allow writing, since the lock registers are
50 * 4MiB lower in the address space than the data.
51 *
52 * This is intended to prevent flashing the bios, perhaps accidentally.
53 *
54 * This parameter allows the normal driver to over-ride the BIOS settings.
55 *
56 * The bits are 6 and 7.  If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window.  Otherwise, a
58 * 64KiB window.
59 *
60 */
61static uint win_size_bits;
62module_param(win_size_bits, uint, 0);
63MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.");
64
65static struct amd76xrom_window amd76xrom_window = {
66	.maps = LIST_HEAD_INIT(amd76xrom_window.maps),
67};
68
69static void amd76xrom_cleanup(struct amd76xrom_window *window)
70{
71	struct amd76xrom_map_info *map, *scratch;
72	u8 byte;
73
74	if (window->pdev) {
75		/* Disable writes through the rom window */
76		pci_read_config_byte(window->pdev, 0x40, &byte);
77		pci_write_config_byte(window->pdev, 0x40, byte & ~1);
78		pci_dev_put(window->pdev);
79	}
80
81	/* Free all of the mtd devices */
82	list_for_each_entry_safe(map, scratch, &window->maps, list) {
83		if (map->rsrc.parent) {
84			release_resource(&map->rsrc);
85		}
86		del_mtd_device(map->mtd);
87		map_destroy(map->mtd);
88		list_del(&map->list);
89		kfree(map);
90	}
91	if (window->rsrc.parent)
92		release_resource(&window->rsrc);
93
94	if (window->virt) {
95		iounmap(window->virt);
96		window->virt = NULL;
97		window->phys = 0;
98		window->size = 0;
99		window->pdev = NULL;
100	}
101}
102
103
104static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
105	const struct pci_device_id *ent)
106{
107	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
108	u8 byte;
109	struct amd76xrom_window *window = &amd76xrom_window;
110	struct amd76xrom_map_info *map = NULL;
111	unsigned long map_top;
112
113	/* Remember the pci dev I find the window in - already have a ref */
114	window->pdev = pdev;
115
116	/* Enable the selected rom window.  This is often incorrectly
117	 * set up by the BIOS, and the 4MiB offset for the lock registers
118	 * requires the full 5MiB of window space.
119	 *
120	 * This 'write, then read' approach leaves the bits for
121	 * other uses of the hardware info.
122	 */
123	pci_read_config_byte(pdev, 0x43, &byte);
124	pci_write_config_byte(pdev, 0x43, byte | win_size_bits );
125
126	/* Assume the rom window is properly setup, and find it's size */
127	pci_read_config_byte(pdev, 0x43, &byte);
128	if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
129		window->phys = 0xffb00000; /* 5MiB */
130	}
131	else if ((byte & (1<<7)) == (1<<7)) {
132		window->phys = 0xffc00000; /* 4MiB */
133	}
134	else {
135		window->phys = 0xffff0000; /* 64KiB */
136	}
137	window->size = 0xffffffffUL - window->phys + 1UL;
138
139	/*
140	 * Try to reserve the window mem region.  If this fails then
141	 * it is likely due to a fragment of the window being
142	 * "reseved" by the BIOS.  In the case that the
143	 * request_mem_region() fails then once the rom size is
144	 * discovered we will try to reserve the unreserved fragment.
145	 */
146	window->rsrc.name = MOD_NAME;
147	window->rsrc.start = window->phys;
148	window->rsrc.end   = window->phys + window->size - 1;
149	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
150	if (request_resource(&iomem_resource, &window->rsrc)) {
151		window->rsrc.parent = NULL;
152		printk(KERN_ERR MOD_NAME
153			" %s(): Unable to register resource"
154			" 0x%.16llx-0x%.16llx - kernel bug?\n",
155			__func__,
156			(unsigned long long)window->rsrc.start,
157			(unsigned long long)window->rsrc.end);
158	}
159
160
161	/* Enable writes through the rom window */
162	pci_read_config_byte(pdev, 0x40, &byte);
163	pci_write_config_byte(pdev, 0x40, byte | 1);
164
165	/* FIXME handle registers 0x80 - 0x8C the bios region locks */
166
167	/* For write accesses caches are useless */
168	window->virt = ioremap_nocache(window->phys, window->size);
169	if (!window->virt) {
170		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
171			window->phys, window->size);
172		goto out;
173	}
174
175	/* Get the first address to look for an rom chip at */
176	map_top = window->phys;
177#if 1
178	/* The probe sequence run over the firmware hub lock
179	 * registers sets them to 0x7 (no access).
180	 * Probe at most the last 4M of the address space.
181	 */
182	if (map_top < 0xffc00000) {
183		map_top = 0xffc00000;
184	}
185#endif
186	/* Loop  through and look for rom chips */
187	while((map_top - 1) < 0xffffffffUL) {
188		struct cfi_private *cfi;
189		unsigned long offset;
190		int i;
191
192		if (!map) {
193			map = kmalloc(sizeof(*map), GFP_KERNEL);
194		}
195		if (!map) {
196			printk(KERN_ERR MOD_NAME ": kmalloc failed");
197			goto out;
198		}
199		memset(map, 0, sizeof(*map));
200		INIT_LIST_HEAD(&map->list);
201		map->map.name = map->map_name;
202		map->map.phys = map_top;
203		offset = map_top - window->phys;
204		map->map.virt = (void __iomem *)
205			(((unsigned long)(window->virt)) + offset);
206		map->map.size = 0xffffffffUL - map_top + 1UL;
207		/* Set the name of the map to the address I am trying */
208		sprintf(map->map_name, "%s @%08Lx",
209			MOD_NAME, (unsigned long long)map->map.phys);
210
211		/* There is no generic VPP support */
212		for(map->map.bankwidth = 32; map->map.bankwidth;
213			map->map.bankwidth >>= 1)
214		{
215			char **probe_type;
216			/* Skip bankwidths that are not supported */
217			if (!map_bankwidth_supported(map->map.bankwidth))
218				continue;
219
220			/* Setup the map methods */
221			simple_map_init(&map->map);
222
223			/* Try all of the probe methods */
224			probe_type = rom_probe_types;
225			for(; *probe_type; probe_type++) {
226				map->mtd = do_map_probe(*probe_type, &map->map);
227				if (map->mtd)
228					goto found;
229			}
230		}
231		map_top += ROM_PROBE_STEP_SIZE;
232		continue;
233	found:
234		/* Trim the size if we are larger than the map */
235		if (map->mtd->size > map->map.size) {
236			printk(KERN_WARNING MOD_NAME
237				" rom(%u) larger than window(%lu). fixing...\n",
238				map->mtd->size, map->map.size);
239			map->mtd->size = map->map.size;
240		}
241		if (window->rsrc.parent) {
242			/*
243			 * Registering the MTD device in iomem may not be possible
244			 * if there is a BIOS "reserved" and BUSY range.  If this
245			 * fails then continue anyway.
246			 */
247			map->rsrc.name  = map->map_name;
248			map->rsrc.start = map->map.phys;
249			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
250			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
251			if (request_resource(&window->rsrc, &map->rsrc)) {
252				printk(KERN_ERR MOD_NAME
253					": cannot reserve MTD resource\n");
254				map->rsrc.parent = NULL;
255			}
256		}
257
258		/* Make the whole region visible in the map */
259		map->map.virt = window->virt;
260		map->map.phys = window->phys;
261		cfi = map->map.fldrv_priv;
262		for(i = 0; i < cfi->numchips; i++) {
263			cfi->chips[i].start += offset;
264		}
265
266		/* Now that the mtd devices is complete claim and export it */
267		map->mtd->owner = THIS_MODULE;
268		if (add_mtd_device(map->mtd)) {
269			map_destroy(map->mtd);
270			map->mtd = NULL;
271			goto out;
272		}
273
274
275		/* Calculate the new value of map_top */
276		map_top += map->mtd->size;
277
278		/* File away the map structure */
279		list_add(&map->list, &window->maps);
280		map = NULL;
281	}
282
283 out:
284	/* Free any left over map structures */
285	kfree(map);
286	/* See if I have any map structures */
287	if (list_empty(&window->maps)) {
288		amd76xrom_cleanup(window);
289		return -ENODEV;
290	}
291	return 0;
292}
293
294
295static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
296{
297	struct amd76xrom_window *window = &amd76xrom_window;
298
299	amd76xrom_cleanup(window);
300}
301
302static struct pci_device_id amd76xrom_pci_tbl[] = {
303	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
304		PCI_ANY_ID, PCI_ANY_ID, },
305	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
306		PCI_ANY_ID, PCI_ANY_ID, },
307	{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
308	{ 0, }
309};
310
311MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
312
313#if 0
314static struct pci_driver amd76xrom_driver = {
315	.name =		MOD_NAME,
316	.id_table =	amd76xrom_pci_tbl,
317	.probe =	amd76xrom_init_one,
318	.remove =	amd76xrom_remove_one,
319};
320#endif
321
322static int __init init_amd76xrom(void)
323{
324	struct pci_dev *pdev;
325	struct pci_device_id *id;
326	pdev = NULL;
327	for(id = amd76xrom_pci_tbl; id->vendor; id++) {
328		pdev = pci_get_device(id->vendor, id->device, NULL);
329		if (pdev) {
330			break;
331		}
332	}
333	if (pdev) {
334		return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
335	}
336	return -ENXIO;
337#if 0
338	return pci_register_driver(&amd76xrom_driver);
339#endif
340}
341
342static void __exit cleanup_amd76xrom(void)
343{
344	amd76xrom_remove_one(amd76xrom_window.pdev);
345}
346
347module_init(init_amd76xrom);
348module_exit(cleanup_amd76xrom);
349
350MODULE_LICENSE("GPL");
351MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
352MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");
353
354