amd76xrom.c revision dd8e9ed6ed544e2b924429d29cd2a6b55590109b
1/*
2 * amd76xrom.c
3 *
4 * Normal mappings of chips in physical memory
5 * $Id: amd76xrom.c,v 1.21 2005/11/07 11:14:26 gleixner Exp $
6 */
7
8#include <linux/module.h>
9#include <linux/types.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <asm/io.h>
13#include <linux/mtd/mtd.h>
14#include <linux/mtd/map.h>
15#include <linux/mtd/cfi.h>
16#include <linux/mtd/flashchip.h>
17#include <linux/pci.h>
18#include <linux/pci_ids.h>
19#include <linux/list.h>
20
21
22#define xstr(s) str(s)
23#define str(s) #s
24#define MOD_NAME xstr(KBUILD_BASENAME)
25
26#define ADDRESS_NAME_LEN 18
27
28#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
29
30struct amd76xrom_window {
31	void __iomem *virt;
32	unsigned long phys;
33	unsigned long size;
34	struct list_head maps;
35	struct resource rsrc;
36	struct pci_dev *pdev;
37};
38
39struct amd76xrom_map_info {
40	struct list_head list;
41	struct map_info map;
42	struct mtd_info *mtd;
43	struct resource rsrc;
44	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
45};
46
47static struct amd76xrom_window amd76xrom_window = {
48	.maps = LIST_HEAD_INIT(amd76xrom_window.maps),
49};
50
51static void amd76xrom_cleanup(struct amd76xrom_window *window)
52{
53	struct amd76xrom_map_info *map, *scratch;
54	u8 byte;
55
56	if (window->pdev) {
57		/* Disable writes through the rom window */
58		pci_read_config_byte(window->pdev, 0x40, &byte);
59		pci_write_config_byte(window->pdev, 0x40, byte & ~1);
60		pci_dev_put(window->pdev);
61	}
62
63	/* Free all of the mtd devices */
64	list_for_each_entry_safe(map, scratch, &window->maps, list) {
65		if (map->rsrc.parent) {
66			release_resource(&map->rsrc);
67		}
68		del_mtd_device(map->mtd);
69		map_destroy(map->mtd);
70		list_del(&map->list);
71		kfree(map);
72	}
73	if (window->rsrc.parent)
74		release_resource(&window->rsrc);
75
76	if (window->virt) {
77		iounmap(window->virt);
78		window->virt = NULL;
79		window->phys = 0;
80		window->size = 0;
81		window->pdev = NULL;
82	}
83}
84
85
86static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
87	const struct pci_device_id *ent)
88{
89	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
90	u8 byte;
91	struct amd76xrom_window *window = &amd76xrom_window;
92	struct amd76xrom_map_info *map = NULL;
93	unsigned long map_top;
94
95	/* Remember the pci dev I find the window in - already have a ref */
96	window->pdev = pdev;
97
98	/* Assume the rom window is properly setup, and find it's size */
99	pci_read_config_byte(pdev, 0x43, &byte);
100	if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
101		window->phys = 0xffb00000; /* 5MiB */
102	}
103	else if ((byte & (1<<7)) == (1<<7)) {
104		window->phys = 0xffc00000; /* 4MiB */
105	}
106	else {
107		window->phys = 0xffff0000; /* 64KiB */
108	}
109	window->size = 0xffffffffUL - window->phys + 1UL;
110
111	/*
112	 * Try to reserve the window mem region.  If this fails then
113	 * it is likely due to a fragment of the window being
114	 * "reseved" by the BIOS.  In the case that the
115	 * request_mem_region() fails then once the rom size is
116	 * discovered we will try to reserve the unreserved fragment.
117	 */
118	window->rsrc.name = MOD_NAME;
119	window->rsrc.start = window->phys;
120	window->rsrc.end   = window->phys + window->size - 1;
121	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
122	if (request_resource(&iomem_resource, &window->rsrc)) {
123		window->rsrc.parent = NULL;
124		printk(KERN_ERR MOD_NAME
125			" %s(): Unable to register resource"
126			" 0x%.16llx-0x%.16llx - kernel bug?\n",
127			__func__,
128			(unsigned long long)window->rsrc.start,
129			(unsigned long long)window->rsrc.end);
130	}
131
132#if 0
133
134	/* Enable the selected rom window */
135	pci_read_config_byte(pdev, 0x43, &byte);
136	pci_write_config_byte(pdev, 0x43, byte | rwindow->segen_bits);
137#endif
138
139	/* Enable writes through the rom window */
140	pci_read_config_byte(pdev, 0x40, &byte);
141	pci_write_config_byte(pdev, 0x40, byte | 1);
142
143	/* FIXME handle registers 0x80 - 0x8C the bios region locks */
144
145	/* For write accesses caches are useless */
146	window->virt = ioremap_nocache(window->phys, window->size);
147	if (!window->virt) {
148		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
149			window->phys, window->size);
150		goto out;
151	}
152
153	/* Get the first address to look for an rom chip at */
154	map_top = window->phys;
155#if 1
156	/* The probe sequence run over the firmware hub lock
157	 * registers sets them to 0x7 (no access).
158	 * Probe at most the last 4M of the address space.
159	 */
160	if (map_top < 0xffc00000) {
161		map_top = 0xffc00000;
162	}
163#endif
164	/* Loop  through and look for rom chips */
165	while((map_top - 1) < 0xffffffffUL) {
166		struct cfi_private *cfi;
167		unsigned long offset;
168		int i;
169
170		if (!map) {
171			map = kmalloc(sizeof(*map), GFP_KERNEL);
172		}
173		if (!map) {
174			printk(KERN_ERR MOD_NAME ": kmalloc failed");
175			goto out;
176		}
177		memset(map, 0, sizeof(*map));
178		INIT_LIST_HEAD(&map->list);
179		map->map.name = map->map_name;
180		map->map.phys = map_top;
181		offset = map_top - window->phys;
182		map->map.virt = (void __iomem *)
183			(((unsigned long)(window->virt)) + offset);
184		map->map.size = 0xffffffffUL - map_top + 1UL;
185		/* Set the name of the map to the address I am trying */
186		sprintf(map->map_name, "%s @%08lx",
187			MOD_NAME, map->map.phys);
188
189		/* There is no generic VPP support */
190		for(map->map.bankwidth = 32; map->map.bankwidth;
191			map->map.bankwidth >>= 1)
192		{
193			char **probe_type;
194			/* Skip bankwidths that are not supported */
195			if (!map_bankwidth_supported(map->map.bankwidth))
196				continue;
197
198			/* Setup the map methods */
199			simple_map_init(&map->map);
200
201			/* Try all of the probe methods */
202			probe_type = rom_probe_types;
203			for(; *probe_type; probe_type++) {
204				map->mtd = do_map_probe(*probe_type, &map->map);
205				if (map->mtd)
206					goto found;
207			}
208		}
209		map_top += ROM_PROBE_STEP_SIZE;
210		continue;
211	found:
212		/* Trim the size if we are larger than the map */
213		if (map->mtd->size > map->map.size) {
214			printk(KERN_WARNING MOD_NAME
215				" rom(%u) larger than window(%lu). fixing...\n",
216				map->mtd->size, map->map.size);
217			map->mtd->size = map->map.size;
218		}
219		if (window->rsrc.parent) {
220			/*
221			 * Registering the MTD device in iomem may not be possible
222			 * if there is a BIOS "reserved" and BUSY range.  If this
223			 * fails then continue anyway.
224			 */
225			map->rsrc.name  = map->map_name;
226			map->rsrc.start = map->map.phys;
227			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
228			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
229			if (request_resource(&window->rsrc, &map->rsrc)) {
230				printk(KERN_ERR MOD_NAME
231					": cannot reserve MTD resource\n");
232				map->rsrc.parent = NULL;
233			}
234		}
235
236		/* Make the whole region visible in the map */
237		map->map.virt = window->virt;
238		map->map.phys = window->phys;
239		cfi = map->map.fldrv_priv;
240		for(i = 0; i < cfi->numchips; i++) {
241			cfi->chips[i].start += offset;
242		}
243
244		/* Now that the mtd devices is complete claim and export it */
245		map->mtd->owner = THIS_MODULE;
246		if (add_mtd_device(map->mtd)) {
247			map_destroy(map->mtd);
248			map->mtd = NULL;
249			goto out;
250		}
251
252
253		/* Calculate the new value of map_top */
254		map_top += map->mtd->size;
255
256		/* File away the map structure */
257		list_add(&map->list, &window->maps);
258		map = NULL;
259	}
260
261 out:
262	/* Free any left over map structures */
263	kfree(map);
264	/* See if I have any map structures */
265	if (list_empty(&window->maps)) {
266		amd76xrom_cleanup(window);
267		return -ENODEV;
268	}
269	return 0;
270}
271
272
273static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
274{
275	struct amd76xrom_window *window = &amd76xrom_window;
276
277	amd76xrom_cleanup(window);
278}
279
280static struct pci_device_id amd76xrom_pci_tbl[] = {
281	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
282		PCI_ANY_ID, PCI_ANY_ID, },
283	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
284		PCI_ANY_ID, PCI_ANY_ID, },
285	{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
286	{ 0, }
287};
288
289MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
290
291#if 0
292static struct pci_driver amd76xrom_driver = {
293	.name =		MOD_NAME,
294	.id_table =	amd76xrom_pci_tbl,
295	.probe =	amd76xrom_init_one,
296	.remove =	amd76xrom_remove_one,
297};
298#endif
299
300static int __init init_amd76xrom(void)
301{
302	struct pci_dev *pdev;
303	struct pci_device_id *id;
304	pdev = NULL;
305	for(id = amd76xrom_pci_tbl; id->vendor; id++) {
306		pdev = pci_get_device(id->vendor, id->device, NULL);
307		if (pdev) {
308			break;
309		}
310	}
311	if (pdev) {
312		return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
313	}
314	return -ENXIO;
315#if 0
316	return pci_register_driver(&amd76xrom_driver);
317#endif
318}
319
320static void __exit cleanup_amd76xrom(void)
321{
322	amd76xrom_remove_one(amd76xrom_window.pdev);
323}
324
325module_init(init_amd76xrom);
326module_exit(cleanup_amd76xrom);
327
328MODULE_LICENSE("GPL");
329MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
330MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");
331
332