c_can_pci.c revision 5fabc336fead7d62b22b1a59e45efd7adc5d2ea7 
1/*
2 * PCI bus driver for Bosch C_CAN/D_CAN controller
3 *
4 * Copyright (C) 2012 Federico Vaga <federico.vaga@gmail.com>
5 *
6 * Borrowed from c_can_platform.c
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/netdevice.h>
16#include <linux/pci.h>
17
18#include <linux/can/dev.h>
19
20#include "c_can.h"
21
22enum c_can_pci_reg_align {
23	C_CAN_REG_ALIGN_16,
24	C_CAN_REG_ALIGN_32,
25};
26
27struct c_can_pci_data {
28	/* Specify if is C_CAN or D_CAN */
29	enum c_can_dev_id type;
30	/* Set the register alignment in the memory */
31	enum c_can_pci_reg_align reg_align;
32	/* Set the frequency */
33	unsigned int freq;
34};
35
36/*
37 * 16-bit c_can registers can be arranged differently in the memory
38 * architecture of different implementations. For example: 16-bit
39 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
40 * Handle the same by providing a common read/write interface.
41 */
42static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,
43						enum reg index)
44{
45	return readw(priv->base + priv->regs[index]);
46}
47
48static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,
49						enum reg index, u16 val)
50{
51	writew(val, priv->base + priv->regs[index]);
52}
53
54static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,
55						enum reg index)
56{
57	return readw(priv->base + 2 * priv->regs[index]);
58}
59
60static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,
61						enum reg index, u16 val)
62{
63	writew(val, priv->base + 2 * priv->regs[index]);
64}
65
66static int c_can_pci_probe(struct pci_dev *pdev,
67			   const struct pci_device_id *ent)
68{
69	struct c_can_pci_data *c_can_pci_data = (void *)ent->driver_data;
70	struct c_can_priv *priv;
71	struct net_device *dev;
72	void __iomem *addr;
73	int ret;
74
75	ret = pci_enable_device(pdev);
76	if (ret) {
77		dev_err(&pdev->dev, "pci_enable_device FAILED\n");
78		goto out;
79	}
80
81	ret = pci_request_regions(pdev, KBUILD_MODNAME);
82	if (ret) {
83		dev_err(&pdev->dev, "pci_request_regions FAILED\n");
84		goto out_disable_device;
85	}
86
87	pci_set_master(pdev);
88	pci_enable_msi(pdev);
89
90	addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
91	if (!addr) {
92		dev_err(&pdev->dev,
93			"device has no PCI memory resources, "
94			"failing adapter\n");
95		ret = -ENOMEM;
96		goto out_release_regions;
97	}
98
99	/* allocate the c_can device */
100	dev = alloc_c_can_dev();
101	if (!dev) {
102		ret = -ENOMEM;
103		goto out_iounmap;
104	}
105
106	priv = netdev_priv(dev);
107	pci_set_drvdata(pdev, dev);
108	SET_NETDEV_DEV(dev, &pdev->dev);
109
110	dev->irq = pdev->irq;
111	priv->base = addr;
112
113	if (!c_can_pci_data->freq) {
114		dev_err(&pdev->dev, "no clock frequency defined\n");
115		ret = -ENODEV;
116		goto out_free_c_can;
117	} else {
118		priv->can.clock.freq = c_can_pci_data->freq;
119	}
120
121	/* Configure CAN type */
122	switch (c_can_pci_data->type) {
123	case BOSCH_C_CAN:
124		priv->regs = reg_map_c_can;
125		break;
126	case BOSCH_D_CAN:
127		priv->regs = reg_map_d_can;
128		priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
129		break;
130	default:
131		ret = -EINVAL;
132		goto out_free_c_can;
133	}
134
135	/* Configure access to registers */
136	switch (c_can_pci_data->reg_align) {
137	case C_CAN_REG_ALIGN_32:
138		priv->read_reg = c_can_pci_read_reg_aligned_to_32bit;
139		priv->write_reg = c_can_pci_write_reg_aligned_to_32bit;
140		break;
141	case C_CAN_REG_ALIGN_16:
142		priv->read_reg = c_can_pci_read_reg_aligned_to_16bit;
143		priv->write_reg = c_can_pci_write_reg_aligned_to_16bit;
144		break;
145	default:
146		ret = -EINVAL;
147		goto out_free_c_can;
148	}
149
150	ret = register_c_can_dev(dev);
151	if (ret) {
152		dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
153			KBUILD_MODNAME, ret);
154		goto out_free_c_can;
155	}
156
157	dev_dbg(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
158		 KBUILD_MODNAME, priv->regs, dev->irq);
159
160	return 0;
161
162out_free_c_can:
163	free_c_can_dev(dev);
164out_iounmap:
165	pci_iounmap(pdev, addr);
166out_release_regions:
167	pci_disable_msi(pdev);
168	pci_clear_master(pdev);
169	pci_release_regions(pdev);
170out_disable_device:
171	pci_disable_device(pdev);
172out:
173	return ret;
174}
175
176static void c_can_pci_remove(struct pci_dev *pdev)
177{
178	struct net_device *dev = pci_get_drvdata(pdev);
179	struct c_can_priv *priv = netdev_priv(dev);
180
181	unregister_c_can_dev(dev);
182
183	free_c_can_dev(dev);
184
185	pci_iounmap(pdev, priv->base);
186	pci_disable_msi(pdev);
187	pci_clear_master(pdev);
188	pci_release_regions(pdev);
189	pci_disable_device(pdev);
190}
191
192static struct c_can_pci_data c_can_sta2x11= {
193	.type = BOSCH_C_CAN,
194	.reg_align = C_CAN_REG_ALIGN_32,
195	.freq = 52000000, /* 52 Mhz */
196};
197
198#define C_CAN_ID(_vend, _dev, _driverdata) {		\
199	PCI_DEVICE(_vend, _dev),			\
200	.driver_data = (unsigned long)&_driverdata,	\
201}
202static DEFINE_PCI_DEVICE_TABLE(c_can_pci_tbl) = {
203	C_CAN_ID(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_CAN,
204		 c_can_sta2x11),
205	{},
206};
207static struct pci_driver c_can_pci_driver = {
208	.name = KBUILD_MODNAME,
209	.id_table = c_can_pci_tbl,
210	.probe = c_can_pci_probe,
211	.remove = c_can_pci_remove,
212};
213
214module_pci_driver(c_can_pci_driver);
215
216MODULE_AUTHOR("Federico Vaga <federico.vaga@gmail.com>");
217MODULE_LICENSE("GPL v2");
218MODULE_DESCRIPTION("PCI CAN bus driver for Bosch C_CAN/D_CAN controller");
219MODULE_DEVICE_TABLE(pci, c_can_pci_tbl);
220