c_can_platform.c revision 33f8100977693fa09c2a32b1ca6dbf4d6eabdd0c 
1/*
2 * Platform CAN bus driver for Bosch C_CAN controller
3 *
4 * Copyright (C) 2010 ST Microelectronics
5 * Bhupesh Sharma <bhupesh.sharma@st.com>
6 *
7 * Borrowed heavily from the C_CAN driver originally written by:
8 * Copyright (C) 2007
9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
11 *
12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
13 * Bosch C_CAN user manual can be obtained from:
14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
15 * users_manual_c_can.pdf
16 *
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/if_arp.h>
28#include <linux/if_ether.h>
29#include <linux/list.h>
30#include <linux/io.h>
31#include <linux/platform_device.h>
32#include <linux/clk.h>
33
34#include <linux/can/dev.h>
35
36#include "c_can.h"
37
38/*
39 * 16-bit c_can registers can be arranged differently in the memory
40 * architecture of different implementations. For example: 16-bit
41 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
42 * Handle the same by providing a common read/write interface.
43 */
44static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
45						enum reg index)
46{
47	return readw(priv->base + priv->regs[index]);
48}
49
50static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
51						enum reg index, u16 val)
52{
53	writew(val, priv->base + priv->regs[index]);
54}
55
56static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
57						enum reg index)
58{
59	return readw(priv->base + 2 * priv->regs[index]);
60}
61
62static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
63						enum reg index, u16 val)
64{
65	writew(val, priv->base + 2 * priv->regs[index]);
66}
67
68static int __devinit c_can_plat_probe(struct platform_device *pdev)
69{
70	int ret;
71	void __iomem *addr;
72	struct net_device *dev;
73	struct c_can_priv *priv;
74	struct resource *mem;
75	int irq;
76#ifdef CONFIG_HAVE_CLK
77	struct clk *clk;
78
79	/* get the appropriate clk */
80	clk = clk_get(&pdev->dev, NULL);
81	if (IS_ERR(clk)) {
82		dev_err(&pdev->dev, "no clock defined\n");
83		ret = -ENODEV;
84		goto exit;
85	}
86#endif
87
88	/* get the platform data */
89	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
90	irq = platform_get_irq(pdev, 0);
91	if (!mem || irq <= 0) {
92		ret = -ENODEV;
93		goto exit_free_clk;
94	}
95
96	if (!request_mem_region(mem->start, resource_size(mem),
97				KBUILD_MODNAME)) {
98		dev_err(&pdev->dev, "resource unavailable\n");
99		ret = -ENODEV;
100		goto exit_free_clk;
101	}
102
103	addr = ioremap(mem->start, resource_size(mem));
104	if (!addr) {
105		dev_err(&pdev->dev, "failed to map can port\n");
106		ret = -ENOMEM;
107		goto exit_release_mem;
108	}
109
110	/* allocate the c_can device */
111	dev = alloc_c_can_dev();
112	if (!dev) {
113		ret = -ENOMEM;
114		goto exit_iounmap;
115	}
116
117	priv = netdev_priv(dev);
118	priv->regs = reg_map_c_can;
119
120	dev->irq = irq;
121	priv->base = addr;
122#ifdef CONFIG_HAVE_CLK
123	priv->can.clock.freq = clk_get_rate(clk);
124	priv->priv = clk;
125#endif
126
127	switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
128	case IORESOURCE_MEM_32BIT:
129		priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
130		priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
131		break;
132	case IORESOURCE_MEM_16BIT:
133	default:
134		priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
135		priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
136		break;
137	}
138
139	platform_set_drvdata(pdev, dev);
140	SET_NETDEV_DEV(dev, &pdev->dev);
141
142	ret = register_c_can_dev(dev);
143	if (ret) {
144		dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
145			KBUILD_MODNAME, ret);
146		goto exit_free_device;
147	}
148
149	dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
150		 KBUILD_MODNAME, priv->base, dev->irq);
151	return 0;
152
153exit_free_device:
154	platform_set_drvdata(pdev, NULL);
155	free_c_can_dev(dev);
156exit_iounmap:
157	iounmap(addr);
158exit_release_mem:
159	release_mem_region(mem->start, resource_size(mem));
160exit_free_clk:
161#ifdef CONFIG_HAVE_CLK
162	clk_put(clk);
163exit:
164#endif
165	dev_err(&pdev->dev, "probe failed\n");
166
167	return ret;
168}
169
170static int __devexit c_can_plat_remove(struct platform_device *pdev)
171{
172	struct net_device *dev = platform_get_drvdata(pdev);
173	struct c_can_priv *priv = netdev_priv(dev);
174	struct resource *mem;
175
176	unregister_c_can_dev(dev);
177	platform_set_drvdata(pdev, NULL);
178
179	free_c_can_dev(dev);
180	iounmap(priv->base);
181
182	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183	release_mem_region(mem->start, resource_size(mem));
184
185#ifdef CONFIG_HAVE_CLK
186	clk_put(priv->priv);
187#endif
188
189	return 0;
190}
191
192static struct platform_driver c_can_plat_driver = {
193	.driver = {
194		.name = KBUILD_MODNAME,
195		.owner = THIS_MODULE,
196	},
197	.probe = c_can_plat_probe,
198	.remove = __devexit_p(c_can_plat_remove),
199};
200
201module_platform_driver(c_can_plat_driver);
202
203MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
204MODULE_LICENSE("GPL v2");
205MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");
206