janz-ican3.c revision 007890d726602c925077381500f0b633cfacd711
1/* 2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver 3 * 4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12#include <linux/kernel.h> 13#include <linux/module.h> 14#include <linux/init.h> 15#include <linux/interrupt.h> 16#include <linux/delay.h> 17#include <linux/platform_device.h> 18 19#include <linux/netdevice.h> 20#include <linux/can.h> 21#include <linux/can/dev.h> 22#include <linux/can/error.h> 23 24#include <linux/mfd/janz.h> 25#include <asm/io.h> 26 27/* the DPM has 64k of memory, organized into 256x 256 byte pages */ 28#define DPM_NUM_PAGES 256 29#define DPM_PAGE_SIZE 256 30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE) 31 32/* JANZ ICAN3 "old-style" host interface queue page numbers */ 33#define QUEUE_OLD_CONTROL 0 34#define QUEUE_OLD_RB0 1 35#define QUEUE_OLD_RB1 2 36#define QUEUE_OLD_WB0 3 37#define QUEUE_OLD_WB1 4 38 39/* Janz ICAN3 "old-style" host interface control registers */ 40#define MSYNC_PEER 0x00 /* ICAN only */ 41#define MSYNC_LOCL 0x01 /* host only */ 42#define TARGET_RUNNING 0x02 43 44#define MSYNC_RB0 0x01 45#define MSYNC_RB1 0x02 46#define MSYNC_RBLW 0x04 47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1) 48 49#define MSYNC_WB0 0x10 50#define MSYNC_WB1 0x20 51#define MSYNC_WBLW 0x40 52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1) 53 54/* Janz ICAN3 "new-style" host interface queue page numbers */ 55#define QUEUE_TOHOST 5 56#define QUEUE_FROMHOST_MID 6 57#define QUEUE_FROMHOST_HIGH 7 58#define QUEUE_FROMHOST_LOW 8 59 60/* The first free page in the DPM is #9 */ 61#define DPM_FREE_START 9 62 63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */ 64#define DESC_VALID 0x80 65#define DESC_WRAP 0x40 66#define DESC_INTERRUPT 0x20 67#define DESC_IVALID 0x10 68#define DESC_LEN(len) (len) 69 70/* Janz ICAN3 Firmware Messages */ 71#define MSG_CONNECTI 0x02 72#define MSG_DISCONNECT 0x03 73#define MSG_IDVERS 0x04 74#define MSG_MSGLOST 0x05 75#define MSG_NEWHOSTIF 0x08 76#define MSG_INQUIRY 0x0a 77#define MSG_SETAFILMASK 0x10 78#define MSG_INITFDPMQUEUE 0x11 79#define MSG_HWCONF 0x12 80#define MSG_FMSGLOST 0x15 81#define MSG_CEVTIND 0x37 82#define MSG_CBTRREQ 0x41 83#define MSG_COFFREQ 0x42 84#define MSG_CONREQ 0x43 85#define MSG_CCONFREQ 0x47 86 87/* 88 * Janz ICAN3 CAN Inquiry Message Types 89 * 90 * NOTE: there appears to be a firmware bug here. You must send 91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED 92 * NOTE: response. The controller never responds to a message with 93 * NOTE: the INQUIRY_EXTENDED subspec :( 94 */ 95#define INQUIRY_STATUS 0x00 96#define INQUIRY_TERMINATION 0x01 97#define INQUIRY_EXTENDED 0x04 98 99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */ 100#define SETAFILMASK_REJECT 0x00 101#define SETAFILMASK_FASTIF 0x02 102 103/* Janz ICAN3 CAN Hardware Configuration Message Types */ 104#define HWCONF_TERMINATE_ON 0x01 105#define HWCONF_TERMINATE_OFF 0x00 106 107/* Janz ICAN3 CAN Event Indication Message Types */ 108#define CEVTIND_EI 0x01 109#define CEVTIND_DOI 0x02 110#define CEVTIND_LOST 0x04 111#define CEVTIND_FULL 0x08 112#define CEVTIND_BEI 0x10 113 114#define CEVTIND_CHIP_SJA1000 0x02 115 116#define ICAN3_BUSERR_QUOTA_MAX 255 117 118/* Janz ICAN3 CAN Frame Conversion */ 119#define ICAN3_ECHO 0x10 120#define ICAN3_EFF_RTR 0x40 121#define ICAN3_SFF_RTR 0x10 122#define ICAN3_EFF 0x80 123 124#define ICAN3_CAN_TYPE_MASK 0x0f 125#define ICAN3_CAN_TYPE_SFF 0x00 126#define ICAN3_CAN_TYPE_EFF 0x01 127 128#define ICAN3_CAN_DLC_MASK 0x0f 129 130/* 131 * SJA1000 Status and Error Register Definitions 132 * 133 * Copied from drivers/net/can/sja1000/sja1000.h 134 */ 135 136/* status register content */ 137#define SR_BS 0x80 138#define SR_ES 0x40 139#define SR_TS 0x20 140#define SR_RS 0x10 141#define SR_TCS 0x08 142#define SR_TBS 0x04 143#define SR_DOS 0x02 144#define SR_RBS 0x01 145 146#define SR_CRIT (SR_BS|SR_ES) 147 148/* ECC register */ 149#define ECC_SEG 0x1F 150#define ECC_DIR 0x20 151#define ECC_ERR 6 152#define ECC_BIT 0x00 153#define ECC_FORM 0x40 154#define ECC_STUFF 0x80 155#define ECC_MASK 0xc0 156 157/* Number of buffers for use in the "new-style" host interface */ 158#define ICAN3_NEW_BUFFERS 16 159 160/* Number of buffers for use in the "fast" host interface */ 161#define ICAN3_TX_BUFFERS 512 162#define ICAN3_RX_BUFFERS 1024 163 164/* SJA1000 Clock Input */ 165#define ICAN3_CAN_CLOCK 8000000 166 167/* Driver Name */ 168#define DRV_NAME "janz-ican3" 169 170/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */ 171struct ican3_dpm_control { 172 /* window address register */ 173 u8 window_address; 174 u8 unused1; 175 176 /* 177 * Read access: clear interrupt from microcontroller 178 * Write access: send interrupt to microcontroller 179 */ 180 u8 interrupt; 181 u8 unused2; 182 183 /* write-only: reset all hardware on the module */ 184 u8 hwreset; 185 u8 unused3; 186 187 /* write-only: generate an interrupt to the TPU */ 188 u8 tpuinterrupt; 189}; 190 191struct ican3_dev { 192 193 /* must be the first member */ 194 struct can_priv can; 195 196 /* CAN network device */ 197 struct net_device *ndev; 198 struct napi_struct napi; 199 200 /* Device for printing */ 201 struct device *dev; 202 203 /* module number */ 204 unsigned int num; 205 206 /* base address of registers and IRQ */ 207 struct janz_cmodio_onboard_regs __iomem *ctrl; 208 struct ican3_dpm_control __iomem *dpmctrl; 209 void __iomem *dpm; 210 int irq; 211 212 /* CAN bus termination status */ 213 struct completion termination_comp; 214 bool termination_enabled; 215 216 /* CAN bus error status registers */ 217 struct completion buserror_comp; 218 struct can_berr_counter bec; 219 220 /* old and new style host interface */ 221 unsigned int iftype; 222 223 /* 224 * Any function which changes the current DPM page must hold this 225 * lock while it is performing data accesses. This ensures that the 226 * function will not be preempted and end up reading data from a 227 * different DPM page than it expects. 228 */ 229 spinlock_t lock; 230 231 /* new host interface */ 232 unsigned int rx_int; 233 unsigned int rx_num; 234 unsigned int tx_num; 235 236 /* fast host interface */ 237 unsigned int fastrx_start; 238 unsigned int fastrx_num; 239 unsigned int fasttx_start; 240 unsigned int fasttx_num; 241 242 /* first free DPM page */ 243 unsigned int free_page; 244}; 245 246struct ican3_msg { 247 u8 control; 248 u8 spec; 249 __le16 len; 250 u8 data[252]; 251}; 252 253struct ican3_new_desc { 254 u8 control; 255 u8 pointer; 256}; 257 258struct ican3_fast_desc { 259 u8 control; 260 u8 command; 261 u8 data[14]; 262}; 263 264/* write to the window basic address register */ 265static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page) 266{ 267 BUG_ON(page >= DPM_NUM_PAGES); 268 iowrite8(page, &mod->dpmctrl->window_address); 269} 270 271/* 272 * ICAN3 "old-style" host interface 273 */ 274 275/* 276 * Receive a message from the ICAN3 "old-style" firmware interface 277 * 278 * LOCKING: must hold mod->lock 279 * 280 * returns 0 on success, -ENOMEM when no message exists 281 */ 282static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 283{ 284 unsigned int mbox, mbox_page; 285 u8 locl, peer, xord; 286 287 /* get the MSYNC registers */ 288 ican3_set_page(mod, QUEUE_OLD_CONTROL); 289 peer = ioread8(mod->dpm + MSYNC_PEER); 290 locl = ioread8(mod->dpm + MSYNC_LOCL); 291 xord = locl ^ peer; 292 293 if ((xord & MSYNC_RB_MASK) == 0x00) { 294 dev_dbg(mod->dev, "no mbox for reading\n"); 295 return -ENOMEM; 296 } 297 298 /* find the first free mbox to read */ 299 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK) 300 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1; 301 else 302 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1; 303 304 /* copy the message */ 305 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1; 306 ican3_set_page(mod, mbox_page); 307 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 308 309 /* 310 * notify the firmware that the read buffer is available 311 * for it to fill again 312 */ 313 locl ^= mbox; 314 315 ican3_set_page(mod, QUEUE_OLD_CONTROL); 316 iowrite8(locl, mod->dpm + MSYNC_LOCL); 317 return 0; 318} 319 320/* 321 * Send a message through the "old-style" firmware interface 322 * 323 * LOCKING: must hold mod->lock 324 * 325 * returns 0 on success, -ENOMEM when no free space exists 326 */ 327static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 328{ 329 unsigned int mbox, mbox_page; 330 u8 locl, peer, xord; 331 332 /* get the MSYNC registers */ 333 ican3_set_page(mod, QUEUE_OLD_CONTROL); 334 peer = ioread8(mod->dpm + MSYNC_PEER); 335 locl = ioread8(mod->dpm + MSYNC_LOCL); 336 xord = locl ^ peer; 337 338 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) { 339 dev_err(mod->dev, "no mbox for writing\n"); 340 return -ENOMEM; 341 } 342 343 /* calculate a free mbox to use */ 344 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0; 345 346 /* copy the message to the DPM */ 347 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1; 348 ican3_set_page(mod, mbox_page); 349 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 350 351 locl ^= mbox; 352 if (mbox == MSYNC_WB1) 353 locl |= MSYNC_WBLW; 354 355 ican3_set_page(mod, QUEUE_OLD_CONTROL); 356 iowrite8(locl, mod->dpm + MSYNC_LOCL); 357 return 0; 358} 359 360/* 361 * ICAN3 "new-style" Host Interface Setup 362 */ 363 364static void __devinit ican3_init_new_host_interface(struct ican3_dev *mod) 365{ 366 struct ican3_new_desc desc; 367 unsigned long flags; 368 void __iomem *dst; 369 int i; 370 371 spin_lock_irqsave(&mod->lock, flags); 372 373 /* setup the internal datastructures for RX */ 374 mod->rx_num = 0; 375 mod->rx_int = 0; 376 377 /* tohost queue descriptors are in page 5 */ 378 ican3_set_page(mod, QUEUE_TOHOST); 379 dst = mod->dpm; 380 381 /* initialize the tohost (rx) queue descriptors: pages 9-24 */ 382 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 383 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */ 384 desc.pointer = mod->free_page; 385 386 /* set wrap flag on last buffer */ 387 if (i == ICAN3_NEW_BUFFERS - 1) 388 desc.control |= DESC_WRAP; 389 390 memcpy_toio(dst, &desc, sizeof(desc)); 391 dst += sizeof(desc); 392 mod->free_page++; 393 } 394 395 /* fromhost (tx) mid queue descriptors are in page 6 */ 396 ican3_set_page(mod, QUEUE_FROMHOST_MID); 397 dst = mod->dpm; 398 399 /* setup the internal datastructures for TX */ 400 mod->tx_num = 0; 401 402 /* initialize the fromhost mid queue descriptors: pages 25-40 */ 403 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 404 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */ 405 desc.pointer = mod->free_page; 406 407 /* set wrap flag on last buffer */ 408 if (i == ICAN3_NEW_BUFFERS - 1) 409 desc.control |= DESC_WRAP; 410 411 memcpy_toio(dst, &desc, sizeof(desc)); 412 dst += sizeof(desc); 413 mod->free_page++; 414 } 415 416 /* fromhost hi queue descriptors are in page 7 */ 417 ican3_set_page(mod, QUEUE_FROMHOST_HIGH); 418 dst = mod->dpm; 419 420 /* initialize only a single buffer in the fromhost hi queue (unused) */ 421 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 422 desc.pointer = mod->free_page; 423 memcpy_toio(dst, &desc, sizeof(desc)); 424 mod->free_page++; 425 426 /* fromhost low queue descriptors are in page 8 */ 427 ican3_set_page(mod, QUEUE_FROMHOST_LOW); 428 dst = mod->dpm; 429 430 /* initialize only a single buffer in the fromhost low queue (unused) */ 431 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 432 desc.pointer = mod->free_page; 433 memcpy_toio(dst, &desc, sizeof(desc)); 434 mod->free_page++; 435 436 spin_unlock_irqrestore(&mod->lock, flags); 437} 438 439/* 440 * ICAN3 Fast Host Interface Setup 441 */ 442 443static void __devinit ican3_init_fast_host_interface(struct ican3_dev *mod) 444{ 445 struct ican3_fast_desc desc; 446 unsigned long flags; 447 unsigned int addr; 448 void __iomem *dst; 449 int i; 450 451 spin_lock_irqsave(&mod->lock, flags); 452 453 /* save the start recv page */ 454 mod->fastrx_start = mod->free_page; 455 mod->fastrx_num = 0; 456 457 /* build a single fast tohost queue descriptor */ 458 memset(&desc, 0, sizeof(desc)); 459 desc.control = 0x00; 460 desc.command = 1; 461 462 /* build the tohost queue descriptor ring in memory */ 463 addr = 0; 464 for (i = 0; i < ICAN3_RX_BUFFERS; i++) { 465 466 /* set the wrap bit on the last buffer */ 467 if (i == ICAN3_RX_BUFFERS - 1) 468 desc.control |= DESC_WRAP; 469 470 /* switch to the correct page */ 471 ican3_set_page(mod, mod->free_page); 472 473 /* copy the descriptor to the DPM */ 474 dst = mod->dpm + addr; 475 memcpy_toio(dst, &desc, sizeof(desc)); 476 addr += sizeof(desc); 477 478 /* move to the next page if necessary */ 479 if (addr >= DPM_PAGE_SIZE) { 480 addr = 0; 481 mod->free_page++; 482 } 483 } 484 485 /* make sure we page-align the next queue */ 486 if (addr != 0) 487 mod->free_page++; 488 489 /* save the start xmit page */ 490 mod->fasttx_start = mod->free_page; 491 mod->fasttx_num = 0; 492 493 /* build a single fast fromhost queue descriptor */ 494 memset(&desc, 0, sizeof(desc)); 495 desc.control = DESC_VALID; 496 desc.command = 1; 497 498 /* build the fromhost queue descriptor ring in memory */ 499 addr = 0; 500 for (i = 0; i < ICAN3_TX_BUFFERS; i++) { 501 502 /* set the wrap bit on the last buffer */ 503 if (i == ICAN3_TX_BUFFERS - 1) 504 desc.control |= DESC_WRAP; 505 506 /* switch to the correct page */ 507 ican3_set_page(mod, mod->free_page); 508 509 /* copy the descriptor to the DPM */ 510 dst = mod->dpm + addr; 511 memcpy_toio(dst, &desc, sizeof(desc)); 512 addr += sizeof(desc); 513 514 /* move to the next page if necessary */ 515 if (addr >= DPM_PAGE_SIZE) { 516 addr = 0; 517 mod->free_page++; 518 } 519 } 520 521 spin_unlock_irqrestore(&mod->lock, flags); 522} 523 524/* 525 * ICAN3 "new-style" Host Interface Message Helpers 526 */ 527 528/* 529 * LOCKING: must hold mod->lock 530 */ 531static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 532{ 533 struct ican3_new_desc desc; 534 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc)); 535 536 /* switch to the fromhost mid queue, and read the buffer descriptor */ 537 ican3_set_page(mod, QUEUE_FROMHOST_MID); 538 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 539 540 if (!(desc.control & DESC_VALID)) { 541 dev_dbg(mod->dev, "%s: no free buffers\n", __func__); 542 return -ENOMEM; 543 } 544 545 /* switch to the data page, copy the data */ 546 ican3_set_page(mod, desc.pointer); 547 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 548 549 /* switch back to the descriptor, set the valid bit, write it back */ 550 ican3_set_page(mod, QUEUE_FROMHOST_MID); 551 desc.control ^= DESC_VALID; 552 memcpy_toio(desc_addr, &desc, sizeof(desc)); 553 554 /* update the tx number */ 555 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1); 556 return 0; 557} 558 559/* 560 * LOCKING: must hold mod->lock 561 */ 562static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 563{ 564 struct ican3_new_desc desc; 565 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc)); 566 567 /* switch to the tohost queue, and read the buffer descriptor */ 568 ican3_set_page(mod, QUEUE_TOHOST); 569 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 570 571 if (!(desc.control & DESC_VALID)) { 572 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__); 573 return -ENOMEM; 574 } 575 576 /* switch to the data page, copy the data */ 577 ican3_set_page(mod, desc.pointer); 578 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 579 580 /* switch back to the descriptor, toggle the valid bit, write it back */ 581 ican3_set_page(mod, QUEUE_TOHOST); 582 desc.control ^= DESC_VALID; 583 memcpy_toio(desc_addr, &desc, sizeof(desc)); 584 585 /* update the rx number */ 586 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1); 587 return 0; 588} 589 590/* 591 * Message Send / Recv Helpers 592 */ 593 594static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 595{ 596 unsigned long flags; 597 int ret; 598 599 spin_lock_irqsave(&mod->lock, flags); 600 601 if (mod->iftype == 0) 602 ret = ican3_old_send_msg(mod, msg); 603 else 604 ret = ican3_new_send_msg(mod, msg); 605 606 spin_unlock_irqrestore(&mod->lock, flags); 607 return ret; 608} 609 610static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 611{ 612 unsigned long flags; 613 int ret; 614 615 spin_lock_irqsave(&mod->lock, flags); 616 617 if (mod->iftype == 0) 618 ret = ican3_old_recv_msg(mod, msg); 619 else 620 ret = ican3_new_recv_msg(mod, msg); 621 622 spin_unlock_irqrestore(&mod->lock, flags); 623 return ret; 624} 625 626/* 627 * Quick Pre-constructed Messages 628 */ 629 630static int __devinit ican3_msg_connect(struct ican3_dev *mod) 631{ 632 struct ican3_msg msg; 633 634 memset(&msg, 0, sizeof(msg)); 635 msg.spec = MSG_CONNECTI; 636 msg.len = cpu_to_le16(0); 637 638 return ican3_send_msg(mod, &msg); 639} 640 641static int __devexit ican3_msg_disconnect(struct ican3_dev *mod) 642{ 643 struct ican3_msg msg; 644 645 memset(&msg, 0, sizeof(msg)); 646 msg.spec = MSG_DISCONNECT; 647 msg.len = cpu_to_le16(0); 648 649 return ican3_send_msg(mod, &msg); 650} 651 652static int __devinit ican3_msg_newhostif(struct ican3_dev *mod) 653{ 654 struct ican3_msg msg; 655 int ret; 656 657 memset(&msg, 0, sizeof(msg)); 658 msg.spec = MSG_NEWHOSTIF; 659 msg.len = cpu_to_le16(0); 660 661 /* If we're not using the old interface, switching seems bogus */ 662 WARN_ON(mod->iftype != 0); 663 664 ret = ican3_send_msg(mod, &msg); 665 if (ret) 666 return ret; 667 668 /* mark the module as using the new host interface */ 669 mod->iftype = 1; 670 return 0; 671} 672 673static int __devinit ican3_msg_fasthostif(struct ican3_dev *mod) 674{ 675 struct ican3_msg msg; 676 unsigned int addr; 677 678 memset(&msg, 0, sizeof(msg)); 679 msg.spec = MSG_INITFDPMQUEUE; 680 msg.len = cpu_to_le16(8); 681 682 /* write the tohost queue start address */ 683 addr = DPM_PAGE_ADDR(mod->fastrx_start); 684 msg.data[0] = addr & 0xff; 685 msg.data[1] = (addr >> 8) & 0xff; 686 msg.data[2] = (addr >> 16) & 0xff; 687 msg.data[3] = (addr >> 24) & 0xff; 688 689 /* write the fromhost queue start address */ 690 addr = DPM_PAGE_ADDR(mod->fasttx_start); 691 msg.data[4] = addr & 0xff; 692 msg.data[5] = (addr >> 8) & 0xff; 693 msg.data[6] = (addr >> 16) & 0xff; 694 msg.data[7] = (addr >> 24) & 0xff; 695 696 /* If we're not using the new interface yet, we cannot do this */ 697 WARN_ON(mod->iftype != 1); 698 699 return ican3_send_msg(mod, &msg); 700} 701 702/* 703 * Setup the CAN filter to either accept or reject all 704 * messages from the CAN bus. 705 */ 706static int __devinit ican3_set_id_filter(struct ican3_dev *mod, bool accept) 707{ 708 struct ican3_msg msg; 709 int ret; 710 711 /* Standard Frame Format */ 712 memset(&msg, 0, sizeof(msg)); 713 msg.spec = MSG_SETAFILMASK; 714 msg.len = cpu_to_le16(5); 715 msg.data[0] = 0x00; /* IDLo LSB */ 716 msg.data[1] = 0x00; /* IDLo MSB */ 717 msg.data[2] = 0xff; /* IDHi LSB */ 718 msg.data[3] = 0x07; /* IDHi MSB */ 719 720 /* accept all frames for fast host if, or reject all frames */ 721 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 722 723 ret = ican3_send_msg(mod, &msg); 724 if (ret) 725 return ret; 726 727 /* Extended Frame Format */ 728 memset(&msg, 0, sizeof(msg)); 729 msg.spec = MSG_SETAFILMASK; 730 msg.len = cpu_to_le16(13); 731 msg.data[0] = 0; /* MUX = 0 */ 732 msg.data[1] = 0x00; /* IDLo LSB */ 733 msg.data[2] = 0x00; 734 msg.data[3] = 0x00; 735 msg.data[4] = 0x20; /* IDLo MSB */ 736 msg.data[5] = 0xff; /* IDHi LSB */ 737 msg.data[6] = 0xff; 738 msg.data[7] = 0xff; 739 msg.data[8] = 0x3f; /* IDHi MSB */ 740 741 /* accept all frames for fast host if, or reject all frames */ 742 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 743 744 return ican3_send_msg(mod, &msg); 745} 746 747/* 748 * Bring the CAN bus online or offline 749 */ 750static int ican3_set_bus_state(struct ican3_dev *mod, bool on) 751{ 752 struct ican3_msg msg; 753 754 memset(&msg, 0, sizeof(msg)); 755 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ; 756 msg.len = cpu_to_le16(0); 757 758 return ican3_send_msg(mod, &msg); 759} 760 761static int ican3_set_termination(struct ican3_dev *mod, bool on) 762{ 763 struct ican3_msg msg; 764 765 memset(&msg, 0, sizeof(msg)); 766 msg.spec = MSG_HWCONF; 767 msg.len = cpu_to_le16(2); 768 msg.data[0] = 0x00; 769 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF; 770 771 return ican3_send_msg(mod, &msg); 772} 773 774static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec) 775{ 776 struct ican3_msg msg; 777 778 memset(&msg, 0, sizeof(msg)); 779 msg.spec = MSG_INQUIRY; 780 msg.len = cpu_to_le16(2); 781 msg.data[0] = subspec; 782 msg.data[1] = 0x00; 783 784 return ican3_send_msg(mod, &msg); 785} 786 787static int ican3_set_buserror(struct ican3_dev *mod, u8 quota) 788{ 789 struct ican3_msg msg; 790 791 memset(&msg, 0, sizeof(msg)); 792 msg.spec = MSG_CCONFREQ; 793 msg.len = cpu_to_le16(2); 794 msg.data[0] = 0x00; 795 msg.data[1] = quota; 796 797 return ican3_send_msg(mod, &msg); 798} 799 800/* 801 * ICAN3 to Linux CAN Frame Conversion 802 */ 803 804static void ican3_to_can_frame(struct ican3_dev *mod, 805 struct ican3_fast_desc *desc, 806 struct can_frame *cf) 807{ 808 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) { 809 if (desc->data[1] & ICAN3_SFF_RTR) 810 cf->can_id |= CAN_RTR_FLAG; 811 812 cf->can_id |= desc->data[0] << 3; 813 cf->can_id |= (desc->data[1] & 0xe0) >> 5; 814 cf->can_dlc = desc->data[1] & ICAN3_CAN_DLC_MASK; 815 memcpy(cf->data, &desc->data[2], sizeof(cf->data)); 816 } else { 817 cf->can_dlc = desc->data[0] & ICAN3_CAN_DLC_MASK; 818 if (desc->data[0] & ICAN3_EFF_RTR) 819 cf->can_id |= CAN_RTR_FLAG; 820 821 if (desc->data[0] & ICAN3_EFF) { 822 cf->can_id |= CAN_EFF_FLAG; 823 cf->can_id |= desc->data[2] << 21; /* 28-21 */ 824 cf->can_id |= desc->data[3] << 13; /* 20-13 */ 825 cf->can_id |= desc->data[4] << 5; /* 12-5 */ 826 cf->can_id |= (desc->data[5] & 0xf8) >> 3; 827 } else { 828 cf->can_id |= desc->data[2] << 3; /* 10-3 */ 829 cf->can_id |= desc->data[3] >> 5; /* 2-0 */ 830 } 831 832 memcpy(cf->data, &desc->data[6], sizeof(cf->data)); 833 } 834} 835 836static void can_frame_to_ican3(struct ican3_dev *mod, 837 struct can_frame *cf, 838 struct ican3_fast_desc *desc) 839{ 840 /* clear out any stale data in the descriptor */ 841 memset(desc->data, 0, sizeof(desc->data)); 842 843 /* we always use the extended format, with the ECHO flag set */ 844 desc->command = ICAN3_CAN_TYPE_EFF; 845 desc->data[0] |= cf->can_dlc; 846 desc->data[1] |= ICAN3_ECHO; 847 848 if (cf->can_id & CAN_RTR_FLAG) 849 desc->data[0] |= ICAN3_EFF_RTR; 850 851 /* pack the id into the correct places */ 852 if (cf->can_id & CAN_EFF_FLAG) { 853 desc->data[0] |= ICAN3_EFF; 854 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */ 855 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */ 856 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */ 857 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */ 858 } else { 859 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */ 860 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */ 861 } 862 863 /* copy the data bits into the descriptor */ 864 memcpy(&desc->data[6], cf->data, sizeof(cf->data)); 865} 866 867/* 868 * Interrupt Handling 869 */ 870 871/* 872 * Handle an ID + Version message response from the firmware. We never generate 873 * this message in production code, but it is very useful when debugging to be 874 * able to display this message. 875 */ 876static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg) 877{ 878 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data); 879} 880 881static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg) 882{ 883 struct net_device *dev = mod->ndev; 884 struct net_device_stats *stats = &dev->stats; 885 struct can_frame *cf; 886 struct sk_buff *skb; 887 888 /* 889 * Report that communication messages with the microcontroller firmware 890 * are being lost. These are never CAN frames, so we do not generate an 891 * error frame for userspace 892 */ 893 if (msg->spec == MSG_MSGLOST) { 894 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]); 895 return; 896 } 897 898 /* 899 * Oops, this indicates that we have lost messages in the fast queue, 900 * which are exclusively CAN messages. Our driver isn't reading CAN 901 * frames fast enough. 902 * 903 * We'll pretend that the SJA1000 told us that it ran out of buffer 904 * space, because there is not a better message for this. 905 */ 906 skb = alloc_can_err_skb(dev, &cf); 907 if (skb) { 908 cf->can_id |= CAN_ERR_CRTL; 909 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 910 stats->rx_errors++; 911 stats->rx_bytes += cf->can_dlc; 912 netif_rx(skb); 913 } 914} 915 916/* 917 * Handle CAN Event Indication Messages from the firmware 918 * 919 * The ICAN3 firmware provides the values of some SJA1000 registers when it 920 * generates this message. The code below is largely copied from the 921 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary 922 */ 923static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg) 924{ 925 struct net_device *dev = mod->ndev; 926 struct net_device_stats *stats = &dev->stats; 927 enum can_state state = mod->can.state; 928 u8 status, isrc, rxerr, txerr; 929 struct can_frame *cf; 930 struct sk_buff *skb; 931 932 /* we can only handle the SJA1000 part */ 933 if (msg->data[1] != CEVTIND_CHIP_SJA1000) { 934 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n"); 935 return -ENODEV; 936 } 937 938 /* check the message length for sanity */ 939 if (le16_to_cpu(msg->len) < 6) { 940 dev_err(mod->dev, "error message too short\n"); 941 return -EINVAL; 942 } 943 944 skb = alloc_can_err_skb(dev, &cf); 945 if (skb == NULL) 946 return -ENOMEM; 947 948 isrc = msg->data[0]; 949 status = msg->data[3]; 950 rxerr = msg->data[4]; 951 txerr = msg->data[5]; 952 953 /* data overrun interrupt */ 954 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) { 955 dev_dbg(mod->dev, "data overrun interrupt\n"); 956 cf->can_id |= CAN_ERR_CRTL; 957 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 958 stats->rx_over_errors++; 959 stats->rx_errors++; 960 } 961 962 /* error warning + passive interrupt */ 963 if (isrc == CEVTIND_EI) { 964 dev_dbg(mod->dev, "error warning + passive interrupt\n"); 965 if (status & SR_BS) { 966 state = CAN_STATE_BUS_OFF; 967 cf->can_id |= CAN_ERR_BUSOFF; 968 can_bus_off(dev); 969 } else if (status & SR_ES) { 970 if (rxerr >= 128 || txerr >= 128) 971 state = CAN_STATE_ERROR_PASSIVE; 972 else 973 state = CAN_STATE_ERROR_WARNING; 974 } else { 975 state = CAN_STATE_ERROR_ACTIVE; 976 } 977 } 978 979 /* bus error interrupt */ 980 if (isrc == CEVTIND_BEI) { 981 u8 ecc = msg->data[2]; 982 983 dev_dbg(mod->dev, "bus error interrupt\n"); 984 mod->can.can_stats.bus_error++; 985 stats->rx_errors++; 986 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 987 988 switch (ecc & ECC_MASK) { 989 case ECC_BIT: 990 cf->data[2] |= CAN_ERR_PROT_BIT; 991 break; 992 case ECC_FORM: 993 cf->data[2] |= CAN_ERR_PROT_FORM; 994 break; 995 case ECC_STUFF: 996 cf->data[2] |= CAN_ERR_PROT_STUFF; 997 break; 998 default: 999 cf->data[2] |= CAN_ERR_PROT_UNSPEC; 1000 cf->data[3] = ecc & ECC_SEG; 1001 break; 1002 } 1003 1004 if ((ecc & ECC_DIR) == 0) 1005 cf->data[2] |= CAN_ERR_PROT_TX; 1006 1007 cf->data[6] = txerr; 1008 cf->data[7] = rxerr; 1009 } 1010 1011 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING || 1012 state == CAN_STATE_ERROR_PASSIVE)) { 1013 cf->can_id |= CAN_ERR_CRTL; 1014 if (state == CAN_STATE_ERROR_WARNING) { 1015 mod->can.can_stats.error_warning++; 1016 cf->data[1] = (txerr > rxerr) ? 1017 CAN_ERR_CRTL_TX_WARNING : 1018 CAN_ERR_CRTL_RX_WARNING; 1019 } else { 1020 mod->can.can_stats.error_passive++; 1021 cf->data[1] = (txerr > rxerr) ? 1022 CAN_ERR_CRTL_TX_PASSIVE : 1023 CAN_ERR_CRTL_RX_PASSIVE; 1024 } 1025 1026 cf->data[6] = txerr; 1027 cf->data[7] = rxerr; 1028 } 1029 1030 mod->can.state = state; 1031 stats->rx_errors++; 1032 stats->rx_bytes += cf->can_dlc; 1033 netif_rx(skb); 1034 return 0; 1035} 1036 1037static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg) 1038{ 1039 switch (msg->data[0]) { 1040 case INQUIRY_STATUS: 1041 case INQUIRY_EXTENDED: 1042 mod->bec.rxerr = msg->data[5]; 1043 mod->bec.txerr = msg->data[6]; 1044 complete(&mod->buserror_comp); 1045 break; 1046 case INQUIRY_TERMINATION: 1047 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON; 1048 complete(&mod->termination_comp); 1049 break; 1050 default: 1051 dev_err(mod->dev, "received an unknown inquiry response\n"); 1052 break; 1053 } 1054} 1055 1056static void ican3_handle_unknown_message(struct ican3_dev *mod, 1057 struct ican3_msg *msg) 1058{ 1059 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n", 1060 msg->spec, le16_to_cpu(msg->len)); 1061} 1062 1063/* 1064 * Handle a control message from the firmware 1065 */ 1066static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg) 1067{ 1068 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__, 1069 mod->num, msg->spec, le16_to_cpu(msg->len)); 1070 1071 switch (msg->spec) { 1072 case MSG_IDVERS: 1073 ican3_handle_idvers(mod, msg); 1074 break; 1075 case MSG_MSGLOST: 1076 case MSG_FMSGLOST: 1077 ican3_handle_msglost(mod, msg); 1078 break; 1079 case MSG_CEVTIND: 1080 ican3_handle_cevtind(mod, msg); 1081 break; 1082 case MSG_INQUIRY: 1083 ican3_handle_inquiry(mod, msg); 1084 break; 1085 default: 1086 ican3_handle_unknown_message(mod, msg); 1087 break; 1088 } 1089} 1090 1091/* 1092 * Check that there is room in the TX ring to transmit another skb 1093 * 1094 * LOCKING: must hold mod->lock 1095 */ 1096static bool ican3_txok(struct ican3_dev *mod) 1097{ 1098 struct ican3_fast_desc __iomem *desc; 1099 u8 control; 1100 1101 /* copy the control bits of the descriptor */ 1102 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1103 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc)); 1104 control = ioread8(&desc->control); 1105 1106 /* if the control bits are not valid, then we have no more space */ 1107 if (!(control & DESC_VALID)) 1108 return false; 1109 1110 return true; 1111} 1112 1113/* 1114 * Receive one CAN frame from the hardware 1115 * 1116 * CONTEXT: must be called from user context 1117 */ 1118static int ican3_recv_skb(struct ican3_dev *mod) 1119{ 1120 struct net_device *ndev = mod->ndev; 1121 struct net_device_stats *stats = &ndev->stats; 1122 struct ican3_fast_desc desc; 1123 void __iomem *desc_addr; 1124 struct can_frame *cf; 1125 struct sk_buff *skb; 1126 unsigned long flags; 1127 1128 spin_lock_irqsave(&mod->lock, flags); 1129 1130 /* copy the whole descriptor */ 1131 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1132 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc)); 1133 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 1134 1135 spin_unlock_irqrestore(&mod->lock, flags); 1136 1137 /* check that we actually have a CAN frame */ 1138 if (!(desc.control & DESC_VALID)) 1139 return -ENOBUFS; 1140 1141 /* allocate an skb */ 1142 skb = alloc_can_skb(ndev, &cf); 1143 if (unlikely(skb == NULL)) { 1144 stats->rx_dropped++; 1145 goto err_noalloc; 1146 } 1147 1148 /* convert the ICAN3 frame into Linux CAN format */ 1149 ican3_to_can_frame(mod, &desc, cf); 1150 1151 /* receive the skb, update statistics */ 1152 netif_receive_skb(skb); 1153 stats->rx_packets++; 1154 stats->rx_bytes += cf->can_dlc; 1155 1156err_noalloc: 1157 /* toggle the valid bit and return the descriptor to the ring */ 1158 desc.control ^= DESC_VALID; 1159 1160 spin_lock_irqsave(&mod->lock, flags); 1161 1162 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1163 memcpy_toio(desc_addr, &desc, 1); 1164 1165 /* update the next buffer pointer */ 1166 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0 1167 : (mod->fastrx_num + 1); 1168 1169 /* there are still more buffers to process */ 1170 spin_unlock_irqrestore(&mod->lock, flags); 1171 return 0; 1172} 1173 1174static int ican3_napi(struct napi_struct *napi, int budget) 1175{ 1176 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi); 1177 struct ican3_msg msg; 1178 unsigned long flags; 1179 int received = 0; 1180 int ret; 1181 1182 /* process all communication messages */ 1183 while (true) { 1184 ret = ican3_recv_msg(mod, &msg); 1185 if (ret) 1186 break; 1187 1188 ican3_handle_message(mod, &msg); 1189 } 1190 1191 /* process all CAN frames from the fast interface */ 1192 while (received < budget) { 1193 ret = ican3_recv_skb(mod); 1194 if (ret) 1195 break; 1196 1197 received++; 1198 } 1199 1200 /* We have processed all packets that the adapter had, but it 1201 * was less than our budget, stop polling */ 1202 if (received < budget) 1203 napi_complete(napi); 1204 1205 spin_lock_irqsave(&mod->lock, flags); 1206 1207 /* Wake up the transmit queue if necessary */ 1208 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod)) 1209 netif_wake_queue(mod->ndev); 1210 1211 spin_unlock_irqrestore(&mod->lock, flags); 1212 1213 /* re-enable interrupt generation */ 1214 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1215 return received; 1216} 1217 1218static irqreturn_t ican3_irq(int irq, void *dev_id) 1219{ 1220 struct ican3_dev *mod = dev_id; 1221 u8 stat; 1222 1223 /* 1224 * The interrupt status register on this device reports interrupts 1225 * as zeroes instead of using ones like most other devices 1226 */ 1227 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num); 1228 if (stat == (1 << mod->num)) 1229 return IRQ_NONE; 1230 1231 /* clear the MODULbus interrupt from the microcontroller */ 1232 ioread8(&mod->dpmctrl->interrupt); 1233 1234 /* disable interrupt generation, schedule the NAPI poller */ 1235 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1236 napi_schedule(&mod->napi); 1237 return IRQ_HANDLED; 1238} 1239 1240/* 1241 * Firmware reset, startup, and shutdown 1242 */ 1243 1244/* 1245 * Reset an ICAN module to its power-on state 1246 * 1247 * CONTEXT: no network device registered 1248 */ 1249static int ican3_reset_module(struct ican3_dev *mod) 1250{ 1251 u8 val = 1 << mod->num; 1252 unsigned long start; 1253 u8 runold, runnew; 1254 1255 /* disable interrupts so no more work is scheduled */ 1256 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1257 1258 /* the first unallocated page in the DPM is #9 */ 1259 mod->free_page = DPM_FREE_START; 1260 1261 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1262 runold = ioread8(mod->dpm + TARGET_RUNNING); 1263 1264 /* reset the module */ 1265 iowrite8(val, &mod->ctrl->reset_assert); 1266 iowrite8(val, &mod->ctrl->reset_deassert); 1267 1268 /* wait until the module has finished resetting and is running */ 1269 start = jiffies; 1270 do { 1271 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1272 runnew = ioread8(mod->dpm + TARGET_RUNNING); 1273 if (runnew == (runold ^ 0xff)) 1274 return 0; 1275 1276 msleep(10); 1277 } while (time_before(jiffies, start + HZ / 4)); 1278 1279 dev_err(mod->dev, "failed to reset CAN module\n"); 1280 return -ETIMEDOUT; 1281} 1282 1283static void __devexit ican3_shutdown_module(struct ican3_dev *mod) 1284{ 1285 ican3_msg_disconnect(mod); 1286 ican3_reset_module(mod); 1287} 1288 1289/* 1290 * Startup an ICAN module, bringing it into fast mode 1291 */ 1292static int __devinit ican3_startup_module(struct ican3_dev *mod) 1293{ 1294 int ret; 1295 1296 ret = ican3_reset_module(mod); 1297 if (ret) { 1298 dev_err(mod->dev, "unable to reset module\n"); 1299 return ret; 1300 } 1301 1302 /* re-enable interrupts so we can send messages */ 1303 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1304 1305 ret = ican3_msg_connect(mod); 1306 if (ret) { 1307 dev_err(mod->dev, "unable to connect to module\n"); 1308 return ret; 1309 } 1310 1311 ican3_init_new_host_interface(mod); 1312 ret = ican3_msg_newhostif(mod); 1313 if (ret) { 1314 dev_err(mod->dev, "unable to switch to new-style interface\n"); 1315 return ret; 1316 } 1317 1318 /* default to "termination on" */ 1319 ret = ican3_set_termination(mod, true); 1320 if (ret) { 1321 dev_err(mod->dev, "unable to enable termination\n"); 1322 return ret; 1323 } 1324 1325 /* default to "bus errors enabled" */ 1326 ret = ican3_set_buserror(mod, ICAN3_BUSERR_QUOTA_MAX); 1327 if (ret) { 1328 dev_err(mod->dev, "unable to set bus-error\n"); 1329 return ret; 1330 } 1331 1332 ican3_init_fast_host_interface(mod); 1333 ret = ican3_msg_fasthostif(mod); 1334 if (ret) { 1335 dev_err(mod->dev, "unable to switch to fast host interface\n"); 1336 return ret; 1337 } 1338 1339 ret = ican3_set_id_filter(mod, true); 1340 if (ret) { 1341 dev_err(mod->dev, "unable to set acceptance filter\n"); 1342 return ret; 1343 } 1344 1345 return 0; 1346} 1347 1348/* 1349 * CAN Network Device 1350 */ 1351 1352static int ican3_open(struct net_device *ndev) 1353{ 1354 struct ican3_dev *mod = netdev_priv(ndev); 1355 u8 quota; 1356 int ret; 1357 1358 /* open the CAN layer */ 1359 ret = open_candev(ndev); 1360 if (ret) { 1361 dev_err(mod->dev, "unable to start CAN layer\n"); 1362 return ret; 1363 } 1364 1365 /* set the bus error generation state appropriately */ 1366 if (mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 1367 quota = ICAN3_BUSERR_QUOTA_MAX; 1368 else 1369 quota = 0; 1370 1371 ret = ican3_set_buserror(mod, quota); 1372 if (ret) { 1373 dev_err(mod->dev, "unable to set bus-error\n"); 1374 close_candev(ndev); 1375 return ret; 1376 } 1377 1378 /* bring the bus online */ 1379 ret = ican3_set_bus_state(mod, true); 1380 if (ret) { 1381 dev_err(mod->dev, "unable to set bus-on\n"); 1382 close_candev(ndev); 1383 return ret; 1384 } 1385 1386 /* start up the network device */ 1387 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1388 netif_start_queue(ndev); 1389 1390 return 0; 1391} 1392 1393static int ican3_stop(struct net_device *ndev) 1394{ 1395 struct ican3_dev *mod = netdev_priv(ndev); 1396 int ret; 1397 1398 /* stop the network device xmit routine */ 1399 netif_stop_queue(ndev); 1400 mod->can.state = CAN_STATE_STOPPED; 1401 1402 /* bring the bus offline, stop receiving packets */ 1403 ret = ican3_set_bus_state(mod, false); 1404 if (ret) { 1405 dev_err(mod->dev, "unable to set bus-off\n"); 1406 return ret; 1407 } 1408 1409 /* close the CAN layer */ 1410 close_candev(ndev); 1411 return 0; 1412} 1413 1414static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev) 1415{ 1416 struct ican3_dev *mod = netdev_priv(ndev); 1417 struct net_device_stats *stats = &ndev->stats; 1418 struct can_frame *cf = (struct can_frame *)skb->data; 1419 struct ican3_fast_desc desc; 1420 void __iomem *desc_addr; 1421 unsigned long flags; 1422 1423 if (can_dropped_invalid_skb(ndev, skb)) 1424 return NETDEV_TX_OK; 1425 1426 spin_lock_irqsave(&mod->lock, flags); 1427 1428 /* check that we can actually transmit */ 1429 if (!ican3_txok(mod)) { 1430 dev_err(mod->dev, "no free descriptors, stopping queue\n"); 1431 netif_stop_queue(ndev); 1432 spin_unlock_irqrestore(&mod->lock, flags); 1433 return NETDEV_TX_BUSY; 1434 } 1435 1436 /* copy the control bits of the descriptor */ 1437 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1438 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc)); 1439 memset(&desc, 0, sizeof(desc)); 1440 memcpy_fromio(&desc, desc_addr, 1); 1441 1442 /* convert the Linux CAN frame into ICAN3 format */ 1443 can_frame_to_ican3(mod, cf, &desc); 1444 1445 /* 1446 * the programming manual says that you must set the IVALID bit, then 1447 * interrupt, then set the valid bit. Quite weird, but it seems to be 1448 * required for this to work 1449 */ 1450 desc.control |= DESC_IVALID; 1451 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1452 1453 /* generate a MODULbus interrupt to the microcontroller */ 1454 iowrite8(0x01, &mod->dpmctrl->interrupt); 1455 1456 desc.control ^= DESC_VALID; 1457 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1458 1459 /* update the next buffer pointer */ 1460 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0 1461 : (mod->fasttx_num + 1); 1462 1463 /* update statistics */ 1464 stats->tx_packets++; 1465 stats->tx_bytes += cf->can_dlc; 1466 kfree_skb(skb); 1467 1468 /* 1469 * This hardware doesn't have TX-done notifications, so we'll try and 1470 * emulate it the best we can using ECHO skbs. Get the next TX 1471 * descriptor, and see if we have room to send. If not, stop the queue. 1472 * It will be woken when the ECHO skb for the current packet is recv'd. 1473 */ 1474 1475 /* copy the control bits of the descriptor */ 1476 if (!ican3_txok(mod)) 1477 netif_stop_queue(ndev); 1478 1479 spin_unlock_irqrestore(&mod->lock, flags); 1480 return NETDEV_TX_OK; 1481} 1482 1483static const struct net_device_ops ican3_netdev_ops = { 1484 .ndo_open = ican3_open, 1485 .ndo_stop = ican3_stop, 1486 .ndo_start_xmit = ican3_xmit, 1487}; 1488 1489/* 1490 * Low-level CAN Device 1491 */ 1492 1493/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */ 1494static const struct can_bittiming_const ican3_bittiming_const = { 1495 .name = DRV_NAME, 1496 .tseg1_min = 1, 1497 .tseg1_max = 16, 1498 .tseg2_min = 1, 1499 .tseg2_max = 8, 1500 .sjw_max = 4, 1501 .brp_min = 1, 1502 .brp_max = 64, 1503 .brp_inc = 1, 1504}; 1505 1506/* 1507 * This routine was stolen from drivers/net/can/sja1000/sja1000.c 1508 * 1509 * The bittiming register command for the ICAN3 just sets the bit timing 1510 * registers on the SJA1000 chip directly 1511 */ 1512static int ican3_set_bittiming(struct net_device *ndev) 1513{ 1514 struct ican3_dev *mod = netdev_priv(ndev); 1515 struct can_bittiming *bt = &mod->can.bittiming; 1516 struct ican3_msg msg; 1517 u8 btr0, btr1; 1518 1519 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6); 1520 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) | 1521 (((bt->phase_seg2 - 1) & 0x7) << 4); 1522 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 1523 btr1 |= 0x80; 1524 1525 memset(&msg, 0, sizeof(msg)); 1526 msg.spec = MSG_CBTRREQ; 1527 msg.len = cpu_to_le16(4); 1528 msg.data[0] = 0x00; 1529 msg.data[1] = 0x00; 1530 msg.data[2] = btr0; 1531 msg.data[3] = btr1; 1532 1533 return ican3_send_msg(mod, &msg); 1534} 1535 1536static int ican3_set_mode(struct net_device *ndev, enum can_mode mode) 1537{ 1538 struct ican3_dev *mod = netdev_priv(ndev); 1539 int ret; 1540 1541 if (mode != CAN_MODE_START) 1542 return -ENOTSUPP; 1543 1544 /* bring the bus online */ 1545 ret = ican3_set_bus_state(mod, true); 1546 if (ret) { 1547 dev_err(mod->dev, "unable to set bus-on\n"); 1548 return ret; 1549 } 1550 1551 /* start up the network device */ 1552 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1553 1554 if (netif_queue_stopped(ndev)) 1555 netif_wake_queue(ndev); 1556 1557 return 0; 1558} 1559 1560static int ican3_get_berr_counter(const struct net_device *ndev, 1561 struct can_berr_counter *bec) 1562{ 1563 struct ican3_dev *mod = netdev_priv(ndev); 1564 int ret; 1565 1566 ret = ican3_send_inquiry(mod, INQUIRY_STATUS); 1567 if (ret) 1568 return ret; 1569 1570 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ); 1571 if (ret <= 0) { 1572 dev_info(mod->dev, "%s timed out\n", __func__); 1573 return -ETIMEDOUT; 1574 } 1575 1576 bec->rxerr = mod->bec.rxerr; 1577 bec->txerr = mod->bec.txerr; 1578 return 0; 1579} 1580 1581/* 1582 * Sysfs Attributes 1583 */ 1584 1585static ssize_t ican3_sysfs_show_term(struct device *dev, 1586 struct device_attribute *attr, 1587 char *buf) 1588{ 1589 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1590 int ret; 1591 1592 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION); 1593 if (ret) 1594 return ret; 1595 1596 ret = wait_for_completion_timeout(&mod->termination_comp, HZ); 1597 if (ret <= 0) { 1598 dev_info(mod->dev, "%s timed out\n", __func__); 1599 return -ETIMEDOUT; 1600 } 1601 1602 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled); 1603} 1604 1605static ssize_t ican3_sysfs_set_term(struct device *dev, 1606 struct device_attribute *attr, 1607 const char *buf, size_t count) 1608{ 1609 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1610 unsigned long enable; 1611 int ret; 1612 1613 if (strict_strtoul(buf, 0, &enable)) 1614 return -EINVAL; 1615 1616 ret = ican3_set_termination(mod, enable); 1617 if (ret) 1618 return ret; 1619 1620 return count; 1621} 1622 1623static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term, 1624 ican3_sysfs_set_term); 1625 1626static struct attribute *ican3_sysfs_attrs[] = { 1627 &dev_attr_termination.attr, 1628 NULL, 1629}; 1630 1631static struct attribute_group ican3_sysfs_attr_group = { 1632 .attrs = ican3_sysfs_attrs, 1633}; 1634 1635/* 1636 * PCI Subsystem 1637 */ 1638 1639static int __devinit ican3_probe(struct platform_device *pdev) 1640{ 1641 struct janz_platform_data *pdata; 1642 struct net_device *ndev; 1643 struct ican3_dev *mod; 1644 struct resource *res; 1645 struct device *dev; 1646 int ret; 1647 1648 pdata = pdev->dev.platform_data; 1649 if (!pdata) 1650 return -ENXIO; 1651 1652 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno); 1653 1654 /* save the struct device for printing */ 1655 dev = &pdev->dev; 1656 1657 /* allocate the CAN device and private data */ 1658 ndev = alloc_candev(sizeof(*mod), 0); 1659 if (!ndev) { 1660 dev_err(dev, "unable to allocate CANdev\n"); 1661 ret = -ENOMEM; 1662 goto out_return; 1663 } 1664 1665 platform_set_drvdata(pdev, ndev); 1666 mod = netdev_priv(ndev); 1667 mod->ndev = ndev; 1668 mod->dev = &pdev->dev; 1669 mod->num = pdata->modno; 1670 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS); 1671 spin_lock_init(&mod->lock); 1672 init_completion(&mod->termination_comp); 1673 init_completion(&mod->buserror_comp); 1674 1675 /* setup device-specific sysfs attributes */ 1676 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group; 1677 1678 /* the first unallocated page in the DPM is 9 */ 1679 mod->free_page = DPM_FREE_START; 1680 1681 ndev->netdev_ops = &ican3_netdev_ops; 1682 ndev->flags |= IFF_ECHO; 1683 SET_NETDEV_DEV(ndev, &pdev->dev); 1684 1685 mod->can.clock.freq = ICAN3_CAN_CLOCK; 1686 mod->can.bittiming_const = &ican3_bittiming_const; 1687 mod->can.do_set_bittiming = ican3_set_bittiming; 1688 mod->can.do_set_mode = ican3_set_mode; 1689 mod->can.do_get_berr_counter = ican3_get_berr_counter; 1690 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES 1691 | CAN_CTRLMODE_BERR_REPORTING; 1692 1693 /* find our IRQ number */ 1694 mod->irq = platform_get_irq(pdev, 0); 1695 if (mod->irq < 0) { 1696 dev_err(dev, "IRQ line not found\n"); 1697 ret = -ENODEV; 1698 goto out_free_ndev; 1699 } 1700 1701 ndev->irq = mod->irq; 1702 1703 /* get access to the MODULbus registers for this module */ 1704 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1705 if (!res) { 1706 dev_err(dev, "MODULbus registers not found\n"); 1707 ret = -ENODEV; 1708 goto out_free_ndev; 1709 } 1710 1711 mod->dpm = ioremap(res->start, resource_size(res)); 1712 if (!mod->dpm) { 1713 dev_err(dev, "MODULbus registers not ioremap\n"); 1714 ret = -ENOMEM; 1715 goto out_free_ndev; 1716 } 1717 1718 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE; 1719 1720 /* get access to the control registers for this module */ 1721 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1722 if (!res) { 1723 dev_err(dev, "CONTROL registers not found\n"); 1724 ret = -ENODEV; 1725 goto out_iounmap_dpm; 1726 } 1727 1728 mod->ctrl = ioremap(res->start, resource_size(res)); 1729 if (!mod->ctrl) { 1730 dev_err(dev, "CONTROL registers not ioremap\n"); 1731 ret = -ENOMEM; 1732 goto out_iounmap_dpm; 1733 } 1734 1735 /* disable our IRQ, then hookup the IRQ handler */ 1736 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1737 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod); 1738 if (ret) { 1739 dev_err(dev, "unable to request IRQ\n"); 1740 goto out_iounmap_ctrl; 1741 } 1742 1743 /* reset and initialize the CAN controller into fast mode */ 1744 napi_enable(&mod->napi); 1745 ret = ican3_startup_module(mod); 1746 if (ret) { 1747 dev_err(dev, "%s: unable to start CANdev\n", __func__); 1748 goto out_free_irq; 1749 } 1750 1751 /* register with the Linux CAN layer */ 1752 ret = register_candev(ndev); 1753 if (ret) { 1754 dev_err(dev, "%s: unable to register CANdev\n", __func__); 1755 goto out_free_irq; 1756 } 1757 1758 dev_info(dev, "module %d: registered CAN device\n", pdata->modno); 1759 return 0; 1760 1761out_free_irq: 1762 napi_disable(&mod->napi); 1763 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1764 free_irq(mod->irq, mod); 1765out_iounmap_ctrl: 1766 iounmap(mod->ctrl); 1767out_iounmap_dpm: 1768 iounmap(mod->dpm); 1769out_free_ndev: 1770 free_candev(ndev); 1771out_return: 1772 return ret; 1773} 1774 1775static int __devexit ican3_remove(struct platform_device *pdev) 1776{ 1777 struct net_device *ndev = platform_get_drvdata(pdev); 1778 struct ican3_dev *mod = netdev_priv(ndev); 1779 1780 /* unregister the netdevice, stop interrupts */ 1781 unregister_netdev(ndev); 1782 napi_disable(&mod->napi); 1783 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1784 free_irq(mod->irq, mod); 1785 1786 /* put the module into reset */ 1787 ican3_shutdown_module(mod); 1788 1789 /* unmap all registers */ 1790 iounmap(mod->ctrl); 1791 iounmap(mod->dpm); 1792 1793 free_candev(ndev); 1794 1795 return 0; 1796} 1797 1798static struct platform_driver ican3_driver = { 1799 .driver = { 1800 .name = DRV_NAME, 1801 .owner = THIS_MODULE, 1802 }, 1803 .probe = ican3_probe, 1804 .remove = __devexit_p(ican3_remove), 1805}; 1806 1807module_platform_driver(ican3_driver); 1808 1809MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); 1810MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver"); 1811MODULE_LICENSE("GPL"); 1812MODULE_ALIAS("platform:janz-ican3"); 1813