janz-ican3.c revision 88b587039c1ad4e7a981bea3269eeb02a1a2a14b
1/* 2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver 3 * 4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12#include <linux/kernel.h> 13#include <linux/module.h> 14#include <linux/init.h> 15#include <linux/interrupt.h> 16#include <linux/delay.h> 17#include <linux/platform_device.h> 18 19#include <linux/netdevice.h> 20#include <linux/can.h> 21#include <linux/can/dev.h> 22#include <linux/can/error.h> 23 24#include <linux/mfd/janz.h> 25#include <asm/io.h> 26 27/* the DPM has 64k of memory, organized into 256x 256 byte pages */ 28#define DPM_NUM_PAGES 256 29#define DPM_PAGE_SIZE 256 30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE) 31 32/* JANZ ICAN3 "old-style" host interface queue page numbers */ 33#define QUEUE_OLD_CONTROL 0 34#define QUEUE_OLD_RB0 1 35#define QUEUE_OLD_RB1 2 36#define QUEUE_OLD_WB0 3 37#define QUEUE_OLD_WB1 4 38 39/* Janz ICAN3 "old-style" host interface control registers */ 40#define MSYNC_PEER 0x00 /* ICAN only */ 41#define MSYNC_LOCL 0x01 /* host only */ 42#define TARGET_RUNNING 0x02 43 44#define MSYNC_RB0 0x01 45#define MSYNC_RB1 0x02 46#define MSYNC_RBLW 0x04 47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1) 48 49#define MSYNC_WB0 0x10 50#define MSYNC_WB1 0x20 51#define MSYNC_WBLW 0x40 52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1) 53 54/* Janz ICAN3 "new-style" host interface queue page numbers */ 55#define QUEUE_TOHOST 5 56#define QUEUE_FROMHOST_MID 6 57#define QUEUE_FROMHOST_HIGH 7 58#define QUEUE_FROMHOST_LOW 8 59 60/* The first free page in the DPM is #9 */ 61#define DPM_FREE_START 9 62 63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */ 64#define DESC_VALID 0x80 65#define DESC_WRAP 0x40 66#define DESC_INTERRUPT 0x20 67#define DESC_IVALID 0x10 68#define DESC_LEN(len) (len) 69 70/* Janz ICAN3 Firmware Messages */ 71#define MSG_CONNECTI 0x02 72#define MSG_DISCONNECT 0x03 73#define MSG_IDVERS 0x04 74#define MSG_MSGLOST 0x05 75#define MSG_NEWHOSTIF 0x08 76#define MSG_INQUIRY 0x0a 77#define MSG_SETAFILMASK 0x10 78#define MSG_INITFDPMQUEUE 0x11 79#define MSG_HWCONF 0x12 80#define MSG_FMSGLOST 0x15 81#define MSG_CEVTIND 0x37 82#define MSG_CBTRREQ 0x41 83#define MSG_COFFREQ 0x42 84#define MSG_CONREQ 0x43 85#define MSG_CCONFREQ 0x47 86 87/* 88 * Janz ICAN3 CAN Inquiry Message Types 89 * 90 * NOTE: there appears to be a firmware bug here. You must send 91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED 92 * NOTE: response. The controller never responds to a message with 93 * NOTE: the INQUIRY_EXTENDED subspec :( 94 */ 95#define INQUIRY_STATUS 0x00 96#define INQUIRY_TERMINATION 0x01 97#define INQUIRY_EXTENDED 0x04 98 99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */ 100#define SETAFILMASK_REJECT 0x00 101#define SETAFILMASK_FASTIF 0x02 102 103/* Janz ICAN3 CAN Hardware Configuration Message Types */ 104#define HWCONF_TERMINATE_ON 0x01 105#define HWCONF_TERMINATE_OFF 0x00 106 107/* Janz ICAN3 CAN Event Indication Message Types */ 108#define CEVTIND_EI 0x01 109#define CEVTIND_DOI 0x02 110#define CEVTIND_LOST 0x04 111#define CEVTIND_FULL 0x08 112#define CEVTIND_BEI 0x10 113 114#define CEVTIND_CHIP_SJA1000 0x02 115 116#define ICAN3_BUSERR_QUOTA_MAX 255 117 118/* Janz ICAN3 CAN Frame Conversion */ 119#define ICAN3_ECHO 0x10 120#define ICAN3_EFF_RTR 0x40 121#define ICAN3_SFF_RTR 0x10 122#define ICAN3_EFF 0x80 123 124#define ICAN3_CAN_TYPE_MASK 0x0f 125#define ICAN3_CAN_TYPE_SFF 0x00 126#define ICAN3_CAN_TYPE_EFF 0x01 127 128#define ICAN3_CAN_DLC_MASK 0x0f 129 130/* 131 * SJA1000 Status and Error Register Definitions 132 * 133 * Copied from drivers/net/can/sja1000/sja1000.h 134 */ 135 136/* status register content */ 137#define SR_BS 0x80 138#define SR_ES 0x40 139#define SR_TS 0x20 140#define SR_RS 0x10 141#define SR_TCS 0x08 142#define SR_TBS 0x04 143#define SR_DOS 0x02 144#define SR_RBS 0x01 145 146#define SR_CRIT (SR_BS|SR_ES) 147 148/* ECC register */ 149#define ECC_SEG 0x1F 150#define ECC_DIR 0x20 151#define ECC_ERR 6 152#define ECC_BIT 0x00 153#define ECC_FORM 0x40 154#define ECC_STUFF 0x80 155#define ECC_MASK 0xc0 156 157/* Number of buffers for use in the "new-style" host interface */ 158#define ICAN3_NEW_BUFFERS 16 159 160/* Number of buffers for use in the "fast" host interface */ 161#define ICAN3_TX_BUFFERS 512 162#define ICAN3_RX_BUFFERS 1024 163 164/* SJA1000 Clock Input */ 165#define ICAN3_CAN_CLOCK 8000000 166 167/* Driver Name */ 168#define DRV_NAME "janz-ican3" 169 170/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */ 171struct ican3_dpm_control { 172 /* window address register */ 173 u8 window_address; 174 u8 unused1; 175 176 /* 177 * Read access: clear interrupt from microcontroller 178 * Write access: send interrupt to microcontroller 179 */ 180 u8 interrupt; 181 u8 unused2; 182 183 /* write-only: reset all hardware on the module */ 184 u8 hwreset; 185 u8 unused3; 186 187 /* write-only: generate an interrupt to the TPU */ 188 u8 tpuinterrupt; 189}; 190 191struct ican3_dev { 192 193 /* must be the first member */ 194 struct can_priv can; 195 196 /* CAN network device */ 197 struct net_device *ndev; 198 struct napi_struct napi; 199 200 /* Device for printing */ 201 struct device *dev; 202 203 /* module number */ 204 unsigned int num; 205 206 /* base address of registers and IRQ */ 207 struct janz_cmodio_onboard_regs __iomem *ctrl; 208 struct ican3_dpm_control __iomem *dpmctrl; 209 void __iomem *dpm; 210 int irq; 211 212 /* CAN bus termination status */ 213 struct completion termination_comp; 214 bool termination_enabled; 215 216 /* CAN bus error status registers */ 217 struct completion buserror_comp; 218 struct can_berr_counter bec; 219 220 /* old and new style host interface */ 221 unsigned int iftype; 222 223 /* 224 * Any function which changes the current DPM page must hold this 225 * lock while it is performing data accesses. This ensures that the 226 * function will not be preempted and end up reading data from a 227 * different DPM page than it expects. 228 */ 229 spinlock_t lock; 230 231 /* new host interface */ 232 unsigned int rx_int; 233 unsigned int rx_num; 234 unsigned int tx_num; 235 236 /* fast host interface */ 237 unsigned int fastrx_start; 238 unsigned int fastrx_num; 239 unsigned int fasttx_start; 240 unsigned int fasttx_num; 241 242 /* first free DPM page */ 243 unsigned int free_page; 244}; 245 246struct ican3_msg { 247 u8 control; 248 u8 spec; 249 __le16 len; 250 u8 data[252]; 251}; 252 253struct ican3_new_desc { 254 u8 control; 255 u8 pointer; 256}; 257 258struct ican3_fast_desc { 259 u8 control; 260 u8 command; 261 u8 data[14]; 262}; 263 264/* write to the window basic address register */ 265static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page) 266{ 267 BUG_ON(page >= DPM_NUM_PAGES); 268 iowrite8(page, &mod->dpmctrl->window_address); 269} 270 271/* 272 * ICAN3 "old-style" host interface 273 */ 274 275/* 276 * Receive a message from the ICAN3 "old-style" firmware interface 277 * 278 * LOCKING: must hold mod->lock 279 * 280 * returns 0 on success, -ENOMEM when no message exists 281 */ 282static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 283{ 284 unsigned int mbox, mbox_page; 285 u8 locl, peer, xord; 286 287 /* get the MSYNC registers */ 288 ican3_set_page(mod, QUEUE_OLD_CONTROL); 289 peer = ioread8(mod->dpm + MSYNC_PEER); 290 locl = ioread8(mod->dpm + MSYNC_LOCL); 291 xord = locl ^ peer; 292 293 if ((xord & MSYNC_RB_MASK) == 0x00) { 294 dev_dbg(mod->dev, "no mbox for reading\n"); 295 return -ENOMEM; 296 } 297 298 /* find the first free mbox to read */ 299 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK) 300 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1; 301 else 302 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1; 303 304 /* copy the message */ 305 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1; 306 ican3_set_page(mod, mbox_page); 307 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 308 309 /* 310 * notify the firmware that the read buffer is available 311 * for it to fill again 312 */ 313 locl ^= mbox; 314 315 ican3_set_page(mod, QUEUE_OLD_CONTROL); 316 iowrite8(locl, mod->dpm + MSYNC_LOCL); 317 return 0; 318} 319 320/* 321 * Send a message through the "old-style" firmware interface 322 * 323 * LOCKING: must hold mod->lock 324 * 325 * returns 0 on success, -ENOMEM when no free space exists 326 */ 327static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 328{ 329 unsigned int mbox, mbox_page; 330 u8 locl, peer, xord; 331 332 /* get the MSYNC registers */ 333 ican3_set_page(mod, QUEUE_OLD_CONTROL); 334 peer = ioread8(mod->dpm + MSYNC_PEER); 335 locl = ioread8(mod->dpm + MSYNC_LOCL); 336 xord = locl ^ peer; 337 338 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) { 339 dev_err(mod->dev, "no mbox for writing\n"); 340 return -ENOMEM; 341 } 342 343 /* calculate a free mbox to use */ 344 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0; 345 346 /* copy the message to the DPM */ 347 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1; 348 ican3_set_page(mod, mbox_page); 349 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 350 351 locl ^= mbox; 352 if (mbox == MSYNC_WB1) 353 locl |= MSYNC_WBLW; 354 355 ican3_set_page(mod, QUEUE_OLD_CONTROL); 356 iowrite8(locl, mod->dpm + MSYNC_LOCL); 357 return 0; 358} 359 360/* 361 * ICAN3 "new-style" Host Interface Setup 362 */ 363 364static void __devinit ican3_init_new_host_interface(struct ican3_dev *mod) 365{ 366 struct ican3_new_desc desc; 367 unsigned long flags; 368 void __iomem *dst; 369 int i; 370 371 spin_lock_irqsave(&mod->lock, flags); 372 373 /* setup the internal datastructures for RX */ 374 mod->rx_num = 0; 375 mod->rx_int = 0; 376 377 /* tohost queue descriptors are in page 5 */ 378 ican3_set_page(mod, QUEUE_TOHOST); 379 dst = mod->dpm; 380 381 /* initialize the tohost (rx) queue descriptors: pages 9-24 */ 382 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 383 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */ 384 desc.pointer = mod->free_page; 385 386 /* set wrap flag on last buffer */ 387 if (i == ICAN3_NEW_BUFFERS - 1) 388 desc.control |= DESC_WRAP; 389 390 memcpy_toio(dst, &desc, sizeof(desc)); 391 dst += sizeof(desc); 392 mod->free_page++; 393 } 394 395 /* fromhost (tx) mid queue descriptors are in page 6 */ 396 ican3_set_page(mod, QUEUE_FROMHOST_MID); 397 dst = mod->dpm; 398 399 /* setup the internal datastructures for TX */ 400 mod->tx_num = 0; 401 402 /* initialize the fromhost mid queue descriptors: pages 25-40 */ 403 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 404 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */ 405 desc.pointer = mod->free_page; 406 407 /* set wrap flag on last buffer */ 408 if (i == ICAN3_NEW_BUFFERS - 1) 409 desc.control |= DESC_WRAP; 410 411 memcpy_toio(dst, &desc, sizeof(desc)); 412 dst += sizeof(desc); 413 mod->free_page++; 414 } 415 416 /* fromhost hi queue descriptors are in page 7 */ 417 ican3_set_page(mod, QUEUE_FROMHOST_HIGH); 418 dst = mod->dpm; 419 420 /* initialize only a single buffer in the fromhost hi queue (unused) */ 421 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 422 desc.pointer = mod->free_page; 423 memcpy_toio(dst, &desc, sizeof(desc)); 424 mod->free_page++; 425 426 /* fromhost low queue descriptors are in page 8 */ 427 ican3_set_page(mod, QUEUE_FROMHOST_LOW); 428 dst = mod->dpm; 429 430 /* initialize only a single buffer in the fromhost low queue (unused) */ 431 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 432 desc.pointer = mod->free_page; 433 memcpy_toio(dst, &desc, sizeof(desc)); 434 mod->free_page++; 435 436 spin_unlock_irqrestore(&mod->lock, flags); 437} 438 439/* 440 * ICAN3 Fast Host Interface Setup 441 */ 442 443static void __devinit ican3_init_fast_host_interface(struct ican3_dev *mod) 444{ 445 struct ican3_fast_desc desc; 446 unsigned long flags; 447 unsigned int addr; 448 void __iomem *dst; 449 int i; 450 451 spin_lock_irqsave(&mod->lock, flags); 452 453 /* save the start recv page */ 454 mod->fastrx_start = mod->free_page; 455 mod->fastrx_num = 0; 456 457 /* build a single fast tohost queue descriptor */ 458 memset(&desc, 0, sizeof(desc)); 459 desc.control = 0x00; 460 desc.command = 1; 461 462 /* build the tohost queue descriptor ring in memory */ 463 addr = 0; 464 for (i = 0; i < ICAN3_RX_BUFFERS; i++) { 465 466 /* set the wrap bit on the last buffer */ 467 if (i == ICAN3_RX_BUFFERS - 1) 468 desc.control |= DESC_WRAP; 469 470 /* switch to the correct page */ 471 ican3_set_page(mod, mod->free_page); 472 473 /* copy the descriptor to the DPM */ 474 dst = mod->dpm + addr; 475 memcpy_toio(dst, &desc, sizeof(desc)); 476 addr += sizeof(desc); 477 478 /* move to the next page if necessary */ 479 if (addr >= DPM_PAGE_SIZE) { 480 addr = 0; 481 mod->free_page++; 482 } 483 } 484 485 /* make sure we page-align the next queue */ 486 if (addr != 0) 487 mod->free_page++; 488 489 /* save the start xmit page */ 490 mod->fasttx_start = mod->free_page; 491 mod->fasttx_num = 0; 492 493 /* build a single fast fromhost queue descriptor */ 494 memset(&desc, 0, sizeof(desc)); 495 desc.control = DESC_VALID; 496 desc.command = 1; 497 498 /* build the fromhost queue descriptor ring in memory */ 499 addr = 0; 500 for (i = 0; i < ICAN3_TX_BUFFERS; i++) { 501 502 /* set the wrap bit on the last buffer */ 503 if (i == ICAN3_TX_BUFFERS - 1) 504 desc.control |= DESC_WRAP; 505 506 /* switch to the correct page */ 507 ican3_set_page(mod, mod->free_page); 508 509 /* copy the descriptor to the DPM */ 510 dst = mod->dpm + addr; 511 memcpy_toio(dst, &desc, sizeof(desc)); 512 addr += sizeof(desc); 513 514 /* move to the next page if necessary */ 515 if (addr >= DPM_PAGE_SIZE) { 516 addr = 0; 517 mod->free_page++; 518 } 519 } 520 521 spin_unlock_irqrestore(&mod->lock, flags); 522} 523 524/* 525 * ICAN3 "new-style" Host Interface Message Helpers 526 */ 527 528/* 529 * LOCKING: must hold mod->lock 530 */ 531static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 532{ 533 struct ican3_new_desc desc; 534 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc)); 535 536 /* switch to the fromhost mid queue, and read the buffer descriptor */ 537 ican3_set_page(mod, QUEUE_FROMHOST_MID); 538 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 539 540 if (!(desc.control & DESC_VALID)) { 541 dev_dbg(mod->dev, "%s: no free buffers\n", __func__); 542 return -ENOMEM; 543 } 544 545 /* switch to the data page, copy the data */ 546 ican3_set_page(mod, desc.pointer); 547 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 548 549 /* switch back to the descriptor, set the valid bit, write it back */ 550 ican3_set_page(mod, QUEUE_FROMHOST_MID); 551 desc.control ^= DESC_VALID; 552 memcpy_toio(desc_addr, &desc, sizeof(desc)); 553 554 /* update the tx number */ 555 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1); 556 return 0; 557} 558 559/* 560 * LOCKING: must hold mod->lock 561 */ 562static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 563{ 564 struct ican3_new_desc desc; 565 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc)); 566 567 /* switch to the tohost queue, and read the buffer descriptor */ 568 ican3_set_page(mod, QUEUE_TOHOST); 569 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 570 571 if (!(desc.control & DESC_VALID)) { 572 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__); 573 return -ENOMEM; 574 } 575 576 /* switch to the data page, copy the data */ 577 ican3_set_page(mod, desc.pointer); 578 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 579 580 /* switch back to the descriptor, toggle the valid bit, write it back */ 581 ican3_set_page(mod, QUEUE_TOHOST); 582 desc.control ^= DESC_VALID; 583 memcpy_toio(desc_addr, &desc, sizeof(desc)); 584 585 /* update the rx number */ 586 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1); 587 return 0; 588} 589 590/* 591 * Message Send / Recv Helpers 592 */ 593 594static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 595{ 596 unsigned long flags; 597 int ret; 598 599 spin_lock_irqsave(&mod->lock, flags); 600 601 if (mod->iftype == 0) 602 ret = ican3_old_send_msg(mod, msg); 603 else 604 ret = ican3_new_send_msg(mod, msg); 605 606 spin_unlock_irqrestore(&mod->lock, flags); 607 return ret; 608} 609 610static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 611{ 612 unsigned long flags; 613 int ret; 614 615 spin_lock_irqsave(&mod->lock, flags); 616 617 if (mod->iftype == 0) 618 ret = ican3_old_recv_msg(mod, msg); 619 else 620 ret = ican3_new_recv_msg(mod, msg); 621 622 spin_unlock_irqrestore(&mod->lock, flags); 623 return ret; 624} 625 626/* 627 * Quick Pre-constructed Messages 628 */ 629 630static int __devinit ican3_msg_connect(struct ican3_dev *mod) 631{ 632 struct ican3_msg msg; 633 634 memset(&msg, 0, sizeof(msg)); 635 msg.spec = MSG_CONNECTI; 636 msg.len = cpu_to_le16(0); 637 638 return ican3_send_msg(mod, &msg); 639} 640 641static int __devexit ican3_msg_disconnect(struct ican3_dev *mod) 642{ 643 struct ican3_msg msg; 644 645 memset(&msg, 0, sizeof(msg)); 646 msg.spec = MSG_DISCONNECT; 647 msg.len = cpu_to_le16(0); 648 649 return ican3_send_msg(mod, &msg); 650} 651 652static int __devinit ican3_msg_newhostif(struct ican3_dev *mod) 653{ 654 struct ican3_msg msg; 655 int ret; 656 657 memset(&msg, 0, sizeof(msg)); 658 msg.spec = MSG_NEWHOSTIF; 659 msg.len = cpu_to_le16(0); 660 661 /* If we're not using the old interface, switching seems bogus */ 662 WARN_ON(mod->iftype != 0); 663 664 ret = ican3_send_msg(mod, &msg); 665 if (ret) 666 return ret; 667 668 /* mark the module as using the new host interface */ 669 mod->iftype = 1; 670 return 0; 671} 672 673static int __devinit ican3_msg_fasthostif(struct ican3_dev *mod) 674{ 675 struct ican3_msg msg; 676 unsigned int addr; 677 678 memset(&msg, 0, sizeof(msg)); 679 msg.spec = MSG_INITFDPMQUEUE; 680 msg.len = cpu_to_le16(8); 681 682 /* write the tohost queue start address */ 683 addr = DPM_PAGE_ADDR(mod->fastrx_start); 684 msg.data[0] = addr & 0xff; 685 msg.data[1] = (addr >> 8) & 0xff; 686 msg.data[2] = (addr >> 16) & 0xff; 687 msg.data[3] = (addr >> 24) & 0xff; 688 689 /* write the fromhost queue start address */ 690 addr = DPM_PAGE_ADDR(mod->fasttx_start); 691 msg.data[4] = addr & 0xff; 692 msg.data[5] = (addr >> 8) & 0xff; 693 msg.data[6] = (addr >> 16) & 0xff; 694 msg.data[7] = (addr >> 24) & 0xff; 695 696 /* If we're not using the new interface yet, we cannot do this */ 697 WARN_ON(mod->iftype != 1); 698 699 return ican3_send_msg(mod, &msg); 700} 701 702/* 703 * Setup the CAN filter to either accept or reject all 704 * messages from the CAN bus. 705 */ 706static int __devinit ican3_set_id_filter(struct ican3_dev *mod, bool accept) 707{ 708 struct ican3_msg msg; 709 int ret; 710 711 /* Standard Frame Format */ 712 memset(&msg, 0, sizeof(msg)); 713 msg.spec = MSG_SETAFILMASK; 714 msg.len = cpu_to_le16(5); 715 msg.data[0] = 0x00; /* IDLo LSB */ 716 msg.data[1] = 0x00; /* IDLo MSB */ 717 msg.data[2] = 0xff; /* IDHi LSB */ 718 msg.data[3] = 0x07; /* IDHi MSB */ 719 720 /* accept all frames for fast host if, or reject all frames */ 721 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 722 723 ret = ican3_send_msg(mod, &msg); 724 if (ret) 725 return ret; 726 727 /* Extended Frame Format */ 728 memset(&msg, 0, sizeof(msg)); 729 msg.spec = MSG_SETAFILMASK; 730 msg.len = cpu_to_le16(13); 731 msg.data[0] = 0; /* MUX = 0 */ 732 msg.data[1] = 0x00; /* IDLo LSB */ 733 msg.data[2] = 0x00; 734 msg.data[3] = 0x00; 735 msg.data[4] = 0x20; /* IDLo MSB */ 736 msg.data[5] = 0xff; /* IDHi LSB */ 737 msg.data[6] = 0xff; 738 msg.data[7] = 0xff; 739 msg.data[8] = 0x3f; /* IDHi MSB */ 740 741 /* accept all frames for fast host if, or reject all frames */ 742 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 743 744 return ican3_send_msg(mod, &msg); 745} 746 747/* 748 * Bring the CAN bus online or offline 749 */ 750static int ican3_set_bus_state(struct ican3_dev *mod, bool on) 751{ 752 struct ican3_msg msg; 753 754 memset(&msg, 0, sizeof(msg)); 755 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ; 756 msg.len = cpu_to_le16(0); 757 758 return ican3_send_msg(mod, &msg); 759} 760 761static int ican3_set_termination(struct ican3_dev *mod, bool on) 762{ 763 struct ican3_msg msg; 764 765 memset(&msg, 0, sizeof(msg)); 766 msg.spec = MSG_HWCONF; 767 msg.len = cpu_to_le16(2); 768 msg.data[0] = 0x00; 769 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF; 770 771 return ican3_send_msg(mod, &msg); 772} 773 774static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec) 775{ 776 struct ican3_msg msg; 777 778 memset(&msg, 0, sizeof(msg)); 779 msg.spec = MSG_INQUIRY; 780 msg.len = cpu_to_le16(2); 781 msg.data[0] = subspec; 782 msg.data[1] = 0x00; 783 784 return ican3_send_msg(mod, &msg); 785} 786 787static int ican3_set_buserror(struct ican3_dev *mod, u8 quota) 788{ 789 struct ican3_msg msg; 790 791 memset(&msg, 0, sizeof(msg)); 792 msg.spec = MSG_CCONFREQ; 793 msg.len = cpu_to_le16(2); 794 msg.data[0] = 0x00; 795 msg.data[1] = quota; 796 797 return ican3_send_msg(mod, &msg); 798} 799 800/* 801 * ICAN3 to Linux CAN Frame Conversion 802 */ 803 804static void ican3_to_can_frame(struct ican3_dev *mod, 805 struct ican3_fast_desc *desc, 806 struct can_frame *cf) 807{ 808 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) { 809 if (desc->data[1] & ICAN3_SFF_RTR) 810 cf->can_id |= CAN_RTR_FLAG; 811 812 cf->can_id |= desc->data[0] << 3; 813 cf->can_id |= (desc->data[1] & 0xe0) >> 5; 814 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK); 815 memcpy(cf->data, &desc->data[2], cf->can_dlc); 816 } else { 817 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK); 818 if (desc->data[0] & ICAN3_EFF_RTR) 819 cf->can_id |= CAN_RTR_FLAG; 820 821 if (desc->data[0] & ICAN3_EFF) { 822 cf->can_id |= CAN_EFF_FLAG; 823 cf->can_id |= desc->data[2] << 21; /* 28-21 */ 824 cf->can_id |= desc->data[3] << 13; /* 20-13 */ 825 cf->can_id |= desc->data[4] << 5; /* 12-5 */ 826 cf->can_id |= (desc->data[5] & 0xf8) >> 3; 827 } else { 828 cf->can_id |= desc->data[2] << 3; /* 10-3 */ 829 cf->can_id |= desc->data[3] >> 5; /* 2-0 */ 830 } 831 832 memcpy(cf->data, &desc->data[6], cf->can_dlc); 833 } 834} 835 836static void can_frame_to_ican3(struct ican3_dev *mod, 837 struct can_frame *cf, 838 struct ican3_fast_desc *desc) 839{ 840 /* clear out any stale data in the descriptor */ 841 memset(desc->data, 0, sizeof(desc->data)); 842 843 /* we always use the extended format, with the ECHO flag set */ 844 desc->command = ICAN3_CAN_TYPE_EFF; 845 desc->data[0] |= cf->can_dlc; 846 desc->data[1] |= ICAN3_ECHO; 847 848 if (cf->can_id & CAN_RTR_FLAG) 849 desc->data[0] |= ICAN3_EFF_RTR; 850 851 /* pack the id into the correct places */ 852 if (cf->can_id & CAN_EFF_FLAG) { 853 desc->data[0] |= ICAN3_EFF; 854 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */ 855 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */ 856 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */ 857 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */ 858 } else { 859 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */ 860 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */ 861 } 862 863 /* copy the data bits into the descriptor */ 864 memcpy(&desc->data[6], cf->data, cf->can_dlc); 865} 866 867/* 868 * Interrupt Handling 869 */ 870 871/* 872 * Handle an ID + Version message response from the firmware. We never generate 873 * this message in production code, but it is very useful when debugging to be 874 * able to display this message. 875 */ 876static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg) 877{ 878 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data); 879} 880 881static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg) 882{ 883 struct net_device *dev = mod->ndev; 884 struct net_device_stats *stats = &dev->stats; 885 struct can_frame *cf; 886 struct sk_buff *skb; 887 888 /* 889 * Report that communication messages with the microcontroller firmware 890 * are being lost. These are never CAN frames, so we do not generate an 891 * error frame for userspace 892 */ 893 if (msg->spec == MSG_MSGLOST) { 894 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]); 895 return; 896 } 897 898 /* 899 * Oops, this indicates that we have lost messages in the fast queue, 900 * which are exclusively CAN messages. Our driver isn't reading CAN 901 * frames fast enough. 902 * 903 * We'll pretend that the SJA1000 told us that it ran out of buffer 904 * space, because there is not a better message for this. 905 */ 906 skb = alloc_can_err_skb(dev, &cf); 907 if (skb) { 908 cf->can_id |= CAN_ERR_CRTL; 909 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 910 stats->rx_over_errors++; 911 stats->rx_errors++; 912 netif_rx(skb); 913 } 914} 915 916/* 917 * Handle CAN Event Indication Messages from the firmware 918 * 919 * The ICAN3 firmware provides the values of some SJA1000 registers when it 920 * generates this message. The code below is largely copied from the 921 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary 922 */ 923static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg) 924{ 925 struct net_device *dev = mod->ndev; 926 struct net_device_stats *stats = &dev->stats; 927 enum can_state state = mod->can.state; 928 u8 status, isrc, rxerr, txerr; 929 struct can_frame *cf; 930 struct sk_buff *skb; 931 932 /* we can only handle the SJA1000 part */ 933 if (msg->data[1] != CEVTIND_CHIP_SJA1000) { 934 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n"); 935 return -ENODEV; 936 } 937 938 /* check the message length for sanity */ 939 if (le16_to_cpu(msg->len) < 6) { 940 dev_err(mod->dev, "error message too short\n"); 941 return -EINVAL; 942 } 943 944 skb = alloc_can_err_skb(dev, &cf); 945 if (skb == NULL) 946 return -ENOMEM; 947 948 isrc = msg->data[0]; 949 status = msg->data[3]; 950 rxerr = msg->data[4]; 951 txerr = msg->data[5]; 952 953 /* data overrun interrupt */ 954 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) { 955 dev_dbg(mod->dev, "data overrun interrupt\n"); 956 cf->can_id |= CAN_ERR_CRTL; 957 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 958 stats->rx_over_errors++; 959 stats->rx_errors++; 960 } 961 962 /* error warning + passive interrupt */ 963 if (isrc == CEVTIND_EI) { 964 dev_dbg(mod->dev, "error warning + passive interrupt\n"); 965 if (status & SR_BS) { 966 state = CAN_STATE_BUS_OFF; 967 cf->can_id |= CAN_ERR_BUSOFF; 968 can_bus_off(dev); 969 } else if (status & SR_ES) { 970 if (rxerr >= 128 || txerr >= 128) 971 state = CAN_STATE_ERROR_PASSIVE; 972 else 973 state = CAN_STATE_ERROR_WARNING; 974 } else { 975 state = CAN_STATE_ERROR_ACTIVE; 976 } 977 } 978 979 /* bus error interrupt */ 980 if (isrc == CEVTIND_BEI) { 981 u8 ecc = msg->data[2]; 982 983 dev_dbg(mod->dev, "bus error interrupt\n"); 984 mod->can.can_stats.bus_error++; 985 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 986 987 switch (ecc & ECC_MASK) { 988 case ECC_BIT: 989 cf->data[2] |= CAN_ERR_PROT_BIT; 990 break; 991 case ECC_FORM: 992 cf->data[2] |= CAN_ERR_PROT_FORM; 993 break; 994 case ECC_STUFF: 995 cf->data[2] |= CAN_ERR_PROT_STUFF; 996 break; 997 default: 998 cf->data[2] |= CAN_ERR_PROT_UNSPEC; 999 cf->data[3] = ecc & ECC_SEG; 1000 break; 1001 } 1002 1003 if (!(ecc & ECC_DIR)) { 1004 cf->data[2] |= CAN_ERR_PROT_TX; 1005 stats->tx_errors++; 1006 } else { 1007 stats->rx_errors++; 1008 } 1009 1010 cf->data[6] = txerr; 1011 cf->data[7] = rxerr; 1012 } 1013 1014 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING || 1015 state == CAN_STATE_ERROR_PASSIVE)) { 1016 cf->can_id |= CAN_ERR_CRTL; 1017 if (state == CAN_STATE_ERROR_WARNING) { 1018 mod->can.can_stats.error_warning++; 1019 cf->data[1] = (txerr > rxerr) ? 1020 CAN_ERR_CRTL_TX_WARNING : 1021 CAN_ERR_CRTL_RX_WARNING; 1022 } else { 1023 mod->can.can_stats.error_passive++; 1024 cf->data[1] = (txerr > rxerr) ? 1025 CAN_ERR_CRTL_TX_PASSIVE : 1026 CAN_ERR_CRTL_RX_PASSIVE; 1027 } 1028 1029 cf->data[6] = txerr; 1030 cf->data[7] = rxerr; 1031 } 1032 1033 mod->can.state = state; 1034 netif_rx(skb); 1035 return 0; 1036} 1037 1038static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg) 1039{ 1040 switch (msg->data[0]) { 1041 case INQUIRY_STATUS: 1042 case INQUIRY_EXTENDED: 1043 mod->bec.rxerr = msg->data[5]; 1044 mod->bec.txerr = msg->data[6]; 1045 complete(&mod->buserror_comp); 1046 break; 1047 case INQUIRY_TERMINATION: 1048 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON; 1049 complete(&mod->termination_comp); 1050 break; 1051 default: 1052 dev_err(mod->dev, "received an unknown inquiry response\n"); 1053 break; 1054 } 1055} 1056 1057static void ican3_handle_unknown_message(struct ican3_dev *mod, 1058 struct ican3_msg *msg) 1059{ 1060 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n", 1061 msg->spec, le16_to_cpu(msg->len)); 1062} 1063 1064/* 1065 * Handle a control message from the firmware 1066 */ 1067static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg) 1068{ 1069 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__, 1070 mod->num, msg->spec, le16_to_cpu(msg->len)); 1071 1072 switch (msg->spec) { 1073 case MSG_IDVERS: 1074 ican3_handle_idvers(mod, msg); 1075 break; 1076 case MSG_MSGLOST: 1077 case MSG_FMSGLOST: 1078 ican3_handle_msglost(mod, msg); 1079 break; 1080 case MSG_CEVTIND: 1081 ican3_handle_cevtind(mod, msg); 1082 break; 1083 case MSG_INQUIRY: 1084 ican3_handle_inquiry(mod, msg); 1085 break; 1086 default: 1087 ican3_handle_unknown_message(mod, msg); 1088 break; 1089 } 1090} 1091 1092/* 1093 * Check that there is room in the TX ring to transmit another skb 1094 * 1095 * LOCKING: must hold mod->lock 1096 */ 1097static bool ican3_txok(struct ican3_dev *mod) 1098{ 1099 struct ican3_fast_desc __iomem *desc; 1100 u8 control; 1101 1102 /* copy the control bits of the descriptor */ 1103 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1104 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc)); 1105 control = ioread8(&desc->control); 1106 1107 /* if the control bits are not valid, then we have no more space */ 1108 if (!(control & DESC_VALID)) 1109 return false; 1110 1111 return true; 1112} 1113 1114/* 1115 * Receive one CAN frame from the hardware 1116 * 1117 * CONTEXT: must be called from user context 1118 */ 1119static int ican3_recv_skb(struct ican3_dev *mod) 1120{ 1121 struct net_device *ndev = mod->ndev; 1122 struct net_device_stats *stats = &ndev->stats; 1123 struct ican3_fast_desc desc; 1124 void __iomem *desc_addr; 1125 struct can_frame *cf; 1126 struct sk_buff *skb; 1127 unsigned long flags; 1128 1129 spin_lock_irqsave(&mod->lock, flags); 1130 1131 /* copy the whole descriptor */ 1132 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1133 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc)); 1134 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 1135 1136 spin_unlock_irqrestore(&mod->lock, flags); 1137 1138 /* check that we actually have a CAN frame */ 1139 if (!(desc.control & DESC_VALID)) 1140 return -ENOBUFS; 1141 1142 /* allocate an skb */ 1143 skb = alloc_can_skb(ndev, &cf); 1144 if (unlikely(skb == NULL)) { 1145 stats->rx_dropped++; 1146 goto err_noalloc; 1147 } 1148 1149 /* convert the ICAN3 frame into Linux CAN format */ 1150 ican3_to_can_frame(mod, &desc, cf); 1151 1152 /* receive the skb, update statistics */ 1153 netif_receive_skb(skb); 1154 stats->rx_packets++; 1155 stats->rx_bytes += cf->can_dlc; 1156 1157err_noalloc: 1158 /* toggle the valid bit and return the descriptor to the ring */ 1159 desc.control ^= DESC_VALID; 1160 1161 spin_lock_irqsave(&mod->lock, flags); 1162 1163 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1164 memcpy_toio(desc_addr, &desc, 1); 1165 1166 /* update the next buffer pointer */ 1167 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0 1168 : (mod->fastrx_num + 1); 1169 1170 /* there are still more buffers to process */ 1171 spin_unlock_irqrestore(&mod->lock, flags); 1172 return 0; 1173} 1174 1175static int ican3_napi(struct napi_struct *napi, int budget) 1176{ 1177 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi); 1178 struct ican3_msg msg; 1179 unsigned long flags; 1180 int received = 0; 1181 int ret; 1182 1183 /* process all communication messages */ 1184 while (true) { 1185 ret = ican3_recv_msg(mod, &msg); 1186 if (ret) 1187 break; 1188 1189 ican3_handle_message(mod, &msg); 1190 } 1191 1192 /* process all CAN frames from the fast interface */ 1193 while (received < budget) { 1194 ret = ican3_recv_skb(mod); 1195 if (ret) 1196 break; 1197 1198 received++; 1199 } 1200 1201 /* We have processed all packets that the adapter had, but it 1202 * was less than our budget, stop polling */ 1203 if (received < budget) 1204 napi_complete(napi); 1205 1206 spin_lock_irqsave(&mod->lock, flags); 1207 1208 /* Wake up the transmit queue if necessary */ 1209 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod)) 1210 netif_wake_queue(mod->ndev); 1211 1212 spin_unlock_irqrestore(&mod->lock, flags); 1213 1214 /* re-enable interrupt generation */ 1215 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1216 return received; 1217} 1218 1219static irqreturn_t ican3_irq(int irq, void *dev_id) 1220{ 1221 struct ican3_dev *mod = dev_id; 1222 u8 stat; 1223 1224 /* 1225 * The interrupt status register on this device reports interrupts 1226 * as zeroes instead of using ones like most other devices 1227 */ 1228 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num); 1229 if (stat == (1 << mod->num)) 1230 return IRQ_NONE; 1231 1232 /* clear the MODULbus interrupt from the microcontroller */ 1233 ioread8(&mod->dpmctrl->interrupt); 1234 1235 /* disable interrupt generation, schedule the NAPI poller */ 1236 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1237 napi_schedule(&mod->napi); 1238 return IRQ_HANDLED; 1239} 1240 1241/* 1242 * Firmware reset, startup, and shutdown 1243 */ 1244 1245/* 1246 * Reset an ICAN module to its power-on state 1247 * 1248 * CONTEXT: no network device registered 1249 */ 1250static int ican3_reset_module(struct ican3_dev *mod) 1251{ 1252 u8 val = 1 << mod->num; 1253 unsigned long start; 1254 u8 runold, runnew; 1255 1256 /* disable interrupts so no more work is scheduled */ 1257 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1258 1259 /* the first unallocated page in the DPM is #9 */ 1260 mod->free_page = DPM_FREE_START; 1261 1262 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1263 runold = ioread8(mod->dpm + TARGET_RUNNING); 1264 1265 /* reset the module */ 1266 iowrite8(val, &mod->ctrl->reset_assert); 1267 iowrite8(val, &mod->ctrl->reset_deassert); 1268 1269 /* wait until the module has finished resetting and is running */ 1270 start = jiffies; 1271 do { 1272 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1273 runnew = ioread8(mod->dpm + TARGET_RUNNING); 1274 if (runnew == (runold ^ 0xff)) 1275 return 0; 1276 1277 msleep(10); 1278 } while (time_before(jiffies, start + HZ / 4)); 1279 1280 dev_err(mod->dev, "failed to reset CAN module\n"); 1281 return -ETIMEDOUT; 1282} 1283 1284static void __devexit ican3_shutdown_module(struct ican3_dev *mod) 1285{ 1286 ican3_msg_disconnect(mod); 1287 ican3_reset_module(mod); 1288} 1289 1290/* 1291 * Startup an ICAN module, bringing it into fast mode 1292 */ 1293static int __devinit ican3_startup_module(struct ican3_dev *mod) 1294{ 1295 int ret; 1296 1297 ret = ican3_reset_module(mod); 1298 if (ret) { 1299 dev_err(mod->dev, "unable to reset module\n"); 1300 return ret; 1301 } 1302 1303 /* re-enable interrupts so we can send messages */ 1304 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1305 1306 ret = ican3_msg_connect(mod); 1307 if (ret) { 1308 dev_err(mod->dev, "unable to connect to module\n"); 1309 return ret; 1310 } 1311 1312 ican3_init_new_host_interface(mod); 1313 ret = ican3_msg_newhostif(mod); 1314 if (ret) { 1315 dev_err(mod->dev, "unable to switch to new-style interface\n"); 1316 return ret; 1317 } 1318 1319 /* default to "termination on" */ 1320 ret = ican3_set_termination(mod, true); 1321 if (ret) { 1322 dev_err(mod->dev, "unable to enable termination\n"); 1323 return ret; 1324 } 1325 1326 /* default to "bus errors enabled" */ 1327 ret = ican3_set_buserror(mod, ICAN3_BUSERR_QUOTA_MAX); 1328 if (ret) { 1329 dev_err(mod->dev, "unable to set bus-error\n"); 1330 return ret; 1331 } 1332 1333 ican3_init_fast_host_interface(mod); 1334 ret = ican3_msg_fasthostif(mod); 1335 if (ret) { 1336 dev_err(mod->dev, "unable to switch to fast host interface\n"); 1337 return ret; 1338 } 1339 1340 ret = ican3_set_id_filter(mod, true); 1341 if (ret) { 1342 dev_err(mod->dev, "unable to set acceptance filter\n"); 1343 return ret; 1344 } 1345 1346 return 0; 1347} 1348 1349/* 1350 * CAN Network Device 1351 */ 1352 1353static int ican3_open(struct net_device *ndev) 1354{ 1355 struct ican3_dev *mod = netdev_priv(ndev); 1356 u8 quota; 1357 int ret; 1358 1359 /* open the CAN layer */ 1360 ret = open_candev(ndev); 1361 if (ret) { 1362 dev_err(mod->dev, "unable to start CAN layer\n"); 1363 return ret; 1364 } 1365 1366 /* set the bus error generation state appropriately */ 1367 if (mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 1368 quota = ICAN3_BUSERR_QUOTA_MAX; 1369 else 1370 quota = 0; 1371 1372 ret = ican3_set_buserror(mod, quota); 1373 if (ret) { 1374 dev_err(mod->dev, "unable to set bus-error\n"); 1375 close_candev(ndev); 1376 return ret; 1377 } 1378 1379 /* bring the bus online */ 1380 ret = ican3_set_bus_state(mod, true); 1381 if (ret) { 1382 dev_err(mod->dev, "unable to set bus-on\n"); 1383 close_candev(ndev); 1384 return ret; 1385 } 1386 1387 /* start up the network device */ 1388 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1389 netif_start_queue(ndev); 1390 1391 return 0; 1392} 1393 1394static int ican3_stop(struct net_device *ndev) 1395{ 1396 struct ican3_dev *mod = netdev_priv(ndev); 1397 int ret; 1398 1399 /* stop the network device xmit routine */ 1400 netif_stop_queue(ndev); 1401 mod->can.state = CAN_STATE_STOPPED; 1402 1403 /* bring the bus offline, stop receiving packets */ 1404 ret = ican3_set_bus_state(mod, false); 1405 if (ret) { 1406 dev_err(mod->dev, "unable to set bus-off\n"); 1407 return ret; 1408 } 1409 1410 /* close the CAN layer */ 1411 close_candev(ndev); 1412 return 0; 1413} 1414 1415static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev) 1416{ 1417 struct ican3_dev *mod = netdev_priv(ndev); 1418 struct net_device_stats *stats = &ndev->stats; 1419 struct can_frame *cf = (struct can_frame *)skb->data; 1420 struct ican3_fast_desc desc; 1421 void __iomem *desc_addr; 1422 unsigned long flags; 1423 1424 if (can_dropped_invalid_skb(ndev, skb)) 1425 return NETDEV_TX_OK; 1426 1427 spin_lock_irqsave(&mod->lock, flags); 1428 1429 /* check that we can actually transmit */ 1430 if (!ican3_txok(mod)) { 1431 dev_err(mod->dev, "no free descriptors, stopping queue\n"); 1432 netif_stop_queue(ndev); 1433 spin_unlock_irqrestore(&mod->lock, flags); 1434 return NETDEV_TX_BUSY; 1435 } 1436 1437 /* copy the control bits of the descriptor */ 1438 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1439 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc)); 1440 memset(&desc, 0, sizeof(desc)); 1441 memcpy_fromio(&desc, desc_addr, 1); 1442 1443 /* convert the Linux CAN frame into ICAN3 format */ 1444 can_frame_to_ican3(mod, cf, &desc); 1445 1446 /* 1447 * the programming manual says that you must set the IVALID bit, then 1448 * interrupt, then set the valid bit. Quite weird, but it seems to be 1449 * required for this to work 1450 */ 1451 desc.control |= DESC_IVALID; 1452 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1453 1454 /* generate a MODULbus interrupt to the microcontroller */ 1455 iowrite8(0x01, &mod->dpmctrl->interrupt); 1456 1457 desc.control ^= DESC_VALID; 1458 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1459 1460 /* update the next buffer pointer */ 1461 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0 1462 : (mod->fasttx_num + 1); 1463 1464 /* update statistics */ 1465 stats->tx_packets++; 1466 stats->tx_bytes += cf->can_dlc; 1467 kfree_skb(skb); 1468 1469 /* 1470 * This hardware doesn't have TX-done notifications, so we'll try and 1471 * emulate it the best we can using ECHO skbs. Get the next TX 1472 * descriptor, and see if we have room to send. If not, stop the queue. 1473 * It will be woken when the ECHO skb for the current packet is recv'd. 1474 */ 1475 1476 /* copy the control bits of the descriptor */ 1477 if (!ican3_txok(mod)) 1478 netif_stop_queue(ndev); 1479 1480 spin_unlock_irqrestore(&mod->lock, flags); 1481 return NETDEV_TX_OK; 1482} 1483 1484static const struct net_device_ops ican3_netdev_ops = { 1485 .ndo_open = ican3_open, 1486 .ndo_stop = ican3_stop, 1487 .ndo_start_xmit = ican3_xmit, 1488}; 1489 1490/* 1491 * Low-level CAN Device 1492 */ 1493 1494/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */ 1495static const struct can_bittiming_const ican3_bittiming_const = { 1496 .name = DRV_NAME, 1497 .tseg1_min = 1, 1498 .tseg1_max = 16, 1499 .tseg2_min = 1, 1500 .tseg2_max = 8, 1501 .sjw_max = 4, 1502 .brp_min = 1, 1503 .brp_max = 64, 1504 .brp_inc = 1, 1505}; 1506 1507/* 1508 * This routine was stolen from drivers/net/can/sja1000/sja1000.c 1509 * 1510 * The bittiming register command for the ICAN3 just sets the bit timing 1511 * registers on the SJA1000 chip directly 1512 */ 1513static int ican3_set_bittiming(struct net_device *ndev) 1514{ 1515 struct ican3_dev *mod = netdev_priv(ndev); 1516 struct can_bittiming *bt = &mod->can.bittiming; 1517 struct ican3_msg msg; 1518 u8 btr0, btr1; 1519 1520 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6); 1521 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) | 1522 (((bt->phase_seg2 - 1) & 0x7) << 4); 1523 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 1524 btr1 |= 0x80; 1525 1526 memset(&msg, 0, sizeof(msg)); 1527 msg.spec = MSG_CBTRREQ; 1528 msg.len = cpu_to_le16(4); 1529 msg.data[0] = 0x00; 1530 msg.data[1] = 0x00; 1531 msg.data[2] = btr0; 1532 msg.data[3] = btr1; 1533 1534 return ican3_send_msg(mod, &msg); 1535} 1536 1537static int ican3_set_mode(struct net_device *ndev, enum can_mode mode) 1538{ 1539 struct ican3_dev *mod = netdev_priv(ndev); 1540 int ret; 1541 1542 if (mode != CAN_MODE_START) 1543 return -ENOTSUPP; 1544 1545 /* bring the bus online */ 1546 ret = ican3_set_bus_state(mod, true); 1547 if (ret) { 1548 dev_err(mod->dev, "unable to set bus-on\n"); 1549 return ret; 1550 } 1551 1552 /* start up the network device */ 1553 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1554 1555 if (netif_queue_stopped(ndev)) 1556 netif_wake_queue(ndev); 1557 1558 return 0; 1559} 1560 1561static int ican3_get_berr_counter(const struct net_device *ndev, 1562 struct can_berr_counter *bec) 1563{ 1564 struct ican3_dev *mod = netdev_priv(ndev); 1565 int ret; 1566 1567 ret = ican3_send_inquiry(mod, INQUIRY_STATUS); 1568 if (ret) 1569 return ret; 1570 1571 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ); 1572 if (ret <= 0) { 1573 dev_info(mod->dev, "%s timed out\n", __func__); 1574 return -ETIMEDOUT; 1575 } 1576 1577 bec->rxerr = mod->bec.rxerr; 1578 bec->txerr = mod->bec.txerr; 1579 return 0; 1580} 1581 1582/* 1583 * Sysfs Attributes 1584 */ 1585 1586static ssize_t ican3_sysfs_show_term(struct device *dev, 1587 struct device_attribute *attr, 1588 char *buf) 1589{ 1590 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1591 int ret; 1592 1593 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION); 1594 if (ret) 1595 return ret; 1596 1597 ret = wait_for_completion_timeout(&mod->termination_comp, HZ); 1598 if (ret <= 0) { 1599 dev_info(mod->dev, "%s timed out\n", __func__); 1600 return -ETIMEDOUT; 1601 } 1602 1603 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled); 1604} 1605 1606static ssize_t ican3_sysfs_set_term(struct device *dev, 1607 struct device_attribute *attr, 1608 const char *buf, size_t count) 1609{ 1610 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1611 unsigned long enable; 1612 int ret; 1613 1614 if (strict_strtoul(buf, 0, &enable)) 1615 return -EINVAL; 1616 1617 ret = ican3_set_termination(mod, enable); 1618 if (ret) 1619 return ret; 1620 1621 return count; 1622} 1623 1624static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term, 1625 ican3_sysfs_set_term); 1626 1627static struct attribute *ican3_sysfs_attrs[] = { 1628 &dev_attr_termination.attr, 1629 NULL, 1630}; 1631 1632static struct attribute_group ican3_sysfs_attr_group = { 1633 .attrs = ican3_sysfs_attrs, 1634}; 1635 1636/* 1637 * PCI Subsystem 1638 */ 1639 1640static int __devinit ican3_probe(struct platform_device *pdev) 1641{ 1642 struct janz_platform_data *pdata; 1643 struct net_device *ndev; 1644 struct ican3_dev *mod; 1645 struct resource *res; 1646 struct device *dev; 1647 int ret; 1648 1649 pdata = pdev->dev.platform_data; 1650 if (!pdata) 1651 return -ENXIO; 1652 1653 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno); 1654 1655 /* save the struct device for printing */ 1656 dev = &pdev->dev; 1657 1658 /* allocate the CAN device and private data */ 1659 ndev = alloc_candev(sizeof(*mod), 0); 1660 if (!ndev) { 1661 dev_err(dev, "unable to allocate CANdev\n"); 1662 ret = -ENOMEM; 1663 goto out_return; 1664 } 1665 1666 platform_set_drvdata(pdev, ndev); 1667 mod = netdev_priv(ndev); 1668 mod->ndev = ndev; 1669 mod->dev = &pdev->dev; 1670 mod->num = pdata->modno; 1671 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS); 1672 spin_lock_init(&mod->lock); 1673 init_completion(&mod->termination_comp); 1674 init_completion(&mod->buserror_comp); 1675 1676 /* setup device-specific sysfs attributes */ 1677 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group; 1678 1679 /* the first unallocated page in the DPM is 9 */ 1680 mod->free_page = DPM_FREE_START; 1681 1682 ndev->netdev_ops = &ican3_netdev_ops; 1683 ndev->flags |= IFF_ECHO; 1684 SET_NETDEV_DEV(ndev, &pdev->dev); 1685 1686 mod->can.clock.freq = ICAN3_CAN_CLOCK; 1687 mod->can.bittiming_const = &ican3_bittiming_const; 1688 mod->can.do_set_bittiming = ican3_set_bittiming; 1689 mod->can.do_set_mode = ican3_set_mode; 1690 mod->can.do_get_berr_counter = ican3_get_berr_counter; 1691 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES 1692 | CAN_CTRLMODE_BERR_REPORTING; 1693 1694 /* find our IRQ number */ 1695 mod->irq = platform_get_irq(pdev, 0); 1696 if (mod->irq < 0) { 1697 dev_err(dev, "IRQ line not found\n"); 1698 ret = -ENODEV; 1699 goto out_free_ndev; 1700 } 1701 1702 ndev->irq = mod->irq; 1703 1704 /* get access to the MODULbus registers for this module */ 1705 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1706 if (!res) { 1707 dev_err(dev, "MODULbus registers not found\n"); 1708 ret = -ENODEV; 1709 goto out_free_ndev; 1710 } 1711 1712 mod->dpm = ioremap(res->start, resource_size(res)); 1713 if (!mod->dpm) { 1714 dev_err(dev, "MODULbus registers not ioremap\n"); 1715 ret = -ENOMEM; 1716 goto out_free_ndev; 1717 } 1718 1719 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE; 1720 1721 /* get access to the control registers for this module */ 1722 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1723 if (!res) { 1724 dev_err(dev, "CONTROL registers not found\n"); 1725 ret = -ENODEV; 1726 goto out_iounmap_dpm; 1727 } 1728 1729 mod->ctrl = ioremap(res->start, resource_size(res)); 1730 if (!mod->ctrl) { 1731 dev_err(dev, "CONTROL registers not ioremap\n"); 1732 ret = -ENOMEM; 1733 goto out_iounmap_dpm; 1734 } 1735 1736 /* disable our IRQ, then hookup the IRQ handler */ 1737 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1738 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod); 1739 if (ret) { 1740 dev_err(dev, "unable to request IRQ\n"); 1741 goto out_iounmap_ctrl; 1742 } 1743 1744 /* reset and initialize the CAN controller into fast mode */ 1745 napi_enable(&mod->napi); 1746 ret = ican3_startup_module(mod); 1747 if (ret) { 1748 dev_err(dev, "%s: unable to start CANdev\n", __func__); 1749 goto out_free_irq; 1750 } 1751 1752 /* register with the Linux CAN layer */ 1753 ret = register_candev(ndev); 1754 if (ret) { 1755 dev_err(dev, "%s: unable to register CANdev\n", __func__); 1756 goto out_free_irq; 1757 } 1758 1759 dev_info(dev, "module %d: registered CAN device\n", pdata->modno); 1760 return 0; 1761 1762out_free_irq: 1763 napi_disable(&mod->napi); 1764 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1765 free_irq(mod->irq, mod); 1766out_iounmap_ctrl: 1767 iounmap(mod->ctrl); 1768out_iounmap_dpm: 1769 iounmap(mod->dpm); 1770out_free_ndev: 1771 free_candev(ndev); 1772out_return: 1773 return ret; 1774} 1775 1776static int __devexit ican3_remove(struct platform_device *pdev) 1777{ 1778 struct net_device *ndev = platform_get_drvdata(pdev); 1779 struct ican3_dev *mod = netdev_priv(ndev); 1780 1781 /* unregister the netdevice, stop interrupts */ 1782 unregister_netdev(ndev); 1783 napi_disable(&mod->napi); 1784 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1785 free_irq(mod->irq, mod); 1786 1787 /* put the module into reset */ 1788 ican3_shutdown_module(mod); 1789 1790 /* unmap all registers */ 1791 iounmap(mod->ctrl); 1792 iounmap(mod->dpm); 1793 1794 free_candev(ndev); 1795 1796 return 0; 1797} 1798 1799static struct platform_driver ican3_driver = { 1800 .driver = { 1801 .name = DRV_NAME, 1802 .owner = THIS_MODULE, 1803 }, 1804 .probe = ican3_probe, 1805 .remove = __devexit_p(ican3_remove), 1806}; 1807 1808module_platform_driver(ican3_driver); 1809 1810MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); 1811MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver"); 1812MODULE_LICENSE("GPL"); 1813MODULE_ALIAS("platform:janz-ican3"); 1814