mscan.c revision 2d4b6faf7d1818e9a52ae9f068ab4ffd9c3be923
1/* 2 * CAN bus driver for the alone generic (as possible as) MSCAN controller. 3 * 4 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>, 5 * Varma Electronics Oy 6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com> 7 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the version 2 of the GNU General Public License 11 * as published by the Free Software Foundation 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23#include <linux/kernel.h> 24#include <linux/module.h> 25#include <linux/interrupt.h> 26#include <linux/delay.h> 27#include <linux/netdevice.h> 28#include <linux/if_arp.h> 29#include <linux/if_ether.h> 30#include <linux/list.h> 31#include <linux/can.h> 32#include <linux/can/dev.h> 33#include <linux/can/error.h> 34#include <linux/io.h> 35 36#include "mscan.h" 37 38static struct can_bittiming_const mscan_bittiming_const = { 39 .name = "mscan", 40 .tseg1_min = 4, 41 .tseg1_max = 16, 42 .tseg2_min = 2, 43 .tseg2_max = 8, 44 .sjw_max = 4, 45 .brp_min = 1, 46 .brp_max = 64, 47 .brp_inc = 1, 48}; 49 50struct mscan_state { 51 u8 mode; 52 u8 canrier; 53 u8 cantier; 54}; 55 56static enum can_state state_map[] = { 57 CAN_STATE_ERROR_ACTIVE, 58 CAN_STATE_ERROR_WARNING, 59 CAN_STATE_ERROR_PASSIVE, 60 CAN_STATE_BUS_OFF 61}; 62 63static int mscan_set_mode(struct net_device *dev, u8 mode) 64{ 65 struct mscan_priv *priv = netdev_priv(dev); 66 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 67 int ret = 0; 68 int i; 69 u8 canctl1; 70 71 if (mode != MSCAN_NORMAL_MODE) { 72 if (priv->tx_active) { 73 /* Abort transfers before going to sleep */# 74 out_8(®s->cantarq, priv->tx_active); 75 /* Suppress TX done interrupts */ 76 out_8(®s->cantier, 0); 77 } 78 79 canctl1 = in_8(®s->canctl1); 80 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) { 81 setbits8(®s->canctl0, MSCAN_SLPRQ); 82 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 83 if (in_8(®s->canctl1) & MSCAN_SLPAK) 84 break; 85 udelay(100); 86 } 87 /* 88 * The mscan controller will fail to enter sleep mode, 89 * while there are irregular activities on bus, like 90 * somebody keeps retransmitting. This behavior is 91 * undocumented and seems to differ between mscan built 92 * in mpc5200b and mpc5200. We proceed in that case, 93 * since otherwise the slprq will be kept set and the 94 * controller will get stuck. NOTE: INITRQ or CSWAI 95 * will abort all active transmit actions, if still 96 * any, at once. 97 */ 98 if (i >= MSCAN_SET_MODE_RETRIES) 99 dev_dbg(dev->dev.parent, 100 "device failed to enter sleep mode. " 101 "We proceed anyhow.\n"); 102 else 103 priv->can.state = CAN_STATE_SLEEPING; 104 } 105 106 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) { 107 setbits8(®s->canctl0, MSCAN_INITRQ); 108 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 109 if (in_8(®s->canctl1) & MSCAN_INITAK) 110 break; 111 } 112 if (i >= MSCAN_SET_MODE_RETRIES) 113 ret = -ENODEV; 114 } 115 if (!ret) 116 priv->can.state = CAN_STATE_STOPPED; 117 118 if (mode & MSCAN_CSWAI) 119 setbits8(®s->canctl0, MSCAN_CSWAI); 120 121 } else { 122 canctl1 = in_8(®s->canctl1); 123 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) { 124 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ); 125 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 126 canctl1 = in_8(®s->canctl1); 127 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK))) 128 break; 129 } 130 if (i >= MSCAN_SET_MODE_RETRIES) 131 ret = -ENODEV; 132 else 133 priv->can.state = CAN_STATE_ERROR_ACTIVE; 134 } 135 } 136 return ret; 137} 138 139static int mscan_start(struct net_device *dev) 140{ 141 struct mscan_priv *priv = netdev_priv(dev); 142 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 143 u8 canrflg; 144 int err; 145 146 out_8(®s->canrier, 0); 147 148 INIT_LIST_HEAD(&priv->tx_head); 149 priv->prev_buf_id = 0; 150 priv->cur_pri = 0; 151 priv->tx_active = 0; 152 priv->shadow_canrier = 0; 153 priv->flags = 0; 154 155 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE); 156 if (err) 157 return err; 158 159 canrflg = in_8(®s->canrflg); 160 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; 161 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg), 162 MSCAN_STATE_TX(canrflg))]; 163 out_8(®s->cantier, 0); 164 165 /* Enable receive interrupts. */ 166 out_8(®s->canrier, MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE | 167 MSCAN_RSTATE1 | MSCAN_RSTATE0 | MSCAN_TSTATE1 | MSCAN_TSTATE0); 168 169 return 0; 170} 171 172static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev) 173{ 174 struct can_frame *frame = (struct can_frame *)skb->data; 175 struct mscan_priv *priv = netdev_priv(dev); 176 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 177 int i, rtr, buf_id; 178 u32 can_id; 179 180 if (skb->len != sizeof(*frame) || frame->can_dlc > 8) { 181 kfree_skb(skb); 182 dev->stats.tx_dropped++; 183 return NETDEV_TX_OK; 184 } 185 186 out_8(®s->cantier, 0); 187 188 i = ~priv->tx_active & MSCAN_TXE; 189 buf_id = ffs(i) - 1; 190 switch (hweight8(i)) { 191 case 0: 192 netif_stop_queue(dev); 193 dev_err(dev->dev.parent, "Tx Ring full when queue awake!\n"); 194 return NETDEV_TX_BUSY; 195 case 1: 196 /* 197 * if buf_id < 3, then current frame will be send out of order, 198 * since buffer with lower id have higher priority (hell..) 199 */ 200 netif_stop_queue(dev); 201 case 2: 202 if (buf_id < priv->prev_buf_id) { 203 priv->cur_pri++; 204 if (priv->cur_pri == 0xff) { 205 set_bit(F_TX_WAIT_ALL, &priv->flags); 206 netif_stop_queue(dev); 207 } 208 } 209 set_bit(F_TX_PROGRESS, &priv->flags); 210 break; 211 } 212 priv->prev_buf_id = buf_id; 213 out_8(®s->cantbsel, i); 214 215 rtr = frame->can_id & CAN_RTR_FLAG; 216 217 /* RTR is always the lowest bit of interest, then IDs follow */ 218 if (frame->can_id & CAN_EFF_FLAG) { 219 can_id = (frame->can_id & CAN_EFF_MASK) 220 << (MSCAN_EFF_RTR_SHIFT + 1); 221 if (rtr) 222 can_id |= 1 << MSCAN_EFF_RTR_SHIFT; 223 out_be16(®s->tx.idr3_2, can_id); 224 225 can_id >>= 16; 226 /* EFF_FLAGS are inbetween the IDs :( */ 227 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) 228 | MSCAN_EFF_FLAGS; 229 } else { 230 can_id = (frame->can_id & CAN_SFF_MASK) 231 << (MSCAN_SFF_RTR_SHIFT + 1); 232 if (rtr) 233 can_id |= 1 << MSCAN_SFF_RTR_SHIFT; 234 } 235 out_be16(®s->tx.idr1_0, can_id); 236 237 if (!rtr) { 238 void __iomem *data = ®s->tx.dsr1_0; 239 u16 *payload = (u16 *)frame->data; 240 241 /* It is safe to write into dsr[dlc+1] */ 242 for (i = 0; i < (frame->can_dlc + 1) / 2; i++) { 243 out_be16(data, *payload++); 244 data += 2 + _MSCAN_RESERVED_DSR_SIZE; 245 } 246 } 247 248 out_8(®s->tx.dlr, frame->can_dlc); 249 out_8(®s->tx.tbpr, priv->cur_pri); 250 251 /* Start transmission. */ 252 out_8(®s->cantflg, 1 << buf_id); 253 254 if (!test_bit(F_TX_PROGRESS, &priv->flags)) 255 dev->trans_start = jiffies; 256 257 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head); 258 259 can_put_echo_skb(skb, dev, buf_id); 260 261 /* Enable interrupt. */ 262 priv->tx_active |= 1 << buf_id; 263 out_8(®s->cantier, priv->tx_active); 264 265 return NETDEV_TX_OK; 266} 267 268/* This function returns the old state to see where we came from */ 269static enum can_state check_set_state(struct net_device *dev, u8 canrflg) 270{ 271 struct mscan_priv *priv = netdev_priv(dev); 272 enum can_state state, old_state = priv->can.state; 273 274 if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) { 275 state = state_map[max(MSCAN_STATE_RX(canrflg), 276 MSCAN_STATE_TX(canrflg))]; 277 priv->can.state = state; 278 } 279 return old_state; 280} 281 282static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame) 283{ 284 struct mscan_priv *priv = netdev_priv(dev); 285 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 286 u32 can_id; 287 int i; 288 289 can_id = in_be16(®s->rx.idr1_0); 290 if (can_id & (1 << 3)) { 291 frame->can_id = CAN_EFF_FLAG; 292 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2)); 293 can_id = ((can_id & 0xffe00000) | 294 ((can_id & 0x7ffff) << 2)) >> 2; 295 } else { 296 can_id >>= 4; 297 frame->can_id = 0; 298 } 299 300 frame->can_id |= can_id >> 1; 301 if (can_id & 1) 302 frame->can_id |= CAN_RTR_FLAG; 303 304 frame->can_dlc = get_can_dlc(in_8(®s->rx.dlr) & 0xf); 305 306 if (!(frame->can_id & CAN_RTR_FLAG)) { 307 void __iomem *data = ®s->rx.dsr1_0; 308 u16 *payload = (u16 *)frame->data; 309 310 for (i = 0; i < (frame->can_dlc + 1) / 2; i++) { 311 *payload++ = in_be16(data); 312 data += 2 + _MSCAN_RESERVED_DSR_SIZE; 313 } 314 } 315 316 out_8(®s->canrflg, MSCAN_RXF); 317} 318 319static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame, 320 u8 canrflg) 321{ 322 struct mscan_priv *priv = netdev_priv(dev); 323 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 324 struct net_device_stats *stats = &dev->stats; 325 enum can_state old_state; 326 327 dev_dbg(dev->dev.parent, "error interrupt (canrflg=%#x)\n", canrflg); 328 frame->can_id = CAN_ERR_FLAG; 329 330 if (canrflg & MSCAN_OVRIF) { 331 frame->can_id |= CAN_ERR_CRTL; 332 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 333 stats->rx_over_errors++; 334 stats->rx_errors++; 335 } else { 336 frame->data[1] = 0; 337 } 338 339 old_state = check_set_state(dev, canrflg); 340 /* State changed */ 341 if (old_state != priv->can.state) { 342 switch (priv->can.state) { 343 case CAN_STATE_ERROR_WARNING: 344 frame->can_id |= CAN_ERR_CRTL; 345 priv->can.can_stats.error_warning++; 346 if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) < 347 (canrflg & MSCAN_RSTAT_MSK)) 348 frame->data[1] |= CAN_ERR_CRTL_RX_WARNING; 349 if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) < 350 (canrflg & MSCAN_TSTAT_MSK)) 351 frame->data[1] |= CAN_ERR_CRTL_TX_WARNING; 352 break; 353 case CAN_STATE_ERROR_PASSIVE: 354 frame->can_id |= CAN_ERR_CRTL; 355 priv->can.can_stats.error_passive++; 356 frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; 357 break; 358 case CAN_STATE_BUS_OFF: 359 frame->can_id |= CAN_ERR_BUSOFF; 360 /* 361 * The MSCAN on the MPC5200 does recover from bus-off 362 * automatically. To avoid that we stop the chip doing 363 * a light-weight stop (we are in irq-context). 364 */ 365 out_8(®s->cantier, 0); 366 out_8(®s->canrier, 0); 367 setbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ); 368 can_bus_off(dev); 369 break; 370 default: 371 break; 372 } 373 } 374 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; 375 frame->can_dlc = CAN_ERR_DLC; 376 out_8(®s->canrflg, MSCAN_ERR_IF); 377} 378 379static int mscan_rx_poll(struct napi_struct *napi, int quota) 380{ 381 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi); 382 struct net_device *dev = napi->dev; 383 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 384 struct net_device_stats *stats = &dev->stats; 385 int npackets = 0; 386 int ret = 1; 387 struct sk_buff *skb; 388 struct can_frame *frame; 389 u8 canrflg; 390 391 while (npackets < quota) { 392 canrflg = in_8(®s->canrflg); 393 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF))) 394 break; 395 396 skb = alloc_can_skb(dev, &frame); 397 if (!skb) { 398 if (printk_ratelimit()) 399 dev_notice(dev->dev.parent, "packet dropped\n"); 400 stats->rx_dropped++; 401 out_8(®s->canrflg, canrflg); 402 continue; 403 } 404 405 if (canrflg & MSCAN_RXF) 406 mscan_get_rx_frame(dev, frame); 407 else if (canrflg & MSCAN_ERR_IF) 408 mscan_get_err_frame(dev, frame, canrflg); 409 410 stats->rx_packets++; 411 stats->rx_bytes += frame->can_dlc; 412 npackets++; 413 netif_receive_skb(skb); 414 } 415 416 if (!(in_8(®s->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) { 417 napi_complete(&priv->napi); 418 clear_bit(F_RX_PROGRESS, &priv->flags); 419 if (priv->can.state < CAN_STATE_BUS_OFF) 420 out_8(®s->canrier, priv->shadow_canrier); 421 ret = 0; 422 } 423 return ret; 424} 425 426static irqreturn_t mscan_isr(int irq, void *dev_id) 427{ 428 struct net_device *dev = (struct net_device *)dev_id; 429 struct mscan_priv *priv = netdev_priv(dev); 430 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 431 struct net_device_stats *stats = &dev->stats; 432 u8 cantier, cantflg, canrflg; 433 irqreturn_t ret = IRQ_NONE; 434 435 cantier = in_8(®s->cantier) & MSCAN_TXE; 436 cantflg = in_8(®s->cantflg) & cantier; 437 438 if (cantier && cantflg) { 439 struct list_head *tmp, *pos; 440 441 list_for_each_safe(pos, tmp, &priv->tx_head) { 442 struct tx_queue_entry *entry = 443 list_entry(pos, struct tx_queue_entry, list); 444 u8 mask = entry->mask; 445 446 if (!(cantflg & mask)) 447 continue; 448 449 out_8(®s->cantbsel, mask); 450 stats->tx_bytes += in_8(®s->tx.dlr); 451 stats->tx_packets++; 452 can_get_echo_skb(dev, entry->id); 453 priv->tx_active &= ~mask; 454 list_del(pos); 455 } 456 457 if (list_empty(&priv->tx_head)) { 458 clear_bit(F_TX_WAIT_ALL, &priv->flags); 459 clear_bit(F_TX_PROGRESS, &priv->flags); 460 priv->cur_pri = 0; 461 } else { 462 dev->trans_start = jiffies; 463 } 464 465 if (!test_bit(F_TX_WAIT_ALL, &priv->flags)) 466 netif_wake_queue(dev); 467 468 out_8(®s->cantier, priv->tx_active); 469 ret = IRQ_HANDLED; 470 } 471 472 canrflg = in_8(®s->canrflg); 473 if ((canrflg & ~MSCAN_STAT_MSK) && 474 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) { 475 if (canrflg & ~MSCAN_STAT_MSK) { 476 priv->shadow_canrier = in_8(®s->canrier); 477 out_8(®s->canrier, 0); 478 napi_schedule(&priv->napi); 479 ret = IRQ_HANDLED; 480 } else { 481 clear_bit(F_RX_PROGRESS, &priv->flags); 482 } 483 } 484 return ret; 485} 486 487static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode) 488{ 489 struct mscan_priv *priv = netdev_priv(dev); 490 int ret = 0; 491 492 if (!priv->open_time) 493 return -EINVAL; 494 495 switch (mode) { 496 case CAN_MODE_START: 497 if (priv->can.state <= CAN_STATE_BUS_OFF) 498 mscan_set_mode(dev, MSCAN_INIT_MODE); 499 ret = mscan_start(dev); 500 if (ret) 501 break; 502 if (netif_queue_stopped(dev)) 503 netif_wake_queue(dev); 504 break; 505 506 default: 507 ret = -EOPNOTSUPP; 508 break; 509 } 510 return ret; 511} 512 513static int mscan_do_set_bittiming(struct net_device *dev) 514{ 515 struct mscan_priv *priv = netdev_priv(dev); 516 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 517 struct can_bittiming *bt = &priv->can.bittiming; 518 u8 btr0, btr1; 519 520 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw); 521 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) | 522 BTR1_SET_TSEG2(bt->phase_seg2) | 523 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)); 524 525 dev_info(dev->dev.parent, "setting BTR0=0x%02x BTR1=0x%02x\n", 526 btr0, btr1); 527 528 out_8(®s->canbtr0, btr0); 529 out_8(®s->canbtr1, btr1); 530 531 return 0; 532} 533 534static int mscan_open(struct net_device *dev) 535{ 536 int ret; 537 struct mscan_priv *priv = netdev_priv(dev); 538 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 539 540 /* common open */ 541 ret = open_candev(dev); 542 if (ret) 543 return ret; 544 545 napi_enable(&priv->napi); 546 547 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev); 548 if (ret < 0) { 549 dev_err(dev->dev.parent, "failed to attach interrupt\n"); 550 goto exit_napi_disable; 551 } 552 553 priv->open_time = jiffies; 554 555 clrbits8(®s->canctl1, MSCAN_LISTEN); 556 557 ret = mscan_start(dev); 558 if (ret) 559 goto exit_free_irq; 560 561 netif_start_queue(dev); 562 563 return 0; 564 565exit_free_irq: 566 priv->open_time = 0; 567 free_irq(dev->irq, dev); 568exit_napi_disable: 569 napi_disable(&priv->napi); 570 close_candev(dev); 571 return ret; 572} 573 574static int mscan_close(struct net_device *dev) 575{ 576 struct mscan_priv *priv = netdev_priv(dev); 577 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 578 579 netif_stop_queue(dev); 580 napi_disable(&priv->napi); 581 582 out_8(®s->cantier, 0); 583 out_8(®s->canrier, 0); 584 mscan_set_mode(dev, MSCAN_INIT_MODE); 585 close_candev(dev); 586 free_irq(dev->irq, dev); 587 priv->open_time = 0; 588 589 return 0; 590} 591 592static const struct net_device_ops mscan_netdev_ops = { 593 .ndo_open = mscan_open, 594 .ndo_stop = mscan_close, 595 .ndo_start_xmit = mscan_start_xmit, 596}; 597 598int register_mscandev(struct net_device *dev, int clock_src) 599{ 600 struct mscan_priv *priv = netdev_priv(dev); 601 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 602 u8 ctl1; 603 604 ctl1 = in_8(®s->canctl1); 605 if (clock_src) 606 ctl1 |= MSCAN_CLKSRC; 607 else 608 ctl1 &= ~MSCAN_CLKSRC; 609 610 ctl1 |= MSCAN_CANE; 611 out_8(®s->canctl1, ctl1); 612 udelay(100); 613 614 /* acceptance mask/acceptance code (accept everything) */ 615 out_be16(®s->canidar1_0, 0); 616 out_be16(®s->canidar3_2, 0); 617 out_be16(®s->canidar5_4, 0); 618 out_be16(®s->canidar7_6, 0); 619 620 out_be16(®s->canidmr1_0, 0xffff); 621 out_be16(®s->canidmr3_2, 0xffff); 622 out_be16(®s->canidmr5_4, 0xffff); 623 out_be16(®s->canidmr7_6, 0xffff); 624 /* Two 32 bit Acceptance Filters */ 625 out_8(®s->canidac, MSCAN_AF_32BIT); 626 627 mscan_set_mode(dev, MSCAN_INIT_MODE); 628 629 return register_candev(dev); 630} 631 632void unregister_mscandev(struct net_device *dev) 633{ 634 struct mscan_priv *priv = netdev_priv(dev); 635 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 636 mscan_set_mode(dev, MSCAN_INIT_MODE); 637 clrbits8(®s->canctl1, MSCAN_CANE); 638 unregister_candev(dev); 639} 640 641struct net_device *alloc_mscandev(void) 642{ 643 struct net_device *dev; 644 struct mscan_priv *priv; 645 int i; 646 647 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX); 648 if (!dev) 649 return NULL; 650 priv = netdev_priv(dev); 651 652 dev->netdev_ops = &mscan_netdev_ops; 653 654 dev->flags |= IFF_ECHO; /* we support local echo */ 655 656 netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8); 657 658 priv->can.bittiming_const = &mscan_bittiming_const; 659 priv->can.do_set_bittiming = mscan_do_set_bittiming; 660 priv->can.do_set_mode = mscan_do_set_mode; 661 662 for (i = 0; i < TX_QUEUE_SIZE; i++) { 663 priv->tx_queue[i].id = i; 664 priv->tx_queue[i].mask = 1 << i; 665 } 666 667 return dev; 668} 669 670MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>"); 671MODULE_LICENSE("GPL v2"); 672MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips"); 673