mscan.c revision bf3af54732bea5894ccc2cbde3ab566f0af7da56
1/* 2 * CAN bus driver for the alone generic (as possible as) MSCAN controller. 3 * 4 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>, 5 * Varma Electronics Oy 6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com> 7 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the version 2 of the GNU General Public License 11 * as published by the Free Software Foundation 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23#include <linux/kernel.h> 24#include <linux/module.h> 25#include <linux/interrupt.h> 26#include <linux/delay.h> 27#include <linux/netdevice.h> 28#include <linux/if_arp.h> 29#include <linux/if_ether.h> 30#include <linux/list.h> 31#include <linux/can.h> 32#include <linux/can/dev.h> 33#include <linux/can/error.h> 34#include <linux/io.h> 35 36#include "mscan.h" 37 38static struct can_bittiming_const mscan_bittiming_const = { 39 .name = "mscan", 40 .tseg1_min = 4, 41 .tseg1_max = 16, 42 .tseg2_min = 2, 43 .tseg2_max = 8, 44 .sjw_max = 4, 45 .brp_min = 1, 46 .brp_max = 64, 47 .brp_inc = 1, 48}; 49 50struct mscan_state { 51 u8 mode; 52 u8 canrier; 53 u8 cantier; 54}; 55 56static enum can_state state_map[] = { 57 CAN_STATE_ERROR_ACTIVE, 58 CAN_STATE_ERROR_WARNING, 59 CAN_STATE_ERROR_PASSIVE, 60 CAN_STATE_BUS_OFF 61}; 62 63static int mscan_set_mode(struct net_device *dev, u8 mode) 64{ 65 struct mscan_priv *priv = netdev_priv(dev); 66 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 67 int ret = 0; 68 int i; 69 u8 canctl1; 70 71 if (mode != MSCAN_NORMAL_MODE) { 72 if (priv->tx_active) { 73 /* Abort transfers before going to sleep */# 74 out_8(®s->cantarq, priv->tx_active); 75 /* Suppress TX done interrupts */ 76 out_8(®s->cantier, 0); 77 } 78 79 canctl1 = in_8(®s->canctl1); 80 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) { 81 setbits8(®s->canctl0, MSCAN_SLPRQ); 82 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 83 if (in_8(®s->canctl1) & MSCAN_SLPAK) 84 break; 85 udelay(100); 86 } 87 /* 88 * The mscan controller will fail to enter sleep mode, 89 * while there are irregular activities on bus, like 90 * somebody keeps retransmitting. This behavior is 91 * undocumented and seems to differ between mscan built 92 * in mpc5200b and mpc5200. We proceed in that case, 93 * since otherwise the slprq will be kept set and the 94 * controller will get stuck. NOTE: INITRQ or CSWAI 95 * will abort all active transmit actions, if still 96 * any, at once. 97 */ 98 if (i >= MSCAN_SET_MODE_RETRIES) 99 dev_dbg(dev->dev.parent, 100 "device failed to enter sleep mode. " 101 "We proceed anyhow.\n"); 102 else 103 priv->can.state = CAN_STATE_SLEEPING; 104 } 105 106 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) { 107 setbits8(®s->canctl0, MSCAN_INITRQ); 108 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 109 if (in_8(®s->canctl1) & MSCAN_INITAK) 110 break; 111 } 112 if (i >= MSCAN_SET_MODE_RETRIES) 113 ret = -ENODEV; 114 } 115 if (!ret) 116 priv->can.state = CAN_STATE_STOPPED; 117 118 if (mode & MSCAN_CSWAI) 119 setbits8(®s->canctl0, MSCAN_CSWAI); 120 121 } else { 122 canctl1 = in_8(®s->canctl1); 123 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) { 124 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ); 125 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) { 126 canctl1 = in_8(®s->canctl1); 127 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK))) 128 break; 129 } 130 if (i >= MSCAN_SET_MODE_RETRIES) 131 ret = -ENODEV; 132 else 133 priv->can.state = CAN_STATE_ERROR_ACTIVE; 134 } 135 } 136 return ret; 137} 138 139static int mscan_start(struct net_device *dev) 140{ 141 struct mscan_priv *priv = netdev_priv(dev); 142 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 143 u8 canrflg; 144 int err; 145 146 out_8(®s->canrier, 0); 147 148 INIT_LIST_HEAD(&priv->tx_head); 149 priv->prev_buf_id = 0; 150 priv->cur_pri = 0; 151 priv->tx_active = 0; 152 priv->shadow_canrier = 0; 153 priv->flags = 0; 154 155 if (priv->type == MSCAN_TYPE_MPC5121) { 156 /* Clear pending bus-off condition */ 157 if (in_8(®s->canmisc) & MSCAN_BOHOLD) 158 out_8(®s->canmisc, MSCAN_BOHOLD); 159 } 160 161 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE); 162 if (err) 163 return err; 164 165 canrflg = in_8(®s->canrflg); 166 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; 167 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg), 168 MSCAN_STATE_TX(canrflg))]; 169 out_8(®s->cantier, 0); 170 171 /* Enable receive interrupts. */ 172 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE); 173 174 return 0; 175} 176 177static int mscan_restart(struct net_device *dev) 178{ 179 struct mscan_priv *priv = netdev_priv(dev); 180 181 if (priv->type == MSCAN_TYPE_MPC5121) { 182 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 183 184 priv->can.state = CAN_STATE_ERROR_ACTIVE; 185 WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD), 186 "bus-off state expected"); 187 out_8(®s->canmisc, MSCAN_BOHOLD); 188 /* Re-enable receive interrupts. */ 189 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE); 190 } else { 191 if (priv->can.state <= CAN_STATE_BUS_OFF) 192 mscan_set_mode(dev, MSCAN_INIT_MODE); 193 return mscan_start(dev); 194 } 195 196 return 0; 197} 198 199static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev) 200{ 201 struct can_frame *frame = (struct can_frame *)skb->data; 202 struct mscan_priv *priv = netdev_priv(dev); 203 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 204 int i, rtr, buf_id; 205 u32 can_id; 206 207 if (skb->len != sizeof(*frame) || frame->can_dlc > 8) { 208 kfree_skb(skb); 209 dev->stats.tx_dropped++; 210 return NETDEV_TX_OK; 211 } 212 213 out_8(®s->cantier, 0); 214 215 i = ~priv->tx_active & MSCAN_TXE; 216 buf_id = ffs(i) - 1; 217 switch (hweight8(i)) { 218 case 0: 219 netif_stop_queue(dev); 220 dev_err(dev->dev.parent, "Tx Ring full when queue awake!\n"); 221 return NETDEV_TX_BUSY; 222 case 1: 223 /* 224 * if buf_id < 3, then current frame will be send out of order, 225 * since buffer with lower id have higher priority (hell..) 226 */ 227 netif_stop_queue(dev); 228 case 2: 229 if (buf_id < priv->prev_buf_id) { 230 priv->cur_pri++; 231 if (priv->cur_pri == 0xff) { 232 set_bit(F_TX_WAIT_ALL, &priv->flags); 233 netif_stop_queue(dev); 234 } 235 } 236 set_bit(F_TX_PROGRESS, &priv->flags); 237 break; 238 } 239 priv->prev_buf_id = buf_id; 240 out_8(®s->cantbsel, i); 241 242 rtr = frame->can_id & CAN_RTR_FLAG; 243 244 /* RTR is always the lowest bit of interest, then IDs follow */ 245 if (frame->can_id & CAN_EFF_FLAG) { 246 can_id = (frame->can_id & CAN_EFF_MASK) 247 << (MSCAN_EFF_RTR_SHIFT + 1); 248 if (rtr) 249 can_id |= 1 << MSCAN_EFF_RTR_SHIFT; 250 out_be16(®s->tx.idr3_2, can_id); 251 252 can_id >>= 16; 253 /* EFF_FLAGS are inbetween the IDs :( */ 254 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) 255 | MSCAN_EFF_FLAGS; 256 } else { 257 can_id = (frame->can_id & CAN_SFF_MASK) 258 << (MSCAN_SFF_RTR_SHIFT + 1); 259 if (rtr) 260 can_id |= 1 << MSCAN_SFF_RTR_SHIFT; 261 } 262 out_be16(®s->tx.idr1_0, can_id); 263 264 if (!rtr) { 265 void __iomem *data = ®s->tx.dsr1_0; 266 u16 *payload = (u16 *)frame->data; 267 268 /* It is safe to write into dsr[dlc+1] */ 269 for (i = 0; i < (frame->can_dlc + 1) / 2; i++) { 270 out_be16(data, *payload++); 271 data += 2 + _MSCAN_RESERVED_DSR_SIZE; 272 } 273 } 274 275 out_8(®s->tx.dlr, frame->can_dlc); 276 out_8(®s->tx.tbpr, priv->cur_pri); 277 278 /* Start transmission. */ 279 out_8(®s->cantflg, 1 << buf_id); 280 281 if (!test_bit(F_TX_PROGRESS, &priv->flags)) 282 dev->trans_start = jiffies; 283 284 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head); 285 286 can_put_echo_skb(skb, dev, buf_id); 287 288 /* Enable interrupt. */ 289 priv->tx_active |= 1 << buf_id; 290 out_8(®s->cantier, priv->tx_active); 291 292 return NETDEV_TX_OK; 293} 294 295/* This function returns the old state to see where we came from */ 296static enum can_state check_set_state(struct net_device *dev, u8 canrflg) 297{ 298 struct mscan_priv *priv = netdev_priv(dev); 299 enum can_state state, old_state = priv->can.state; 300 301 if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) { 302 state = state_map[max(MSCAN_STATE_RX(canrflg), 303 MSCAN_STATE_TX(canrflg))]; 304 priv->can.state = state; 305 } 306 return old_state; 307} 308 309static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame) 310{ 311 struct mscan_priv *priv = netdev_priv(dev); 312 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 313 u32 can_id; 314 int i; 315 316 can_id = in_be16(®s->rx.idr1_0); 317 if (can_id & (1 << 3)) { 318 frame->can_id = CAN_EFF_FLAG; 319 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2)); 320 can_id = ((can_id & 0xffe00000) | 321 ((can_id & 0x7ffff) << 2)) >> 2; 322 } else { 323 can_id >>= 4; 324 frame->can_id = 0; 325 } 326 327 frame->can_id |= can_id >> 1; 328 if (can_id & 1) 329 frame->can_id |= CAN_RTR_FLAG; 330 331 frame->can_dlc = get_can_dlc(in_8(®s->rx.dlr) & 0xf); 332 333 if (!(frame->can_id & CAN_RTR_FLAG)) { 334 void __iomem *data = ®s->rx.dsr1_0; 335 u16 *payload = (u16 *)frame->data; 336 337 for (i = 0; i < (frame->can_dlc + 1) / 2; i++) { 338 *payload++ = in_be16(data); 339 data += 2 + _MSCAN_RESERVED_DSR_SIZE; 340 } 341 } 342 343 out_8(®s->canrflg, MSCAN_RXF); 344} 345 346static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame, 347 u8 canrflg) 348{ 349 struct mscan_priv *priv = netdev_priv(dev); 350 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 351 struct net_device_stats *stats = &dev->stats; 352 enum can_state old_state; 353 354 dev_dbg(dev->dev.parent, "error interrupt (canrflg=%#x)\n", canrflg); 355 frame->can_id = CAN_ERR_FLAG; 356 357 if (canrflg & MSCAN_OVRIF) { 358 frame->can_id |= CAN_ERR_CRTL; 359 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 360 stats->rx_over_errors++; 361 stats->rx_errors++; 362 } else { 363 frame->data[1] = 0; 364 } 365 366 old_state = check_set_state(dev, canrflg); 367 /* State changed */ 368 if (old_state != priv->can.state) { 369 switch (priv->can.state) { 370 case CAN_STATE_ERROR_WARNING: 371 frame->can_id |= CAN_ERR_CRTL; 372 priv->can.can_stats.error_warning++; 373 if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) < 374 (canrflg & MSCAN_RSTAT_MSK)) 375 frame->data[1] |= CAN_ERR_CRTL_RX_WARNING; 376 if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) < 377 (canrflg & MSCAN_TSTAT_MSK)) 378 frame->data[1] |= CAN_ERR_CRTL_TX_WARNING; 379 break; 380 case CAN_STATE_ERROR_PASSIVE: 381 frame->can_id |= CAN_ERR_CRTL; 382 priv->can.can_stats.error_passive++; 383 frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; 384 break; 385 case CAN_STATE_BUS_OFF: 386 frame->can_id |= CAN_ERR_BUSOFF; 387 /* 388 * The MSCAN on the MPC5200 does recover from bus-off 389 * automatically. To avoid that we stop the chip doing 390 * a light-weight stop (we are in irq-context). 391 */ 392 if (priv->type != MSCAN_TYPE_MPC5121) { 393 out_8(®s->cantier, 0); 394 out_8(®s->canrier, 0); 395 setbits8(®s->canctl0, 396 MSCAN_SLPRQ | MSCAN_INITRQ); 397 } 398 can_bus_off(dev); 399 break; 400 default: 401 break; 402 } 403 } 404 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK; 405 frame->can_dlc = CAN_ERR_DLC; 406 out_8(®s->canrflg, MSCAN_ERR_IF); 407} 408 409static int mscan_rx_poll(struct napi_struct *napi, int quota) 410{ 411 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi); 412 struct net_device *dev = napi->dev; 413 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 414 struct net_device_stats *stats = &dev->stats; 415 int npackets = 0; 416 int ret = 1; 417 struct sk_buff *skb; 418 struct can_frame *frame; 419 u8 canrflg; 420 421 while (npackets < quota) { 422 canrflg = in_8(®s->canrflg); 423 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF))) 424 break; 425 426 skb = alloc_can_skb(dev, &frame); 427 if (!skb) { 428 if (printk_ratelimit()) 429 dev_notice(dev->dev.parent, "packet dropped\n"); 430 stats->rx_dropped++; 431 out_8(®s->canrflg, canrflg); 432 continue; 433 } 434 435 if (canrflg & MSCAN_RXF) 436 mscan_get_rx_frame(dev, frame); 437 else if (canrflg & MSCAN_ERR_IF) 438 mscan_get_err_frame(dev, frame, canrflg); 439 440 stats->rx_packets++; 441 stats->rx_bytes += frame->can_dlc; 442 npackets++; 443 netif_receive_skb(skb); 444 } 445 446 if (!(in_8(®s->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) { 447 napi_complete(&priv->napi); 448 clear_bit(F_RX_PROGRESS, &priv->flags); 449 if (priv->can.state < CAN_STATE_BUS_OFF) 450 out_8(®s->canrier, priv->shadow_canrier); 451 ret = 0; 452 } 453 return ret; 454} 455 456static irqreturn_t mscan_isr(int irq, void *dev_id) 457{ 458 struct net_device *dev = (struct net_device *)dev_id; 459 struct mscan_priv *priv = netdev_priv(dev); 460 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 461 struct net_device_stats *stats = &dev->stats; 462 u8 cantier, cantflg, canrflg; 463 irqreturn_t ret = IRQ_NONE; 464 465 cantier = in_8(®s->cantier) & MSCAN_TXE; 466 cantflg = in_8(®s->cantflg) & cantier; 467 468 if (cantier && cantflg) { 469 struct list_head *tmp, *pos; 470 471 list_for_each_safe(pos, tmp, &priv->tx_head) { 472 struct tx_queue_entry *entry = 473 list_entry(pos, struct tx_queue_entry, list); 474 u8 mask = entry->mask; 475 476 if (!(cantflg & mask)) 477 continue; 478 479 out_8(®s->cantbsel, mask); 480 stats->tx_bytes += in_8(®s->tx.dlr); 481 stats->tx_packets++; 482 can_get_echo_skb(dev, entry->id); 483 priv->tx_active &= ~mask; 484 list_del(pos); 485 } 486 487 if (list_empty(&priv->tx_head)) { 488 clear_bit(F_TX_WAIT_ALL, &priv->flags); 489 clear_bit(F_TX_PROGRESS, &priv->flags); 490 priv->cur_pri = 0; 491 } else { 492 dev->trans_start = jiffies; 493 } 494 495 if (!test_bit(F_TX_WAIT_ALL, &priv->flags)) 496 netif_wake_queue(dev); 497 498 out_8(®s->cantier, priv->tx_active); 499 ret = IRQ_HANDLED; 500 } 501 502 canrflg = in_8(®s->canrflg); 503 if ((canrflg & ~MSCAN_STAT_MSK) && 504 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) { 505 if (canrflg & ~MSCAN_STAT_MSK) { 506 priv->shadow_canrier = in_8(®s->canrier); 507 out_8(®s->canrier, 0); 508 napi_schedule(&priv->napi); 509 ret = IRQ_HANDLED; 510 } else { 511 clear_bit(F_RX_PROGRESS, &priv->flags); 512 } 513 } 514 return ret; 515} 516 517static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode) 518{ 519 struct mscan_priv *priv = netdev_priv(dev); 520 int ret = 0; 521 522 if (!priv->open_time) 523 return -EINVAL; 524 525 switch (mode) { 526 case CAN_MODE_START: 527 ret = mscan_restart(dev); 528 if (ret) 529 break; 530 if (netif_queue_stopped(dev)) 531 netif_wake_queue(dev); 532 break; 533 534 default: 535 ret = -EOPNOTSUPP; 536 break; 537 } 538 return ret; 539} 540 541static int mscan_do_set_bittiming(struct net_device *dev) 542{ 543 struct mscan_priv *priv = netdev_priv(dev); 544 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 545 struct can_bittiming *bt = &priv->can.bittiming; 546 u8 btr0, btr1; 547 548 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw); 549 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) | 550 BTR1_SET_TSEG2(bt->phase_seg2) | 551 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)); 552 553 dev_info(dev->dev.parent, "setting BTR0=0x%02x BTR1=0x%02x\n", 554 btr0, btr1); 555 556 out_8(®s->canbtr0, btr0); 557 out_8(®s->canbtr1, btr1); 558 559 return 0; 560} 561 562static int mscan_open(struct net_device *dev) 563{ 564 int ret; 565 struct mscan_priv *priv = netdev_priv(dev); 566 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 567 568 /* common open */ 569 ret = open_candev(dev); 570 if (ret) 571 return ret; 572 573 napi_enable(&priv->napi); 574 575 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev); 576 if (ret < 0) { 577 dev_err(dev->dev.parent, "failed to attach interrupt\n"); 578 goto exit_napi_disable; 579 } 580 581 priv->open_time = jiffies; 582 583 clrbits8(®s->canctl1, MSCAN_LISTEN); 584 585 ret = mscan_start(dev); 586 if (ret) 587 goto exit_free_irq; 588 589 netif_start_queue(dev); 590 591 return 0; 592 593exit_free_irq: 594 priv->open_time = 0; 595 free_irq(dev->irq, dev); 596exit_napi_disable: 597 napi_disable(&priv->napi); 598 close_candev(dev); 599 return ret; 600} 601 602static int mscan_close(struct net_device *dev) 603{ 604 struct mscan_priv *priv = netdev_priv(dev); 605 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 606 607 netif_stop_queue(dev); 608 napi_disable(&priv->napi); 609 610 out_8(®s->cantier, 0); 611 out_8(®s->canrier, 0); 612 mscan_set_mode(dev, MSCAN_INIT_MODE); 613 close_candev(dev); 614 free_irq(dev->irq, dev); 615 priv->open_time = 0; 616 617 return 0; 618} 619 620static const struct net_device_ops mscan_netdev_ops = { 621 .ndo_open = mscan_open, 622 .ndo_stop = mscan_close, 623 .ndo_start_xmit = mscan_start_xmit, 624}; 625 626int register_mscandev(struct net_device *dev, int mscan_clksrc) 627{ 628 struct mscan_priv *priv = netdev_priv(dev); 629 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 630 u8 ctl1; 631 632 ctl1 = in_8(®s->canctl1); 633 if (mscan_clksrc) 634 ctl1 |= MSCAN_CLKSRC; 635 else 636 ctl1 &= ~MSCAN_CLKSRC; 637 638 if (priv->type == MSCAN_TYPE_MPC5121) 639 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */ 640 641 ctl1 |= MSCAN_CANE; 642 out_8(®s->canctl1, ctl1); 643 udelay(100); 644 645 /* acceptance mask/acceptance code (accept everything) */ 646 out_be16(®s->canidar1_0, 0); 647 out_be16(®s->canidar3_2, 0); 648 out_be16(®s->canidar5_4, 0); 649 out_be16(®s->canidar7_6, 0); 650 651 out_be16(®s->canidmr1_0, 0xffff); 652 out_be16(®s->canidmr3_2, 0xffff); 653 out_be16(®s->canidmr5_4, 0xffff); 654 out_be16(®s->canidmr7_6, 0xffff); 655 /* Two 32 bit Acceptance Filters */ 656 out_8(®s->canidac, MSCAN_AF_32BIT); 657 658 mscan_set_mode(dev, MSCAN_INIT_MODE); 659 660 return register_candev(dev); 661} 662 663void unregister_mscandev(struct net_device *dev) 664{ 665 struct mscan_priv *priv = netdev_priv(dev); 666 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; 667 mscan_set_mode(dev, MSCAN_INIT_MODE); 668 clrbits8(®s->canctl1, MSCAN_CANE); 669 unregister_candev(dev); 670} 671 672struct net_device *alloc_mscandev(void) 673{ 674 struct net_device *dev; 675 struct mscan_priv *priv; 676 int i; 677 678 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX); 679 if (!dev) 680 return NULL; 681 priv = netdev_priv(dev); 682 683 dev->netdev_ops = &mscan_netdev_ops; 684 685 dev->flags |= IFF_ECHO; /* we support local echo */ 686 687 netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8); 688 689 priv->can.bittiming_const = &mscan_bittiming_const; 690 priv->can.do_set_bittiming = mscan_do_set_bittiming; 691 priv->can.do_set_mode = mscan_do_set_mode; 692 693 for (i = 0; i < TX_QUEUE_SIZE; i++) { 694 priv->tx_queue[i].id = i; 695 priv->tx_queue[i].mask = 1 << i; 696 } 697 698 return dev; 699} 700 701MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>"); 702MODULE_LICENSE("GPL v2"); 703MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips"); 704