1/*
2 * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
3 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
4 *
5 * Derived from the PCAN project file driver/src/pcan_pci.c:
6 *
7 * Copyright (C) 2001-2006  PEAK System-Technik GmbH
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the version 2 of the GNU General Public License
11 * as published by the Free Software Foundation
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/netdevice.h>
23#include <linux/delay.h>
24#include <linux/pci.h>
25#include <linux/io.h>
26#include <linux/i2c.h>
27#include <linux/i2c-algo-bit.h>
28#include <linux/can.h>
29#include <linux/can/dev.h>
30
31#include "sja1000.h"
32
33MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
34MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
35MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");
36MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");
37MODULE_LICENSE("GPL v2");
38
39#define DRV_NAME  "peak_pci"
40
41struct peak_pciec_card;
42struct peak_pci_chan {
43	void __iomem *cfg_base;		/* Common for all channels */
44	struct net_device *prev_dev;	/* Chain of network devices */
45	u16 icr_mask;			/* Interrupt mask for fast ack */
46	struct peak_pciec_card *pciec_card;	/* only for PCIeC LEDs */
47};
48
49#define PEAK_PCI_CAN_CLOCK	(16000000 / 2)
50
51#define PEAK_PCI_CDR		(CDR_CBP | CDR_CLKOUT_MASK)
52#define PEAK_PCI_OCR		OCR_TX0_PUSHPULL
53
54/*
55 * Important PITA registers
56 */
57#define PITA_ICR		0x00	/* Interrupt control register */
58#define PITA_GPIOICR		0x18	/* GPIO interface control register */
59#define PITA_MISC		0x1C	/* Miscellaneous register */
60
61#define PEAK_PCI_CFG_SIZE	0x1000	/* Size of the config PCI bar */
62#define PEAK_PCI_CHAN_SIZE	0x0400	/* Size used by the channel */
63
64#define PEAK_PCI_VENDOR_ID	0x001C	/* The PCI device and vendor IDs */
65#define PEAK_PCI_DEVICE_ID	0x0001	/* for PCI/PCIe slot cards */
66#define PEAK_PCIEC_DEVICE_ID	0x0002	/* for ExpressCard slot cards */
67#define PEAK_PCIE_DEVICE_ID	0x0003	/* for nextgen PCIe slot cards */
68#define PEAK_CPCI_DEVICE_ID	0x0004	/* for nextgen cPCI slot cards */
69#define PEAK_MPCI_DEVICE_ID	0x0005	/* for nextgen miniPCI slot cards */
70#define PEAK_PC_104P_DEVICE_ID	0x0006	/* PCAN-PC/104+ cards */
71#define PEAK_PCI_104E_DEVICE_ID	0x0007	/* PCAN-PCI/104 Express cards */
72#define PEAK_MPCIE_DEVICE_ID	0x0008	/* The miniPCIe slot cards */
73#define PEAK_PCIE_OEM_ID	0x0009	/* PCAN-PCI Express OEM */
74#define PEAK_PCIEC34_DEVICE_ID	0x000A	/* PCAN-PCI Express 34 (one channel) */
75
76#define PEAK_PCI_CHAN_MAX	4
77
78static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
79	0x02, 0x01, 0x40, 0x80
80};
81
82static const struct pci_device_id peak_pci_tbl[] = {
83	{PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
84	{PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
85	{PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
86	{PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
87	{PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
88	{PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
89	{PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
90#ifdef CONFIG_CAN_PEAK_PCIEC
91	{PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
92	{PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
93#endif
94	{0,}
95};
96
97MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
98
99#ifdef CONFIG_CAN_PEAK_PCIEC
100/*
101 * PCAN-ExpressCard needs I2C bit-banging configuration option.
102 */
103
104/* GPIOICR byte access offsets */
105#define PITA_GPOUT		0x18	/* GPx output value */
106#define PITA_GPIN		0x19	/* GPx input value */
107#define PITA_GPOEN		0x1A	/* configure GPx as ouput pin */
108
109/* I2C GP bits */
110#define PITA_GPIN_SCL		0x01	/* Serial Clock Line */
111#define PITA_GPIN_SDA		0x04	/* Serial DAta line */
112
113#define PCA9553_1_SLAVEADDR	(0xC4 >> 1)
114
115/* PCA9553 LS0 fields values */
116enum {
117	PCA9553_LOW,
118	PCA9553_HIGHZ,
119	PCA9553_PWM0,
120	PCA9553_PWM1
121};
122
123/* LEDs control */
124#define PCA9553_ON		PCA9553_LOW
125#define PCA9553_OFF		PCA9553_HIGHZ
126#define PCA9553_SLOW		PCA9553_PWM0
127#define PCA9553_FAST		PCA9553_PWM1
128
129#define PCA9553_LED(c)		(1 << (c))
130#define PCA9553_LED_STATE(s, c)	((s) << ((c) << 1))
131
132#define PCA9553_LED_ON(c)	PCA9553_LED_STATE(PCA9553_ON, c)
133#define PCA9553_LED_OFF(c)	PCA9553_LED_STATE(PCA9553_OFF, c)
134#define PCA9553_LED_SLOW(c)	PCA9553_LED_STATE(PCA9553_SLOW, c)
135#define PCA9553_LED_FAST(c)	PCA9553_LED_STATE(PCA9553_FAST, c)
136#define PCA9553_LED_MASK(c)	PCA9553_LED_STATE(0x03, c)
137
138#define PCA9553_LED_OFF_ALL	(PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
139
140#define PCA9553_LS0_INIT	0x40 /* initial value (!= from 0x00) */
141
142struct peak_pciec_chan {
143	struct net_device *netdev;
144	unsigned long prev_rx_bytes;
145	unsigned long prev_tx_bytes;
146};
147
148struct peak_pciec_card {
149	void __iomem *cfg_base;		/* Common for all channels */
150	void __iomem *reg_base;		/* first channel base address */
151	u8 led_cache;			/* leds state cache */
152
153	/* PCIExpressCard i2c data */
154	struct i2c_algo_bit_data i2c_bit;
155	struct i2c_adapter led_chip;
156	struct delayed_work led_work;	/* led delayed work */
157	int chan_count;
158	struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
159};
160
161/* "normal" pci register write callback is overloaded for leds control */
162static void peak_pci_write_reg(const struct sja1000_priv *priv,
163			       int port, u8 val);
164
165static inline void pita_set_scl_highz(struct peak_pciec_card *card)
166{
167	u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
168	writeb(gp_outen, card->cfg_base + PITA_GPOEN);
169}
170
171static inline void pita_set_sda_highz(struct peak_pciec_card *card)
172{
173	u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
174	writeb(gp_outen, card->cfg_base + PITA_GPOEN);
175}
176
177static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
178{
179	/* raise SCL & SDA GPIOs to high-Z */
180	pita_set_scl_highz(card);
181	pita_set_sda_highz(card);
182}
183
184static void pita_setsda(void *data, int state)
185{
186	struct peak_pciec_card *card = (struct peak_pciec_card *)data;
187	u8 gp_out, gp_outen;
188
189	/* set output sda always to 0 */
190	gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
191	writeb(gp_out, card->cfg_base + PITA_GPOUT);
192
193	/* control output sda with GPOEN */
194	gp_outen = readb(card->cfg_base + PITA_GPOEN);
195	if (state)
196		gp_outen &= ~PITA_GPIN_SDA;
197	else
198		gp_outen |= PITA_GPIN_SDA;
199
200	writeb(gp_outen, card->cfg_base + PITA_GPOEN);
201}
202
203static void pita_setscl(void *data, int state)
204{
205	struct peak_pciec_card *card = (struct peak_pciec_card *)data;
206	u8 gp_out, gp_outen;
207
208	/* set output scl always to 0 */
209	gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
210	writeb(gp_out, card->cfg_base + PITA_GPOUT);
211
212	/* control output scl with GPOEN */
213	gp_outen = readb(card->cfg_base + PITA_GPOEN);
214	if (state)
215		gp_outen &= ~PITA_GPIN_SCL;
216	else
217		gp_outen |= PITA_GPIN_SCL;
218
219	writeb(gp_outen, card->cfg_base + PITA_GPOEN);
220}
221
222static int pita_getsda(void *data)
223{
224	struct peak_pciec_card *card = (struct peak_pciec_card *)data;
225
226	/* set tristate */
227	pita_set_sda_highz(card);
228
229	return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
230}
231
232static int pita_getscl(void *data)
233{
234	struct peak_pciec_card *card = (struct peak_pciec_card *)data;
235
236	/* set tristate */
237	pita_set_scl_highz(card);
238
239	return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
240}
241
242/*
243 * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC
244 */
245static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
246				    u8 offset, u8 data)
247{
248	u8 buffer[2] = {
249		offset,
250		data
251	};
252	struct i2c_msg msg = {
253		.addr = PCA9553_1_SLAVEADDR,
254		.len = 2,
255		.buf = buffer,
256	};
257	int ret;
258
259	/* cache led mask */
260	if ((offset == 5) && (data == card->led_cache))
261		return 0;
262
263	ret = i2c_transfer(&card->led_chip, &msg, 1);
264	if (ret < 0)
265		return ret;
266
267	if (offset == 5)
268		card->led_cache = data;
269
270	return 0;
271}
272
273/*
274 * delayed work callback used to control the LEDs
275 */
276static void peak_pciec_led_work(struct work_struct *work)
277{
278	struct peak_pciec_card *card =
279		container_of(work, struct peak_pciec_card, led_work.work);
280	struct net_device *netdev;
281	u8 new_led = card->led_cache;
282	int i, up_count = 0;
283
284	/* first check what is to do */
285	for (i = 0; i < card->chan_count; i++) {
286		/* default is: not configured */
287		new_led &= ~PCA9553_LED_MASK(i);
288		new_led |= PCA9553_LED_ON(i);
289
290		netdev = card->channel[i].netdev;
291		if (!netdev || !(netdev->flags & IFF_UP))
292			continue;
293
294		up_count++;
295
296		/* no activity (but configured) */
297		new_led &= ~PCA9553_LED_MASK(i);
298		new_led |= PCA9553_LED_SLOW(i);
299
300		/* if bytes counters changed, set fast blinking led */
301		if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
302			card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
303			new_led &= ~PCA9553_LED_MASK(i);
304			new_led |= PCA9553_LED_FAST(i);
305		}
306		if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
307			card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
308			new_led &= ~PCA9553_LED_MASK(i);
309			new_led |= PCA9553_LED_FAST(i);
310		}
311	}
312
313	/* check if LS0 settings changed, only update i2c if so */
314	peak_pciec_write_pca9553(card, 5, new_led);
315
316	/* restart timer (except if no more configured channels) */
317	if (up_count)
318		schedule_delayed_work(&card->led_work, HZ);
319}
320
321/*
322 * set LEDs blinking state
323 */
324static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
325{
326	u8 new_led = card->led_cache;
327	int i;
328
329	/* first check what is to do */
330	for (i = 0; i < card->chan_count; i++)
331		if (led_mask & PCA9553_LED(i)) {
332			new_led &= ~PCA9553_LED_MASK(i);
333			new_led |= PCA9553_LED_STATE(s, i);
334		}
335
336	/* check if LS0 settings changed, only update i2c if so */
337	peak_pciec_write_pca9553(card, 5, new_led);
338}
339
340/*
341 * start one second delayed work to control LEDs
342 */
343static void peak_pciec_start_led_work(struct peak_pciec_card *card)
344{
345	schedule_delayed_work(&card->led_work, HZ);
346}
347
348/*
349 * stop LEDs delayed work
350 */
351static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
352{
353	cancel_delayed_work_sync(&card->led_work);
354}
355
356/*
357 * initialize the PCA9553 4-bit I2C-bus LED chip
358 */
359static int peak_pciec_init_leds(struct peak_pciec_card *card)
360{
361	int err;
362
363	/* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
364	err = peak_pciec_write_pca9553(card, 1, 44 / 1);
365	if (err)
366		return err;
367
368	/* duty cycle 0: 50% */
369	err = peak_pciec_write_pca9553(card, 2, 0x80);
370	if (err)
371		return err;
372
373	/* prescaler for frequency 1: "FAST" = 5 Hz */
374	err = peak_pciec_write_pca9553(card, 3, 44 / 5);
375	if (err)
376		return err;
377
378	/* duty cycle 1: 50% */
379	err = peak_pciec_write_pca9553(card, 4, 0x80);
380	if (err)
381		return err;
382
383	/* switch LEDs to initial state */
384	return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
385}
386
387/*
388 * restore LEDs state to off peak_pciec_leds_exit
389 */
390static void peak_pciec_leds_exit(struct peak_pciec_card *card)
391{
392	/* switch LEDs to off */
393	peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
394}
395
396/*
397 * normal write sja1000 register method overloaded to catch when controller
398 * is started or stopped, to control leds
399 */
400static void peak_pciec_write_reg(const struct sja1000_priv *priv,
401				 int port, u8 val)
402{
403	struct peak_pci_chan *chan = priv->priv;
404	struct peak_pciec_card *card = chan->pciec_card;
405	int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
406
407	/* sja1000 register changes control the leds state */
408	if (port == SJA1000_MOD)
409		switch (val) {
410		case MOD_RM:
411			/* Reset Mode: set led on */
412			peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
413			break;
414		case 0x00:
415			/* Normal Mode: led slow blinking and start led timer */
416			peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
417			peak_pciec_start_led_work(card);
418			break;
419		default:
420			break;
421		}
422
423	/* call base function */
424	peak_pci_write_reg(priv, port, val);
425}
426
427static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
428	.setsda	= pita_setsda,
429	.setscl	= pita_setscl,
430	.getsda	= pita_getsda,
431	.getscl	= pita_getscl,
432	.udelay	= 10,
433	.timeout = HZ,
434};
435
436static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
437{
438	struct sja1000_priv *priv = netdev_priv(dev);
439	struct peak_pci_chan *chan = priv->priv;
440	struct peak_pciec_card *card;
441	int err;
442
443	/* copy i2c object address from 1st channel */
444	if (chan->prev_dev) {
445		struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
446		struct peak_pci_chan *prev_chan = prev_priv->priv;
447
448		card = prev_chan->pciec_card;
449		if (!card)
450			return -ENODEV;
451
452	/* channel is the first one: do the init part */
453	} else {
454		/* create the bit banging I2C adapter structure */
455		card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);
456		if (!card)
457			return -ENOMEM;
458
459		card->cfg_base = chan->cfg_base;
460		card->reg_base = priv->reg_base;
461
462		card->led_chip.owner = THIS_MODULE;
463		card->led_chip.dev.parent = &pdev->dev;
464		card->led_chip.algo_data = &card->i2c_bit;
465		strncpy(card->led_chip.name, "peak_i2c",
466			sizeof(card->led_chip.name));
467
468		card->i2c_bit = peak_pciec_i2c_bit_ops;
469		card->i2c_bit.udelay = 10;
470		card->i2c_bit.timeout = HZ;
471		card->i2c_bit.data = card;
472
473		peak_pciec_init_pita_gpio(card);
474
475		err = i2c_bit_add_bus(&card->led_chip);
476		if (err) {
477			dev_err(&pdev->dev, "i2c init failed\n");
478			goto pciec_init_err_1;
479		}
480
481		err = peak_pciec_init_leds(card);
482		if (err) {
483			dev_err(&pdev->dev, "leds hardware init failed\n");
484			goto pciec_init_err_2;
485		}
486
487		INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
488		/* PCAN-ExpressCard needs its own callback for leds */
489		priv->write_reg = peak_pciec_write_reg;
490	}
491
492	chan->pciec_card = card;
493	card->channel[card->chan_count++].netdev = dev;
494
495	return 0;
496
497pciec_init_err_2:
498	i2c_del_adapter(&card->led_chip);
499
500pciec_init_err_1:
501	peak_pciec_init_pita_gpio(card);
502	kfree(card);
503
504	return err;
505}
506
507static void peak_pciec_remove(struct peak_pciec_card *card)
508{
509	peak_pciec_stop_led_work(card);
510	peak_pciec_leds_exit(card);
511	i2c_del_adapter(&card->led_chip);
512	peak_pciec_init_pita_gpio(card);
513	kfree(card);
514}
515
516#else /* CONFIG_CAN_PEAK_PCIEC */
517
518/*
519 * Placebo functions when PCAN-ExpressCard support is not selected
520 */
521static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
522{
523	return -ENODEV;
524}
525
526static inline void peak_pciec_remove(struct peak_pciec_card *card)
527{
528}
529#endif /* CONFIG_CAN_PEAK_PCIEC */
530
531static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
532{
533	return readb(priv->reg_base + (port << 2));
534}
535
536static void peak_pci_write_reg(const struct sja1000_priv *priv,
537			       int port, u8 val)
538{
539	writeb(val, priv->reg_base + (port << 2));
540}
541
542static void peak_pci_post_irq(const struct sja1000_priv *priv)
543{
544	struct peak_pci_chan *chan = priv->priv;
545	u16 icr;
546
547	/* Select and clear in PITA stored interrupt */
548	icr = readw(chan->cfg_base + PITA_ICR);
549	if (icr & chan->icr_mask)
550		writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
551}
552
553static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
554{
555	struct sja1000_priv *priv;
556	struct peak_pci_chan *chan;
557	struct net_device *dev, *prev_dev;
558	void __iomem *cfg_base, *reg_base;
559	u16 sub_sys_id, icr;
560	int i, err, channels;
561
562	err = pci_enable_device(pdev);
563	if (err)
564		return err;
565
566	err = pci_request_regions(pdev, DRV_NAME);
567	if (err)
568		goto failure_disable_pci;
569
570	err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
571	if (err)
572		goto failure_release_regions;
573
574	dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
575		pdev->vendor, pdev->device, sub_sys_id);
576
577	err = pci_write_config_word(pdev, 0x44, 0);
578	if (err)
579		goto failure_release_regions;
580
581	if (sub_sys_id >= 12)
582		channels = 4;
583	else if (sub_sys_id >= 10)
584		channels = 3;
585	else if (sub_sys_id >= 4)
586		channels = 2;
587	else
588		channels = 1;
589
590	cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
591	if (!cfg_base) {
592		dev_err(&pdev->dev, "failed to map PCI resource #0\n");
593		err = -ENOMEM;
594		goto failure_release_regions;
595	}
596
597	reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
598	if (!reg_base) {
599		dev_err(&pdev->dev, "failed to map PCI resource #1\n");
600		err = -ENOMEM;
601		goto failure_unmap_cfg_base;
602	}
603
604	/* Set GPIO control register */
605	writew(0x0005, cfg_base + PITA_GPIOICR + 2);
606	/* Enable all channels of this card */
607	writeb(0x00, cfg_base + PITA_GPIOICR);
608	/* Toggle reset */
609	writeb(0x05, cfg_base + PITA_MISC + 3);
610	mdelay(5);
611	/* Leave parport mux mode */
612	writeb(0x04, cfg_base + PITA_MISC + 3);
613
614	icr = readw(cfg_base + PITA_ICR + 2);
615
616	for (i = 0; i < channels; i++) {
617		dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
618		if (!dev) {
619			err = -ENOMEM;
620			goto failure_remove_channels;
621		}
622
623		priv = netdev_priv(dev);
624		chan = priv->priv;
625
626		chan->cfg_base = cfg_base;
627		priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
628
629		priv->read_reg = peak_pci_read_reg;
630		priv->write_reg = peak_pci_write_reg;
631		priv->post_irq = peak_pci_post_irq;
632
633		priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
634		priv->ocr = PEAK_PCI_OCR;
635		priv->cdr = PEAK_PCI_CDR;
636		/* Neither a slave nor a single device distributes the clock */
637		if (channels == 1 || i > 0)
638			priv->cdr |= CDR_CLK_OFF;
639
640		/* Setup interrupt handling */
641		priv->irq_flags = IRQF_SHARED;
642		dev->irq = pdev->irq;
643
644		chan->icr_mask = peak_pci_icr_masks[i];
645		icr |= chan->icr_mask;
646
647		SET_NETDEV_DEV(dev, &pdev->dev);
648		dev->dev_id = i;
649
650		/* Create chain of SJA1000 devices */
651		chan->prev_dev = pci_get_drvdata(pdev);
652		pci_set_drvdata(pdev, dev);
653
654		/*
655		 * PCAN-ExpressCard needs some additional i2c init.
656		 * This must be done *before* register_sja1000dev() but
657		 * *after* devices linkage
658		 */
659		if (pdev->device == PEAK_PCIEC_DEVICE_ID ||
660		    pdev->device == PEAK_PCIEC34_DEVICE_ID) {
661			err = peak_pciec_probe(pdev, dev);
662			if (err) {
663				dev_err(&pdev->dev,
664					"failed to probe device (err %d)\n",
665					err);
666				goto failure_free_dev;
667			}
668		}
669
670		err = register_sja1000dev(dev);
671		if (err) {
672			dev_err(&pdev->dev, "failed to register device\n");
673			goto failure_free_dev;
674		}
675
676		dev_info(&pdev->dev,
677			 "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
678			 dev->name, priv->reg_base, chan->cfg_base, dev->irq);
679	}
680
681	/* Enable interrupts */
682	writew(icr, cfg_base + PITA_ICR + 2);
683
684	return 0;
685
686failure_free_dev:
687	pci_set_drvdata(pdev, chan->prev_dev);
688	free_sja1000dev(dev);
689
690failure_remove_channels:
691	/* Disable interrupts */
692	writew(0x0, cfg_base + PITA_ICR + 2);
693
694	chan = NULL;
695	for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) {
696		priv = netdev_priv(dev);
697		chan = priv->priv;
698		prev_dev = chan->prev_dev;
699
700		unregister_sja1000dev(dev);
701		free_sja1000dev(dev);
702	}
703
704	/* free any PCIeC resources too */
705	if (chan && chan->pciec_card)
706		peak_pciec_remove(chan->pciec_card);
707
708	pci_iounmap(pdev, reg_base);
709
710failure_unmap_cfg_base:
711	pci_iounmap(pdev, cfg_base);
712
713failure_release_regions:
714	pci_release_regions(pdev);
715
716failure_disable_pci:
717	pci_disable_device(pdev);
718
719	return err;
720}
721
722static void peak_pci_remove(struct pci_dev *pdev)
723{
724	struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
725	struct sja1000_priv *priv = netdev_priv(dev);
726	struct peak_pci_chan *chan = priv->priv;
727	void __iomem *cfg_base = chan->cfg_base;
728	void __iomem *reg_base = priv->reg_base;
729
730	/* Disable interrupts */
731	writew(0x0, cfg_base + PITA_ICR + 2);
732
733	/* Loop over all registered devices */
734	while (1) {
735		struct net_device *prev_dev = chan->prev_dev;
736
737		dev_info(&pdev->dev, "removing device %s\n", dev->name);
738		unregister_sja1000dev(dev);
739		free_sja1000dev(dev);
740		dev = prev_dev;
741
742		if (!dev) {
743			/* do that only for first channel */
744			if (chan->pciec_card)
745				peak_pciec_remove(chan->pciec_card);
746			break;
747		}
748		priv = netdev_priv(dev);
749		chan = priv->priv;
750	}
751
752	pci_iounmap(pdev, reg_base);
753	pci_iounmap(pdev, cfg_base);
754	pci_release_regions(pdev);
755	pci_disable_device(pdev);
756}
757
758static struct pci_driver peak_pci_driver = {
759	.name = DRV_NAME,
760	.id_table = peak_pci_tbl,
761	.probe = peak_pci_probe,
762	.remove = peak_pci_remove,
763};
764
765module_pci_driver(peak_pci_driver);
766