11c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* 21c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Broadcom GENET (Gigabit Ethernet) controller driver 31c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 41c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Copyright (c) 2014 Broadcom Corporation 51c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 61c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * This program is free software; you can redistribute it and/or modify 71c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * it under the terms of the GNU General Public License version 2 as 81c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * published by the Free Software Foundation. 91c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define pr_fmt(fmt) "bcmgenet: " fmt 121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/kernel.h> 141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/module.h> 151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/sched.h> 161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/types.h> 171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/fcntl.h> 181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/interrupt.h> 191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/string.h> 201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/if_ether.h> 211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/init.h> 221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/errno.h> 231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/delay.h> 241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/platform_device.h> 251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/dma-mapping.h> 261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/pm.h> 271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/clk.h> 281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of.h> 291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_address.h> 301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_irq.h> 311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_net.h> 321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_platform.h> 331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <net/arp.h> 341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/mii.h> 361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ethtool.h> 371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/netdevice.h> 381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/inetdevice.h> 391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/etherdevice.h> 401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/skbuff.h> 411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/in.h> 421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ip.h> 431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ipv6.h> 441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/phy.h> 451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <asm/unaligned.h> 471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include "bcmgenet.h" 491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Maximum number of hardware queues, downsized if needed */ 511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_MAX_MQ_CNT 4 521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Default highest priority queue for multi queue support */ 541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_Q0_PRIORITY 0 551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_DEFAULT_BD_CNT \ 571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (TOTAL_DESC - priv->hw_params->tx_queues * priv->hw_params->bds_cnt) 581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define RX_BUF_LENGTH 2048 601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define SKB_ALIGNMENT 32 611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Tx/Rx DMA register offset, skip 256 descriptors */ 631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define WORDS_PER_BD(p) (p->hw_params->words_per_bd) 641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define DMA_DESC_SIZE (WORDS_PER_BD(priv) * sizeof(u32)) 651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_TDMA_REG_OFF (priv->hw_params->tdma_offset + \ 671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TOTAL_DESC * DMA_DESC_SIZE) 681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_RDMA_REG_OFF (priv->hw_params->rdma_offset + \ 701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TOTAL_DESC * DMA_DESC_SIZE) 711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set_length_status(struct bcmgenet_priv *priv, 73c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli void __iomem *d, u32 value) 741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(value, d + DMA_DESC_LENGTH_STATUS); 761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 dmadesc_get_length_status(struct bcmgenet_priv *priv, 79c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli void __iomem *d) 801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(d + DMA_DESC_LENGTH_STATUS); 821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set_addr(struct bcmgenet_priv *priv, 851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d, 861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t addr) 871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(lower_32_bits(addr), d + DMA_DESC_ADDRESS_LO); 891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Register writes to GISB bus can take couple hundred nanoseconds 911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * and are done for each packet, save these expensive writes unless 927fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris * the platform is explicitly configured for 64-bits/LPAE. 931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_40BITS) 961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(upper_32_bits(addr), d + DMA_DESC_ADDRESS_HI); 971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Combined address + length/status setter */ 1011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set(struct bcmgenet_priv *priv, 102c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli void __iomem *d, dma_addr_t addr, u32 val) 1031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_length_status(priv, d, val); 1051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_addr(priv, d, addr); 1061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline dma_addr_t dmadesc_get_addr(struct bcmgenet_priv *priv, 1091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d) 1101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t addr; 1121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr = __raw_readl(d + DMA_DESC_ADDRESS_LO); 1141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Register writes to GISB bus can take couple hundred nanoseconds 1161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * and are done for each packet, save these expensive writes unless 1177fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris * the platform is explicitly configured for 64-bits/LPAE. 1181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 1201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_40BITS) 1211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr |= (u64)__raw_readl(d + DMA_DESC_ADDRESS_HI) << 32; 1221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 1231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return addr; 1241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_VER_FMT "%1d.%1d EPHY: 0x%04x" 1271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \ 1291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli NETIF_MSG_LINK) 1301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rbuf_ctrl_get(struct bcmgenet_priv *priv) 1321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, RBUF_FLUSH_CTRL_V1); 1351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_sys_readl(priv, SYS_RBUF_FLUSH_CTRL); 1371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rbuf_ctrl_set(struct bcmgenet_priv *priv, u32 val) 1401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, RBUF_FLUSH_CTRL_V1); 1431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_sys_writel(priv, val, SYS_RBUF_FLUSH_CTRL); 1451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* These macros are defined to deal with register map change 1481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * between GENET1.1 and GENET2. Only those currently being used 1491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * by driver are defined. 1501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tbuf_ctrl_get(struct bcmgenet_priv *priv) 1521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, TBUF_CTRL_V1); 1551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + 1571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_CTRL); 1581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tbuf_ctrl_set(struct bcmgenet_priv *priv, u32 val) 1611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, TBUF_CTRL_V1); 1641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + 1661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_CTRL); 1671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_bp_mc_get(struct bcmgenet_priv *priv) 1701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, TBUF_BP_MC_V1); 1731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + 1751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_BP_MC); 1761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_bp_mc_set(struct bcmgenet_priv *priv, u32 val) 1791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, TBUF_BP_MC_V1); 1821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + 1841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_BP_MC); 1851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* RX/TX DMA register accessors */ 1881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum dma_reg { 1891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_CFG = 0, 1901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_CTRL, 1911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_STATUS, 1921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_SCB_BURST_SIZE, 1931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_ARB_CTRL, 194377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther DMA_PRIORITY_0, 195377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther DMA_PRIORITY_1, 196377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther DMA_PRIORITY_2, 1971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 1981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v3plus[] = { 2001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_CFG] = 0x00, 2011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x04, 2021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x08, 2031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x2C, 205377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_0] = 0x30, 206377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_1] = 0x34, 207377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_2] = 0x38, 2081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v2[] = { 2111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_CFG] = 0x00, 2121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x04, 2131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x08, 2141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x30, 216377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_0] = 0x34, 217377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_1] = 0x38, 218377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_2] = 0x3C, 2191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v1[] = { 2221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x00, 2231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x04, 2241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x30, 226377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_0] = 0x34, 227377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_1] = 0x38, 228377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther [DMA_PRIORITY_2] = 0x3C, 2291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set at runtime once bcmgenet version is known */ 2321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 *bcmgenet_dma_regs; 2331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline struct bcmgenet_priv *dev_to_priv(struct device *dev) 2351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return netdev_priv(dev_get_drvdata(dev)); 2371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tdma_readl(struct bcmgenet_priv *priv, 240c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_reg r) 2411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_TDMA_REG_OFF + 2431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tdma_writel(struct bcmgenet_priv *priv, 2471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, enum dma_reg r) 2481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_TDMA_REG_OFF + 2501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rdma_readl(struct bcmgenet_priv *priv, 254c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_reg r) 2551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_RDMA_REG_OFF + 2571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rdma_writel(struct bcmgenet_priv *priv, 2611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, enum dma_reg r) 2621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_RDMA_REG_OFF + 2641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* RDMA/TDMA ring registers and accessors 2681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * we merge the common fields and just prefix with T/D the registers 2691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * having different meaning depending on the direction 2701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 2711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum dma_ring_reg { 2721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_READ_PTR = 0, 2731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_WRITE_PTR = TDMA_READ_PTR, 2741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_READ_PTR_HI, 2751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_WRITE_PTR_HI = TDMA_READ_PTR_HI, 2761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_CONS_INDEX, 2771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_PROD_INDEX = TDMA_CONS_INDEX, 2781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_PROD_INDEX, 2791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_CONS_INDEX = TDMA_PROD_INDEX, 2801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_BUF_SIZE, 2811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_START_ADDR, 2821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_START_ADDR_HI, 2831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_END_ADDR, 2841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_END_ADDR_HI, 2851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_MBUF_DONE_THRESH, 2861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_FLOW_PERIOD, 2871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_XON_XOFF_THRESH = TDMA_FLOW_PERIOD, 2881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_WRITE_PTR, 2891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_READ_PTR = TDMA_WRITE_PTR, 2901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_WRITE_PTR_HI, 2911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_READ_PTR_HI = TDMA_WRITE_PTR_HI 2921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* GENET v4 supports 40-bits pointer addressing 2951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * for obvious reasons the LO and HI word parts 2961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * are contiguous, but this offsets the other 2971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * registers. 2981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 2991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 genet_dma_ring_regs_v4[] = { 3001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR] = 0x00, 3011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR_HI] = 0x04, 3021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_CONS_INDEX] = 0x08, 3031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_PROD_INDEX] = 0x0C, 3041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_BUF_SIZE] = 0x10, 3051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR] = 0x14, 3061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR_HI] = 0x18, 3071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR] = 0x1C, 3081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR_HI] = 0x20, 3091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_MBUF_DONE_THRESH] = 0x24, 3101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_FLOW_PERIOD] = 0x28, 3111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR] = 0x2C, 3121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR_HI] = 0x30, 3131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 3141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 genet_dma_ring_regs_v123[] = { 3161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR] = 0x00, 3171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_CONS_INDEX] = 0x04, 3181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_PROD_INDEX] = 0x08, 3191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_BUF_SIZE] = 0x0C, 3201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR] = 0x10, 3211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR] = 0x14, 3221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_MBUF_DONE_THRESH] = 0x18, 3231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_FLOW_PERIOD] = 0x1C, 3241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR] = 0x20, 3251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 3261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set at runtime once GENET version is known */ 3281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 *genet_dma_ring_regs; 3291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tdma_ring_readl(struct bcmgenet_priv *priv, 331c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned int ring, 332c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_ring_reg r) 3331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_TDMA_REG_OFF + 3351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tdma_ring_writel(struct bcmgenet_priv *priv, 340c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned int ring, u32 val, 341c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_ring_reg r) 3421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_TDMA_REG_OFF + 3441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rdma_ring_readl(struct bcmgenet_priv *priv, 349c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned int ring, 350c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_ring_reg r) 3511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_RDMA_REG_OFF + 3531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rdma_ring_writel(struct bcmgenet_priv *priv, 358c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned int ring, u32 val, 359c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum dma_ring_reg r) 3601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_RDMA_REG_OFF + 3621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_get_settings(struct net_device *dev, 367c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct ethtool_cmd *cmd) 3681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 3701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 3721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 3731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 3751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENODEV; 3761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return phy_ethtool_gset(priv->phydev, cmd); 3781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_settings(struct net_device *dev, 381c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct ethtool_cmd *cmd) 3821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 3841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 3861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 3871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 3891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENODEV; 3901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return phy_ethtool_sset(priv->phydev, cmd); 3921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_rx_csum(struct net_device *dev, 3951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted) 3961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 3981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 rbuf_chk_ctrl; 3991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bool rx_csum_en; 4001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rx_csum_en = !!(wanted & NETIF_F_RXCSUM); 4021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CHK_CTRL); 4041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable rx checksumming */ 4061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (rx_csum_en) 4071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl |= RBUF_RXCHK_EN; 4081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 4091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl &= ~RBUF_RXCHK_EN; 4101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->desc_rxchk_en = rx_csum_en; 411ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli 412ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli /* If UniMAC forwards CRC, we need to skip over it to get 413ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli * a valid CHK bit to be set in the per-packet status word 414ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli */ 415ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli if (rx_csum_en && priv->crc_fwd_en) 416ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli rbuf_chk_ctrl |= RBUF_SKIP_FCS; 417ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli else 418ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli rbuf_chk_ctrl &= ~RBUF_SKIP_FCS; 419ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli 4201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, rbuf_chk_ctrl, RBUF_CHK_CTRL); 4211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 4231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_tx_csum(struct net_device *dev, 4261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted) 4271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bool desc_64b_en; 4301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 tbuf_ctrl, rbuf_ctrl; 4311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl = bcmgenet_tbuf_ctrl_get(priv); 4331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CTRL); 4341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli desc_64b_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)); 4361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable 64 bytes descriptor in both directions (RBUF and TBUF) */ 4381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (desc_64b_en) { 4391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl |= RBUF_64B_EN; 4401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl |= RBUF_64B_EN; 4411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 4421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl &= ~RBUF_64B_EN; 4431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl &= ~RBUF_64B_EN; 4441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 4451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->desc_64b_en = desc_64b_en; 4461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tbuf_ctrl_set(priv, tbuf_ctrl); 4481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, rbuf_ctrl, RBUF_CTRL); 4491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 4511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_features(struct net_device *dev, 454c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli netdev_features_t features) 4551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t changed = features ^ dev->features; 4571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted = dev->wanted_features; 4581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret = 0; 4591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) 4611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_set_tx_csum(dev, wanted); 4621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (changed & (NETIF_F_RXCSUM)) 4631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_set_rx_csum(dev, wanted); 4641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 4661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic u32 bcmgenet_get_msglevel(struct net_device *dev) 4691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return priv->msg_enable; 4731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_msglevel(struct net_device *dev, u32 level) 4761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->msg_enable = level; 4801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* standard ethtool support functions. */ 4831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum bcmgenet_stat_type { 4841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_NETDEV = -1, 4851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MIB_RX, 4861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MIB_TX, 4871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_RUNT, 4881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MISC, 4891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 4901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistruct bcmgenet_stats { 4921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char stat_string[ETH_GSTRING_LEN]; 4931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int stat_sizeof; 4941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int stat_offset; 4951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum bcmgenet_stat_type type; 4961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* reg offset from UMAC base for misc counters */ 4971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 reg_offset; 4981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 4991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_NETDEV(m) { \ 5011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = __stringify(m), \ 5021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct net_device_stats *)0)->m), \ 5031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct net_device_stats, m), \ 5041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = BCMGENET_STAT_NETDEV, \ 5051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB(str, m, _type) { \ 5081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = str, \ 5091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct bcmgenet_priv *)0)->m), \ 5101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct bcmgenet_priv, m), \ 5111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = _type, \ 5121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB_RX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_RX) 5151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB_TX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_TX) 5161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_RUNT(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_RUNT) 5171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MISC(str, m, offset) { \ 5191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = str, \ 5201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct bcmgenet_priv *)0)->m), \ 5211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct bcmgenet_priv, m), \ 5221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = BCMGENET_STAT_MISC, \ 5231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .reg_offset = offset, \ 5241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* There is a 0xC gap between the end of RX and beginning of TX stats and then 5281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * between the end of TX stats and the beginning of the RX RUNT 5291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 5301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define BCMGENET_STAT_OFFSET 0xc 5311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Hardware counters must be kept in sync because the order/offset 5331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * is important here (order in structure declaration = order in hardware) 5341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 5351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct bcmgenet_stats bcmgenet_gstrings_stats[] = { 5361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* general stats */ 5371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_packets), 5381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_packets), 5391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_bytes), 5401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_bytes), 5411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_errors), 5421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_errors), 5431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_dropped), 5441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_dropped), 5451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(multicast), 5461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC RSV counters */ 5471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 5481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 5491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 5501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 5511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 5521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 5531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 5541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 5551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 5561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 5571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_pkts", mib.rx.pkt), 5581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_bytes", mib.rx.bytes), 5591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_multicast", mib.rx.mca), 5601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_broadcast", mib.rx.bca), 5611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_fcs", mib.rx.fcs), 5621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_control", mib.rx.cf), 5631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_pause", mib.rx.pf), 5641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_unknown", mib.rx.uo), 5651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_align", mib.rx.aln), 5661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_outrange", mib.rx.flr), 5671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_code", mib.rx.cde), 5681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_carrier", mib.rx.fcr), 5691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_oversize", mib.rx.ovr), 5701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_jabber", mib.rx.jbr), 5711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_mtu_err", mib.rx.mtue), 5721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_good_pkts", mib.rx.pok), 5731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_unicast", mib.rx.uc), 5741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_ppp", mib.rx.ppp), 5751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_crc", mib.rx.rcrc), 5761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC TSV counters */ 5771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 5781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 5791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 5801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 5811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 5821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 5831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 5841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 5851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 5861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 5871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_pkts", mib.tx.pkts), 5881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_multicast", mib.tx.mca), 5891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_broadcast", mib.tx.bca), 5901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_pause", mib.tx.pf), 5911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_control", mib.tx.cf), 5921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_fcs_err", mib.tx.fcs), 5931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_oversize", mib.tx.ovr), 5941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_defer", mib.tx.drf), 5951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_excess_defer", mib.tx.edf), 5961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_single_col", mib.tx.scl), 5971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_multi_col", mib.tx.mcl), 5981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_late_col", mib.tx.lcl), 5991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_excess_col", mib.tx.ecl), 6001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_frags", mib.tx.frg), 6011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_total_col", mib.tx.ncl), 6021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_jabber", mib.tx.jbr), 6031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_bytes", mib.tx.bytes), 6041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_good_pkts", mib.tx.pok), 6051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_unicast", mib.tx.uc), 6061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC RUNT counters */ 6071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 6081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 6091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 6101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 6111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Misc UniMAC counters */ 6121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, 6131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_RBUF_OVFL_CNT), 6141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, UMAC_RBUF_ERR_CNT), 6151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("mdf_err_cnt", mib.mdf_err_cnt, UMAC_MDF_ERR_CNT), 6161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 6171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define BCMGENET_STATS_LEN ARRAY_SIZE(bcmgenet_gstrings_stats) 6191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_get_drvinfo(struct net_device *dev, 621c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct ethtool_drvinfo *info) 6221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli strlcpy(info->driver, "bcmgenet", sizeof(info->driver)); 6241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli strlcpy(info->version, "v2.0", sizeof(info->version)); 6251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli info->n_stats = BCMGENET_STATS_LEN; 6261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_get_sset_count(struct net_device *dev, int string_set) 6291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (string_set) { 6311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_SS_STATS: 6321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return BCMGENET_STATS_LEN; 6331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 6341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EOPNOTSUPP; 6351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 638c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainellistatic void bcmgenet_get_strings(struct net_device *dev, u32 stringset, 639c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli u8 *data) 6401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 6421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (stringset) { 6441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_SS_STATS: 6451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 6461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli memcpy(data + i * ETH_GSTRING_LEN, 647c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_gstrings_stats[i].stat_string, 648c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli ETH_GSTRING_LEN); 6491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) 6551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i, j = 0; 6571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 6591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct bcmgenet_stats *s; 6601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 offset = 0; 6611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val = 0; 6621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char *p; 6631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli s = &bcmgenet_gstrings_stats[i]; 6651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (s->type) { 6661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_NETDEV: 6671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli continue; 6681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MIB_RX: 6691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MIB_TX: 6701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_RUNT: 6711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (s->type != BCMGENET_STAT_MIB_RX) 6721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli offset = BCMGENET_STAT_OFFSET; 673c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli val = bcmgenet_umac_readl(priv, 674c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_MIB_START + j + offset); 6751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MISC: 6771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = bcmgenet_umac_readl(priv, s->reg_offset); 6781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear if overflowed */ 6791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (val == ~0) 6801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, s->reg_offset); 6811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli j += s->stat_sizeof; 6851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)priv + s->stat_offset; 6861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli *(u32 *)p = val; 6871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_get_ethtool_stats(struct net_device *dev, 691c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct ethtool_stats *stats, 692c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli u64 *data) 6931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 6951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 6961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_running(dev)) 6981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_update_mib_counters(priv); 6991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 7011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct bcmgenet_stats *s; 7021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char *p; 7031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli s = &bcmgenet_gstrings_stats[i]; 7051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (s->type == BCMGENET_STAT_NETDEV) 7061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)&dev->stats; 7071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 7081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)priv; 7091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p += s->stat_offset; 7101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli data[i] = *(u32 *)p; 7111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* standard ethtool support functions. */ 7151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct ethtool_ops bcmgenet_ethtool_ops = { 7161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_strings = bcmgenet_get_strings, 7171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_sset_count = bcmgenet_get_sset_count, 7181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_ethtool_stats = bcmgenet_get_ethtool_stats, 7191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_settings = bcmgenet_get_settings, 7201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .set_settings = bcmgenet_set_settings, 7211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_drvinfo = bcmgenet_get_drvinfo, 7221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_link = ethtool_op_get_link, 7231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_msglevel = bcmgenet_get_msglevel, 7241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .set_msglevel = bcmgenet_set_msglevel, 72506ba8375ec42daae19124eaa106295dbe159731fFlorian Fainelli .get_wol = bcmgenet_get_wol, 72606ba8375ec42daae19124eaa106295dbe159731fFlorian Fainelli .set_wol = bcmgenet_set_wol, 7271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 7281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Power down the unimac, based on mode. */ 7301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_power_down(struct bcmgenet_priv *priv, 7311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum bcmgenet_power_mode mode) 7321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 7341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (mode) { 7361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_CABLE_SENSE: 73780d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli phy_detach(priv->phydev); 7381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 740c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli case GENET_POWER_WOL_MAGIC: 741c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli bcmgenet_wol_power_down_cfg(priv, mode); 742c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli break; 743c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli 7441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_PASSIVE: 7451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Power down LED */ 7461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_EXT) { 7471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 7481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= (EXT_PWR_DOWN_PHY | 7491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_BIAS); 7501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 7511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 7541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_power_up(struct bcmgenet_priv *priv, 759c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli enum bcmgenet_power_mode mode) 7601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 7621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(priv->hw_params->flags & GENET_HAS_EXT)) 7641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 7651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 7671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (mode) { 7691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_PASSIVE: 7701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~(EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_PHY | 7711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli EXT_PWR_DOWN_BIAS); 7721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* fallthrough */ 7731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_CABLE_SENSE: 7741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable APD */ 7751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= EXT_PWR_DN_EN_LD; 7761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 777c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli case GENET_POWER_WOL_MAGIC: 778c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli bcmgenet_wol_power_up_cfg(priv, mode); 779c3ae64ae0c08b3ff7fe0dea4d43c586f02a3adb5Florian Fainelli return; 7801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 7811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 785cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli 786cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli if (mode == GENET_POWER_PASSIVE) 787cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli bcmgenet_mii_reset(priv->dev); 7881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* ioctl handle special commands that are not present in ethtool. */ 7911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 7921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 7941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int val = 0; 7951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 7971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 7981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (cmd) { 8001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCGMIIPHY: 8011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCGMIIREG: 8021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCSMIIREG: 8031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 8041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = -ENODEV; 8051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = phy_mii_ioctl(priv->phydev, rq, cmd); 8071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 8081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 8101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = -EINVAL; 8111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 8121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 8131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return val; 8151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct enet_cb *bcmgenet_get_txcb(struct bcmgenet_priv *priv, 8181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 8211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = ring->cbs; 8231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr += ring->write_ptr - ring->cb_ptr; 8241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->bd_addr = priv->tx_bds + ring->write_ptr * DMA_DESC_SIZE; 8251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Advancing local write pointer */ 8261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->write_ptr == ring->end_ptr) 8271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr = ring->cb_ptr; 8281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr++; 8301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return tx_cb_ptr; 8321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Simple helper to free a control block's resources */ 8351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_free_cb(struct enet_cb *cb) 8361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 8381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 8391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, 0); 8401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring16_int_disable(struct bcmgenet_priv *priv, 8431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 846c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE, 847c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_SET); 8481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring16_int_enable(struct bcmgenet_priv *priv, 8511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 854c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE, 855c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_CLEAR); 8561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring_int_enable(struct bcmgenet_priv *priv, 859c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct bcmgenet_tx_ring *ring) 8601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 861c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_intrl2_1_writel(priv, (1 << ring->index), 862c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_CLEAR); 8631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->int1_mask &= ~(1 << ring->index); 8641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring_int_disable(struct bcmgenet_priv *priv, 8671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 869c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_intrl2_1_writel(priv, (1 << ring->index), 870c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_SET); 8711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->int1_mask |= (1 << ring->index); 8721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Unlocked version of the reclaim routine */ 8751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void __bcmgenet_tx_reclaim(struct net_device *dev, 876c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct bcmgenet_tx_ring *ring) 8771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 8791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int last_tx_cn, last_c_index, num_tx_bds; 8801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 881b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli struct netdev_queue *txq; 882478a010c9235ca92e66cc5058b42e30e33275ad4Florian Fainelli unsigned int bds_compl; 8831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int c_index; 8841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8857fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* Compute how many buffers are transmitted since last xmit call */ 8861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli c_index = bcmgenet_tdma_ring_readl(priv, ring->index, TDMA_CONS_INDEX); 887b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli txq = netdev_get_tx_queue(dev, ring->queue); 8881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index = ring->c_index; 8901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli num_tx_bds = ring->size; 8911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli c_index &= (num_tx_bds - 1); 8931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (c_index >= last_c_index) 8951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_tx_cn = c_index - last_c_index; 8961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_tx_cn = num_tx_bds - last_c_index + c_index; 8981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, tx_done, dev, 900c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "%s ring=%d index=%d last_tx_cn=%d last_index=%d\n", 901c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli __func__, ring->index, 902c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli c_index, last_tx_cn, last_c_index); 9031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Reclaim transmitted buffers */ 9051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (last_tx_cn-- > 0) { 9061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = ring->cbs + last_c_index; 907478a010c9235ca92e66cc5058b42e30e33275ad4Florian Fainelli bds_compl = 0; 9081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (tx_cb_ptr->skb) { 909478a010c9235ca92e66cc5058b42e30e33275ad4Florian Fainelli bds_compl = skb_shinfo(tx_cb_ptr->skb)->nr_frags + 1; 9101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_bytes += tx_cb_ptr->skb->len; 9111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&dev->dev, 912c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dma_unmap_addr(tx_cb_ptr, dma_addr), 913c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli tx_cb_ptr->skb->len, 914c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_TO_DEVICE); 9151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(tx_cb_ptr); 9161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (dma_unmap_addr(tx_cb_ptr, dma_addr)) { 9171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_bytes += 9181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len(tx_cb_ptr, dma_len); 9191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_page(&dev->dev, 920c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dma_unmap_addr(tx_cb_ptr, dma_addr), 921c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dma_unmap_len(tx_cb_ptr, dma_len), 922c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_TO_DEVICE); 9231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, 0); 9241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_packets++; 926478a010c9235ca92e66cc5058b42e30e33275ad4Florian Fainelli ring->free_bds += bds_compl; 9271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index++; 9291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index &= (num_tx_bds - 1); 9301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds > (MAX_SKB_FRAGS + 1)) 9331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable(priv, ring); 9341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 935b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli if (netif_tx_queue_stopped(txq)) 936b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_wake_queue(txq); 9371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->c_index = c_index; 9391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_tx_reclaim(struct net_device *dev, 942c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct bcmgenet_tx_ring *ring) 9431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long flags; 9451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_irqsave(&ring->lock, flags); 9471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __bcmgenet_tx_reclaim(dev, ring); 9481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_unlock_irqrestore(&ring->lock, flags); 9491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_tx_reclaim_all(struct net_device *dev) 9521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 9541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 9551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_is_multiqueue(dev)) { 9571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->hw_params->tx_queues; i++) 9581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(dev, &priv->tx_rings[i]); 9591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(dev, &priv->tx_rings[DESC_INDEX]); 9621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Transmits a single SKB (either head of a fragment or a single SKB) 9651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * caller must hold priv->lock 9661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 9671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_xmit_single(struct net_device *dev, 9681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb, 9691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 dma_desc_flags, 9701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 9711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 9731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 9741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 9751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int skb_len; 9761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 9771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 length_status; 9781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 9791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = bcmgenet_get_txcb(priv, ring); 9811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!tx_cb_ptr)) 9831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BUG(); 9841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->skb = skb; 9861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_len = skb_headlen(skb) < ETH_ZLEN ? ETH_ZLEN : skb_headlen(skb); 9881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 9901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 9911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 9921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, tx_err, dev, "Tx DMA map failed\n"); 9931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(skb); 9941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 9951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, mapping); 9981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len_set(tx_cb_ptr, dma_len, skb->len); 9991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli length_status = (skb_len << DMA_BUFLENGTH_SHIFT) | dma_desc_flags | 10001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT) | 10011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_TX_APPEND_CRC; 10021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (skb->ip_summed == CHECKSUM_PARTIAL) 10041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli length_status |= DMA_TX_DO_CSUM; 10051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set(priv, tx_cb_ptr->bd_addr, mapping, length_status); 10071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Decrement total BD count and advance our write pointer */ 10091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds -= 1; 10101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index += 1; 10111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index &= DMA_P_INDEX_MASK; 10121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 10141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 10151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10167fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris/* Transmit a SKB fragment */ 10171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_xmit_frag(struct net_device *dev, 1018c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli skb_frag_t *frag, 1019c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli u16 dma_desc_flags, 1020c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli struct bcmgenet_tx_ring *ring) 10211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 10221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 10231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 10241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 10251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 10261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 10271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = bcmgenet_get_txcb(priv, ring); 10291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!tx_cb_ptr)) 10311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BUG(); 10321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->skb = NULL; 10331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = skb_frag_dma_map(kdev, frag, 0, 1035c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli skb_frag_size(frag), DMA_TO_DEVICE); 10361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 10371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 10381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, tx_err, dev, "%s: Tx DMA map failed\n", 1039c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli __func__); 10401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 10411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, mapping); 10441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len_set(tx_cb_ptr, dma_len, frag->size); 10451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set(priv, tx_cb_ptr->bd_addr, mapping, 1047c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (frag->size << DMA_BUFLENGTH_SHIFT) | dma_desc_flags | 1048c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT)); 10491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds -= 1; 10521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index += 1; 10531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index &= DMA_P_INDEX_MASK; 10541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 10561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 10571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Reallocate the SKB to put enough headroom in front of it and insert 10591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the transmit checksum offsets in the descriptors 10601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1061bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gyntherstatic struct sk_buff *bcmgenet_put_tx_csum(struct net_device *dev, 1062bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther struct sk_buff *skb) 10631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 10641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct status_64 *status = NULL; 10651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *new_skb; 10661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 offset; 10671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 ip_proto; 10681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 ip_ver; 10691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 tx_csum_info; 10701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(skb_headroom(skb) < sizeof(*status))) { 10721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* If 64 byte status block enabled, must make sure skb has 10731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * enough headroom for us to insert 64B status block. 10741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 10751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli new_skb = skb_realloc_headroom(skb, sizeof(*status)); 10761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(skb); 10771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!new_skb) { 10781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_errors++; 10791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_dropped++; 1080bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther return NULL; 10811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb = new_skb; 10831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_push(skb, sizeof(*status)); 10861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status = (struct status_64 *)skb->data; 10871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (skb->ip_summed == CHECKSUM_PARTIAL) { 10891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_ver = htons(skb->protocol); 10901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (ip_ver) { 10911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_P_IP: 10921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_proto = ip_hdr(skb)->protocol; 10931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 10941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_P_IPV6: 10951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_proto = ipv6_hdr(skb)->nexthdr; 10961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 10971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 1098bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther return skb; 10991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli offset = skb_checksum_start_offset(skb) - sizeof(*status); 11021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info = (offset << STATUS_TX_CSUM_START_SHIFT) | 11031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (offset + skb->csum_offset); 11041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set the length valid bit for TCP and UDP and just set 11061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the special UDP flag for IPv4, else just set to 0. 11071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 11081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 11091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info |= STATUS_TX_CSUM_LV; 11101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP) 11111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info |= STATUS_TX_CSUM_PROTO_UDP; 11128900ea570a38740dc2769080b3bda4f90504d9e3Florian Fainelli } else { 11131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info = 0; 11148900ea570a38740dc2769080b3bda4f90504d9e3Florian Fainelli } 11151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status->tx_csum_info = tx_csum_info; 11171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1119bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther return skb; 11201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 11211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) 11231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 11241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 11251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring = NULL; 1126b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli struct netdev_queue *txq; 11271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long flags = 0; 11281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int nr_frags, index; 11291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 dma_desc_flags; 11301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 11311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 11321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = skb_get_queue_mapping(skb); 11341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Mapping strategy: 11351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 0, unclassified, packet xmited through ring16 11361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 1, goes to ring 0. (highest priority queue 11371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 2, goes to ring 1. 11381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 3, goes to ring 2. 11391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 4, goes to ring 3. 11401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 11411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index == 0) 11421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = DESC_INDEX; 11431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 11441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index -= 1; 11451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli nr_frags = skb_shinfo(skb)->nr_frags; 11471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring = &priv->tx_rings[index]; 1148b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli txq = netdev_get_tx_queue(dev, ring->queue); 11491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_irqsave(&ring->lock, flags); 11511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds <= nr_frags + 1) { 1152b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_stop_queue(txq); 11531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "%s: tx ring %d full when queue %d awake\n", 1154c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli __func__, index, ring->queue); 11551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_BUSY; 11561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1159474ea9cafc459976827a477f2c30eaf6313cb7c1Florian Fainelli if (skb_padto(skb, ETH_ZLEN)) { 1160474ea9cafc459976827a477f2c30eaf6313cb7c1Florian Fainelli ret = NETDEV_TX_OK; 1161474ea9cafc459976827a477f2c30eaf6313cb7c1Florian Fainelli goto out; 1162474ea9cafc459976827a477f2c30eaf6313cb7c1Florian Fainelli } 1163474ea9cafc459976827a477f2c30eaf6313cb7c1Florian Fainelli 11641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* set the SKB transmit checksum */ 11651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->desc_64b_en) { 1166bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther skb = bcmgenet_put_tx_csum(dev, skb); 1167bc23333ba11fb7f959b7e87e121122f5a0fbbca8Petri Gynther if (!skb) { 11681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_desc_flags = DMA_SOP; 11741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (nr_frags == 0) 11751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_desc_flags |= DMA_EOP; 11761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Transmit single SKB or head of fragment list */ 11781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_xmit_single(dev, skb, dma_desc_flags, ring); 11791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 11801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* xmit fragment */ 11851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < nr_frags; i++) { 11861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_xmit_frag(dev, 1187c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli &skb_shinfo(skb)->frags[i], 1188c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (i == nr_frags - 1) ? DMA_EOP : 0, 1189c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli ring); 11901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 11911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1196d03825fba459d0d58e4fe162439babfc5f5eabc4Florian Fainelli skb_tx_timestamp(skb); 1197d03825fba459d0d58e4fe162439babfc5f5eabc4Florian Fainelli 11981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* we kept a software copy of how much we should advance the TDMA 11991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * producer index, now write it down to the hardware 12001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 12011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, ring->index, 1202c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli ring->prod_index, TDMA_PROD_INDEX); 12031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds <= (MAX_SKB_FRAGS + 1)) { 1205b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_stop_queue(txq); 12061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable(priv, ring); 12071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 12081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelliout: 12101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_unlock_irqrestore(&ring->lock, flags); 12111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 12131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 12141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1216c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainellistatic int bcmgenet_rx_refill(struct bcmgenet_priv *priv, struct enet_cb *cb) 12171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 12181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 12191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb; 12201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 12211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 12221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1223c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT); 12241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!skb) 12251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 12261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* a caller did not release this control block */ 12281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli WARN_ON(cb->skb != NULL); 12291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = skb; 12301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = dma_map_single(kdev, skb->data, 1231c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 12321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 12331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 12341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(cb); 12351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_err, priv->dev, 1236c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "%s DMA map failed\n", __func__); 12371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 12381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 12391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, mapping); 12411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* assign packet, prepare descriptor, and advance pointer */ 12421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_addr(priv, priv->rx_bd_assign_ptr, mapping); 12441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* turn on the newly assigned BD for DMA to use */ 12461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index++; 12471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index &= (priv->num_rx_bds - 1); 12481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_ptr = priv->rx_bds + 12501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->rx_bd_assign_index * DMA_DESC_SIZE); 12511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 12531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 12541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_desc_rx - descriptor based rx process. 12561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * this could be called from bottom half, or from NAPI polling method. 12571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 12581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic unsigned int bcmgenet_desc_rx(struct bcmgenet_priv *priv, 12591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int budget) 12601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 12611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct net_device *dev = priv->dev; 12621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 12631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb; 12641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 dma_length_status; 12651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long dma_flag; 12661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int len, err; 12671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int rxpktprocessed = 0, rxpkttoprocess; 12681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int p_index; 12691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int chksum_ok = 0; 12701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1271c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli p_index = bcmgenet_rdma_ring_readl(priv, DESC_INDEX, RDMA_PROD_INDEX); 12721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p_index &= DMA_P_INDEX_MASK; 12731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (p_index < priv->rx_c_index) 12751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rxpkttoprocess = (DMA_C_INDEX_MASK + 1) - 12761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index + p_index; 12771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 12781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rxpkttoprocess = p_index - priv->rx_c_index; 12791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, 1281c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "RDMA: rxpkttoprocess=%d\n", rxpkttoprocess); 12821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while ((rxpktprocessed < rxpkttoprocess) && 1284c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (rxpktprocessed < budget)) { 1285b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli cb = &priv->rx_cbs[priv->rx_read_ptr]; 1286b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli skb = cb->skb; 1287b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli 1288b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli /* We do not have a backing SKB, so we do not have a 1289b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli * corresponding DMA mapping for this incoming packet since 1290b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli * bcmgenet_rx_refill always either has both skb and mapping or 1291b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli * none. 1292b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli */ 1293b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli if (unlikely(!skb)) { 1294b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli dev->stats.rx_dropped++; 1295b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli dev->stats.rx_errors++; 1296b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli goto refill; 1297b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli } 1298b629be5c8399d7c423b92135eb43a86c924d1cbcFlorian Fainelli 12991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unmap the packet contents such that we can use the 13001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * RSV from the 64 bytes descriptor when enabled and save 13011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * a 32-bits register read 13021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 13031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&dev->dev, dma_unmap_addr(cb, dma_addr), 1304c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 13051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->desc_64b_en) { 1307c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dma_length_status = 1308c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dmadesc_get_length_status(priv, 1309c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_bds + 1310c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (priv->rx_read_ptr * 1311c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_DESC_SIZE)); 13121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 13131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct status_64 *status; 1314164d4f20d4afa96090fa46ddec6b56341bc6407cFlorian Fainelli 13151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status = (struct status_64 *)skb->data; 13161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_length_status = status->length_status; 13171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* DMA flags and length are still valid no matter how 13201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * we got the Receive Status Vector (64B RSB or register) 13211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 13221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_flag = dma_length_status & 0xffff; 13231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len = dma_length_status >> DMA_BUFLENGTH_SHIFT; 13241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, 1326c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "%s:p_ind=%d c_ind=%d read_ptr=%d len_stat=0x%08x\n", 1327c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli __func__, p_index, priv->rx_c_index, 1328c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_read_ptr, dma_length_status); 13291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!(dma_flag & DMA_EOP) || !(dma_flag & DMA_SOP))) { 13311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_status, dev, 1332c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "dropping fragmented packet!\n"); 13331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_dropped++; 13341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_errors++; 13351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 13361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto refill; 13381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* report errors */ 13401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(dma_flag & (DMA_RX_CRC_ERROR | 13411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_OV | 13421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_NO | 13431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_LG | 13441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_RXER))) { 13451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_status, dev, "dma_flag=0x%x\n", 1346c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (unsigned int)dma_flag); 13471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_CRC_ERROR) 13481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_crc_errors++; 13491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_OV) 13501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_over_errors++; 13511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_NO) 13521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_frame_errors++; 13531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_LG) 13541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_length_errors++; 13551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_dropped++; 13561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_errors++; 13571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* discard the packet and advance consumer index.*/ 13591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 13601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto refill; 13621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } /* error packet */ 13631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli chksum_ok = (dma_flag & priv->dma_rx_chk_bit) && 1365c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->desc_rxchk_en; 13661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_put(skb, len); 13681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->desc_64b_en) { 13691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_pull(skb, 64); 13701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= 64; 13711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (likely(chksum_ok)) 13741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb->ip_summed = CHECKSUM_UNNECESSARY; 13751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* remove hardware 2bytes added for IP alignment */ 13771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_pull(skb, 2); 13781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= 2; 13791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->crc_fwd_en) { 13811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_trim(skb, len - ETH_FCS_LEN); 13821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= ETH_FCS_LEN; 13831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /*Finish setting up the received SKB and send it to the kernel*/ 13861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb->protocol = eth_type_trans(skb, priv->dev); 13871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_packets++; 13881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_bytes += len; 13891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_MULT) 13901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.multicast++; 13911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Notify kernel */ 13931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli napi_gro_receive(&priv->napi, skb); 13941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, "pushed up to kernel\n"); 13961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* refill RX path on the current control block */ 13981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellirefill: 13991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = bcmgenet_rx_refill(priv, cb); 14001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 14011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_err, dev, "Rx refill failed\n"); 1402cf377d886f7944a5ccdbd164b89949e13617b096Florian Fainelli 1403cf377d886f7944a5ccdbd164b89949e13617b096Florian Fainelli rxpktprocessed++; 1404cf377d886f7944a5ccdbd164b89949e13617b096Florian Fainelli priv->rx_read_ptr++; 1405cf377d886f7944a5ccdbd164b89949e13617b096Florian Fainelli priv->rx_read_ptr &= (priv->num_rx_bds - 1); 14061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return rxpktprocessed; 14091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Assign skb to RX DMA descriptor. */ 14121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_alloc_rx_buffers(struct bcmgenet_priv *priv) 14131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 14141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 14151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret = 0; 14161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 14171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, priv->dev, "%s:\n", __func__); 14191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* loop here for each buffer needing assign */ 14211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_rx_bds; i++) { 14221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb = &priv->rx_cbs[priv->rx_bd_assign_index]; 14231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (cb->skb) 14241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli continue; 14251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_rx_refill(priv, cb); 14271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 14281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 14291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 14321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_free_rx_buffers(struct bcmgenet_priv *priv) 14351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 14361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 14371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 14381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_rx_bds; i++) { 14401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb = &priv->rx_cbs[i]; 14411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_unmap_addr(cb, dma_addr)) { 14431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&priv->dev->dev, 1444c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dma_unmap_addr(cb, dma_addr), 1445c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 14461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, 0); 14471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (cb->skb) 14501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(cb); 14511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1454c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainellistatic void umac_enable_set(struct bcmgenet_priv *priv, u32 mask, bool enable) 1455e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli{ 1456e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli u32 reg; 1457e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 1458e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 1459e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli if (enable) 1460e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg |= mask; 1461e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli else 1462e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg &= ~mask; 1463e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 1464e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 1465e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli /* UniMAC stops on a packet boundary, wait for a full-size packet 1466e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli * to be processed 1467e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli */ 1468e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli if (enable == 0) 1469e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli usleep_range(1000, 2000); 1470e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli} 1471e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 14721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int reset_umac(struct bcmgenet_priv *priv) 14731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 14741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 14751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int timeout = 0; 14761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 14771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* 7358a0/7552a0: bad default in RBUF_FLUSH_CTRL.umac_sw_rst */ 14791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, 0); 14801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 14811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable MAC while updating its registers */ 14831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_CMD); 14841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* issue soft reset, wait for it to complete */ 14861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD); 14871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (timeout++ < 1000) { 14881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 14891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(reg & CMD_SW_RESET)) 14901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 14911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(1); 14931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (timeout == 1000) { 14961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(kdev, 14977fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris "timeout waiting for MAC to come out of reset\n"); 14981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ETIMEDOUT; 14991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 15001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 15021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 15031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1504909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_intr_disable(struct bcmgenet_priv *priv) 1505909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 1506909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Mask all interrupts.*/ 1507909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_MASK_SET); 1508909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); 1509909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); 1510909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_MASK_SET); 1511909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); 1512909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); 1513909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 1514909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 15151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int init_umac(struct bcmgenet_priv *priv) 15161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 15171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 15181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 15191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg, cpu_mask_clear; 15201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(&priv->pdev->dev, "bcmgenet: init_umac\n"); 15221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = reset_umac(priv); 15241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 15251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 15261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_CMD); 15281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear tx/rx counter */ 15291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 1530c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT, 1531c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_MIB_CTRL); 15321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_MIB_CTRL); 15331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, ENET_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 15351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* init rx registers, enable ip header optimization */ 15371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rbuf_readl(priv, RBUF_CTRL); 15381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= RBUF_ALIGN_2B; 15391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, reg, RBUF_CTRL); 15401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!GENET_IS_V1(priv) && !GENET_IS_V2(priv)) 15421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, 1, RBUF_TBUF_SIZE_CTRL); 15431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1544909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intr_disable(priv); 15451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear = UMAC_IRQ_RXDMA_BDONE; 15471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(kdev, "%s:Enabling RXDMA_BDONE interrupt\n", __func__); 15491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15507fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* Monitor cable plug/unplugged event for internal PHY */ 15518900ea570a38740dc2769080b3bda4f90504d9e3Florian Fainelli if (phy_is_internal(priv->phydev)) { 15521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= (UMAC_IRQ_LINK_DOWN | UMAC_IRQ_LINK_UP); 15538900ea570a38740dc2769080b3bda4f90504d9e3Florian Fainelli } else if (priv->ext_phy) { 15541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= (UMAC_IRQ_LINK_DOWN | UMAC_IRQ_LINK_UP); 15558900ea570a38740dc2769080b3bda4f90504d9e3Florian Fainelli } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { 15561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_bp_mc_get(priv); 15571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= BIT(priv->hw_params->bp_in_en_shift); 15581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* bp_mask: back pressure mask */ 15601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_is_multiqueue(priv->dev)) 15611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= priv->hw_params->bp_in_mask; 15621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 15631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~priv->hw_params->bp_in_mask; 15641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_bp_mc_set(priv, reg); 15651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 15661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable MDIO interrupts on GENET v3+ */ 15681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_MDIO_INTR) 15691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR; 15701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1571c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_intrl2_0_writel(priv, cpu_mask_clear, INTRL2_CPU_MASK_CLEAR); 15721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable rx/tx engine.*/ 15741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(kdev, "done init umac\n"); 15751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 15771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 15781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Initialize all house-keeping variables for a TX ring, along 15801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * with corresponding hardware registers 15811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 15821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv, 15831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int index, unsigned int size, 15841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int write_ptr, unsigned int end_ptr) 15851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 15861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring = &priv->tx_rings[index]; 15871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 words_per_bd = WORDS_PER_BD(priv); 15881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 flow_period_val = 0; 15891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int first_bd; 15901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_init(&ring->lock); 15921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->index = index; 15931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index == DESC_INDEX) { 15941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->queue = 0; 15951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable = bcmgenet_tx_ring16_int_enable; 15961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable = bcmgenet_tx_ring16_int_disable; 15971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 15981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->queue = index + 1; 15991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable = bcmgenet_tx_ring_int_enable; 16001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable = bcmgenet_tx_ring_int_disable; 16011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 16021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->cbs = priv->tx_cbs + write_ptr; 16031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->size = size; 16041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->c_index = 0; 16051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds = size; 16061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr = write_ptr; 16071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->cb_ptr = write_ptr; 16081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->end_ptr = end_ptr - 1; 16091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index = 0; 16101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set flow period for ring != 16 */ 16121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index != DESC_INDEX) 16131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli flow_period_val = ENET_MAX_MTU_SIZE << 16; 16141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX); 16161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_CONS_INDEX); 16171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 1, DMA_MBUF_DONE_THRESH); 16181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable rate control for now */ 16191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, flow_period_val, 1620c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli TDMA_FLOW_PERIOD); 16211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unclassified traffic goes to ring 16 */ 16221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 1623c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli ((size << DMA_RING_SIZE_SHIFT) | 1624c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli RX_BUF_LENGTH), DMA_RING_BUF_SIZE); 16251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli first_bd = write_ptr; 16271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set start and end address, read and write pointers */ 16291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd * words_per_bd, 1630c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_START_ADDR); 16311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd * words_per_bd, 1632c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli TDMA_READ_PTR); 16331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd, 1634c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli TDMA_WRITE_PTR); 16351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, end_ptr * words_per_bd - 1, 1636c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_END_ADDR); 16371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 16381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Initialize a RDMA ring */ 16401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_init_rx_ring(struct bcmgenet_priv *priv, 1641c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned int index, unsigned int size) 16421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 16431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 words_per_bd = WORDS_PER_BD(priv); 16441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 16451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->num_rx_bds = TOTAL_DESC; 16471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bds = priv->base + priv->hw_params->rdma_offset; 16481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_ptr = priv->rx_bds; 16491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index = 0; 16501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index = 0; 16511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_read_ptr = 0; 1652c489be085ac89895fda724242814e4fe4d5277daFlorian Fainelli priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct enet_cb), 1653c489be085ac89895fda724242814e4fe4d5277daFlorian Fainelli GFP_KERNEL); 16541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->rx_cbs) 16551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 16561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_alloc_rx_buffers(priv); 16581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 16591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->rx_cbs); 16601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 16611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 16621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_WRITE_PTR); 16641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_PROD_INDEX); 16651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_CONS_INDEX); 16661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 1667c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli ((size << DMA_RING_SIZE_SHIFT) | 1668c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli RX_BUF_LENGTH), DMA_RING_BUF_SIZE); 16691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, DMA_START_ADDR); 16701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 1671c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli words_per_bd * size - 1, DMA_END_ADDR); 16721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 1673c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (DMA_FC_THRESH_LO << 1674c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_XOFF_THRESHOLD_SHIFT) | 1675c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli DMA_FC_THRESH_HI, RDMA_XON_XOFF_THRESH); 16761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_READ_PTR); 16771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 16791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 16801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* init multi xmit queues, only available for GENET2+ 16821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the queue is partitioned as follows: 16831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue 0 - 3 is priority based, each one has 32 descriptors, 16851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * with queue 0 being the highest priority queue. 16861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue 16 is the default tx queue with GENET_DEFAULT_BD_CNT 16881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * descriptors: 256 - (number of tx queues * bds per queues) = 128 16891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * descriptors. 16901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * The transmit control block pool is then partitioned as following: 16921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_cbs[0...127] are for queue 16 16931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[0] points to tx_cbs[128..159] 16941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[1] points to tx_cbs[160..191] 16951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[2] points to tx_cbs[192..223] 16961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[3] points to tx_cbs[224..255] 16971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 16981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_init_multiq(struct net_device *dev) 16991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 17001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 17011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int i, dma_enable; 1702377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther u32 reg, dma_ctrl, ring_cfg = 0; 1703377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther u32 dma_priority[3] = {0, 0, 0}; 17041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_is_multiqueue(dev)) { 17061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(dev, "called with non multi queue aware HW\n"); 17071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 17081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = bcmgenet_tdma_readl(priv, DMA_CTRL); 17111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_enable = dma_ctrl & DMA_EN; 17121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl &= ~DMA_EN; 17131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, dma_ctrl, DMA_CTRL); 17141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable strict priority arbiter mode */ 17161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, DMA_ARBITER_SP, DMA_ARB_CTRL); 17171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->hw_params->tx_queues; i++) { 17191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* first 64 tx_cbs are reserved for default tx queue 17201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * (ring 16) 17211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 17221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_tx_ring(priv, i, priv->hw_params->bds_cnt, 1723c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli i * priv->hw_params->bds_cnt, 1724c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (i + 1) * priv->hw_params->bds_cnt); 17251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17267fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* Configure ring as descriptor ring and setup priority */ 17271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring_cfg |= 1 << i; 17281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl |= 1 << (i + DMA_RING_BUF_EN_SHIFT); 1729377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther 1730377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther dma_priority[DMA_PRIO_REG_INDEX(i)] |= 1731377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther ((GENET_Q0_PRIORITY + i) << DMA_PRIO_REG_SHIFT(i)); 17321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1734377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther /* Set ring 16 priority and program the hardware registers */ 1735377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther dma_priority[DMA_PRIO_REG_INDEX(DESC_INDEX)] |= 1736377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 1737377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther DMA_PRIO_REG_SHIFT(DESC_INDEX)); 1738377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther bcmgenet_tdma_writel(priv, dma_priority[0], DMA_PRIORITY_0); 1739377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther bcmgenet_tdma_writel(priv, dma_priority[1], DMA_PRIORITY_1); 1740377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther bcmgenet_tdma_writel(priv, dma_priority[2], DMA_PRIORITY_2); 1741377421662a1739de5ccb71220a0b10a300addbd8Petri Gynther 17421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable rings */ 17431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_RING_CFG); 17441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= ring_cfg; 17451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_RING_CFG); 17461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Configure ring as descriptor ring and re-enable DMA if enabled */ 17481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 17491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 17501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_enable) 17511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= DMA_EN; 17521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 17531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 17541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17554a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainellistatic int bcmgenet_dma_teardown(struct bcmgenet_priv *priv) 17564a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli{ 17574a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli int ret = 0; 17584a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli int timeout = 0; 17594a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli u32 reg; 17604a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17614a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli /* Disable TDMA to stop add more frames in TX DMA */ 17624a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 17634a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg &= ~DMA_EN; 17644a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 17654a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17664a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli /* Check TDMA status register to confirm TDMA is disabled */ 17674a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli while (timeout++ < DMA_TIMEOUT_VAL) { 17684a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_STATUS); 17694a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli if (reg & DMA_DISABLED) 17704a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli break; 17714a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17724a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli udelay(1); 17734a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli } 17744a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17754a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli if (timeout == DMA_TIMEOUT_VAL) { 17764a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli netdev_warn(priv->dev, "Timed out while disabling TX DMA\n"); 17774a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli ret = -ETIMEDOUT; 17784a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli } 17794a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17804a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli /* Wait 10ms for packet drain in both tx and rx dma */ 17814a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli usleep_range(10000, 20000); 17824a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17834a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli /* Disable RDMA */ 17844a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 17854a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg &= ~DMA_EN; 17864a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 17874a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17884a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli timeout = 0; 17894a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli /* Check RDMA status register to confirm RDMA is disabled */ 17904a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli while (timeout++ < DMA_TIMEOUT_VAL) { 17914a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_STATUS); 17924a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli if (reg & DMA_DISABLED) 17934a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli break; 17944a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17954a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli udelay(1); 17964a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli } 17974a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 17984a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli if (timeout == DMA_TIMEOUT_VAL) { 17994a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli netdev_warn(priv->dev, "Timed out while disabling RX DMA\n"); 18004a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli ret = -ETIMEDOUT; 18014a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli } 18024a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 18034a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli return ret; 18044a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli} 18054a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli 18061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_fini_dma(struct bcmgenet_priv *priv) 18071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 18091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable DMA */ 18114a0c081eff43a11c65dee3ad6c457f7f58bcebe0Florian Fainelli bcmgenet_dma_teardown(priv); 18121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_tx_bds; i++) { 18141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->tx_cbs[i].skb != NULL) { 18151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(priv->tx_cbs[i].skb); 18161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->tx_cbs[i].skb = NULL; 18171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_rx_buffers(priv); 18211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->rx_cbs); 18221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->tx_cbs); 18231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* init_edma: Initialize DMA control register */ 18261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_init_dma(struct bcmgenet_priv *priv) 18271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 18291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, priv->dev, "bcmgenet: init_edma\n"); 18311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* by default, enable ring 16 (descriptor based) */ 18331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_init_rx_ring(priv, DESC_INDEX, TOTAL_DESC); 18341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 18351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(priv->dev, "failed to initialize RX ring\n"); 18361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 18371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* init rDma */ 18401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE); 18411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Init tDma */ 18431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE); 18441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18457fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* Initialize common TX ring structures */ 18461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->tx_bds = priv->base + priv->hw_params->tdma_offset; 18471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->num_tx_bds = TOTAL_DESC; 1848c489be085ac89895fda724242814e4fe4d5277daFlorian Fainelli priv->tx_cbs = kcalloc(priv->num_tx_bds, sizeof(struct enet_cb), 1849c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli GFP_KERNEL); 18501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->tx_cbs) { 18511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 18521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 18531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* initialize multi xmit queue */ 18561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_multiq(priv->dev); 18571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* initialize special ring 16 */ 18591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_tx_ring(priv, DESC_INDEX, GENET_DEFAULT_BD_CNT, 1860c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->hw_params->tx_queues * 1861c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->hw_params->bds_cnt, 1862c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli TOTAL_DESC); 18631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 18651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* NAPI polling method*/ 18681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_poll(struct napi_struct *napi, int budget) 18691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = container_of(napi, 18711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv, napi); 18721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int work_done; 18731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* tx reclaim */ 18751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]); 18761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli work_done = bcmgenet_desc_rx(priv, budget); 18781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Advancing our consumer index*/ 18801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index += work_done; 18811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index &= DMA_C_INDEX_MASK; 18821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, DESC_INDEX, 1883c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->rx_c_index, RDMA_CONS_INDEX); 18841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (work_done < budget) { 18851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli napi_complete(napi); 1886c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_RXDMA_BDONE, 1887c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_CLEAR); 18881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return work_done; 18911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Interrupt bottom half */ 18941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_irq_task(struct work_struct *work) 18951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = container_of( 18971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli work, struct bcmgenet_priv, bcmgenet_irq_work); 18981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, "%s\n", __func__); 19001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19018fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli if (priv->irq0_stat & UMAC_IRQ_MPD_R) { 19028fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli priv->irq0_stat &= ~UMAC_IRQ_MPD_R; 19038fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli netif_dbg(priv, wol, priv->dev, 19048fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli "magic packet detected, waking up\n"); 19058fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC); 19068fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli } 19078fdb0e0fb972f9665dd21aa69825ba748ebbdf45Florian Fainelli 19081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Link UP/DOWN event */ 19091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if ((priv->hw_params->flags & GENET_HAS_MDIO_INTR) && 1910c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli (priv->irq0_stat & (UMAC_IRQ_LINK_UP|UMAC_IRQ_LINK_DOWN))) { 191180d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli phy_mac_interrupt(priv->phydev, 1912c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->irq0_stat & UMAC_IRQ_LINK_UP); 19131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat &= ~(UMAC_IRQ_LINK_UP|UMAC_IRQ_LINK_DOWN); 19141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_isr1: interrupt handler for ring buffer. */ 19181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic irqreturn_t bcmgenet_isr1(int irq, void *dev_id) 19191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_id; 19211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int index; 19221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Save irq status for bottom-half processing. */ 19241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq1_stat = 19251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) & 19261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ~priv->int1_mask; 19277fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* clear interrupts */ 19281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); 19291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, 1931c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "%s: IRQ=0x%x\n", __func__, priv->irq1_stat); 19321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Check the MBDONE interrupts. 19331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * packet is done, reclaim descriptors 19341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 19351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq1_stat & 0x0000ffff) { 19361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = 0; 19371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (index = 0; index < 16; index++) { 19381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq1_stat & (1 << index)) 19391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, 1940c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli &priv->tx_rings[index]); 19411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return IRQ_HANDLED; 19441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_isr0: Handle various interrupts. */ 19471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic irqreturn_t bcmgenet_isr0(int irq, void *dev_id) 19481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_id; 19501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Save irq status for bottom-half processing. */ 19521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat = 19531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT) & 19541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ~bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 19557fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* clear interrupts */ 19561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 19571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, 1959c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli "IRQ=0x%x\n", priv->irq0_stat); 19601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & (UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE)) { 19621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* We use NAPI(software interrupt throttling, if 19631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Rx Descriptor throttling is not used. 19641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Disable interrupt, will be enabled in the poll method. 19651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 19661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (likely(napi_schedule_prep(&priv->napi))) { 1967c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_RXDMA_BDONE, 1968c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli INTRL2_CPU_MASK_SET); 19691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __napi_schedule(&priv->napi); 19701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & 19731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE)) { 19741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Tx reclaim */ 19751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]); 19761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & (UMAC_IRQ_PHY_DET_R | 19781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_PHY_DET_F | 19791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_LINK_UP | 19801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_LINK_DOWN | 19811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_HFB_SM | 19821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_HFB_MM | 19831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_MPD_R)) { 19841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* all other interested interrupts handled in bottom half */ 19851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli schedule_work(&priv->bcmgenet_irq_work); 19861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if ((priv->hw_params->flags & GENET_HAS_MDIO_INTR) && 1989c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli priv->irq0_stat & (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR)) { 19901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat &= ~(UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR); 19911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli wake_up(&priv->wq); 19921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return IRQ_HANDLED; 19951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19978562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainellistatic irqreturn_t bcmgenet_wol_isr(int irq, void *dev_id) 19988562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli{ 19998562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli struct bcmgenet_priv *priv = dev_id; 20008562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli 20018562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli pm_wakeup_event(&priv->pdev->dev, 0); 20028562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli 20038562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli return IRQ_HANDLED; 20048562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli} 20058562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli 20061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_umac_reset(struct bcmgenet_priv *priv) 20071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rbuf_ctrl_get(priv); 20111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= BIT(1); 20121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, reg); 20131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 20141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~BIT(1); 20161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, reg); 20171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 20181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 20191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_hw_addr(struct bcmgenet_priv *priv, 2021c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli unsigned char *addr) 20221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) | 20241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (addr[2] << 8) | addr[3], UMAC_MAC0); 20251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1); 20261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 20271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Returns a reusable dma control register value */ 20291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic u32 bcmgenet_dma_disable(struct bcmgenet_priv *priv) 20301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 dma_ctrl; 20331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable DMA */ 20351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = 1 << (DESC_INDEX + DMA_RING_BUF_EN_SHIFT) | DMA_EN; 20361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 20371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~dma_ctrl; 20381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 20391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 20411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~dma_ctrl; 20421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 20431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 1, UMAC_TX_FLUSH); 20451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 20461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_TX_FLUSH); 20471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return dma_ctrl; 20491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 20501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_enable_dma(struct bcmgenet_priv *priv, u32 dma_ctrl) 20521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 20561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 20571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 20581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 20601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 20611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 20621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 20631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2064909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_netif_start(struct net_device *dev) 2065909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 2066909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2067909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2068909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Start the network engine */ 2069909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli napi_enable(&priv->napi); 2070909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2071909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, true); 2072909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2073909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli if (phy_is_internal(priv->phydev)) 2074909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_power_up(priv, GENET_POWER_PASSIVE); 2075909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2076909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli netif_tx_start_all_queues(dev); 2077909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2078909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli phy_start(priv->phydev); 2079909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 2080909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 20811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_open(struct net_device *dev) 20821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 20841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long dma_ctrl; 20851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 20871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, ifup, dev, "bcmgenet_open\n"); 20891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Turn on the clock */ 20911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 20921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_prepare_enable(priv->clk); 20931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* take MAC out of reset */ 20951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_reset(priv); 20961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = init_umac(priv); 20981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 20991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 21001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable ethernet MAC while updating its registers */ 2102e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, false); 21031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2104909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Make sure we reflect the value of CRC_CMD_FWD */ 2105909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 2106909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli priv->crc_fwd_en = !!(reg & CMD_CRC_FWD); 2107909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 21081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_hw_addr(priv, dev->dev_addr); 21091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (phy_is_internal(priv->phydev)) { 21111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 21121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= EXT_ENERGY_DET_MASK; 21131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 21141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable RX/TX DMA and flush TX queues */ 21171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = bcmgenet_dma_disable(priv); 21181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Reinitialize TDMA and RDMA and SW housekeeping */ 21201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_init_dma(priv); 21211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 21221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "failed to initialize DMA\n"); 21231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_fini_dma; 21241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Always enable ring 16 - descriptor ring */ 21271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_enable_dma(priv, dma_ctrl); 21281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = request_irq(priv->irq0, bcmgenet_isr0, IRQF_SHARED, 2130c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dev->name, priv); 21311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret < 0) { 21321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "can't request IRQ %d\n", priv->irq0); 21331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_fini_dma; 21341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = request_irq(priv->irq1, bcmgenet_isr1, IRQF_SHARED, 2137c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli dev->name, priv); 21381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret < 0) { 21391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "can't request IRQ %d\n", priv->irq1); 21401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_irq0; 21411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2143dbd479db79572067a4c031f84c204ba30d0256efFlorian Fainelli /* Re-configure the port multiplexer towards the PHY device */ 2144dbd479db79572067a4c031f84c204ba30d0256efFlorian Fainelli bcmgenet_mii_config(priv->dev, false); 2145dbd479db79572067a4c031f84c204ba30d0256efFlorian Fainelli 2146c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli phy_connect_direct(dev, priv->phydev, bcmgenet_mii_setup, 2147c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli priv->phy_interface); 2148c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli 2149909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_netif_start(dev); 21501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 21521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_irq0: 21541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq0, dev); 21551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_fini_dma: 21561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 21571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_clk_disable: 21581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 21591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 21601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 21611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 21621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2163909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_netif_stop(struct net_device *dev) 2164909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 2165909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2166909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2167909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli netif_tx_stop_all_queues(dev); 2168909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli napi_disable(&priv->napi); 2169909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli phy_stop(priv->phydev); 2170909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2171909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intr_disable(priv); 2172909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2173909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Wait for pending work items to complete. Since interrupts are 2174909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli * disabled no new work will be scheduled. 2175909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli */ 2176909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli cancel_work_sync(&priv->bcmgenet_irq_work); 2177cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli 2178cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli priv->old_link = -1; 21795ad6e6c50899621030a9b10ddcb2fcd349cb5965Petri Gynther priv->old_speed = -1; 2180cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli priv->old_duplex = -1; 21815ad6e6c50899621030a9b10ddcb2fcd349cb5965Petri Gynther priv->old_pause = -1; 2182909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 2183909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 21841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_close(struct net_device *dev) 21851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 21861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 21871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 21881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, ifdown, dev, "bcmgenet_close\n"); 21901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2191909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_netif_stop(dev); 21921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2193c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli /* Really kill the PHY state machine and disconnect from it */ 2194c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli phy_disconnect(priv->phydev); 2195c96e731c93ff0c9f53442c11c68e50fd07929d27Florian Fainelli 21961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable MAC receive */ 2197e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_RX_EN, false); 21981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_dma_teardown(priv); 22001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 22011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 22021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable MAC transmit. TX DMA disabled have to done before this */ 2204e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_TX_EN, false); 22051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* tx reclaim */ 22071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim_all(dev); 22081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 22091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq0, priv); 22111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq1, priv); 22121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (phy_is_internal(priv->phydev)) 22141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_power_down(priv, GENET_POWER_PASSIVE); 22151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 22171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 22181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 22201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_timeout(struct net_device *dev) 22231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 22251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, tx_err, dev, "bcmgenet_timeout\n"); 22271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->trans_start = jiffies; 22291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_errors++; 22311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_tx_wake_all_queues(dev); 22331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define MAX_MC_COUNT 16 22361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_set_mdf_addr(struct bcmgenet_priv *priv, 22381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned char *addr, 22391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int *i, 22401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int *mc) 22411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 22431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2244c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_umac_writel(priv, addr[0] << 8 | addr[1], 2245c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_MDF_ADDR + (*i * 4)); 2246c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli bcmgenet_umac_writel(priv, addr[2] << 24 | addr[3] << 16 | 2247c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli addr[4] << 8 | addr[5], 2248c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli UMAC_MDF_ADDR + ((*i + 1) * 4)); 22491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_MDF_CTRL); 22501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= (1 << (MAX_MC_COUNT - *mc)); 22511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_MDF_CTRL); 22521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli *i += 2; 22531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (*mc)++; 22541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_rx_mode(struct net_device *dev) 22571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 22591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct netdev_hw_addr *ha; 22601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i, mc; 22611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 22621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, dev, "%s: %08X\n", __func__, dev->flags); 22641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22657fc527f96bc57a5cb87bf78e8535bb85ad372995Brian Norris /* Promiscuous mode */ 22661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 22671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dev->flags & IFF_PROMISC) { 22681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= CMD_PROMISC; 22691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 22701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_MDF_CTRL); 22711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 22731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~CMD_PROMISC; 22741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 22751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 22761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMac doesn't support ALLMULTI */ 22781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dev->flags & IFF_ALLMULTI) { 22791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(dev, "ALLMULTI is not supported\n"); 22801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 22821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* update MDF filter */ 22841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli i = 0; 22851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mc = 0; 22861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Broadcast */ 22871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, dev->broadcast, &i, &mc); 22881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* my own address.*/ 22891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, dev->dev_addr, &i, &mc); 22901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unicast list*/ 22911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netdev_uc_count(dev) > (MAX_MC_COUNT - mc)) 22921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netdev_uc_empty(dev)) 22951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_for_each_uc_addr(ha, dev) 22961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, ha->addr, &i, &mc); 22971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Multicast */ 22981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netdev_mc_empty(dev) || netdev_mc_count(dev) >= (MAX_MC_COUNT - mc)) 22991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 23001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_for_each_mc_addr(ha, dev) 23021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, ha->addr, &i, &mc); 23031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 23041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set the hardware MAC address. */ 23061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_mac_addr(struct net_device *dev, void *p) 23071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 23081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sockaddr *addr = p; 23091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Setting the MAC address at the hardware level is not possible 23111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * without disabling the UniMAC RX/TX enable bits. 23121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 23131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_running(dev)) 23141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EBUSY; 23151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ether_addr_copy(dev->dev_addr, addr->sa_data); 23171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 23191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 23201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct net_device_ops bcmgenet_netdev_ops = { 23221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_open = bcmgenet_open, 23231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_stop = bcmgenet_close, 23241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_start_xmit = bcmgenet_xmit, 23251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_tx_timeout = bcmgenet_timeout, 23261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_rx_mode = bcmgenet_set_rx_mode, 23271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_mac_address = bcmgenet_set_mac_addr, 23281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_do_ioctl = bcmgenet_ioctl, 23291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_features = bcmgenet_set_features, 23301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 23311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Array of GENET hardware parameters/characteristics */ 23331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct bcmgenet_hw_params bcmgenet_hw_params[] = { 23341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V1] = { 23351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 0, 23361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 0, 23371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 0, 23381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 16, 23391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0xffff, 23401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 16, 23411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x1F, 23421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x1000, 23431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x2000, 23441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x3000, 23451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V2] = { 23481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 16, 23521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0xffff, 23531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 16, 23541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x1F, 23551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x1000, 23571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0x2000, 23581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x3000, 23591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x4000, 23601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_EXT, 23621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V3] = { 23641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 17, 23681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0x1ffff, 23691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 48, 23701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x3F, 23711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x8000, 23731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0xfc00, 23741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x10000, 23751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x11000, 23761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_EXT | GENET_HAS_MDIO_INTR, 23781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V4] = { 23801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 17, 23841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0x1ffff, 23851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 48, 23861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x3F, 23871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x8000, 23891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0xfc00, 23901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x2000, 23911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x4000, 23921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 3, 23931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_40BITS | GENET_HAS_EXT | GENET_HAS_MDIO_INTR, 23941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 23961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Infer hardware parameters from the detected GENET version */ 23981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) 23991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 24001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_hw_params *params; 24011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 24021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 major; 24031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V4(priv)) { 24051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus; 24061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v4; 24071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V3PLUS; 24081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V4; 24091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V3(priv)) { 24101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus; 24111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 24121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V3PLUS; 24131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V3; 24141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V2(priv)) { 24151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v2; 24161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 24171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V12; 24181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V2; 24191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V1(priv)) { 24201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v1; 24211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 24221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V12; 24231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V1; 24241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enum genet_version starts at 1 */ 24271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params = &bcmgenet_hw_params[priv->version]; 24281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params = priv->hw_params; 24291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Read GENET HW version */ 24311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_sys_readl(priv, SYS_REV_CTRL); 24321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = (reg >> 24 & 0x0f); 24331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (major == 5) 24341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = 4; 24351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else if (major == 0) 24361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = 1; 24371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (major != priv->version) { 24381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&priv->pdev->dev, 24391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "GENET version mismatch, got: %d, configured for: %d\n", 24401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major, priv->version); 24411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Print the GENET core version */ 24441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_info(&priv->pdev->dev, "GENET " GENET_VER_FMT, 2445c91b7f668a79b796153921c8e405b3d1633e71d3Florian Fainelli major, (reg >> 16) & 0x0f, reg & 0xffff); 24461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2447487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli /* Store the integrated PHY revision for the MDIO probing function 2448487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli * to pass this information to the PHY driver. The PHY driver expects 2449487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli * to find the PHY major revision in bits 15:8 while the GENET register 2450487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli * stores that information in bits 7:0, account for that. 2451487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli */ 2452487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli priv->gphy_rev = (reg & 0xffff) << 8; 2453487320c541430a7a45eda668a26423e06eb32ad5Florian Fainelli 24541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 24551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(params->flags & GENET_HAS_40BITS)) 24561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli pr_warn("GENET does not support 40-bits PA\n"); 24571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 24581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli pr_debug("Configuration for version: %d\n" 24601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "TXq: %1d, RXq: %1d, BDs: %1d\n" 24611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "BP << en: %2d, BP msk: 0x%05x\n" 24621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "HFB count: %2d, QTAQ msk: 0x%05x\n" 24631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "TBUF: 0x%04x, HFB: 0x%04x, HFBreg: 0x%04x\n" 24641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "RDMA: 0x%05x, TDMA: 0x%05x\n" 24651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "Words/BD: %d\n", 24661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version, 24671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->tx_queues, params->rx_queues, params->bds_cnt, 24681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->bp_in_en_shift, params->bp_in_mask, 24691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->hfb_filter_cnt, params->qtag_mask, 24701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->tbuf_offset, params->hfb_offset, 24711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->hfb_reg_offset, 24721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->rdma_offset, params->tdma_offset, 24731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->words_per_bd); 24741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 24751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct of_device_id bcmgenet_match[] = { 24771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v1", .data = (void *)GENET_V1 }, 24781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v2", .data = (void *)GENET_V2 }, 24791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v3", .data = (void *)GENET_V3 }, 24801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v4", .data = (void *)GENET_V4 }, 24811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { }, 24821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 24831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_probe(struct platform_device *pdev) 24851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 24861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device_node *dn = pdev->dev.of_node; 24871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct of_device_id *of_id; 24881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv; 24891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct net_device *dev; 24901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const void *macaddr; 24911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct resource *r; 24921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int err = -EIO; 24931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Up to GENET_MAX_MQ_CNT + 1 TX queues and a single RX queue */ 24951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev = alloc_etherdev_mqs(sizeof(*priv), GENET_MAX_MQ_CNT + 1, 1); 24961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!dev) { 24971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't allocate net device\n"); 24981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 24991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 25001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli of_id = of_match_node(bcmgenet_match, dn); 25021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!of_id) 25031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 25041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv = netdev_priv(dev); 25061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0 = platform_get_irq(pdev, 0); 25071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq1 = platform_get_irq(pdev, 1); 25088562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli priv->wol_irq = platform_get_irq(pdev, 2); 25091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->irq0 || !priv->irq1) { 25101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't find IRQs\n"); 25111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = -EINVAL; 25121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 25131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 25141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli macaddr = of_get_mac_address(dn); 25161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!macaddr) { 25171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't find MAC address\n"); 25181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = -EINVAL; 25191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 25201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 25211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 25235343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam priv->base = devm_ioremap_resource(&pdev->dev, r); 25245343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam if (IS_ERR(priv->base)) { 25255343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam err = PTR_ERR(priv->base); 25261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 25271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 25281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli SET_NETDEV_DEV(dev, &pdev->dev); 25301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_set_drvdata(&pdev->dev, dev); 25311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ether_addr_copy(dev->dev_addr, macaddr); 25321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->watchdog_timeo = 2 * HZ; 25337ad24ea4bf620a32631d7b3069c3e30c078b0c3eWilfried Klaebe dev->ethtool_ops = &bcmgenet_ethtool_ops; 25341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->netdev_ops = &bcmgenet_netdev_ops; 25351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_napi_add(dev, &priv->napi, bcmgenet_poll, 64); 25361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->msg_enable = netif_msg_init(-1, GENET_MSG_DEFAULT); 25381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set hardware features */ 25401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->hw_features |= NETIF_F_SG | NETIF_F_IP_CSUM | 25411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM; 25421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25438562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli /* Request the WOL interrupt and advertise suspend if available */ 25448562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli priv->wol_irq_disabled = true; 25458562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli err = devm_request_irq(&pdev->dev, priv->wol_irq, bcmgenet_wol_isr, 0, 25468562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli dev->name, priv); 25478562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli if (!err) 25488562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli device_set_wakeup_capable(&pdev->dev, 1); 25498562056f267db98f5c078fcf7f071c8a4a752ef3Florian Fainelli 25501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set the needed headroom to account for any possible 25511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * features enabling/disabling at runtime 25521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 25531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->needed_headroom += 64; 25541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_boot_setup_check(dev); 25561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dev = dev; 25581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->pdev = pdev; 25591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = (enum bcmgenet_version)of_id->data; 25601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2561e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli priv->clk = devm_clk_get(&priv->pdev->dev, "enet"); 2562e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli if (IS_ERR(priv->clk)) 2563e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli dev_warn(&priv->pdev->dev, "failed to get enet clock\n"); 2564e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli 2565e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli if (!IS_ERR(priv->clk)) 2566e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli clk_prepare_enable(priv->clk); 2567e4a60a93c4a6e7dd4e3e82736b932375598a26fdFlorian Fainelli 25681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_hw_params(priv); 25691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Mii wait queue */ 25711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli init_waitqueue_head(&priv->wq); 25721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Always use RX_BUF_LENGTH (2KB) buffer for all chips */ 25731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len = RX_BUF_LENGTH; 25741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli INIT_WORK(&priv->bcmgenet_irq_work, bcmgenet_irq_task); 25751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->clk_wol = devm_clk_get(&priv->pdev->dev, "enet-wol"); 25771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (IS_ERR(priv->clk_wol)) 25781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_warn(&priv->pdev->dev, "failed to get enet-wol clock\n"); 25791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = reset_umac(priv); 25811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 25821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 25831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = bcmgenet_mii_init(dev); 25851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 25861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 25871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* setup number of real queues + 1 (GENET_V1 has 0 hardware queues 25891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * just the ring 16 descriptor based TX 25901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 25911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_set_real_num_tx_queues(priv->dev, priv->hw_params->tx_queues + 1); 25921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1); 25931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2594219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli /* libphy will determine the link state */ 2595219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli netif_carrier_off(dev); 2596219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli 25971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Turn off the main clock, WOL clock is handled separately */ 25981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 25991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 26001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 26010f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli err = register_netdev(dev); 26020f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli if (err) 26030f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli goto err; 26040f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli 26051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return err; 26061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 26071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_clk_disable: 26081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 26091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 26101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr: 26111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_netdev(dev); 26121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return err; 26131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 26141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 26151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_remove(struct platform_device *pdev) 26161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 26171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_to_priv(&pdev->dev); 26181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 26191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_set_drvdata(&pdev->dev, NULL); 26201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unregister_netdev(priv->dev); 26211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_mii_exit(priv->dev); 26221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_netdev(priv->dev); 26231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 26241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 26251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 26261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2627b6e978e50444a063f066f058d134173de877b968Florian Fainelli#ifdef CONFIG_PM_SLEEP 2628b6e978e50444a063f066f058d134173de877b968Florian Fainellistatic int bcmgenet_suspend(struct device *d) 2629b6e978e50444a063f066f058d134173de877b968Florian Fainelli{ 2630b6e978e50444a063f066f058d134173de877b968Florian Fainelli struct net_device *dev = dev_get_drvdata(d); 2631b6e978e50444a063f066f058d134173de877b968Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2632b6e978e50444a063f066f058d134173de877b968Florian Fainelli int ret; 2633b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2634b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (!netif_running(dev)) 2635b6e978e50444a063f066f058d134173de877b968Florian Fainelli return 0; 2636b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2637b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_netif_stop(dev); 2638b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2639cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli phy_suspend(priv->phydev); 2640cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli 2641b6e978e50444a063f066f058d134173de877b968Florian Fainelli netif_device_detach(dev); 2642b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2643b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Disable MAC receive */ 2644b6e978e50444a063f066f058d134173de877b968Florian Fainelli umac_enable_set(priv, CMD_RX_EN, false); 2645b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2646b6e978e50444a063f066f058d134173de877b968Florian Fainelli ret = bcmgenet_dma_teardown(priv); 2647b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (ret) 2648b6e978e50444a063f066f058d134173de877b968Florian Fainelli return ret; 2649b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2650b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Disable MAC transmit. TX DMA disabled have to done before this */ 2651b6e978e50444a063f066f058d134173de877b968Florian Fainelli umac_enable_set(priv, CMD_TX_EN, false); 2652b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2653b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* tx reclaim */ 2654b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_tx_reclaim_all(dev); 2655b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_fini_dma(priv); 2656b6e978e50444a063f066f058d134173de877b968Florian Fainelli 26578c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli /* Prepare the device for Wake-on-LAN and switch to the slow clock */ 26588c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli if (device_may_wakeup(d) && priv->wolopts) { 26598c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli bcmgenet_power_down(priv, GENET_POWER_WOL_MAGIC); 26608c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli clk_prepare_enable(priv->clk_wol); 26618c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli } 26628c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli 2663b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Turn off the clocks */ 2664b6e978e50444a063f066f058d134173de877b968Florian Fainelli clk_disable_unprepare(priv->clk); 2665b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2666b6e978e50444a063f066f058d134173de877b968Florian Fainelli return 0; 2667b6e978e50444a063f066f058d134173de877b968Florian Fainelli} 2668b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2669b6e978e50444a063f066f058d134173de877b968Florian Fainellistatic int bcmgenet_resume(struct device *d) 2670b6e978e50444a063f066f058d134173de877b968Florian Fainelli{ 2671b6e978e50444a063f066f058d134173de877b968Florian Fainelli struct net_device *dev = dev_get_drvdata(d); 2672b6e978e50444a063f066f058d134173de877b968Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2673b6e978e50444a063f066f058d134173de877b968Florian Fainelli unsigned long dma_ctrl; 2674b6e978e50444a063f066f058d134173de877b968Florian Fainelli int ret; 2675b6e978e50444a063f066f058d134173de877b968Florian Fainelli u32 reg; 2676b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2677b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (!netif_running(dev)) 2678b6e978e50444a063f066f058d134173de877b968Florian Fainelli return 0; 2679b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2680b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Turn on the clock */ 2681b6e978e50444a063f066f058d134173de877b968Florian Fainelli ret = clk_prepare_enable(priv->clk); 2682b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (ret) 2683b6e978e50444a063f066f058d134173de877b968Florian Fainelli return ret; 2684b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2685b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_umac_reset(priv); 2686b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2687b6e978e50444a063f066f058d134173de877b968Florian Fainelli ret = init_umac(priv); 2688b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (ret) 2689b6e978e50444a063f066f058d134173de877b968Florian Fainelli goto out_clk_disable; 2690b6e978e50444a063f066f058d134173de877b968Florian Fainelli 26910a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser /* From WOL-enabled suspend, switch to regular clock */ 26920a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser if (priv->wolopts) 26930a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser clk_disable_unprepare(priv->clk_wol); 26940a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser 26950a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser phy_init_hw(priv->phydev); 26960a29b3dafbb2fc46421cc2950523814c7c6c8bfbTobias Klauser /* Speed settings must be restored */ 2697dbd479db79572067a4c031f84c204ba30d0256efFlorian Fainelli bcmgenet_mii_config(priv->dev, false); 26988c90db72f92603d7972488bb2e7efcf23b311655Florian Fainelli 2699b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* disable ethernet MAC while updating its registers */ 2700b6e978e50444a063f066f058d134173de877b968Florian Fainelli umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, false); 2701b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2702b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_set_hw_addr(priv, dev->dev_addr); 2703b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2704b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (phy_is_internal(priv->phydev)) { 2705b6e978e50444a063f066f058d134173de877b968Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 2706b6e978e50444a063f066f058d134173de877b968Florian Fainelli reg |= EXT_ENERGY_DET_MASK; 2707b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 2708b6e978e50444a063f066f058d134173de877b968Florian Fainelli } 2709b6e978e50444a063f066f058d134173de877b968Florian Fainelli 271098bb7399d29a53a58f497409f98acb3bc0434dedFlorian Fainelli if (priv->wolopts) 271198bb7399d29a53a58f497409f98acb3bc0434dedFlorian Fainelli bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC); 271298bb7399d29a53a58f497409f98acb3bc0434dedFlorian Fainelli 2713b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Disable RX/TX DMA and flush TX queues */ 2714b6e978e50444a063f066f058d134173de877b968Florian Fainelli dma_ctrl = bcmgenet_dma_disable(priv); 2715b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2716b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Reinitialize TDMA and RDMA and SW housekeeping */ 2717b6e978e50444a063f066f058d134173de877b968Florian Fainelli ret = bcmgenet_init_dma(priv); 2718b6e978e50444a063f066f058d134173de877b968Florian Fainelli if (ret) { 2719b6e978e50444a063f066f058d134173de877b968Florian Fainelli netdev_err(dev, "failed to initialize DMA\n"); 2720b6e978e50444a063f066f058d134173de877b968Florian Fainelli goto out_clk_disable; 2721b6e978e50444a063f066f058d134173de877b968Florian Fainelli } 2722b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2723b6e978e50444a063f066f058d134173de877b968Florian Fainelli /* Always enable ring 16 - descriptor ring */ 2724b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_enable_dma(priv, dma_ctrl); 2725b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2726b6e978e50444a063f066f058d134173de877b968Florian Fainelli netif_device_attach(dev); 2727b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2728cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli phy_resume(priv->phydev); 2729cc013fb4889892cd6058cfb122c43aeea7d930e8Florian Fainelli 2730b6e978e50444a063f066f058d134173de877b968Florian Fainelli bcmgenet_netif_start(dev); 2731b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2732b6e978e50444a063f066f058d134173de877b968Florian Fainelli return 0; 2733b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2734b6e978e50444a063f066f058d134173de877b968Florian Fainelliout_clk_disable: 2735b6e978e50444a063f066f058d134173de877b968Florian Fainelli clk_disable_unprepare(priv->clk); 2736b6e978e50444a063f066f058d134173de877b968Florian Fainelli return ret; 2737b6e978e50444a063f066f058d134173de877b968Florian Fainelli} 2738b6e978e50444a063f066f058d134173de877b968Florian Fainelli#endif /* CONFIG_PM_SLEEP */ 2739b6e978e50444a063f066f058d134173de877b968Florian Fainelli 2740b6e978e50444a063f066f058d134173de877b968Florian Fainellistatic SIMPLE_DEV_PM_OPS(bcmgenet_pm_ops, bcmgenet_suspend, bcmgenet_resume); 2741b6e978e50444a063f066f058d134173de877b968Florian Fainelli 27421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct platform_driver bcmgenet_driver = { 27431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .probe = bcmgenet_probe, 27441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .remove = bcmgenet_remove, 27451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .driver = { 27461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .name = "bcmgenet", 27471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .owner = THIS_MODULE, 27481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .of_match_table = bcmgenet_match, 2749b6e978e50444a063f066f058d134173de877b968Florian Fainelli .pm = &bcmgenet_pm_ops, 27501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 27511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 27521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellimodule_platform_driver(bcmgenet_driver); 27531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 27541c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_AUTHOR("Broadcom Corporation"); 27551c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_DESCRIPTION("Broadcom GENET Ethernet controller driver"); 27561c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_ALIAS("platform:bcmgenet"); 27571c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_LICENSE("GPL"); 2758