bcmgenet.c revision 909ff5efbab85f2724c5f91ec200ebc9df50c440
11c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* 21c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Broadcom GENET (Gigabit Ethernet) controller driver 31c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 41c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Copyright (c) 2014 Broadcom Corporation 51c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 61c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * This program is free software; you can redistribute it and/or modify 71c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * it under the terms of the GNU General Public License version 2 as 81c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * published by the Free Software Foundation. 91c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * This program is distributed in the hope that it will be useful, 111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * but WITHOUT ANY WARRANTY; without even the implied warranty of 121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * GNU General Public License for more details. 141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * You should have received a copy of the GNU General Public License 161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * along with this program; if not, write to the Free Software 171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define pr_fmt(fmt) "bcmgenet: " fmt 211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/kernel.h> 231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/module.h> 241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/sched.h> 251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/types.h> 261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/fcntl.h> 271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/interrupt.h> 281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/string.h> 291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/if_ether.h> 301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/init.h> 311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/errno.h> 321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/delay.h> 331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/platform_device.h> 341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/dma-mapping.h> 351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/pm.h> 361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/clk.h> 371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of.h> 381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_address.h> 391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_irq.h> 401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_net.h> 411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/of_platform.h> 421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <net/arp.h> 431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/mii.h> 451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ethtool.h> 461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/netdevice.h> 471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/inetdevice.h> 481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/etherdevice.h> 491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/skbuff.h> 501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/in.h> 511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ip.h> 521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/ipv6.h> 531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <linux/phy.h> 541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include <asm/unaligned.h> 561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#include "bcmgenet.h" 581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Maximum number of hardware queues, downsized if needed */ 601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_MAX_MQ_CNT 4 611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Default highest priority queue for multi queue support */ 631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_Q0_PRIORITY 0 641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_DEFAULT_BD_CNT \ 661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (TOTAL_DESC - priv->hw_params->tx_queues * priv->hw_params->bds_cnt) 671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define RX_BUF_LENGTH 2048 691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define SKB_ALIGNMENT 32 701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Tx/Rx DMA register offset, skip 256 descriptors */ 721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define WORDS_PER_BD(p) (p->hw_params->words_per_bd) 731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define DMA_DESC_SIZE (WORDS_PER_BD(priv) * sizeof(u32)) 741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_TDMA_REG_OFF (priv->hw_params->tdma_offset + \ 761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TOTAL_DESC * DMA_DESC_SIZE) 771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_RDMA_REG_OFF (priv->hw_params->rdma_offset + \ 791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TOTAL_DESC * DMA_DESC_SIZE) 801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set_length_status(struct bcmgenet_priv *priv, 821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d, u32 value) 831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(value, d + DMA_DESC_LENGTH_STATUS); 851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 dmadesc_get_length_status(struct bcmgenet_priv *priv, 881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d) 891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(d + DMA_DESC_LENGTH_STATUS); 911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set_addr(struct bcmgenet_priv *priv, 941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d, 951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t addr) 961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(lower_32_bits(addr), d + DMA_DESC_ADDRESS_LO); 981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Register writes to GISB bus can take couple hundred nanoseconds 1001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * and are done for each packet, save these expensive writes unless 1011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the platform is explicitely configured for 64-bits/LPAE. 1021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 1041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_40BITS) 1051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(upper_32_bits(addr), d + DMA_DESC_ADDRESS_HI); 1061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 1071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Combined address + length/status setter */ 1101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void dmadesc_set(struct bcmgenet_priv *priv, 1111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d, dma_addr_t addr, u32 val) 1121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_length_status(priv, d, val); 1141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_addr(priv, d, addr); 1151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline dma_addr_t dmadesc_get_addr(struct bcmgenet_priv *priv, 1181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli void __iomem *d) 1191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t addr; 1211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr = __raw_readl(d + DMA_DESC_ADDRESS_LO); 1231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Register writes to GISB bus can take couple hundred nanoseconds 1251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * and are done for each packet, save these expensive writes unless 1261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the platform is explicitely configured for 64-bits/LPAE. 1271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 1291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_40BITS) 1301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr |= (u64)__raw_readl(d + DMA_DESC_ADDRESS_HI) << 32; 1311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 1321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return addr; 1331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_VER_FMT "%1d.%1d EPHY: 0x%04x" 1361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define GENET_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \ 1381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli NETIF_MSG_LINK) 1391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rbuf_ctrl_get(struct bcmgenet_priv *priv) 1411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, RBUF_FLUSH_CTRL_V1); 1441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_sys_readl(priv, SYS_RBUF_FLUSH_CTRL); 1461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rbuf_ctrl_set(struct bcmgenet_priv *priv, u32 val) 1491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, RBUF_FLUSH_CTRL_V1); 1521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_sys_writel(priv, val, SYS_RBUF_FLUSH_CTRL); 1541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* These macros are defined to deal with register map change 1571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * between GENET1.1 and GENET2. Only those currently being used 1581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * by driver are defined. 1591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 1601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tbuf_ctrl_get(struct bcmgenet_priv *priv) 1611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, TBUF_CTRL_V1); 1641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + 1661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_CTRL); 1671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tbuf_ctrl_set(struct bcmgenet_priv *priv, u32 val) 1701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, TBUF_CTRL_V1); 1731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + 1751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_CTRL); 1761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_bp_mc_get(struct bcmgenet_priv *priv) 1791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return bcmgenet_rbuf_readl(priv, TBUF_BP_MC_V1); 1821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + 1841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_BP_MC); 1851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_bp_mc_set(struct bcmgenet_priv *priv, u32 val) 1881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 1891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V1(priv)) 1901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, val, TBUF_BP_MC_V1); 1911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 1921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + 1931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tbuf_offset + TBUF_BP_MC); 1941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 1951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* RX/TX DMA register accessors */ 1971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum dma_reg { 1981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_CFG = 0, 1991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_CTRL, 2001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_STATUS, 2011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_SCB_BURST_SIZE, 2021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_ARB_CTRL, 2031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_PRIORITY, 2041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_PRIORITY, 2051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v3plus[] = { 2081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_CFG] = 0x00, 2091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x04, 2101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x08, 2111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x2C, 2131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_PRIORITY] = 0x30, 2141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_PRIORITY] = 0x38, 2151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v2[] = { 2181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_CFG] = 0x00, 2191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x04, 2201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x08, 2211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x30, 2231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_PRIORITY] = 0x34, 2241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_PRIORITY] = 0x3C, 2251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 bcmgenet_dma_regs_v1[] = { 2281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_CTRL] = 0x00, 2291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_STATUS] = 0x04, 2301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_SCB_BURST_SIZE] = 0x0C, 2311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_ARB_CTRL] = 0x30, 2321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_PRIORITY] = 0x34, 2331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_PRIORITY] = 0x3C, 2341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set at runtime once bcmgenet version is known */ 2371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 *bcmgenet_dma_regs; 2381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline struct bcmgenet_priv *dev_to_priv(struct device *dev) 2401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return netdev_priv(dev_get_drvdata(dev)); 2421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tdma_readl(struct bcmgenet_priv *priv, 2451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_reg r) 2461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_TDMA_REG_OFF + 2481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tdma_writel(struct bcmgenet_priv *priv, 2521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, enum dma_reg r) 2531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_TDMA_REG_OFF + 2551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rdma_readl(struct bcmgenet_priv *priv, 2591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_reg r) 2601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_RDMA_REG_OFF + 2621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rdma_writel(struct bcmgenet_priv *priv, 2661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, enum dma_reg r) 2671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 2681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_RDMA_REG_OFF + 2691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RINGS_SIZE + bcmgenet_dma_regs[r]); 2701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 2711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* RDMA/TDMA ring registers and accessors 2731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * we merge the common fields and just prefix with T/D the registers 2741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * having different meaning depending on the direction 2751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 2761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum dma_ring_reg { 2771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_READ_PTR = 0, 2781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_WRITE_PTR = TDMA_READ_PTR, 2791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_READ_PTR_HI, 2801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_WRITE_PTR_HI = TDMA_READ_PTR_HI, 2811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_CONS_INDEX, 2821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_PROD_INDEX = TDMA_CONS_INDEX, 2831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_PROD_INDEX, 2841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_CONS_INDEX = TDMA_PROD_INDEX, 2851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_BUF_SIZE, 2861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_START_ADDR, 2871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_START_ADDR_HI, 2881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_END_ADDR, 2891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_END_ADDR_HI, 2901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_MBUF_DONE_THRESH, 2911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_FLOW_PERIOD, 2921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_XON_XOFF_THRESH = TDMA_FLOW_PERIOD, 2931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_WRITE_PTR, 2941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_READ_PTR = TDMA_WRITE_PTR, 2951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_WRITE_PTR_HI, 2961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli RDMA_READ_PTR_HI = TDMA_WRITE_PTR_HI 2971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 2981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* GENET v4 supports 40-bits pointer addressing 3001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * for obvious reasons the LO and HI word parts 3011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * are contiguous, but this offsets the other 3021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * registers. 3031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 3041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 genet_dma_ring_regs_v4[] = { 3051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR] = 0x00, 3061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR_HI] = 0x04, 3071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_CONS_INDEX] = 0x08, 3081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_PROD_INDEX] = 0x0C, 3091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_BUF_SIZE] = 0x10, 3101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR] = 0x14, 3111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR_HI] = 0x18, 3121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR] = 0x1C, 3131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR_HI] = 0x20, 3141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_MBUF_DONE_THRESH] = 0x24, 3151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_FLOW_PERIOD] = 0x28, 3161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR] = 0x2C, 3171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR_HI] = 0x30, 3181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 3191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 genet_dma_ring_regs_v123[] = { 3211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_READ_PTR] = 0x00, 3221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_CONS_INDEX] = 0x04, 3231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_PROD_INDEX] = 0x08, 3241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_RING_BUF_SIZE] = 0x0C, 3251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_START_ADDR] = 0x10, 3261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_END_ADDR] = 0x14, 3271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [DMA_MBUF_DONE_THRESH] = 0x18, 3281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_FLOW_PERIOD] = 0x1C, 3291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [TDMA_WRITE_PTR] = 0x20, 3301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 3311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set at runtime once GENET version is known */ 3331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const u8 *genet_dma_ring_regs; 3341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_tdma_ring_readl(struct bcmgenet_priv *priv, 3361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int ring, 3371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_ring_reg r) 3381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_TDMA_REG_OFF + 3401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tdma_ring_writel(struct bcmgenet_priv *priv, 3451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int ring, 3461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, 3471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_ring_reg r) 3481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_TDMA_REG_OFF + 3501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline u32 bcmgenet_rdma_ring_readl(struct bcmgenet_priv *priv, 3551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int ring, 3561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_ring_reg r) 3571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return __raw_readl(priv->base + GENET_RDMA_REG_OFF + 3591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_rdma_ring_writel(struct bcmgenet_priv *priv, 3641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int ring, 3651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val, 3661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum dma_ring_reg r) 3671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __raw_writel(val, priv->base + GENET_RDMA_REG_OFF + 3691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_RING_SIZE * ring) + 3701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs[r]); 3711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_get_settings(struct net_device *dev, 3741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct ethtool_cmd *cmd) 3751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 3771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 3791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 3801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 3821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENODEV; 3831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return phy_ethtool_gset(priv->phydev, cmd); 3851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 3861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_settings(struct net_device *dev, 3881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct ethtool_cmd *cmd) 3891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 3901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 3911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 3931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 3941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 3961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENODEV; 3971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 3981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return phy_ethtool_sset(priv->phydev, cmd); 3991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_rx_csum(struct net_device *dev, 4021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted) 4031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 rbuf_chk_ctrl; 4061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bool rx_csum_en; 4071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rx_csum_en = !!(wanted & NETIF_F_RXCSUM); 4091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CHK_CTRL); 4111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable rx checksumming */ 4131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (rx_csum_en) 4141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl |= RBUF_RXCHK_EN; 4151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 4161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_chk_ctrl &= ~RBUF_RXCHK_EN; 4171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->desc_rxchk_en = rx_csum_en; 418ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli 419ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli /* If UniMAC forwards CRC, we need to skip over it to get 420ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli * a valid CHK bit to be set in the per-packet status word 421ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli */ 422ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli if (rx_csum_en && priv->crc_fwd_en) 423ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli rbuf_chk_ctrl |= RBUF_SKIP_FCS; 424ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli else 425ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli rbuf_chk_ctrl &= ~RBUF_SKIP_FCS; 426ebe5e3c64241bbdc256e9828392fa452bc2bfd7eFlorian Fainelli 4271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, rbuf_chk_ctrl, RBUF_CHK_CTRL); 4281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 4301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_tx_csum(struct net_device *dev, 4331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted) 4341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bool desc_64b_en; 4371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 tbuf_ctrl, rbuf_ctrl; 4381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl = bcmgenet_tbuf_ctrl_get(priv); 4401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl = bcmgenet_rbuf_readl(priv, RBUF_CTRL); 4411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli desc_64b_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)); 4431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable 64 bytes descriptor in both directions (RBUF and TBUF) */ 4451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (desc_64b_en) { 4461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl |= RBUF_64B_EN; 4471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl |= RBUF_64B_EN; 4481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 4491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tbuf_ctrl &= ~RBUF_64B_EN; 4501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rbuf_ctrl &= ~RBUF_64B_EN; 4511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 4521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->desc_64b_en = desc_64b_en; 4531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tbuf_ctrl_set(priv, tbuf_ctrl); 4551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, rbuf_ctrl, RBUF_CTRL); 4561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 4581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_features(struct net_device *dev, 4611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t features) 4621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t changed = features ^ dev->features; 4641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_features_t wanted = dev->wanted_features; 4651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret = 0; 4661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) 4681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_set_tx_csum(dev, wanted); 4691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (changed & (NETIF_F_RXCSUM)) 4701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_set_rx_csum(dev, wanted); 4711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 4731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic u32 bcmgenet_get_msglevel(struct net_device *dev) 4761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return priv->msg_enable; 4801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_msglevel(struct net_device *dev, u32 level) 4831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 4841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 4851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->msg_enable = level; 4871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 4881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* standard ethtool support functions. */ 4901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellienum bcmgenet_stat_type { 4911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_NETDEV = -1, 4921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MIB_RX, 4931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MIB_TX, 4941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_RUNT, 4951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BCMGENET_STAT_MISC, 4961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 4971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 4981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistruct bcmgenet_stats { 4991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char stat_string[ETH_GSTRING_LEN]; 5001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int stat_sizeof; 5011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int stat_offset; 5021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum bcmgenet_stat_type type; 5031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* reg offset from UMAC base for misc counters */ 5041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 reg_offset; 5051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 5061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_NETDEV(m) { \ 5081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = __stringify(m), \ 5091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct net_device_stats *)0)->m), \ 5101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct net_device_stats, m), \ 5111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = BCMGENET_STAT_NETDEV, \ 5121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB(str, m, _type) { \ 5151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = str, \ 5161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct bcmgenet_priv *)0)->m), \ 5171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct bcmgenet_priv, m), \ 5181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = _type, \ 5191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB_RX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_RX) 5221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MIB_TX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_TX) 5231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_RUNT(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_RUNT) 5241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define STAT_GENET_MISC(str, m, offset) { \ 5261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_string = str, \ 5271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_sizeof = sizeof(((struct bcmgenet_priv *)0)->m), \ 5281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .stat_offset = offsetof(struct bcmgenet_priv, m), \ 5291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .type = BCMGENET_STAT_MISC, \ 5301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .reg_offset = offset, \ 5311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 5321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* There is a 0xC gap between the end of RX and beginning of TX stats and then 5351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * between the end of TX stats and the beginning of the RX RUNT 5361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 5371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define BCMGENET_STAT_OFFSET 0xc 5381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 5391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Hardware counters must be kept in sync because the order/offset 5401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * is important here (order in structure declaration = order in hardware) 5411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 5421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct bcmgenet_stats bcmgenet_gstrings_stats[] = { 5431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* general stats */ 5441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_packets), 5451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_packets), 5461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_bytes), 5471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_bytes), 5481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_errors), 5491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_errors), 5501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(rx_dropped), 5511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(tx_dropped), 5521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_NETDEV(multicast), 5531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC RSV counters */ 5541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 5551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 5561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 5571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 5581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 5591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 5601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 5611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 5621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 5631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 5641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_pkts", mib.rx.pkt), 5651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_bytes", mib.rx.bytes), 5661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_multicast", mib.rx.mca), 5671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_broadcast", mib.rx.bca), 5681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_fcs", mib.rx.fcs), 5691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_control", mib.rx.cf), 5701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_pause", mib.rx.pf), 5711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_unknown", mib.rx.uo), 5721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_align", mib.rx.aln), 5731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_outrange", mib.rx.flr), 5741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_code", mib.rx.cde), 5751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_carrier", mib.rx.fcr), 5761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_oversize", mib.rx.ovr), 5771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_jabber", mib.rx.jbr), 5781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_mtu_err", mib.rx.mtue), 5791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_good_pkts", mib.rx.pok), 5801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_unicast", mib.rx.uc), 5811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_ppp", mib.rx.ppp), 5821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_RX("rx_crc", mib.rx.rcrc), 5831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC TSV counters */ 5841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 5851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 5861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 5871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 5881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 5891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 5901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 5911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 5921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 5931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 5941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_pkts", mib.tx.pkts), 5951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_multicast", mib.tx.mca), 5961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_broadcast", mib.tx.bca), 5971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_pause", mib.tx.pf), 5981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_control", mib.tx.cf), 5991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_fcs_err", mib.tx.fcs), 6001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_oversize", mib.tx.ovr), 6011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_defer", mib.tx.drf), 6021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_excess_defer", mib.tx.edf), 6031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_single_col", mib.tx.scl), 6041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_multi_col", mib.tx.mcl), 6051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_late_col", mib.tx.lcl), 6061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_excess_col", mib.tx.ecl), 6071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_frags", mib.tx.frg), 6081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_total_col", mib.tx.ncl), 6091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_jabber", mib.tx.jbr), 6101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_bytes", mib.tx.bytes), 6111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_good_pkts", mib.tx.pok), 6121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MIB_TX("tx_unicast", mib.tx.uc), 6131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMAC RUNT counters */ 6141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 6151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 6161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 6171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 6181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Misc UniMAC counters */ 6191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, 6201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_RBUF_OVFL_CNT), 6211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, UMAC_RBUF_ERR_CNT), 6221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli STAT_GENET_MISC("mdf_err_cnt", mib.mdf_err_cnt, UMAC_MDF_ERR_CNT), 6231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 6241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define BCMGENET_STATS_LEN ARRAY_SIZE(bcmgenet_gstrings_stats) 6261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_get_drvinfo(struct net_device *dev, 6281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct ethtool_drvinfo *info) 6291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli strlcpy(info->driver, "bcmgenet", sizeof(info->driver)); 6311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli strlcpy(info->version, "v2.0", sizeof(info->version)); 6321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli info->n_stats = BCMGENET_STATS_LEN; 6331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_get_sset_count(struct net_device *dev, int string_set) 6371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (string_set) { 6391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_SS_STATS: 6401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return BCMGENET_STATS_LEN; 6411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 6421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EOPNOTSUPP; 6431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_get_strings(struct net_device *dev, 6471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 stringset, u8 *data) 6481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 6501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (stringset) { 6521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_SS_STATS: 6531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 6541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli memcpy(data + i * ETH_GSTRING_LEN, 6551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_gstrings_stats[i].stat_string, 6561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ETH_GSTRING_LEN); 6571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) 6631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 6641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i, j = 0; 6651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 6671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct bcmgenet_stats *s; 6681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 offset = 0; 6691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 val = 0; 6701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char *p; 6711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli s = &bcmgenet_gstrings_stats[i]; 6731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (s->type) { 6741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_NETDEV: 6751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli continue; 6761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MIB_RX: 6771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MIB_TX: 6781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_RUNT: 6791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (s->type != BCMGENET_STAT_MIB_RX) 6801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli offset = BCMGENET_STAT_OFFSET; 6811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = bcmgenet_umac_readl(priv, UMAC_MIB_START + 6821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli j + offset); 6831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case BCMGENET_STAT_MISC: 6851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = bcmgenet_umac_readl(priv, s->reg_offset); 6861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear if overflowed */ 6871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (val == ~0) 6881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, s->reg_offset); 6891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 6901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli j += s->stat_sizeof; 6931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)priv + s->stat_offset; 6941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli *(u32 *)p = val; 6951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 6961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 6971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 6981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_get_ethtool_stats(struct net_device *dev, 6991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct ethtool_stats *stats, 7001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u64 *data) 7011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 7031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 7041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_running(dev)) 7061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_update_mib_counters(priv); 7071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < BCMGENET_STATS_LEN; i++) { 7091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct bcmgenet_stats *s; 7101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli char *p; 7111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli s = &bcmgenet_gstrings_stats[i]; 7131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (s->type == BCMGENET_STAT_NETDEV) 7141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)&dev->stats; 7151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 7161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p = (char *)priv; 7171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p += s->stat_offset; 7181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli data[i] = *(u32 *)p; 7191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* standard ethtool support functions. */ 7231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct ethtool_ops bcmgenet_ethtool_ops = { 7241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_strings = bcmgenet_get_strings, 7251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_sset_count = bcmgenet_get_sset_count, 7261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_ethtool_stats = bcmgenet_get_ethtool_stats, 7271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_settings = bcmgenet_get_settings, 7281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .set_settings = bcmgenet_set_settings, 7291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_drvinfo = bcmgenet_get_drvinfo, 7301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_link = ethtool_op_get_link, 7311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .get_msglevel = bcmgenet_get_msglevel, 7321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .set_msglevel = bcmgenet_set_msglevel, 7331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 7341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Power down the unimac, based on mode. */ 7361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_power_down(struct bcmgenet_priv *priv, 7371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum bcmgenet_power_mode mode) 7381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 7401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (mode) { 7421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_CABLE_SENSE: 74380d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli phy_detach(priv->phydev); 7441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_PASSIVE: 7471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Power down LED */ 7481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_mii_reset(priv->dev); 7491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_EXT) { 7501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 7511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= (EXT_PWR_DOWN_PHY | 7521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_BIAS); 7531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 7541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 7571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_power_up(struct bcmgenet_priv *priv, 7621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli enum bcmgenet_power_mode mode) 7631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 7651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(priv->hw_params->flags & GENET_HAS_EXT)) 7671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 7681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 7701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (mode) { 7721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_PASSIVE: 7731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~(EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_PHY | 7741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli EXT_PWR_DOWN_BIAS); 7751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* fallthrough */ 7761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case GENET_POWER_CABLE_SENSE: 7771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enable APD */ 7781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= EXT_PWR_DN_EN_LD; 7791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 7811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 7821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 7831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 7851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_mii_reset(priv->dev); 7861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 7871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* ioctl handle special commands that are not present in ethtool. */ 7891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 7901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 7911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 7921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int val = 0; 7931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_running(dev)) 7951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 7961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 7971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (cmd) { 7981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCGMIIPHY: 7991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCGMIIREG: 8001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case SIOCSMIIREG: 8011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->phydev) 8021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = -ENODEV; 8031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = phy_mii_ioctl(priv->phydev, rq, cmd); 8051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 8061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 8081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli val = -EINVAL; 8091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 8101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 8111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return val; 8131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct enet_cb *bcmgenet_get_txcb(struct bcmgenet_priv *priv, 8161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 8191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = ring->cbs; 8211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr += ring->write_ptr - ring->cb_ptr; 8221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->bd_addr = priv->tx_bds + ring->write_ptr * DMA_DESC_SIZE; 8231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Advancing local write pointer */ 8241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->write_ptr == ring->end_ptr) 8251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr = ring->cb_ptr; 8261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr++; 8281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return tx_cb_ptr; 8301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Simple helper to free a control block's resources */ 8331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_free_cb(struct enet_cb *cb) 8341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 8361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 8371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, 0); 8381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring16_int_disable(struct bcmgenet_priv *priv, 8411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 8441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE, 8451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli INTRL2_CPU_MASK_SET); 8461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring16_int_enable(struct bcmgenet_priv *priv, 8491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 8521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE, 8531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli INTRL2_CPU_MASK_CLEAR); 8541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring_int_enable(struct bcmgenet_priv *priv, 8571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_writel(priv, 8601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (1 << ring->index), INTRL2_CPU_MASK_CLEAR); 8611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->int1_mask &= ~(1 << ring->index); 8621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_tx_ring_int_disable(struct bcmgenet_priv *priv, 8651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_writel(priv, 8681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (1 << ring->index), INTRL2_CPU_MASK_SET); 8691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->int1_mask |= (1 << ring->index); 8701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 8711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Unlocked version of the reclaim routine */ 8731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void __bcmgenet_tx_reclaim(struct net_device *dev, 8741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 8751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 8761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 8771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int last_tx_cn, last_c_index, num_tx_bds; 8781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 879b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli struct netdev_queue *txq; 8801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int c_index; 8811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Compute how many buffers are transmited since last xmit call */ 8831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli c_index = bcmgenet_tdma_ring_readl(priv, ring->index, TDMA_CONS_INDEX); 884b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli txq = netdev_get_tx_queue(dev, ring->queue); 8851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index = ring->c_index; 8871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli num_tx_bds = ring->size; 8881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli c_index &= (num_tx_bds - 1); 8901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (c_index >= last_c_index) 8921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_tx_cn = c_index - last_c_index; 8931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 8941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_tx_cn = num_tx_bds - last_c_index + c_index; 8951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 8961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, tx_done, dev, 8971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "%s ring=%d index=%d last_tx_cn=%d last_index=%d\n", 8981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __func__, ring->index, 8991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli c_index, last_tx_cn, last_c_index); 9001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Reclaim transmitted buffers */ 9021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (last_tx_cn-- > 0) { 9031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = ring->cbs + last_c_index; 9041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (tx_cb_ptr->skb) { 9051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_bytes += tx_cb_ptr->skb->len; 9061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&dev->dev, 9071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr(tx_cb_ptr, dma_addr), 9081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->skb->len, 9091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_TO_DEVICE); 9101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(tx_cb_ptr); 9111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (dma_unmap_addr(tx_cb_ptr, dma_addr)) { 9121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_bytes += 9131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len(tx_cb_ptr, dma_len); 9141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_page(&dev->dev, 9151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr(tx_cb_ptr, dma_addr), 9161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len(tx_cb_ptr, dma_len), 9171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_TO_DEVICE); 9181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, 0); 9191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_packets++; 9211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds += 1; 9221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index++; 9241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli last_c_index &= (num_tx_bds - 1); 9251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds > (MAX_SKB_FRAGS + 1)) 9281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable(priv, ring); 9291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 930b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli if (netif_tx_queue_stopped(txq)) 931b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_wake_queue(txq); 9321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->c_index = c_index; 9341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_tx_reclaim(struct net_device *dev, 9371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 9381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long flags; 9401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_irqsave(&ring->lock, flags); 9421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __bcmgenet_tx_reclaim(dev, ring); 9431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_unlock_irqrestore(&ring->lock, flags); 9441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_tx_reclaim_all(struct net_device *dev) 9471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 9491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 9501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_is_multiqueue(dev)) { 9521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->hw_params->tx_queues; i++) 9531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(dev, &priv->tx_rings[i]); 9541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(dev, &priv->tx_rings[DESC_INDEX]); 9571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 9581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Transmits a single SKB (either head of a fragment or a single SKB) 9601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * caller must hold priv->lock 9611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 9621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_xmit_single(struct net_device *dev, 9631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb, 9641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 dma_desc_flags, 9651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 9661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 9671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 9681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 9691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 9701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int skb_len; 9711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 9721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 length_status; 9731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 9741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = bcmgenet_get_txcb(priv, ring); 9761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!tx_cb_ptr)) 9781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BUG(); 9791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->skb = skb; 9811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_len = skb_headlen(skb) < ETH_ZLEN ? ETH_ZLEN : skb_headlen(skb); 9831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 9851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 9861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 9871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, tx_err, dev, "Tx DMA map failed\n"); 9881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(skb); 9891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 9901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 9911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, mapping); 9931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len_set(tx_cb_ptr, dma_len, skb->len); 9941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli length_status = (skb_len << DMA_BUFLENGTH_SHIFT) | dma_desc_flags | 9951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT) | 9961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_TX_APPEND_CRC; 9971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 9981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (skb->ip_summed == CHECKSUM_PARTIAL) 9991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli length_status |= DMA_TX_DO_CSUM; 10001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set(priv, tx_cb_ptr->bd_addr, mapping, length_status); 10021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Decrement total BD count and advance our write pointer */ 10041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds -= 1; 10051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index += 1; 10061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index &= DMA_P_INDEX_MASK; 10071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 10091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 10101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Transmit a SKB fragement */ 10121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_xmit_frag(struct net_device *dev, 10131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_frag_t *frag, 10141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 dma_desc_flags, 10151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring) 10161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 10171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 10181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 10191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *tx_cb_ptr; 10201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 10211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 10221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr = bcmgenet_get_txcb(priv, ring); 10241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!tx_cb_ptr)) 10261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli BUG(); 10271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_cb_ptr->skb = NULL; 10281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = skb_frag_dma_map(kdev, frag, 0, 10301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_frag_size(frag), DMA_TO_DEVICE); 10311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 10321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 10331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, tx_err, dev, "%s: Tx DMA map failed\n", 10341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __func__); 10351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 10361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(tx_cb_ptr, dma_addr, mapping); 10391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_len_set(tx_cb_ptr, dma_len, frag->size); 10401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set(priv, tx_cb_ptr->bd_addr, mapping, 10421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (frag->size << DMA_BUFLENGTH_SHIFT) | dma_desc_flags | 10431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT)); 10441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds -= 1; 10471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index += 1; 10481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index &= DMA_P_INDEX_MASK; 10491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 10511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 10521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Reallocate the SKB to put enough headroom in front of it and insert 10541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the transmit checksum offsets in the descriptors 10551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 10561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_put_tx_csum(struct net_device *dev, struct sk_buff *skb) 10571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 10581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct status_64 *status = NULL; 10591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *new_skb; 10601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 offset; 10611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 ip_proto; 10621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 ip_ver; 10631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 tx_csum_info; 10641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(skb_headroom(skb) < sizeof(*status))) { 10661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* If 64 byte status block enabled, must make sure skb has 10671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * enough headroom for us to insert 64B status block. 10681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 10691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli new_skb = skb_realloc_headroom(skb, sizeof(*status)); 10701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(skb); 10711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!new_skb) { 10721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_errors++; 10731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_dropped++; 10741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 10751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb = new_skb; 10771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_push(skb, sizeof(*status)); 10801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status = (struct status_64 *)skb->data; 10811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (skb->ip_summed == CHECKSUM_PARTIAL) { 10831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_ver = htons(skb->protocol); 10841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli switch (ip_ver) { 10851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_P_IP: 10861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_proto = ip_hdr(skb)->protocol; 10871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 10881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli case ETH_P_IPV6: 10891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ip_proto = ipv6_hdr(skb)->nexthdr; 10901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 10911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli default: 10921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 10931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 10941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli offset = skb_checksum_start_offset(skb) - sizeof(*status); 10961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info = (offset << STATUS_TX_CSUM_START_SHIFT) | 10971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (offset + skb->csum_offset); 10981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 10991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set the length valid bit for TCP and UDP and just set 11001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the special UDP flag for IPv4, else just set to 0. 11011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 11021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 11031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info |= STATUS_TX_CSUM_LV; 11041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP) 11051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info |= STATUS_TX_CSUM_PROTO_UDP; 11061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else 11071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli tx_csum_info = 0; 11081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status->tx_csum_info = tx_csum_info; 11101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 11131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 11141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) 11161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 11171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 11181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring = NULL; 1119b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli struct netdev_queue *txq; 11201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long flags = 0; 11211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int nr_frags, index; 11221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u16 dma_desc_flags; 11231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 11241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 11251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = skb_get_queue_mapping(skb); 11271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Mapping strategy: 11281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 0, unclassified, packet xmited through ring16 11291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 1, goes to ring 0. (highest priority queue 11301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 2, goes to ring 1. 11311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 3, goes to ring 2. 11321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue_mapping = 4, goes to ring 3. 11331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 11341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index == 0) 11351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = DESC_INDEX; 11361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 11371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index -= 1; 11381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli nr_frags = skb_shinfo(skb)->nr_frags; 11401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring = &priv->tx_rings[index]; 1141b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli txq = netdev_get_tx_queue(dev, ring->queue); 11421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_irqsave(&ring->lock, flags); 11441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds <= nr_frags + 1) { 1145b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_stop_queue(txq); 11461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "%s: tx ring %d full when queue %d awake\n", 11471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __func__, index, ring->queue); 11481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_BUSY; 11491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* set the SKB transmit checksum */ 11531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->desc_64b_en) { 11541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_put_tx_csum(dev, skb); 11551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 11561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_desc_flags = DMA_SOP; 11621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (nr_frags == 0) 11631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_desc_flags |= DMA_EOP; 11641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Transmit single SKB or head of fragment list */ 11661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_xmit_single(dev, skb, dma_desc_flags, ring); 11671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 11681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* xmit fragment */ 11731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < nr_frags; i++) { 11741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_xmit_frag(dev, 11751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli &skb_shinfo(skb)->frags[i], 11761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (i == nr_frags - 1) ? DMA_EOP : 0, ring); 11771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 11781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = NETDEV_TX_OK; 11791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto out; 11801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1183d03825fba459d0d58e4fe162439babfc5f5eabc4Florian Fainelli skb_tx_timestamp(skb); 1184d03825fba459d0d58e4fe162439babfc5f5eabc4Florian Fainelli 11851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* we kept a software copy of how much we should advance the TDMA 11861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * producer index, now write it down to the hardware 11871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 11881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, ring->index, 11891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index, TDMA_PROD_INDEX); 11901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ring->free_bds <= (MAX_SKB_FRAGS + 1)) { 1192b2cde2cc71f2382e4a4bfaaacd5263bd93f1e0d2Florian Fainelli netif_tx_stop_queue(txq); 11931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable(priv, ring); 11941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 11951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelliout: 11971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_unlock_irqrestore(&ring->lock, flags); 11981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 11991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 12001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 12011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_rx_refill(struct bcmgenet_priv *priv, 12041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb) 12051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 12061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 12071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb; 12081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_addr_t mapping; 12091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 12101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb = netdev_alloc_skb(priv->dev, 12121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len + SKB_ALIGNMENT); 12131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!skb) 12141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 12151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* a caller did not release this control block */ 12171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli WARN_ON(cb->skb != NULL); 12181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = skb; 12191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mapping = dma_map_single(kdev, skb->data, 12201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 12211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = dma_mapping_error(kdev, mapping); 12221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 12231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(cb); 12241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_err, priv->dev, 12251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "%s DMA map failed\n", __func__); 12261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 12271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 12281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, mapping); 12301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* assign packet, prepare descriptor, and advance pointer */ 12311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dmadesc_set_addr(priv, priv->rx_bd_assign_ptr, mapping); 12331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* turn on the newly assigned BD for DMA to use */ 12351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index++; 12361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index &= (priv->num_rx_bds - 1); 12371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_ptr = priv->rx_bds + 12391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->rx_bd_assign_index * DMA_DESC_SIZE); 12401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 12421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 12431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_desc_rx - descriptor based rx process. 12451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * this could be called from bottom half, or from NAPI polling method. 12461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 12471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic unsigned int bcmgenet_desc_rx(struct bcmgenet_priv *priv, 12481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int budget) 12491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 12501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct net_device *dev = priv->dev; 12511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 12521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sk_buff *skb; 12531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 dma_length_status; 12541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long dma_flag; 12551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int len, err; 12561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int rxpktprocessed = 0, rxpkttoprocess; 12571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int p_index; 12581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int chksum_ok = 0; 12591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p_index = bcmgenet_rdma_ring_readl(priv, 12611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DESC_INDEX, RDMA_PROD_INDEX); 12621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli p_index &= DMA_P_INDEX_MASK; 12631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (p_index < priv->rx_c_index) 12651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rxpkttoprocess = (DMA_C_INDEX_MASK + 1) - 12661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index + p_index; 12671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 12681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rxpkttoprocess = p_index - priv->rx_c_index; 12691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, 12711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "RDMA: rxpkttoprocess=%d\n", rxpkttoprocess); 12721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while ((rxpktprocessed < rxpkttoprocess) && 12741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (rxpktprocessed < budget)) { 12751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unmap the packet contents such that we can use the 12771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * RSV from the 64 bytes descriptor when enabled and save 12781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * a 32-bits register read 12791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 12801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb = &priv->rx_cbs[priv->rx_read_ptr]; 12811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb = cb->skb; 12821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&dev->dev, dma_unmap_addr(cb, dma_addr), 12831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 12841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->desc_64b_en) { 12861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_length_status = dmadesc_get_length_status(priv, 12871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bds + 12881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->rx_read_ptr * 12891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_DESC_SIZE)); 12901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 12911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct status_64 *status; 12921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli status = (struct status_64 *)skb->data; 12931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_length_status = status->length_status; 12941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 12951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 12961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* DMA flags and length are still valid no matter how 12971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * we got the Receive Status Vector (64B RSB or register) 12981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 12991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_flag = dma_length_status & 0xffff; 13001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len = dma_length_status >> DMA_BUFLENGTH_SHIFT; 13011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, 13031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "%s: p_ind=%d c_ind=%d read_ptr=%d len_stat=0x%08x\n", 13041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __func__, p_index, priv->rx_c_index, priv->rx_read_ptr, 13051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_length_status); 13061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli rxpktprocessed++; 13081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_read_ptr++; 13101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_read_ptr &= (priv->num_rx_bds - 1); 13111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* out of memory, just drop packets at the hardware level */ 13131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!skb)) { 13141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_dropped++; 13151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_errors++; 13161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto refill; 13171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(!(dma_flag & DMA_EOP) || !(dma_flag & DMA_SOP))) { 13201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_status, dev, 13211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "Droping fragmented packet!\n"); 13221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_dropped++; 13231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_errors++; 13241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 13251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto refill; 13271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* report errors */ 13291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (unlikely(dma_flag & (DMA_RX_CRC_ERROR | 13301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_OV | 13311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_NO | 13321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_LG | 13331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RX_RXER))) { 13341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_status, dev, "dma_flag=0x%x\n", 13351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (unsigned int)dma_flag); 13361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_CRC_ERROR) 13371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_crc_errors++; 13381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_OV) 13391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_over_errors++; 13401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_NO) 13411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_frame_errors++; 13421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_LG) 13431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_length_errors++; 13441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_dropped++; 13451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_errors++; 13461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* discard the packet and advance consumer index.*/ 13481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb_any(cb->skb); 13491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto refill; 13511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } /* error packet */ 13521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli chksum_ok = (dma_flag & priv->dma_rx_chk_bit) && 13541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->desc_rxchk_en; 13551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_put(skb, len); 13571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->desc_64b_en) { 13581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_pull(skb, 64); 13591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= 64; 13601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (likely(chksum_ok)) 13631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb->ip_summed = CHECKSUM_UNNECESSARY; 13641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* remove hardware 2bytes added for IP alignment */ 13661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_pull(skb, 2); 13671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= 2; 13681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->crc_fwd_en) { 13701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb_trim(skb, len - ETH_FCS_LEN); 13711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli len -= ETH_FCS_LEN; 13721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /*Finish setting up the received SKB and send it to the kernel*/ 13751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli skb->protocol = eth_type_trans(skb, priv->dev); 13761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_packets++; 13771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.rx_bytes += len; 13781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_flag & DMA_RX_MULT) 13791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.multicast++; 13801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Notify kernel */ 13821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli napi_gro_receive(&priv->napi, skb); 13831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb->skb = NULL; 13841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, rx_status, dev, "pushed up to kernel\n"); 13851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* refill RX path on the current control block */ 13871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellirefill: 13881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = bcmgenet_rx_refill(priv, cb); 13891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 13901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_err(priv, rx_err, dev, "Rx refill failed\n"); 13911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 13921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return rxpktprocessed; 13941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 13951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 13961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Assign skb to RX DMA descriptor. */ 13971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_alloc_rx_buffers(struct bcmgenet_priv *priv) 13981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 13991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 14001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret = 0; 14011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 14021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, priv->dev, "%s:\n", __func__); 14041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* loop here for each buffer needing assign */ 14061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_rx_bds; i++) { 14071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb = &priv->rx_cbs[priv->rx_bd_assign_index]; 14081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (cb->skb) 14091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli continue; 14101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_rx_refill(priv, cb); 14121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 14131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 14141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 14181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_free_rx_buffers(struct bcmgenet_priv *priv) 14211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 14221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct enet_cb *cb; 14231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 14241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_rx_bds; i++) { 14261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cb = &priv->rx_cbs[i]; 14271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_unmap_addr(cb, dma_addr)) { 14291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_single(&priv->dev->dev, 14301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr(cb, dma_addr), 14311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len, DMA_FROM_DEVICE); 14321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_unmap_addr_set(cb, dma_addr, 0); 14331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (cb->skb) 14361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_cb(cb); 14371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1440e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainellistatic void umac_enable_set(struct bcmgenet_priv *priv, u32 mask, 1441e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli bool enable) 1442e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli{ 1443e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli u32 reg; 1444e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 1445e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 1446e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli if (enable) 1447e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg |= mask; 1448e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli else 1449e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli reg &= ~mask; 1450e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 1451e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 1452e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli /* UniMAC stops on a packet boundary, wait for a full-size packet 1453e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli * to be processed 1454e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli */ 1455e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli if (enable == 0) 1456e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli usleep_range(1000, 2000); 1457e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli} 1458e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli 14591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int reset_umac(struct bcmgenet_priv *priv) 14601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 14611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 14621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int timeout = 0; 14631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 14641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* 7358a0/7552a0: bad default in RBUF_FLUSH_CTRL.umac_sw_rst */ 14661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, 0); 14671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 14681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable MAC while updating its registers */ 14701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_CMD); 14711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* issue soft reset, wait for it to complete */ 14731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD); 14741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (timeout++ < 1000) { 14751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 14761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(reg & CMD_SW_RESET)) 14771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 14781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(1); 14801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (timeout == 1000) { 14831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(kdev, 14841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "timeout waiting for MAC to come out of resetn\n"); 14851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ETIMEDOUT; 14861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 14871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 14881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 14891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 14901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1491909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_intr_disable(struct bcmgenet_priv *priv) 1492909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 1493909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Mask all interrupts.*/ 1494909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_MASK_SET); 1495909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); 1496909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); 1497909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_MASK_SET); 1498909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); 1499909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); 1500909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 1501909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 15021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int init_umac(struct bcmgenet_priv *priv) 15031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 15041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device *kdev = &priv->pdev->dev; 15051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 15061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg, cpu_mask_clear; 15071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(&priv->pdev->dev, "bcmgenet: init_umac\n"); 15091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = reset_umac(priv); 15111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 15121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 15131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_CMD); 15151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear tx/rx counter */ 15161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 15171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT, UMAC_MIB_CTRL); 15181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_MIB_CTRL); 15191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, ENET_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 15211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* init rx registers, enable ip header optimization */ 15231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rbuf_readl(priv, RBUF_CTRL); 15241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= RBUF_ALIGN_2B; 15251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, reg, RBUF_CTRL); 15261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!GENET_IS_V1(priv) && !GENET_IS_V2(priv)) 15281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_writel(priv, 1, RBUF_TBUF_SIZE_CTRL); 15291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1530909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intr_disable(priv); 15311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear = UMAC_IRQ_RXDMA_BDONE; 15331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(kdev, "%s:Enabling RXDMA_BDONE interrupt\n", __func__); 15351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Monitor cable plug/unpluged event for internal PHY */ 15371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (phy_is_internal(priv->phydev)) 15381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= (UMAC_IRQ_LINK_DOWN | UMAC_IRQ_LINK_UP); 15391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else if (priv->ext_phy) 15401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= (UMAC_IRQ_LINK_DOWN | UMAC_IRQ_LINK_UP); 15411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { 15421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_bp_mc_get(priv); 15431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= BIT(priv->hw_params->bp_in_en_shift); 15441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* bp_mask: back pressure mask */ 15461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_is_multiqueue(priv->dev)) 15471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= priv->hw_params->bp_in_mask; 15481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else 15491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~priv->hw_params->bp_in_mask; 15501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_bp_mc_set(priv, reg); 15511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 15521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable MDIO interrupts on GENET v3+ */ 15541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->hw_params->flags & GENET_HAS_MDIO_INTR) 15551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli cpu_mask_clear |= UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR; 15561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, cpu_mask_clear, 15581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli INTRL2_CPU_MASK_CLEAR); 15591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable rx/tx engine.*/ 15611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_dbg(kdev, "done init umac\n"); 15621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 15641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 15651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Initialize all house-keeping variables for a TX ring, along 15671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * with corresponding hardware registers 15681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 15691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv, 15701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int index, unsigned int size, 15711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int write_ptr, unsigned int end_ptr) 15721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 15731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_tx_ring *ring = &priv->tx_rings[index]; 15741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 words_per_bd = WORDS_PER_BD(priv); 15751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 flow_period_val = 0; 15761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int first_bd; 15771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli spin_lock_init(&ring->lock); 15791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->index = index; 15801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index == DESC_INDEX) { 15811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->queue = 0; 15821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable = bcmgenet_tx_ring16_int_enable; 15831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable = bcmgenet_tx_ring16_int_disable; 15841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 15851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->queue = index + 1; 15861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_enable = bcmgenet_tx_ring_int_enable; 15871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->int_disable = bcmgenet_tx_ring_int_disable; 15881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 15891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->cbs = priv->tx_cbs + write_ptr; 15901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->size = size; 15911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->c_index = 0; 15921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->free_bds = size; 15931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->write_ptr = write_ptr; 15941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->cb_ptr = write_ptr; 15951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->end_ptr = end_ptr - 1; 15961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring->prod_index = 0; 15971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 15981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set flow period for ring != 16 */ 15991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (index != DESC_INDEX) 16001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli flow_period_val = ENET_MAX_MTU_SIZE << 16; 16011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX); 16031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_CONS_INDEX); 16041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 1, DMA_MBUF_DONE_THRESH); 16051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable rate control for now */ 16061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, flow_period_val, 16071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_FLOW_PERIOD); 16081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unclassified traffic goes to ring 16 */ 16091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, 16101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ((size << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH), 16111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_BUF_SIZE); 16121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli first_bd = write_ptr; 16141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set start and end address, read and write pointers */ 16161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd * words_per_bd, 16171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_START_ADDR); 16181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd * words_per_bd, 16191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_READ_PTR); 16201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, first_bd, 16211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TDMA_WRITE_PTR); 16221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_ring_writel(priv, index, end_ptr * words_per_bd - 1, 16231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_END_ADDR); 16241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 16251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Initialize a RDMA ring */ 16271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_init_rx_ring(struct bcmgenet_priv *priv, 16281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int index, unsigned int size) 16291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 16301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 words_per_bd = WORDS_PER_BD(priv); 16311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 16321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->num_rx_bds = TOTAL_DESC; 16341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bds = priv->base + priv->hw_params->rdma_offset; 16351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_ptr = priv->rx_bds; 16361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_bd_assign_index = 0; 16371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index = 0; 16381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_read_ptr = 0; 16391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_cbs = kzalloc(priv->num_rx_bds * sizeof(struct enet_cb), 16401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli GFP_KERNEL); 16411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->rx_cbs) 16421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 16431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_alloc_rx_buffers(priv); 16451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 16461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->rx_cbs); 16471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 16481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 16491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_WRITE_PTR); 16511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_PROD_INDEX); 16521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_CONS_INDEX); 16531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 16541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ((size << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH), 16551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_RING_BUF_SIZE); 16561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, DMA_START_ADDR); 16571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 16581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli words_per_bd * size - 1, DMA_END_ADDR); 16591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 16601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (DMA_FC_THRESH_LO << DMA_XOFF_THRESHOLD_SHIFT) | 16611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli DMA_FC_THRESH_HI, RDMA_XON_XOFF_THRESH); 16621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, index, 0, RDMA_READ_PTR); 16631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 16651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 16661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* init multi xmit queues, only available for GENET2+ 16681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * the queue is partitioned as follows: 16691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue 0 - 3 is priority based, each one has 32 descriptors, 16711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * with queue 0 being the highest priority queue. 16721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * queue 16 is the default tx queue with GENET_DEFAULT_BD_CNT 16741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * descriptors: 256 - (number of tx queues * bds per queues) = 128 16751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * descriptors. 16761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * 16771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * The transmit control block pool is then partitioned as following: 16781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_cbs[0...127] are for queue 16 16791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[0] points to tx_cbs[128..159] 16801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[1] points to tx_cbs[160..191] 16811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[2] points to tx_cbs[192..223] 16821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * - tx_ring_cbs[3] points to tx_cbs[224..255] 16831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 16841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_init_multiq(struct net_device *dev) 16851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 16861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 16871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int i, dma_enable; 16881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg, dma_ctrl, ring_cfg = 0, dma_priority = 0; 16891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netif_is_multiqueue(dev)) { 16911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(dev, "called with non multi queue aware HW\n"); 16921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 16931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 16941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 16951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = bcmgenet_tdma_readl(priv, DMA_CTRL); 16961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_enable = dma_ctrl & DMA_EN; 16971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl &= ~DMA_EN; 16981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, dma_ctrl, DMA_CTRL); 16991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable strict priority arbiter mode */ 17011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, DMA_ARBITER_SP, DMA_ARB_CTRL); 17021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->hw_params->tx_queues; i++) { 17041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* first 64 tx_cbs are reserved for default tx queue 17051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * (ring 16) 17061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 17071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_tx_ring(priv, i, priv->hw_params->bds_cnt, 17081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli i * priv->hw_params->bds_cnt, 17091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (i + 1) * priv->hw_params->bds_cnt); 17101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Configure ring as decriptor ring and setup priority */ 17121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ring_cfg |= 1 << i; 17131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_priority |= ((GENET_Q0_PRIORITY + i) << 17141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (GENET_MAX_MQ_CNT + 1) * i); 17151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl |= 1 << (i + DMA_RING_BUF_EN_SHIFT); 17161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Enable rings */ 17191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_RING_CFG); 17201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= ring_cfg; 17211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_RING_CFG); 17221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Use configured rings priority and set ring #16 priority */ 17241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_RING_PRIORITY); 17251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= ((GENET_Q0_PRIORITY + priv->hw_params->tx_queues) << 20); 17261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_priority; 17271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_PRIORITY); 17281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Configure ring as descriptor ring and re-enable DMA if enabled */ 17301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 17311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 17321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dma_enable) 17331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= DMA_EN; 17341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 17351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 17361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_fini_dma(struct bcmgenet_priv *priv) 17381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 17391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i; 17401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable DMA */ 17421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, 0, DMA_CTRL); 17431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, 0, DMA_CTRL); 17441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (i = 0; i < priv->num_tx_bds; i++) { 17461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->tx_cbs[i].skb != NULL) { 17471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_kfree_skb(priv->tx_cbs[i].skb); 17481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->tx_cbs[i].skb = NULL; 17491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_free_rx_buffers(priv); 17531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->rx_cbs); 17541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli kfree(priv->tx_cbs); 17551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 17561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* init_edma: Initialize DMA control register */ 17581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_init_dma(struct bcmgenet_priv *priv) 17591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 17601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 17611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, priv->dev, "bcmgenet: init_edma\n"); 17631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* by default, enable ring 16 (descriptor based) */ 17651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_init_rx_ring(priv, DESC_INDEX, TOTAL_DESC); 17661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 17671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(priv->dev, "failed to initialize RX ring\n"); 17681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 17691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* init rDma */ 17721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE); 17731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Init tDma */ 17751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, DMA_MAX_BURST_LENGTH, DMA_SCB_BURST_SIZE); 17761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Initialize commont TX ring structures */ 17781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->tx_bds = priv->base + priv->hw_params->tdma_offset; 17791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->num_tx_bds = TOTAL_DESC; 17801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->tx_cbs = kzalloc(priv->num_tx_bds * sizeof(struct enet_cb), 17811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli GFP_KERNEL); 17821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->tx_cbs) { 17831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 17841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 17851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 17861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* initialize multi xmit queue */ 17881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_multiq(priv->dev); 17891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* initialize special ring 16 */ 17911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_init_tx_ring(priv, DESC_INDEX, GENET_DEFAULT_BD_CNT, 17921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params->tx_queues * priv->hw_params->bds_cnt, 17931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli TOTAL_DESC); 17941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 17961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 17971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 17981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* NAPI polling method*/ 17991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_poll(struct napi_struct *napi, int budget) 18001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = container_of(napi, 18021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv, napi); 18031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int work_done; 18041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* tx reclaim */ 18061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]); 18071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli work_done = bcmgenet_desc_rx(priv, budget); 18091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Advancing our consumer index*/ 18111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index += work_done; 18121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index &= DMA_C_INDEX_MASK; 18131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_ring_writel(priv, DESC_INDEX, 18141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_c_index, RDMA_CONS_INDEX); 18151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (work_done < budget) { 18161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli napi_complete(napi); 18171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 18181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_RXDMA_BDONE, INTRL2_CPU_MASK_CLEAR); 18191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return work_done; 18221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Interrupt bottom half */ 18251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_irq_task(struct work_struct *work) 18261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = container_of( 18281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli work, struct bcmgenet_priv, bcmgenet_irq_work); 18291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, "%s\n", __func__); 18311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Link UP/DOWN event */ 18331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if ((priv->hw_params->flags & GENET_HAS_MDIO_INTR) && 18341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (priv->irq0_stat & (UMAC_IRQ_LINK_UP|UMAC_IRQ_LINK_DOWN))) { 183580d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli phy_mac_interrupt(priv->phydev, 183680d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli priv->irq0_stat & UMAC_IRQ_LINK_UP); 18371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat &= ~(UMAC_IRQ_LINK_UP|UMAC_IRQ_LINK_DOWN); 18381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_isr1: interrupt handler for ring buffer. */ 18421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic irqreturn_t bcmgenet_isr1(int irq, void *dev_id) 18431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_id; 18451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned int index; 18461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Save irq status for bottom-half processing. */ 18481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq1_stat = 18491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) & 18501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ~priv->int1_mask; 18511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear inerrupts*/ 18521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); 18531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, 18551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "%s: IRQ=0x%x\n", __func__, priv->irq1_stat); 18561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Check the MBDONE interrupts. 18571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * packet is done, reclaim descriptors 18581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 18591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq1_stat & 0x0000ffff) { 18601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli index = 0; 18611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli for (index = 0; index < 16; index++) { 18621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq1_stat & (1 << index)) 18631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, 18641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli &priv->tx_rings[index]); 18651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return IRQ_HANDLED; 18681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 18691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* bcmgenet_isr0: Handle various interrupts. */ 18711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic irqreturn_t bcmgenet_isr0(int irq, void *dev_id) 18721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 18731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_id; 18741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Save irq status for bottom-half processing. */ 18761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat = 18771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT) & 18781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ~bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 18791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* clear inerrupts*/ 18801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 18811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, intr, priv->dev, 18831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "IRQ=0x%x\n", priv->irq0_stat); 18841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 18851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & (UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE)) { 18861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* We use NAPI(software interrupt throttling, if 18871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Rx Descriptor throttling is not used. 18881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * Disable interrupt, will be enabled in the poll method. 18891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 18901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (likely(napi_schedule_prep(&priv->napi))) { 18911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_intrl2_0_writel(priv, 18921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_RXDMA_BDONE, INTRL2_CPU_MASK_SET); 18931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli __napi_schedule(&priv->napi); 18941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 18961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & 18971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE)) { 18981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Tx reclaim */ 18991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]); 19001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (priv->irq0_stat & (UMAC_IRQ_PHY_DET_R | 19021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_PHY_DET_F | 19031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_LINK_UP | 19041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_LINK_DOWN | 19051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_HFB_SM | 19061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_HFB_MM | 19071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_IRQ_MPD_R)) { 19081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* all other interested interrupts handled in bottom half */ 19091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli schedule_work(&priv->bcmgenet_irq_work); 19101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if ((priv->hw_params->flags & GENET_HAS_MDIO_INTR) && 19131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat & (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR)) { 19141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0_stat &= ~(UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR); 19151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli wake_up(&priv->wq); 19161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 19171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return IRQ_HANDLED; 19191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_umac_reset(struct bcmgenet_priv *priv) 19221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 19241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rbuf_ctrl_get(priv); 19261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= BIT(1); 19271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, reg); 19281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 19291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~BIT(1); 19311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rbuf_ctrl_set(priv, reg); 19321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 19331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_hw_addr(struct bcmgenet_priv *priv, 19361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned char *addr) 19371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) | 19391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (addr[2] << 8) | addr[3], UMAC_MAC0); 19401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1); 19411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_wol_resume(struct bcmgenet_priv *priv) 19441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 19461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* From WOL-enabled suspend, switch to regular clock */ 19481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable(priv->clk_wol); 19491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* init umac registers to synchronize s/w with h/w */ 19501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = init_umac(priv); 19511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 19521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 19531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 195480d8e96d127a91dc3f298e9bb959473b9df1063aFlorian Fainelli phy_init_hw(priv->phydev); 19551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Speed settings must be restored */ 19561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_mii_config(priv->dev); 19571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 19591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Returns a reusable dma control register value */ 19621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic u32 bcmgenet_dma_disable(struct bcmgenet_priv *priv) 19631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 19651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 dma_ctrl; 19661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable DMA */ 19681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = 1 << (DESC_INDEX + DMA_RING_BUF_EN_SHIFT) | DMA_EN; 19691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 19701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~dma_ctrl; 19711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 19721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 19741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~dma_ctrl; 19751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 19761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 1, UMAC_TX_FLUSH); 19781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(10); 19791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_TX_FLUSH); 19801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return dma_ctrl; 19821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_enable_dma(struct bcmgenet_priv *priv, u32 dma_ctrl) 19851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 19861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 19871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 19891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 19901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 19911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 19921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 19931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= dma_ctrl; 19941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 19951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 19961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 1997909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_netif_start(struct net_device *dev) 1998909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 1999909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2000909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2001909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Start the network engine */ 2002909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli napi_enable(&priv->napi); 2003909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2004909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, true); 2005909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2006909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli if (phy_is_internal(priv->phydev)) 2007909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_power_up(priv, GENET_POWER_PASSIVE); 2008909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2009909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli netif_tx_start_all_queues(dev); 2010909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2011909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli phy_start(priv->phydev); 2012909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 2013909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 20141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_open(struct net_device *dev) 20151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 20171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned long dma_ctrl; 20181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 20201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, ifup, dev, "bcmgenet_open\n"); 20221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Turn on the clock */ 20241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 20251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_prepare_enable(priv->clk); 20261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* take MAC out of reset */ 20281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_reset(priv); 20291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = init_umac(priv); 20311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 20321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 20331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* disable ethernet MAC while updating its registers */ 2035e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, false); 20361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2037909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Make sure we reflect the value of CRC_CMD_FWD */ 2038909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 2039909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli priv->crc_fwd_en = !!(reg & CMD_CRC_FWD); 2040909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 20411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_hw_addr(priv, dev->dev_addr); 20421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (phy_is_internal(priv->phydev)) { 20441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); 20451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= EXT_ENERGY_DET_MASK; 20461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); 20471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 20481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2049909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli device_set_wakeup_capable(&dev->dev, 1); 2050909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 20511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable RX/TX DMA and flush TX queues */ 20521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dma_ctrl = bcmgenet_dma_disable(priv); 20531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Reinitialize TDMA and RDMA and SW housekeeping */ 20551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_init_dma(priv); 20561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) { 20571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "failed to initialize DMA\n"); 20581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_fini_dma; 20591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 20601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Always enable ring 16 - descriptor ring */ 20621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_enable_dma(priv, dma_ctrl); 20631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = request_irq(priv->irq0, bcmgenet_isr0, IRQF_SHARED, 20651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->name, priv); 20661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret < 0) { 20671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "can't request IRQ %d\n", priv->irq0); 20681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_fini_dma; 20691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 20701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = request_irq(priv->irq1, bcmgenet_isr1, IRQF_SHARED, 20721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->name, priv); 20731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret < 0) { 20741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_err(dev, "can't request IRQ %d\n", priv->irq1); 20751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_irq0; 20761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 20771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2078909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_netif_start(dev); 20791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 20811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_irq0: 20831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq0, dev); 20841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_fini_dma: 20851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 20861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_clk_disable: 20871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 20881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 20891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 20901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 20911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_dma_teardown(struct bcmgenet_priv *priv) 20931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 20941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret = 0; 20951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int timeout = 0; 20961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 20971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 20981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable TDMA to stop add more frames in TX DMA */ 20991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_CTRL); 21001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~DMA_EN; 21011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tdma_writel(priv, reg, DMA_CTRL); 21021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Check TDMA status register to confirm TDMA is disabled */ 21041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (timeout++ < DMA_TIMEOUT_VAL) { 21051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_tdma_readl(priv, DMA_STATUS); 21061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (reg & DMA_DISABLED) 21071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 21081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(1); 21101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (timeout == DMA_TIMEOUT_VAL) { 21131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(priv->dev, 21141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "Timed out while disabling TX DMA\n"); 21151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = -ETIMEDOUT; 21161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Wait 10ms for packet drain in both tx and rx dma */ 21191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli usleep_range(10000, 20000); 21201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable RDMA */ 21221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_CTRL); 21231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~DMA_EN; 21241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_rdma_writel(priv, reg, DMA_CTRL); 21251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli timeout = 0; 21271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Check RDMA status register to confirm RDMA is disabled */ 21281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli while (timeout++ < DMA_TIMEOUT_VAL) { 21291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_rdma_readl(priv, DMA_STATUS); 21301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (reg & DMA_DISABLED) 21311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli break; 21321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli udelay(1); 21341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (timeout == DMA_TIMEOUT_VAL) { 21371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(priv->dev, 21381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "Timed out while disabling RX DMA\n"); 21391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = -ETIMEDOUT; 21401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 21411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 21431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 21441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2145909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainellistatic void bcmgenet_netif_stop(struct net_device *dev) 2146909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli{ 2147909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 2148909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2149909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli netif_tx_stop_all_queues(dev); 2150909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli napi_disable(&priv->napi); 2151909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli phy_stop(priv->phydev); 2152909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2153909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_intr_disable(priv); 2154909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 2155909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli /* Wait for pending work items to complete. Since interrupts are 2156909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli * disabled no new work will be scheduled. 2157909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli */ 2158909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli cancel_work_sync(&priv->bcmgenet_irq_work); 2159909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli} 2160909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli 21611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_close(struct net_device *dev) 21621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 21631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 21641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int ret; 21651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, ifdown, dev, "bcmgenet_close\n"); 21671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2168909ff5efbab85f2724c5f91ec200ebc9df50c440Florian Fainelli bcmgenet_netif_stop(dev); 21691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable MAC receive */ 2171e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_RX_EN, false); 21721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ret = bcmgenet_dma_teardown(priv); 21741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (ret) 21751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return ret; 21761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Disable MAC transmit. TX DMA disabled have to done before this */ 2178e29585b8d8707686d3f8f66fdfd20d8c66fb5f6dFlorian Fainelli umac_enable_set(priv, CMD_TX_EN, false); 21791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* tx reclaim */ 21811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_tx_reclaim_all(dev); 21821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_fini_dma(priv); 21831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq0, priv); 21851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_irq(priv->irq1, priv); 21861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (phy_is_internal(priv->phydev)) 21881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_power_down(priv, GENET_POWER_PASSIVE); 21891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 21911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 21921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 21941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 21951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 21961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_timeout(struct net_device *dev) 21971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 21981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 21991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, tx_err, dev, "bcmgenet_timeout\n"); 22011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->trans_start = jiffies; 22031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->stats.tx_errors++; 22051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_tx_wake_all_queues(dev); 22071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#define MAX_MC_COUNT 16 22101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic inline void bcmgenet_set_mdf_addr(struct bcmgenet_priv *priv, 22121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unsigned char *addr, 22131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int *i, 22141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int *mc) 22151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 22171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 22191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr[0] << 8 | addr[1], UMAC_MDF_ADDR + (*i * 4)); 22201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 22211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr[2] << 24 | addr[3] << 16 | 22221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli addr[4] << 8 | addr[5], 22231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli UMAC_MDF_ADDR + ((*i + 1) * 4)); 22241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_MDF_CTRL); 22251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= (1 << (MAX_MC_COUNT - *mc)); 22261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_MDF_CTRL); 22271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli *i += 2; 22281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli (*mc)++; 22291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_rx_mode(struct net_device *dev) 22321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = netdev_priv(dev); 22341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct netdev_hw_addr *ha; 22351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int i, mc; 22361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 22371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_dbg(priv, hw, dev, "%s: %08X\n", __func__, dev->flags); 22391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Promiscous mode */ 22411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_umac_readl(priv, UMAC_CMD); 22421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dev->flags & IFF_PROMISC) { 22431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg |= CMD_PROMISC; 22441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 22451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, 0, UMAC_MDF_CTRL); 22461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else { 22481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg &= ~CMD_PROMISC; 22491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_umac_writel(priv, reg, UMAC_CMD); 22501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 22511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* UniMac doesn't support ALLMULTI */ 22531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (dev->flags & IFF_ALLMULTI) { 22541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_warn(dev, "ALLMULTI is not supported\n"); 22551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 22571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* update MDF filter */ 22591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli i = 0; 22601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli mc = 0; 22611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Broadcast */ 22621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, dev->broadcast, &i, &mc); 22631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* my own address.*/ 22641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, dev->dev_addr, &i, &mc); 22651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Unicast list*/ 22661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netdev_uc_count(dev) > (MAX_MC_COUNT - mc)) 22671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!netdev_uc_empty(dev)) 22701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_for_each_uc_addr(ha, dev) 22711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, ha->addr, &i, &mc); 22721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Multicast */ 22731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netdev_mc_empty(dev) || netdev_mc_count(dev) >= (MAX_MC_COUNT - mc)) 22741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return; 22751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_for_each_mc_addr(ha, dev) 22771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_mdf_addr(priv, ha->addr, &i, &mc); 22781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Set the hardware MAC address. */ 22811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_set_mac_addr(struct net_device *dev, void *p) 22821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 22831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct sockaddr *addr = p; 22841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Setting the MAC address at the hardware level is not possible 22861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * without disabling the UniMAC RX/TX enable bits. 22871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 22881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (netif_running(dev)) 22891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EBUSY; 22901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ether_addr_copy(dev->dev_addr, addr->sa_data); 22921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 22941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 22951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 22961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct net_device_ops bcmgenet_netdev_ops = { 22971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_open = bcmgenet_open, 22981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_stop = bcmgenet_close, 22991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_start_xmit = bcmgenet_xmit, 23001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_tx_timeout = bcmgenet_timeout, 23011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_rx_mode = bcmgenet_set_rx_mode, 23021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_mac_address = bcmgenet_set_mac_addr, 23031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_do_ioctl = bcmgenet_ioctl, 23041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .ndo_set_features = bcmgenet_set_features, 23051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 23061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Array of GENET hardware parameters/characteristics */ 23081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct bcmgenet_hw_params bcmgenet_hw_params[] = { 23091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V1] = { 23101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 0, 23111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 0, 23121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 0, 23131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 16, 23141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0xffff, 23151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 16, 23161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x1F, 23171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x1000, 23181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x2000, 23191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x3000, 23201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V2] = { 23231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 16, 23271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0xffff, 23281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 16, 23291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x1F, 23301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x1000, 23321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0x2000, 23331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x3000, 23341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x4000, 23351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_EXT, 23371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V3] = { 23391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 17, 23431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0x1ffff, 23441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 48, 23451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x3F, 23461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x8000, 23481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0xfc00, 23491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x10000, 23501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x11000, 23511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 2, 23521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_EXT | GENET_HAS_MDIO_INTR, 23531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli [GENET_V4] = { 23551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tx_queues = 4, 23561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rx_queues = 4, 23571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bds_cnt = 32, 23581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_en_shift = 17, 23591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .bp_in_mask = 0x1ffff, 23601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_filter_cnt = 48, 23611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .qtag_mask = 0x3F, 23621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tbuf_offset = 0x0600, 23631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_offset = 0x8000, 23641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .hfb_reg_offset = 0xfc00, 23651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .rdma_offset = 0x2000, 23661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .tdma_offset = 0x4000, 23671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .words_per_bd = 3, 23681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .flags = GENET_HAS_40BITS | GENET_HAS_EXT | GENET_HAS_MDIO_INTR, 23691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 23701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 23711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli/* Infer hardware parameters from the detected GENET version */ 23731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) 23741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 23751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_hw_params *params; 23761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u32 reg; 23771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli u8 major; 23781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 23791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (GENET_IS_V4(priv)) { 23801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus; 23811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v4; 23821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V3PLUS; 23831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V4; 23841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V3(priv)) { 23851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus; 23861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 23871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V3PLUS; 23881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V3; 23891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V2(priv)) { 23901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v2; 23911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 23921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V12; 23931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V2; 23941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } else if (GENET_IS_V1(priv)) { 23951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_dma_regs = bcmgenet_dma_regs_v1; 23961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli genet_dma_ring_regs = genet_dma_ring_regs_v123; 23971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dma_rx_chk_bit = DMA_RX_CHK_V12; 23981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = GENET_V1; 23991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24001c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* enum genet_version starts at 1 */ 24021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->hw_params = &bcmgenet_hw_params[priv->version]; 24031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params = priv->hw_params; 24041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Read GENET HW version */ 24061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli reg = bcmgenet_sys_readl(priv, SYS_REV_CTRL); 24071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = (reg >> 24 & 0x0f); 24081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (major == 5) 24091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = 4; 24101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli else if (major == 0) 24111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major = 1; 24121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (major != priv->version) { 24131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&priv->pdev->dev, 24141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "GENET version mismatch, got: %d, configured for: %d\n", 24151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major, priv->version); 24161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Print the GENET core version */ 24191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_info(&priv->pdev->dev, "GENET " GENET_VER_FMT, 24201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli major, (reg >> 16) & 0x0f, reg & 0xffff); 24211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#ifdef CONFIG_PHYS_ADDR_T_64BIT 24231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!(params->flags & GENET_HAS_40BITS)) 24241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli pr_warn("GENET does not support 40-bits PA\n"); 24251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli#endif 24261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli pr_debug("Configuration for version: %d\n" 24281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "TXq: %1d, RXq: %1d, BDs: %1d\n" 24291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "BP << en: %2d, BP msk: 0x%05x\n" 24301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "HFB count: %2d, QTAQ msk: 0x%05x\n" 24311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "TBUF: 0x%04x, HFB: 0x%04x, HFBreg: 0x%04x\n" 24321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "RDMA: 0x%05x, TDMA: 0x%05x\n" 24331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli "Words/BD: %d\n", 24341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version, 24351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->tx_queues, params->rx_queues, params->bds_cnt, 24361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->bp_in_en_shift, params->bp_in_mask, 24371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->hfb_filter_cnt, params->qtag_mask, 24381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->tbuf_offset, params->hfb_offset, 24391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->hfb_reg_offset, 24401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->rdma_offset, params->tdma_offset, 24411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli params->words_per_bd); 24421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 24431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic const struct of_device_id bcmgenet_match[] = { 24451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v1", .data = (void *)GENET_V1 }, 24461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v2", .data = (void *)GENET_V2 }, 24471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v3", .data = (void *)GENET_V3 }, 24481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { .compatible = "brcm,genet-v4", .data = (void *)GENET_V4 }, 24491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli { }, 24501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 24511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_probe(struct platform_device *pdev) 24531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 24541c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct device_node *dn = pdev->dev.of_node; 24551c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const struct of_device_id *of_id; 24561c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv; 24571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct net_device *dev; 24581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli const void *macaddr; 24591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct resource *r; 24601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli int err = -EIO; 24611c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24621c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Up to GENET_MAX_MQ_CNT + 1 TX queues and a single RX queue */ 24631c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev = alloc_etherdev_mqs(sizeof(*priv), GENET_MAX_MQ_CNT + 1, 1); 24641c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!dev) { 24651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't allocate net device\n"); 24661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -ENOMEM; 24671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli of_id = of_match_node(bcmgenet_match, dn); 24701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!of_id) 24711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return -EINVAL; 24721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv = netdev_priv(dev); 24741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq0 = platform_get_irq(pdev, 0); 24751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->irq1 = platform_get_irq(pdev, 1); 24761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!priv->irq0 || !priv->irq1) { 24771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't find IRQs\n"); 24781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = -EINVAL; 24791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 24801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli macaddr = of_get_mac_address(dn); 24831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!macaddr) { 24841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_err(&pdev->dev, "can't find MAC address\n"); 24851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = -EINVAL; 24861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 24871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 24905343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam priv->base = devm_ioremap_resource(&pdev->dev, r); 24915343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam if (IS_ERR(priv->base)) { 24925343a10d15362da46877d8f07b7c23d4c95f8277Fabio Estevam err = PTR_ERR(priv->base); 24931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err; 24941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli } 24951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 24961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli SET_NETDEV_DEV(dev, &pdev->dev); 24971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_set_drvdata(&pdev->dev, dev); 24981c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli ether_addr_copy(dev->dev_addr, macaddr); 24991c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->watchdog_timeo = 2 * HZ; 25007ad24ea4bf620a32631d7b3069c3e30c078b0c3eWilfried Klaebe dev->ethtool_ops = &bcmgenet_ethtool_ops; 25011c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->netdev_ops = &bcmgenet_netdev_ops; 25021c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_napi_add(dev, &priv->napi, bcmgenet_poll, 64); 25031c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25041c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->msg_enable = netif_msg_init(-1, GENET_MSG_DEFAULT); 25051c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25061c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set hardware features */ 25071c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->hw_features |= NETIF_F_SG | NETIF_F_IP_CSUM | 25081c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM; 25091c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25101c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Set the needed headroom to account for any possible 25111c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * features enabling/disabling at runtime 25121c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 25131c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev->needed_headroom += 64; 25141c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25151c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netdev_boot_setup_check(dev); 25161c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25171c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->dev = dev; 25181c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->pdev = pdev; 25191c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->version = (enum bcmgenet_version)of_id->data; 25201c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25211c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_set_hw_params(priv); 25221c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25231c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Mii wait queue */ 25241c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli init_waitqueue_head(&priv->wq); 25251c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Always use RX_BUF_LENGTH (2KB) buffer for all chips */ 25261c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->rx_buf_len = RX_BUF_LENGTH; 25271c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli INIT_WORK(&priv->bcmgenet_irq_work, bcmgenet_irq_task); 25281c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25291c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->clk = devm_clk_get(&priv->pdev->dev, "enet"); 25301c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (IS_ERR(priv->clk)) 25311c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_warn(&priv->pdev->dev, "failed to get enet clock\n"); 25321c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25331c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli priv->clk_wol = devm_clk_get(&priv->pdev->dev, "enet-wol"); 25341c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (IS_ERR(priv->clk_wol)) 25351c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_warn(&priv->pdev->dev, "failed to get enet-wol clock\n"); 25361c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25371c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 25381c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_prepare_enable(priv->clk); 25391c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25401c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = reset_umac(priv); 25411c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 25421c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 25431c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25441c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli err = bcmgenet_mii_init(dev); 25451c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (err) 25461c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli goto err_clk_disable; 25471c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25481c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* setup number of real queues + 1 (GENET_V1 has 0 hardware queues 25491c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli * just the ring 16 descriptor based TX 25501c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli */ 25511c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_set_real_num_tx_queues(priv->dev, priv->hw_params->tx_queues + 1); 25521c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1); 25531c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 2554219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli /* libphy will determine the link state */ 2555219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli netif_carrier_off(dev); 2556219575eb6311ad090e26c675a6e217f5d48780a3Florian Fainelli 25571c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli /* Turn off the main clock, WOL clock is handled separately */ 25581c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 25591c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 25601c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25610f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli err = register_netdev(dev); 25620f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli if (err) 25630f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli goto err; 25640f50ce96b7c0488cffe64255694a2451b4347d09Florian Fainelli 25651c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return err; 25661c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25671c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr_clk_disable: 25681c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli if (!IS_ERR(priv->clk)) 25691c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli clk_disable_unprepare(priv->clk); 25701c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellierr: 25711c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_netdev(dev); 25721c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return err; 25731c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 25741c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25751c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic int bcmgenet_remove(struct platform_device *pdev) 25761c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli{ 25771c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli struct bcmgenet_priv *priv = dev_to_priv(&pdev->dev); 25781c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25791c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli dev_set_drvdata(&pdev->dev, NULL); 25801c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli unregister_netdev(priv->dev); 25811c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli bcmgenet_mii_exit(priv->dev); 25821c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli free_netdev(priv->dev); 25831c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25841c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli return 0; 25851c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli} 25861c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25871c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellistatic struct platform_driver bcmgenet_driver = { 25881c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .probe = bcmgenet_probe, 25891c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .remove = bcmgenet_remove, 25901c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .driver = { 25911c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .name = "bcmgenet", 25921c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .owner = THIS_MODULE, 25931c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli .of_match_table = bcmgenet_match, 25941c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli }, 25951c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli}; 25961c1008c793fa46703a2fee469f4235e1c7984333Florian Fainellimodule_platform_driver(bcmgenet_driver); 25971c1008c793fa46703a2fee469f4235e1c7984333Florian Fainelli 25981c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_AUTHOR("Broadcom Corporation"); 25991c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_DESCRIPTION("Broadcom GENET Ethernet controller driver"); 26001c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_ALIAS("platform:bcmgenet"); 26011c1008c793fa46703a2fee469f4235e1c7984333Florian FainelliMODULE_LICENSE("GPL"); 2602