ixgbevf_main.c revision 77d5dfca41ef00dbe4368ba05297adc32d5e5741
1/******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26*******************************************************************************/ 27 28 29/****************************************************************************** 30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code 31******************************************************************************/ 32 33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35#include <linux/types.h> 36#include <linux/bitops.h> 37#include <linux/module.h> 38#include <linux/pci.h> 39#include <linux/netdevice.h> 40#include <linux/vmalloc.h> 41#include <linux/string.h> 42#include <linux/in.h> 43#include <linux/ip.h> 44#include <linux/tcp.h> 45#include <linux/ipv6.h> 46#include <linux/slab.h> 47#include <net/checksum.h> 48#include <net/ip6_checksum.h> 49#include <linux/ethtool.h> 50#include <linux/if.h> 51#include <linux/if_vlan.h> 52#include <linux/prefetch.h> 53 54#include "ixgbevf.h" 55 56const char ixgbevf_driver_name[] = "ixgbevf"; 57static const char ixgbevf_driver_string[] = 58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver"; 59 60#define DRV_VERSION "2.6.0-k" 61const char ixgbevf_driver_version[] = DRV_VERSION; 62static char ixgbevf_copyright[] = 63 "Copyright (c) 2009 - 2012 Intel Corporation."; 64 65static const struct ixgbevf_info *ixgbevf_info_tbl[] = { 66 [board_82599_vf] = &ixgbevf_82599_vf_info, 67 [board_X540_vf] = &ixgbevf_X540_vf_info, 68}; 69 70/* ixgbevf_pci_tbl - PCI Device ID Table 71 * 72 * Wildcard entries (PCI_ANY_ID) should come last 73 * Last entry must be all 0s 74 * 75 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 76 * Class, Class Mask, private data (not used) } 77 */ 78static struct pci_device_id ixgbevf_pci_tbl[] = { 79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), 80 board_82599_vf}, 81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), 82 board_X540_vf}, 83 84 /* required last entry */ 85 {0, } 86}; 87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); 88 89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 90MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver"); 91MODULE_LICENSE("GPL"); 92MODULE_VERSION(DRV_VERSION); 93 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 95static int debug = -1; 96module_param(debug, int, 0); 97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 98 99/* forward decls */ 100static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector); 101static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 102 u32 itr_reg); 103 104static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw, 105 struct ixgbevf_ring *rx_ring, 106 u32 val) 107{ 108 /* 109 * Force memory writes to complete before letting h/w 110 * know there are new descriptors to fetch. (Only 111 * applicable for weak-ordered memory model archs, 112 * such as IA-64). 113 */ 114 wmb(); 115 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val); 116} 117 118/** 119 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors 120 * @adapter: pointer to adapter struct 121 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 122 * @queue: queue to map the corresponding interrupt to 123 * @msix_vector: the vector to map to the corresponding queue 124 * 125 */ 126static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, 127 u8 queue, u8 msix_vector) 128{ 129 u32 ivar, index; 130 struct ixgbe_hw *hw = &adapter->hw; 131 if (direction == -1) { 132 /* other causes */ 133 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 134 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); 135 ivar &= ~0xFF; 136 ivar |= msix_vector; 137 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); 138 } else { 139 /* tx or rx causes */ 140 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 141 index = ((16 * (queue & 1)) + (8 * direction)); 142 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); 143 ivar &= ~(0xFF << index); 144 ivar |= (msix_vector << index); 145 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); 146 } 147} 148 149static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter, 150 struct ixgbevf_tx_buffer 151 *tx_buffer_info) 152{ 153 if (tx_buffer_info->dma) { 154 if (tx_buffer_info->mapped_as_page) 155 dma_unmap_page(&adapter->pdev->dev, 156 tx_buffer_info->dma, 157 tx_buffer_info->length, 158 DMA_TO_DEVICE); 159 else 160 dma_unmap_single(&adapter->pdev->dev, 161 tx_buffer_info->dma, 162 tx_buffer_info->length, 163 DMA_TO_DEVICE); 164 tx_buffer_info->dma = 0; 165 } 166 if (tx_buffer_info->skb) { 167 dev_kfree_skb_any(tx_buffer_info->skb); 168 tx_buffer_info->skb = NULL; 169 } 170 tx_buffer_info->time_stamp = 0; 171 /* tx_buffer_info must be completely set up in the transmit path */ 172} 173 174#define IXGBE_MAX_TXD_PWR 14 175#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) 176 177/* Tx Descriptors needed, worst case */ 178#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \ 179 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) 180#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \ 181 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */ 182 183static void ixgbevf_tx_timeout(struct net_device *netdev); 184 185/** 186 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes 187 * @adapter: board private structure 188 * @tx_ring: tx ring to clean 189 **/ 190static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter, 191 struct ixgbevf_ring *tx_ring) 192{ 193 struct net_device *netdev = adapter->netdev; 194 struct ixgbe_hw *hw = &adapter->hw; 195 union ixgbe_adv_tx_desc *tx_desc, *eop_desc; 196 struct ixgbevf_tx_buffer *tx_buffer_info; 197 unsigned int i, eop, count = 0; 198 unsigned int total_bytes = 0, total_packets = 0; 199 200 i = tx_ring->next_to_clean; 201 eop = tx_ring->tx_buffer_info[i].next_to_watch; 202 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 203 204 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) && 205 (count < tx_ring->work_limit)) { 206 bool cleaned = false; 207 rmb(); /* read buffer_info after eop_desc */ 208 /* eop could change between read and DD-check */ 209 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch)) 210 goto cont_loop; 211 for ( ; !cleaned; count++) { 212 struct sk_buff *skb; 213 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 214 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 215 cleaned = (i == eop); 216 skb = tx_buffer_info->skb; 217 218 if (cleaned && skb) { 219 unsigned int segs, bytecount; 220 221 /* gso_segs is currently only valid for tcp */ 222 segs = skb_shinfo(skb)->gso_segs ?: 1; 223 /* multiply data chunks by size of headers */ 224 bytecount = ((segs - 1) * skb_headlen(skb)) + 225 skb->len; 226 total_packets += segs; 227 total_bytes += bytecount; 228 } 229 230 ixgbevf_unmap_and_free_tx_resource(adapter, 231 tx_buffer_info); 232 233 tx_desc->wb.status = 0; 234 235 i++; 236 if (i == tx_ring->count) 237 i = 0; 238 } 239 240cont_loop: 241 eop = tx_ring->tx_buffer_info[i].next_to_watch; 242 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 243 } 244 245 tx_ring->next_to_clean = i; 246 247#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 248 if (unlikely(count && netif_carrier_ok(netdev) && 249 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) { 250 /* Make sure that anybody stopping the queue after this 251 * sees the new next_to_clean. 252 */ 253 smp_mb(); 254 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && 255 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 256 netif_wake_subqueue(netdev, tx_ring->queue_index); 257 ++adapter->restart_queue; 258 } 259 } 260 261 /* re-arm the interrupt */ 262 if ((count >= tx_ring->work_limit) && 263 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) { 264 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx); 265 } 266 267 u64_stats_update_begin(&tx_ring->syncp); 268 tx_ring->total_bytes += total_bytes; 269 tx_ring->total_packets += total_packets; 270 u64_stats_update_end(&tx_ring->syncp); 271 272 return count < tx_ring->work_limit; 273} 274 275/** 276 * ixgbevf_receive_skb - Send a completed packet up the stack 277 * @q_vector: structure containing interrupt and ring information 278 * @skb: packet to send up 279 * @status: hardware indication of status of receive 280 * @rx_ring: rx descriptor ring (for a specific queue) to setup 281 * @rx_desc: rx descriptor 282 **/ 283static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector, 284 struct sk_buff *skb, u8 status, 285 struct ixgbevf_ring *ring, 286 union ixgbe_adv_rx_desc *rx_desc) 287{ 288 struct ixgbevf_adapter *adapter = q_vector->adapter; 289 bool is_vlan = (status & IXGBE_RXD_STAT_VP); 290 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); 291 292 if (is_vlan && test_bit(tag, adapter->active_vlans)) 293 __vlan_hwaccel_put_tag(skb, tag); 294 295 napi_gro_receive(&q_vector->napi, skb); 296} 297 298/** 299 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum 300 * @adapter: address of board private structure 301 * @status_err: hardware indication of status of receive 302 * @skb: skb currently being received and modified 303 **/ 304static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter, 305 u32 status_err, struct sk_buff *skb) 306{ 307 skb_checksum_none_assert(skb); 308 309 /* Rx csum disabled */ 310 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED)) 311 return; 312 313 /* if IP and error */ 314 if ((status_err & IXGBE_RXD_STAT_IPCS) && 315 (status_err & IXGBE_RXDADV_ERR_IPE)) { 316 adapter->hw_csum_rx_error++; 317 return; 318 } 319 320 if (!(status_err & IXGBE_RXD_STAT_L4CS)) 321 return; 322 323 if (status_err & IXGBE_RXDADV_ERR_TCPE) { 324 adapter->hw_csum_rx_error++; 325 return; 326 } 327 328 /* It must be a TCP or UDP packet with a valid checksum */ 329 skb->ip_summed = CHECKSUM_UNNECESSARY; 330 adapter->hw_csum_rx_good++; 331} 332 333/** 334 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split 335 * @adapter: address of board private structure 336 **/ 337static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter, 338 struct ixgbevf_ring *rx_ring, 339 int cleaned_count) 340{ 341 struct pci_dev *pdev = adapter->pdev; 342 union ixgbe_adv_rx_desc *rx_desc; 343 struct ixgbevf_rx_buffer *bi; 344 struct sk_buff *skb; 345 unsigned int i; 346 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN; 347 348 i = rx_ring->next_to_use; 349 bi = &rx_ring->rx_buffer_info[i]; 350 351 while (cleaned_count--) { 352 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 353 skb = bi->skb; 354 if (!skb) { 355 skb = netdev_alloc_skb(adapter->netdev, 356 bufsz); 357 358 if (!skb) { 359 adapter->alloc_rx_buff_failed++; 360 goto no_buffers; 361 } 362 363 /* 364 * Make buffer alignment 2 beyond a 16 byte boundary 365 * this will result in a 16 byte aligned IP header after 366 * the 14 byte MAC header is removed 367 */ 368 skb_reserve(skb, NET_IP_ALIGN); 369 370 bi->skb = skb; 371 } 372 if (!bi->dma) { 373 bi->dma = dma_map_single(&pdev->dev, skb->data, 374 rx_ring->rx_buf_len, 375 DMA_FROM_DEVICE); 376 } 377 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); 378 379 i++; 380 if (i == rx_ring->count) 381 i = 0; 382 bi = &rx_ring->rx_buffer_info[i]; 383 } 384 385no_buffers: 386 if (rx_ring->next_to_use != i) { 387 rx_ring->next_to_use = i; 388 if (i-- == 0) 389 i = (rx_ring->count - 1); 390 391 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i); 392 } 393} 394 395static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, 396 u64 qmask) 397{ 398 u32 mask; 399 struct ixgbe_hw *hw = &adapter->hw; 400 401 mask = (qmask & 0xFFFFFFFF); 402 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 403} 404 405static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, 406 struct ixgbevf_ring *rx_ring, 407 int *work_done, int work_to_do) 408{ 409 struct ixgbevf_adapter *adapter = q_vector->adapter; 410 struct pci_dev *pdev = adapter->pdev; 411 union ixgbe_adv_rx_desc *rx_desc, *next_rxd; 412 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer; 413 struct sk_buff *skb; 414 unsigned int i; 415 u32 len, staterr; 416 bool cleaned = false; 417 int cleaned_count = 0; 418 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 419 420 i = rx_ring->next_to_clean; 421 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 422 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 423 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 424 425 while (staterr & IXGBE_RXD_STAT_DD) { 426 if (*work_done >= work_to_do) 427 break; 428 (*work_done)++; 429 430 rmb(); /* read descriptor and rx_buffer_info after status DD */ 431 len = le16_to_cpu(rx_desc->wb.upper.length); 432 cleaned = true; 433 skb = rx_buffer_info->skb; 434 prefetch(skb->data - NET_IP_ALIGN); 435 rx_buffer_info->skb = NULL; 436 437 if (rx_buffer_info->dma) { 438 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 439 rx_ring->rx_buf_len, 440 DMA_FROM_DEVICE); 441 rx_buffer_info->dma = 0; 442 skb_put(skb, len); 443 } 444 445 i++; 446 if (i == rx_ring->count) 447 i = 0; 448 449 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i); 450 prefetch(next_rxd); 451 cleaned_count++; 452 453 next_buffer = &rx_ring->rx_buffer_info[i]; 454 455 if (!(staterr & IXGBE_RXD_STAT_EOP)) { 456 skb->next = next_buffer->skb; 457 skb->next->prev = skb; 458 adapter->non_eop_descs++; 459 goto next_desc; 460 } 461 462 /* ERR_MASK will only have valid bits if EOP set */ 463 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) { 464 dev_kfree_skb_irq(skb); 465 goto next_desc; 466 } 467 468 ixgbevf_rx_checksum(adapter, staterr, skb); 469 470 /* probably a little skewed due to removing CRC */ 471 total_rx_bytes += skb->len; 472 total_rx_packets++; 473 474 /* 475 * Work around issue of some types of VM to VM loop back 476 * packets not getting split correctly 477 */ 478 if (staterr & IXGBE_RXD_STAT_LB) { 479 u32 header_fixup_len = skb_headlen(skb); 480 if (header_fixup_len < 14) 481 skb_push(skb, header_fixup_len); 482 } 483 skb->protocol = eth_type_trans(skb, adapter->netdev); 484 485 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc); 486 487next_desc: 488 rx_desc->wb.upper.status_error = 0; 489 490 /* return some buffers to hardware, one at a time is too slow */ 491 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { 492 ixgbevf_alloc_rx_buffers(adapter, rx_ring, 493 cleaned_count); 494 cleaned_count = 0; 495 } 496 497 /* use prefetched values */ 498 rx_desc = next_rxd; 499 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 500 501 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 502 } 503 504 rx_ring->next_to_clean = i; 505 cleaned_count = IXGBE_DESC_UNUSED(rx_ring); 506 507 if (cleaned_count) 508 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count); 509 510 u64_stats_update_begin(&rx_ring->syncp); 511 rx_ring->total_packets += total_rx_packets; 512 rx_ring->total_bytes += total_rx_bytes; 513 u64_stats_update_end(&rx_ring->syncp); 514 515 return cleaned; 516} 517 518/** 519 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine 520 * @napi: napi struct with our devices info in it 521 * @budget: amount of work driver is allowed to do this pass, in packets 522 * 523 * This function is optimized for cleaning one queue only on a single 524 * q_vector!!! 525 **/ 526static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget) 527{ 528 struct ixgbevf_q_vector *q_vector = 529 container_of(napi, struct ixgbevf_q_vector, napi); 530 struct ixgbevf_adapter *adapter = q_vector->adapter; 531 struct ixgbevf_ring *rx_ring = NULL; 532 int work_done = 0; 533 long r_idx; 534 535 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 536 rx_ring = &(adapter->rx_ring[r_idx]); 537 538 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 539 540 /* If all Rx work done, exit the polling mode */ 541 if (work_done < budget) { 542 napi_complete(napi); 543 if (adapter->itr_setting & 1) 544 ixgbevf_set_itr_msix(q_vector); 545 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 546 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx); 547 } 548 549 return work_done; 550} 551 552/** 553 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine 554 * @napi: napi struct with our devices info in it 555 * @budget: amount of work driver is allowed to do this pass, in packets 556 * 557 * This function will clean more than one rx queue associated with a 558 * q_vector. 559 **/ 560static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget) 561{ 562 struct ixgbevf_q_vector *q_vector = 563 container_of(napi, struct ixgbevf_q_vector, napi); 564 struct ixgbevf_adapter *adapter = q_vector->adapter; 565 struct ixgbevf_ring *rx_ring = NULL; 566 int work_done = 0, i; 567 long r_idx; 568 u64 enable_mask = 0; 569 570 /* attempt to distribute budget to each queue fairly, but don't allow 571 * the budget to go below 1 because we'll exit polling */ 572 budget /= (q_vector->rxr_count ?: 1); 573 budget = max(budget, 1); 574 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 575 for (i = 0; i < q_vector->rxr_count; i++) { 576 rx_ring = &(adapter->rx_ring[r_idx]); 577 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 578 enable_mask |= rx_ring->v_idx; 579 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 580 r_idx + 1); 581 } 582 583 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 584 rx_ring = &(adapter->rx_ring[r_idx]); 585 586 /* If all Rx work done, exit the polling mode */ 587 if (work_done < budget) { 588 napi_complete(napi); 589 if (adapter->itr_setting & 1) 590 ixgbevf_set_itr_msix(q_vector); 591 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 592 ixgbevf_irq_enable_queues(adapter, enable_mask); 593 } 594 595 return work_done; 596} 597 598 599/** 600 * ixgbevf_configure_msix - Configure MSI-X hardware 601 * @adapter: board private structure 602 * 603 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X 604 * interrupts. 605 **/ 606static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) 607{ 608 struct ixgbevf_q_vector *q_vector; 609 struct ixgbe_hw *hw = &adapter->hw; 610 int i, j, q_vectors, v_idx, r_idx; 611 u32 mask; 612 613 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 614 615 /* 616 * Populate the IVAR table and set the ITR values to the 617 * corresponding register. 618 */ 619 for (v_idx = 0; v_idx < q_vectors; v_idx++) { 620 q_vector = adapter->q_vector[v_idx]; 621 /* XXX for_each_set_bit(...) */ 622 r_idx = find_first_bit(q_vector->rxr_idx, 623 adapter->num_rx_queues); 624 625 for (i = 0; i < q_vector->rxr_count; i++) { 626 j = adapter->rx_ring[r_idx].reg_idx; 627 ixgbevf_set_ivar(adapter, 0, j, v_idx); 628 r_idx = find_next_bit(q_vector->rxr_idx, 629 adapter->num_rx_queues, 630 r_idx + 1); 631 } 632 r_idx = find_first_bit(q_vector->txr_idx, 633 adapter->num_tx_queues); 634 635 for (i = 0; i < q_vector->txr_count; i++) { 636 j = adapter->tx_ring[r_idx].reg_idx; 637 ixgbevf_set_ivar(adapter, 1, j, v_idx); 638 r_idx = find_next_bit(q_vector->txr_idx, 639 adapter->num_tx_queues, 640 r_idx + 1); 641 } 642 643 /* if this is a tx only vector halve the interrupt rate */ 644 if (q_vector->txr_count && !q_vector->rxr_count) 645 q_vector->eitr = (adapter->eitr_param >> 1); 646 else if (q_vector->rxr_count) 647 /* rx only */ 648 q_vector->eitr = adapter->eitr_param; 649 650 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr); 651 } 652 653 ixgbevf_set_ivar(adapter, -1, 1, v_idx); 654 655 /* set up to autoclear timer, and the vectors */ 656 mask = IXGBE_EIMS_ENABLE_MASK; 657 mask &= ~IXGBE_EIMS_OTHER; 658 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask); 659} 660 661enum latency_range { 662 lowest_latency = 0, 663 low_latency = 1, 664 bulk_latency = 2, 665 latency_invalid = 255 666}; 667 668/** 669 * ixgbevf_update_itr - update the dynamic ITR value based on statistics 670 * @adapter: pointer to adapter 671 * @eitr: eitr setting (ints per sec) to give last timeslice 672 * @itr_setting: current throttle rate in ints/second 673 * @packets: the number of packets during this measurement interval 674 * @bytes: the number of bytes during this measurement interval 675 * 676 * Stores a new ITR value based on packets and byte 677 * counts during the last interrupt. The advantage of per interrupt 678 * computation is faster updates and more accurate ITR for the current 679 * traffic pattern. Constants in this function were computed 680 * based on theoretical maximum wire speed and thresholds were set based 681 * on testing data as well as attempting to minimize response time 682 * while increasing bulk throughput. 683 **/ 684static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter, 685 u32 eitr, u8 itr_setting, 686 int packets, int bytes) 687{ 688 unsigned int retval = itr_setting; 689 u32 timepassed_us; 690 u64 bytes_perint; 691 692 if (packets == 0) 693 goto update_itr_done; 694 695 696 /* simple throttlerate management 697 * 0-20MB/s lowest (100000 ints/s) 698 * 20-100MB/s low (20000 ints/s) 699 * 100-1249MB/s bulk (8000 ints/s) 700 */ 701 /* what was last interrupt timeslice? */ 702 timepassed_us = 1000000/eitr; 703 bytes_perint = bytes / timepassed_us; /* bytes/usec */ 704 705 switch (itr_setting) { 706 case lowest_latency: 707 if (bytes_perint > adapter->eitr_low) 708 retval = low_latency; 709 break; 710 case low_latency: 711 if (bytes_perint > adapter->eitr_high) 712 retval = bulk_latency; 713 else if (bytes_perint <= adapter->eitr_low) 714 retval = lowest_latency; 715 break; 716 case bulk_latency: 717 if (bytes_perint <= adapter->eitr_high) 718 retval = low_latency; 719 break; 720 } 721 722update_itr_done: 723 return retval; 724} 725 726/** 727 * ixgbevf_write_eitr - write VTEITR register in hardware specific way 728 * @adapter: pointer to adapter struct 729 * @v_idx: vector index into q_vector array 730 * @itr_reg: new value to be written in *register* format, not ints/s 731 * 732 * This function is made to be called by ethtool and by the driver 733 * when it needs to update VTEITR registers at runtime. Hardware 734 * specific quirks/differences are taken care of here. 735 */ 736static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 737 u32 itr_reg) 738{ 739 struct ixgbe_hw *hw = &adapter->hw; 740 741 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg); 742 743 /* 744 * set the WDIS bit to not clear the timer bits and cause an 745 * immediate assertion of the interrupt 746 */ 747 itr_reg |= IXGBE_EITR_CNT_WDIS; 748 749 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); 750} 751 752static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector) 753{ 754 struct ixgbevf_adapter *adapter = q_vector->adapter; 755 u32 new_itr; 756 u8 current_itr, ret_itr; 757 int i, r_idx, v_idx = q_vector->v_idx; 758 struct ixgbevf_ring *rx_ring, *tx_ring; 759 760 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 761 for (i = 0; i < q_vector->txr_count; i++) { 762 tx_ring = &(adapter->tx_ring[r_idx]); 763 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 764 q_vector->tx_itr, 765 tx_ring->total_packets, 766 tx_ring->total_bytes); 767 /* if the result for this queue would decrease interrupt 768 * rate for this vector then use that result */ 769 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ? 770 q_vector->tx_itr - 1 : ret_itr); 771 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 772 r_idx + 1); 773 } 774 775 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 776 for (i = 0; i < q_vector->rxr_count; i++) { 777 rx_ring = &(adapter->rx_ring[r_idx]); 778 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 779 q_vector->rx_itr, 780 rx_ring->total_packets, 781 rx_ring->total_bytes); 782 /* if the result for this queue would decrease interrupt 783 * rate for this vector then use that result */ 784 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ? 785 q_vector->rx_itr - 1 : ret_itr); 786 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 787 r_idx + 1); 788 } 789 790 current_itr = max(q_vector->rx_itr, q_vector->tx_itr); 791 792 switch (current_itr) { 793 /* counts and packets in update_itr are dependent on these numbers */ 794 case lowest_latency: 795 new_itr = 100000; 796 break; 797 case low_latency: 798 new_itr = 20000; /* aka hwitr = ~200 */ 799 break; 800 case bulk_latency: 801 default: 802 new_itr = 8000; 803 break; 804 } 805 806 if (new_itr != q_vector->eitr) { 807 u32 itr_reg; 808 809 /* save the algorithm value here, not the smoothed one */ 810 q_vector->eitr = new_itr; 811 /* do an exponential smoothing */ 812 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); 813 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); 814 ixgbevf_write_eitr(adapter, v_idx, itr_reg); 815 } 816} 817 818static irqreturn_t ixgbevf_msix_mbx(int irq, void *data) 819{ 820 struct net_device *netdev = data; 821 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 822 struct ixgbe_hw *hw = &adapter->hw; 823 u32 eicr; 824 u32 msg; 825 bool got_ack = false; 826 827 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS); 828 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr); 829 830 if (!hw->mbx.ops.check_for_ack(hw)) 831 got_ack = true; 832 833 if (!hw->mbx.ops.check_for_msg(hw)) { 834 hw->mbx.ops.read(hw, &msg, 1); 835 836 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG) 837 mod_timer(&adapter->watchdog_timer, 838 round_jiffies(jiffies + 1)); 839 840 if (msg & IXGBE_VT_MSGTYPE_NACK) 841 pr_warn("Last Request of type %2.2x to PF Nacked\n", 842 msg & 0xFF); 843 /* 844 * Restore the PFSTS bit in case someone is polling for a 845 * return message from the PF 846 */ 847 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFSTS; 848 } 849 850 /* 851 * checking for the ack clears the PFACK bit. Place 852 * it back in the v2p_mailbox cache so that anyone 853 * polling for an ack will not miss it 854 */ 855 if (got_ack) 856 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK; 857 858 return IRQ_HANDLED; 859} 860 861static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data) 862{ 863 struct ixgbevf_q_vector *q_vector = data; 864 struct ixgbevf_adapter *adapter = q_vector->adapter; 865 struct ixgbevf_ring *tx_ring; 866 int i, r_idx; 867 868 if (!q_vector->txr_count) 869 return IRQ_HANDLED; 870 871 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 872 for (i = 0; i < q_vector->txr_count; i++) { 873 tx_ring = &(adapter->tx_ring[r_idx]); 874 tx_ring->total_bytes = 0; 875 tx_ring->total_packets = 0; 876 ixgbevf_clean_tx_irq(adapter, tx_ring); 877 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 878 r_idx + 1); 879 } 880 881 if (adapter->itr_setting & 1) 882 ixgbevf_set_itr_msix(q_vector); 883 884 return IRQ_HANDLED; 885} 886 887/** 888 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues) 889 * @irq: unused 890 * @data: pointer to our q_vector struct for this interrupt vector 891 **/ 892static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data) 893{ 894 struct ixgbevf_q_vector *q_vector = data; 895 struct ixgbevf_adapter *adapter = q_vector->adapter; 896 struct ixgbe_hw *hw = &adapter->hw; 897 struct ixgbevf_ring *rx_ring; 898 int r_idx; 899 int i; 900 901 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 902 for (i = 0; i < q_vector->rxr_count; i++) { 903 rx_ring = &(adapter->rx_ring[r_idx]); 904 rx_ring->total_bytes = 0; 905 rx_ring->total_packets = 0; 906 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 907 r_idx + 1); 908 } 909 910 if (!q_vector->rxr_count) 911 return IRQ_HANDLED; 912 913 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 914 rx_ring = &(adapter->rx_ring[r_idx]); 915 /* disable interrupts on this vector only */ 916 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx); 917 napi_schedule(&q_vector->napi); 918 919 920 return IRQ_HANDLED; 921} 922 923static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data) 924{ 925 ixgbevf_msix_clean_rx(irq, data); 926 ixgbevf_msix_clean_tx(irq, data); 927 928 return IRQ_HANDLED; 929} 930 931static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx, 932 int r_idx) 933{ 934 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 935 936 set_bit(r_idx, q_vector->rxr_idx); 937 q_vector->rxr_count++; 938 a->rx_ring[r_idx].v_idx = 1 << v_idx; 939} 940 941static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx, 942 int t_idx) 943{ 944 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 945 946 set_bit(t_idx, q_vector->txr_idx); 947 q_vector->txr_count++; 948 a->tx_ring[t_idx].v_idx = 1 << v_idx; 949} 950 951/** 952 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors 953 * @adapter: board private structure to initialize 954 * 955 * This function maps descriptor rings to the queue-specific vectors 956 * we were allotted through the MSI-X enabling code. Ideally, we'd have 957 * one vector per ring/queue, but on a constrained vector budget, we 958 * group the rings as "efficiently" as possible. You would add new 959 * mapping configurations in here. 960 **/ 961static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter) 962{ 963 int q_vectors; 964 int v_start = 0; 965 int rxr_idx = 0, txr_idx = 0; 966 int rxr_remaining = adapter->num_rx_queues; 967 int txr_remaining = adapter->num_tx_queues; 968 int i, j; 969 int rqpv, tqpv; 970 int err = 0; 971 972 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 973 974 /* 975 * The ideal configuration... 976 * We have enough vectors to map one per queue. 977 */ 978 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) { 979 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) 980 map_vector_to_rxq(adapter, v_start, rxr_idx); 981 982 for (; txr_idx < txr_remaining; v_start++, txr_idx++) 983 map_vector_to_txq(adapter, v_start, txr_idx); 984 goto out; 985 } 986 987 /* 988 * If we don't have enough vectors for a 1-to-1 989 * mapping, we'll have to group them so there are 990 * multiple queues per vector. 991 */ 992 /* Re-adjusting *qpv takes care of the remainder. */ 993 for (i = v_start; i < q_vectors; i++) { 994 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i); 995 for (j = 0; j < rqpv; j++) { 996 map_vector_to_rxq(adapter, i, rxr_idx); 997 rxr_idx++; 998 rxr_remaining--; 999 } 1000 } 1001 for (i = v_start; i < q_vectors; i++) { 1002 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i); 1003 for (j = 0; j < tqpv; j++) { 1004 map_vector_to_txq(adapter, i, txr_idx); 1005 txr_idx++; 1006 txr_remaining--; 1007 } 1008 } 1009 1010out: 1011 return err; 1012} 1013 1014/** 1015 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts 1016 * @adapter: board private structure 1017 * 1018 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests 1019 * interrupts from the kernel. 1020 **/ 1021static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) 1022{ 1023 struct net_device *netdev = adapter->netdev; 1024 irqreturn_t (*handler)(int, void *); 1025 int i, vector, q_vectors, err; 1026 int ri = 0, ti = 0; 1027 1028 /* Decrement for Other and TCP Timer vectors */ 1029 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1030 1031#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \ 1032 ? &ixgbevf_msix_clean_many : \ 1033 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \ 1034 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \ 1035 NULL) 1036 for (vector = 0; vector < q_vectors; vector++) { 1037 handler = SET_HANDLER(adapter->q_vector[vector]); 1038 1039 if (handler == &ixgbevf_msix_clean_rx) { 1040 sprintf(adapter->name[vector], "%s-%s-%d", 1041 netdev->name, "rx", ri++); 1042 } else if (handler == &ixgbevf_msix_clean_tx) { 1043 sprintf(adapter->name[vector], "%s-%s-%d", 1044 netdev->name, "tx", ti++); 1045 } else if (handler == &ixgbevf_msix_clean_many) { 1046 sprintf(adapter->name[vector], "%s-%s-%d", 1047 netdev->name, "TxRx", vector); 1048 } else { 1049 /* skip this unused q_vector */ 1050 continue; 1051 } 1052 err = request_irq(adapter->msix_entries[vector].vector, 1053 handler, 0, adapter->name[vector], 1054 adapter->q_vector[vector]); 1055 if (err) { 1056 hw_dbg(&adapter->hw, 1057 "request_irq failed for MSIX interrupt " 1058 "Error: %d\n", err); 1059 goto free_queue_irqs; 1060 } 1061 } 1062 1063 sprintf(adapter->name[vector], "%s:mbx", netdev->name); 1064 err = request_irq(adapter->msix_entries[vector].vector, 1065 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev); 1066 if (err) { 1067 hw_dbg(&adapter->hw, 1068 "request_irq for msix_mbx failed: %d\n", err); 1069 goto free_queue_irqs; 1070 } 1071 1072 return 0; 1073 1074free_queue_irqs: 1075 for (i = vector - 1; i >= 0; i--) 1076 free_irq(adapter->msix_entries[--vector].vector, 1077 &(adapter->q_vector[i])); 1078 pci_disable_msix(adapter->pdev); 1079 kfree(adapter->msix_entries); 1080 adapter->msix_entries = NULL; 1081 return err; 1082} 1083 1084static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter) 1085{ 1086 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1087 1088 for (i = 0; i < q_vectors; i++) { 1089 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i]; 1090 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES); 1091 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES); 1092 q_vector->rxr_count = 0; 1093 q_vector->txr_count = 0; 1094 q_vector->eitr = adapter->eitr_param; 1095 } 1096} 1097 1098/** 1099 * ixgbevf_request_irq - initialize interrupts 1100 * @adapter: board private structure 1101 * 1102 * Attempts to configure interrupts using the best available 1103 * capabilities of the hardware and kernel. 1104 **/ 1105static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) 1106{ 1107 int err = 0; 1108 1109 err = ixgbevf_request_msix_irqs(adapter); 1110 1111 if (err) 1112 hw_dbg(&adapter->hw, 1113 "request_irq failed, Error %d\n", err); 1114 1115 return err; 1116} 1117 1118static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) 1119{ 1120 struct net_device *netdev = adapter->netdev; 1121 int i, q_vectors; 1122 1123 q_vectors = adapter->num_msix_vectors; 1124 1125 i = q_vectors - 1; 1126 1127 free_irq(adapter->msix_entries[i].vector, netdev); 1128 i--; 1129 1130 for (; i >= 0; i--) { 1131 free_irq(adapter->msix_entries[i].vector, 1132 adapter->q_vector[i]); 1133 } 1134 1135 ixgbevf_reset_q_vectors(adapter); 1136} 1137 1138/** 1139 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC 1140 * @adapter: board private structure 1141 **/ 1142static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) 1143{ 1144 int i; 1145 struct ixgbe_hw *hw = &adapter->hw; 1146 1147 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); 1148 1149 IXGBE_WRITE_FLUSH(hw); 1150 1151 for (i = 0; i < adapter->num_msix_vectors; i++) 1152 synchronize_irq(adapter->msix_entries[i].vector); 1153} 1154 1155/** 1156 * ixgbevf_irq_enable - Enable default interrupt generation settings 1157 * @adapter: board private structure 1158 **/ 1159static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter, 1160 bool queues, bool flush) 1161{ 1162 struct ixgbe_hw *hw = &adapter->hw; 1163 u32 mask; 1164 u64 qmask; 1165 1166 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 1167 qmask = ~0; 1168 1169 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 1170 1171 if (queues) 1172 ixgbevf_irq_enable_queues(adapter, qmask); 1173 1174 if (flush) 1175 IXGBE_WRITE_FLUSH(hw); 1176} 1177 1178/** 1179 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset 1180 * @adapter: board private structure 1181 * 1182 * Configure the Tx unit of the MAC after a reset. 1183 **/ 1184static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) 1185{ 1186 u64 tdba; 1187 struct ixgbe_hw *hw = &adapter->hw; 1188 u32 i, j, tdlen, txctrl; 1189 1190 /* Setup the HW Tx Head and Tail descriptor pointers */ 1191 for (i = 0; i < adapter->num_tx_queues; i++) { 1192 struct ixgbevf_ring *ring = &adapter->tx_ring[i]; 1193 j = ring->reg_idx; 1194 tdba = ring->dma; 1195 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc); 1196 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j), 1197 (tdba & DMA_BIT_MASK(32))); 1198 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32)); 1199 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen); 1200 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0); 1201 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0); 1202 adapter->tx_ring[i].head = IXGBE_VFTDH(j); 1203 adapter->tx_ring[i].tail = IXGBE_VFTDT(j); 1204 /* Disable Tx Head Writeback RO bit, since this hoses 1205 * bookkeeping if things aren't delivered in order. 1206 */ 1207 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j)); 1208 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; 1209 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl); 1210 } 1211} 1212 1213#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 1214 1215static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index) 1216{ 1217 struct ixgbevf_ring *rx_ring; 1218 struct ixgbe_hw *hw = &adapter->hw; 1219 u32 srrctl; 1220 1221 rx_ring = &adapter->rx_ring[index]; 1222 1223 srrctl = IXGBE_SRRCTL_DROP_EN; 1224 1225 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1226 1227 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) 1228 srrctl |= IXGBEVF_RXBUFFER_2048 >> 1229 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1230 else 1231 srrctl |= rx_ring->rx_buf_len >> 1232 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1233 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); 1234} 1235 1236/** 1237 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset 1238 * @adapter: board private structure 1239 * 1240 * Configure the Rx unit of the MAC after a reset. 1241 **/ 1242static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) 1243{ 1244 u64 rdba; 1245 struct ixgbe_hw *hw = &adapter->hw; 1246 struct net_device *netdev = adapter->netdev; 1247 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1248 int i, j; 1249 u32 rdlen; 1250 int rx_buf_len; 1251 1252 /* PSRTYPE must be initialized in 82599 */ 1253 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 1254 if (netdev->mtu <= ETH_DATA_LEN) 1255 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1256 else 1257 rx_buf_len = ALIGN(max_frame, 1024); 1258 1259 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); 1260 /* Setup the HW Rx Head and Tail Descriptor Pointers and 1261 * the Base and Length of the Rx Descriptor Ring */ 1262 for (i = 0; i < adapter->num_rx_queues; i++) { 1263 rdba = adapter->rx_ring[i].dma; 1264 j = adapter->rx_ring[i].reg_idx; 1265 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j), 1266 (rdba & DMA_BIT_MASK(32))); 1267 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32)); 1268 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen); 1269 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0); 1270 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0); 1271 adapter->rx_ring[i].head = IXGBE_VFRDH(j); 1272 adapter->rx_ring[i].tail = IXGBE_VFRDT(j); 1273 adapter->rx_ring[i].rx_buf_len = rx_buf_len; 1274 1275 ixgbevf_configure_srrctl(adapter, j); 1276 } 1277} 1278 1279static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1280{ 1281 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1282 struct ixgbe_hw *hw = &adapter->hw; 1283 1284 /* add VID to filter table */ 1285 if (hw->mac.ops.set_vfta) 1286 hw->mac.ops.set_vfta(hw, vid, 0, true); 1287 set_bit(vid, adapter->active_vlans); 1288 1289 return 0; 1290} 1291 1292static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1293{ 1294 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1295 struct ixgbe_hw *hw = &adapter->hw; 1296 1297 /* remove VID from filter table */ 1298 if (hw->mac.ops.set_vfta) 1299 hw->mac.ops.set_vfta(hw, vid, 0, false); 1300 clear_bit(vid, adapter->active_vlans); 1301 1302 return 0; 1303} 1304 1305static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) 1306{ 1307 u16 vid; 1308 1309 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 1310 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid); 1311} 1312 1313static int ixgbevf_write_uc_addr_list(struct net_device *netdev) 1314{ 1315 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1316 struct ixgbe_hw *hw = &adapter->hw; 1317 int count = 0; 1318 1319 if ((netdev_uc_count(netdev)) > 10) { 1320 pr_err("Too many unicast filters - No Space\n"); 1321 return -ENOSPC; 1322 } 1323 1324 if (!netdev_uc_empty(netdev)) { 1325 struct netdev_hw_addr *ha; 1326 netdev_for_each_uc_addr(ha, netdev) { 1327 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr); 1328 udelay(200); 1329 } 1330 } else { 1331 /* 1332 * If the list is empty then send message to PF driver to 1333 * clear all macvlans on this VF. 1334 */ 1335 hw->mac.ops.set_uc_addr(hw, 0, NULL); 1336 } 1337 1338 return count; 1339} 1340 1341/** 1342 * ixgbevf_set_rx_mode - Multicast set 1343 * @netdev: network interface device structure 1344 * 1345 * The set_rx_method entry point is called whenever the multicast address 1346 * list or the network interface flags are updated. This routine is 1347 * responsible for configuring the hardware for proper multicast mode. 1348 **/ 1349static void ixgbevf_set_rx_mode(struct net_device *netdev) 1350{ 1351 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1352 struct ixgbe_hw *hw = &adapter->hw; 1353 1354 /* reprogram multicast list */ 1355 if (hw->mac.ops.update_mc_addr_list) 1356 hw->mac.ops.update_mc_addr_list(hw, netdev); 1357 1358 ixgbevf_write_uc_addr_list(netdev); 1359} 1360 1361static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) 1362{ 1363 int q_idx; 1364 struct ixgbevf_q_vector *q_vector; 1365 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1366 1367 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1368 struct napi_struct *napi; 1369 q_vector = adapter->q_vector[q_idx]; 1370 if (!q_vector->rxr_count) 1371 continue; 1372 napi = &q_vector->napi; 1373 if (q_vector->rxr_count > 1) 1374 napi->poll = &ixgbevf_clean_rxonly_many; 1375 1376 napi_enable(napi); 1377 } 1378} 1379 1380static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) 1381{ 1382 int q_idx; 1383 struct ixgbevf_q_vector *q_vector; 1384 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1385 1386 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1387 q_vector = adapter->q_vector[q_idx]; 1388 if (!q_vector->rxr_count) 1389 continue; 1390 napi_disable(&q_vector->napi); 1391 } 1392} 1393 1394static void ixgbevf_configure(struct ixgbevf_adapter *adapter) 1395{ 1396 struct net_device *netdev = adapter->netdev; 1397 int i; 1398 1399 ixgbevf_set_rx_mode(netdev); 1400 1401 ixgbevf_restore_vlan(adapter); 1402 1403 ixgbevf_configure_tx(adapter); 1404 ixgbevf_configure_rx(adapter); 1405 for (i = 0; i < adapter->num_rx_queues; i++) { 1406 struct ixgbevf_ring *ring = &adapter->rx_ring[i]; 1407 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count); 1408 ring->next_to_use = ring->count - 1; 1409 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail); 1410 } 1411} 1412 1413#define IXGBE_MAX_RX_DESC_POLL 10 1414static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, 1415 int rxr) 1416{ 1417 struct ixgbe_hw *hw = &adapter->hw; 1418 int j = adapter->rx_ring[rxr].reg_idx; 1419 int k; 1420 1421 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) { 1422 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE) 1423 break; 1424 else 1425 msleep(1); 1426 } 1427 if (k >= IXGBE_MAX_RX_DESC_POLL) { 1428 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d " 1429 "not set within the polling period\n", rxr); 1430 } 1431 1432 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr], 1433 (adapter->rx_ring[rxr].count - 1)); 1434} 1435 1436static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) 1437{ 1438 /* Only save pre-reset stats if there are some */ 1439 if (adapter->stats.vfgprc || adapter->stats.vfgptc) { 1440 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - 1441 adapter->stats.base_vfgprc; 1442 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - 1443 adapter->stats.base_vfgptc; 1444 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - 1445 adapter->stats.base_vfgorc; 1446 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - 1447 adapter->stats.base_vfgotc; 1448 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - 1449 adapter->stats.base_vfmprc; 1450 } 1451} 1452 1453static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) 1454{ 1455 struct ixgbe_hw *hw = &adapter->hw; 1456 1457 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); 1458 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); 1459 adapter->stats.last_vfgorc |= 1460 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); 1461 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); 1462 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); 1463 adapter->stats.last_vfgotc |= 1464 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); 1465 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); 1466 1467 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; 1468 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; 1469 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; 1470 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; 1471 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; 1472} 1473 1474static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter) 1475{ 1476 struct net_device *netdev = adapter->netdev; 1477 struct ixgbe_hw *hw = &adapter->hw; 1478 int i, j = 0; 1479 int num_rx_rings = adapter->num_rx_queues; 1480 u32 txdctl, rxdctl; 1481 u32 msg[2]; 1482 1483 for (i = 0; i < adapter->num_tx_queues; i++) { 1484 j = adapter->tx_ring[i].reg_idx; 1485 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1486 /* enable WTHRESH=8 descriptors, to encourage burst writeback */ 1487 txdctl |= (8 << 16); 1488 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1489 } 1490 1491 for (i = 0; i < adapter->num_tx_queues; i++) { 1492 j = adapter->tx_ring[i].reg_idx; 1493 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1494 txdctl |= IXGBE_TXDCTL_ENABLE; 1495 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1496 } 1497 1498 for (i = 0; i < num_rx_rings; i++) { 1499 j = adapter->rx_ring[i].reg_idx; 1500 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)); 1501 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME; 1502 if (hw->mac.type == ixgbe_mac_X540_vf) { 1503 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK; 1504 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) | 1505 IXGBE_RXDCTL_RLPML_EN); 1506 } 1507 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl); 1508 ixgbevf_rx_desc_queue_enable(adapter, i); 1509 } 1510 1511 ixgbevf_configure_msix(adapter); 1512 1513 if (hw->mac.ops.set_rar) { 1514 if (is_valid_ether_addr(hw->mac.addr)) 1515 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 1516 else 1517 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); 1518 } 1519 1520 msg[0] = IXGBE_VF_SET_LPE; 1521 msg[1] = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1522 hw->mbx.ops.write_posted(hw, msg, 2); 1523 1524 clear_bit(__IXGBEVF_DOWN, &adapter->state); 1525 ixgbevf_napi_enable_all(adapter); 1526 1527 /* enable transmits */ 1528 netif_tx_start_all_queues(netdev); 1529 1530 ixgbevf_save_reset_stats(adapter); 1531 ixgbevf_init_last_counter_stats(adapter); 1532 1533 mod_timer(&adapter->watchdog_timer, jiffies); 1534} 1535 1536void ixgbevf_up(struct ixgbevf_adapter *adapter) 1537{ 1538 struct ixgbe_hw *hw = &adapter->hw; 1539 1540 ixgbevf_configure(adapter); 1541 1542 ixgbevf_up_complete(adapter); 1543 1544 /* clear any pending interrupts, may auto mask */ 1545 IXGBE_READ_REG(hw, IXGBE_VTEICR); 1546 1547 ixgbevf_irq_enable(adapter, true, true); 1548} 1549 1550/** 1551 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue 1552 * @adapter: board private structure 1553 * @rx_ring: ring to free buffers from 1554 **/ 1555static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter, 1556 struct ixgbevf_ring *rx_ring) 1557{ 1558 struct pci_dev *pdev = adapter->pdev; 1559 unsigned long size; 1560 unsigned int i; 1561 1562 if (!rx_ring->rx_buffer_info) 1563 return; 1564 1565 /* Free all the Rx ring sk_buffs */ 1566 for (i = 0; i < rx_ring->count; i++) { 1567 struct ixgbevf_rx_buffer *rx_buffer_info; 1568 1569 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 1570 if (rx_buffer_info->dma) { 1571 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 1572 rx_ring->rx_buf_len, 1573 DMA_FROM_DEVICE); 1574 rx_buffer_info->dma = 0; 1575 } 1576 if (rx_buffer_info->skb) { 1577 struct sk_buff *skb = rx_buffer_info->skb; 1578 rx_buffer_info->skb = NULL; 1579 do { 1580 struct sk_buff *this = skb; 1581 skb = skb->prev; 1582 dev_kfree_skb(this); 1583 } while (skb); 1584 } 1585 } 1586 1587 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 1588 memset(rx_ring->rx_buffer_info, 0, size); 1589 1590 /* Zero out the descriptor ring */ 1591 memset(rx_ring->desc, 0, rx_ring->size); 1592 1593 rx_ring->next_to_clean = 0; 1594 rx_ring->next_to_use = 0; 1595 1596 if (rx_ring->head) 1597 writel(0, adapter->hw.hw_addr + rx_ring->head); 1598 if (rx_ring->tail) 1599 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1600} 1601 1602/** 1603 * ixgbevf_clean_tx_ring - Free Tx Buffers 1604 * @adapter: board private structure 1605 * @tx_ring: ring to be cleaned 1606 **/ 1607static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter, 1608 struct ixgbevf_ring *tx_ring) 1609{ 1610 struct ixgbevf_tx_buffer *tx_buffer_info; 1611 unsigned long size; 1612 unsigned int i; 1613 1614 if (!tx_ring->tx_buffer_info) 1615 return; 1616 1617 /* Free all the Tx ring sk_buffs */ 1618 1619 for (i = 0; i < tx_ring->count; i++) { 1620 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 1621 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 1622 } 1623 1624 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 1625 memset(tx_ring->tx_buffer_info, 0, size); 1626 1627 memset(tx_ring->desc, 0, tx_ring->size); 1628 1629 tx_ring->next_to_use = 0; 1630 tx_ring->next_to_clean = 0; 1631 1632 if (tx_ring->head) 1633 writel(0, adapter->hw.hw_addr + tx_ring->head); 1634 if (tx_ring->tail) 1635 writel(0, adapter->hw.hw_addr + tx_ring->tail); 1636} 1637 1638/** 1639 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues 1640 * @adapter: board private structure 1641 **/ 1642static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) 1643{ 1644 int i; 1645 1646 for (i = 0; i < adapter->num_rx_queues; i++) 1647 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]); 1648} 1649 1650/** 1651 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues 1652 * @adapter: board private structure 1653 **/ 1654static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) 1655{ 1656 int i; 1657 1658 for (i = 0; i < adapter->num_tx_queues; i++) 1659 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]); 1660} 1661 1662void ixgbevf_down(struct ixgbevf_adapter *adapter) 1663{ 1664 struct net_device *netdev = adapter->netdev; 1665 struct ixgbe_hw *hw = &adapter->hw; 1666 u32 txdctl; 1667 int i, j; 1668 1669 /* signal that we are down to the interrupt handler */ 1670 set_bit(__IXGBEVF_DOWN, &adapter->state); 1671 /* disable receives */ 1672 1673 netif_tx_disable(netdev); 1674 1675 msleep(10); 1676 1677 netif_tx_stop_all_queues(netdev); 1678 1679 ixgbevf_irq_disable(adapter); 1680 1681 ixgbevf_napi_disable_all(adapter); 1682 1683 del_timer_sync(&adapter->watchdog_timer); 1684 /* can't call flush scheduled work here because it can deadlock 1685 * if linkwatch_event tries to acquire the rtnl_lock which we are 1686 * holding */ 1687 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK) 1688 msleep(1); 1689 1690 /* disable transmits in the hardware now that interrupts are off */ 1691 for (i = 0; i < adapter->num_tx_queues; i++) { 1692 j = adapter->tx_ring[i].reg_idx; 1693 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1694 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), 1695 (txdctl & ~IXGBE_TXDCTL_ENABLE)); 1696 } 1697 1698 netif_carrier_off(netdev); 1699 1700 if (!pci_channel_offline(adapter->pdev)) 1701 ixgbevf_reset(adapter); 1702 1703 ixgbevf_clean_all_tx_rings(adapter); 1704 ixgbevf_clean_all_rx_rings(adapter); 1705} 1706 1707void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) 1708{ 1709 struct ixgbe_hw *hw = &adapter->hw; 1710 1711 WARN_ON(in_interrupt()); 1712 1713 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) 1714 msleep(1); 1715 1716 /* 1717 * Check if PF is up before re-init. If not then skip until 1718 * later when the PF is up and ready to service requests from 1719 * the VF via mailbox. If the VF is up and running then the 1720 * watchdog task will continue to schedule reset tasks until 1721 * the PF is up and running. 1722 */ 1723 if (!hw->mac.ops.reset_hw(hw)) { 1724 ixgbevf_down(adapter); 1725 ixgbevf_up(adapter); 1726 } 1727 1728 clear_bit(__IXGBEVF_RESETTING, &adapter->state); 1729} 1730 1731void ixgbevf_reset(struct ixgbevf_adapter *adapter) 1732{ 1733 struct ixgbe_hw *hw = &adapter->hw; 1734 struct net_device *netdev = adapter->netdev; 1735 1736 if (hw->mac.ops.reset_hw(hw)) 1737 hw_dbg(hw, "PF still resetting\n"); 1738 else 1739 hw->mac.ops.init_hw(hw); 1740 1741 if (is_valid_ether_addr(adapter->hw.mac.addr)) { 1742 memcpy(netdev->dev_addr, adapter->hw.mac.addr, 1743 netdev->addr_len); 1744 memcpy(netdev->perm_addr, adapter->hw.mac.addr, 1745 netdev->addr_len); 1746 } 1747} 1748 1749static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, 1750 int vectors) 1751{ 1752 int err, vector_threshold; 1753 1754 /* We'll want at least 3 (vector_threshold): 1755 * 1) TxQ[0] Cleanup 1756 * 2) RxQ[0] Cleanup 1757 * 3) Other (Link Status Change, etc.) 1758 */ 1759 vector_threshold = MIN_MSIX_COUNT; 1760 1761 /* The more we get, the more we will assign to Tx/Rx Cleanup 1762 * for the separate queues...where Rx Cleanup >= Tx Cleanup. 1763 * Right now, we simply care about how many we'll get; we'll 1764 * set them up later while requesting irq's. 1765 */ 1766 while (vectors >= vector_threshold) { 1767 err = pci_enable_msix(adapter->pdev, adapter->msix_entries, 1768 vectors); 1769 if (!err) /* Success in acquiring all requested vectors. */ 1770 break; 1771 else if (err < 0) 1772 vectors = 0; /* Nasty failure, quit now */ 1773 else /* err == number of vectors we should try again with */ 1774 vectors = err; 1775 } 1776 1777 if (vectors < vector_threshold) { 1778 /* Can't allocate enough MSI-X interrupts? Oh well. 1779 * This just means we'll go with either a single MSI 1780 * vector or fall back to legacy interrupts. 1781 */ 1782 hw_dbg(&adapter->hw, 1783 "Unable to allocate MSI-X interrupts\n"); 1784 kfree(adapter->msix_entries); 1785 adapter->msix_entries = NULL; 1786 } else { 1787 /* 1788 * Adjust for only the vectors we'll use, which is minimum 1789 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of 1790 * vectors we were allocated. 1791 */ 1792 adapter->num_msix_vectors = vectors; 1793 } 1794} 1795 1796/** 1797 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent 1798 * @adapter: board private structure to initialize 1799 * 1800 * This is the top level queue allocation routine. The order here is very 1801 * important, starting with the "most" number of features turned on at once, 1802 * and ending with the smallest set of features. This way large combinations 1803 * can be allocated if they're turned on, and smaller combinations are the 1804 * fallthrough conditions. 1805 * 1806 **/ 1807static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) 1808{ 1809 /* Start with base case */ 1810 adapter->num_rx_queues = 1; 1811 adapter->num_tx_queues = 1; 1812} 1813 1814/** 1815 * ixgbevf_alloc_queues - Allocate memory for all rings 1816 * @adapter: board private structure to initialize 1817 * 1818 * We allocate one ring per queue at run-time since we don't know the 1819 * number of queues at compile-time. The polling_netdev array is 1820 * intended for Multiqueue, but should work fine with a single queue. 1821 **/ 1822static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter) 1823{ 1824 int i; 1825 1826 adapter->tx_ring = kcalloc(adapter->num_tx_queues, 1827 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1828 if (!adapter->tx_ring) 1829 goto err_tx_ring_allocation; 1830 1831 adapter->rx_ring = kcalloc(adapter->num_rx_queues, 1832 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1833 if (!adapter->rx_ring) 1834 goto err_rx_ring_allocation; 1835 1836 for (i = 0; i < adapter->num_tx_queues; i++) { 1837 adapter->tx_ring[i].count = adapter->tx_ring_count; 1838 adapter->tx_ring[i].queue_index = i; 1839 adapter->tx_ring[i].reg_idx = i; 1840 } 1841 1842 for (i = 0; i < adapter->num_rx_queues; i++) { 1843 adapter->rx_ring[i].count = adapter->rx_ring_count; 1844 adapter->rx_ring[i].queue_index = i; 1845 adapter->rx_ring[i].reg_idx = i; 1846 } 1847 1848 return 0; 1849 1850err_rx_ring_allocation: 1851 kfree(adapter->tx_ring); 1852err_tx_ring_allocation: 1853 return -ENOMEM; 1854} 1855 1856/** 1857 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported 1858 * @adapter: board private structure to initialize 1859 * 1860 * Attempt to configure the interrupts using the best available 1861 * capabilities of the hardware and the kernel. 1862 **/ 1863static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) 1864{ 1865 int err = 0; 1866 int vector, v_budget; 1867 1868 /* 1869 * It's easy to be greedy for MSI-X vectors, but it really 1870 * doesn't do us much good if we have a lot more vectors 1871 * than CPU's. So let's be conservative and only ask for 1872 * (roughly) twice the number of vectors as there are CPU's. 1873 */ 1874 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues, 1875 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS; 1876 1877 /* A failure in MSI-X entry allocation isn't fatal, but it does 1878 * mean we disable MSI-X capabilities of the adapter. */ 1879 adapter->msix_entries = kcalloc(v_budget, 1880 sizeof(struct msix_entry), GFP_KERNEL); 1881 if (!adapter->msix_entries) { 1882 err = -ENOMEM; 1883 goto out; 1884 } 1885 1886 for (vector = 0; vector < v_budget; vector++) 1887 adapter->msix_entries[vector].entry = vector; 1888 1889 ixgbevf_acquire_msix_vectors(adapter, v_budget); 1890 1891out: 1892 return err; 1893} 1894 1895/** 1896 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors 1897 * @adapter: board private structure to initialize 1898 * 1899 * We allocate one q_vector per queue interrupt. If allocation fails we 1900 * return -ENOMEM. 1901 **/ 1902static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) 1903{ 1904 int q_idx, num_q_vectors; 1905 struct ixgbevf_q_vector *q_vector; 1906 int napi_vectors; 1907 int (*poll)(struct napi_struct *, int); 1908 1909 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1910 napi_vectors = adapter->num_rx_queues; 1911 poll = &ixgbevf_clean_rxonly; 1912 1913 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 1914 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL); 1915 if (!q_vector) 1916 goto err_out; 1917 q_vector->adapter = adapter; 1918 q_vector->v_idx = q_idx; 1919 q_vector->eitr = adapter->eitr_param; 1920 if (q_idx < napi_vectors) 1921 netif_napi_add(adapter->netdev, &q_vector->napi, 1922 (*poll), 64); 1923 adapter->q_vector[q_idx] = q_vector; 1924 } 1925 1926 return 0; 1927 1928err_out: 1929 while (q_idx) { 1930 q_idx--; 1931 q_vector = adapter->q_vector[q_idx]; 1932 netif_napi_del(&q_vector->napi); 1933 kfree(q_vector); 1934 adapter->q_vector[q_idx] = NULL; 1935 } 1936 return -ENOMEM; 1937} 1938 1939/** 1940 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors 1941 * @adapter: board private structure to initialize 1942 * 1943 * This function frees the memory allocated to the q_vectors. In addition if 1944 * NAPI is enabled it will delete any references to the NAPI struct prior 1945 * to freeing the q_vector. 1946 **/ 1947static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) 1948{ 1949 int q_idx, num_q_vectors; 1950 int napi_vectors; 1951 1952 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1953 napi_vectors = adapter->num_rx_queues; 1954 1955 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 1956 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx]; 1957 1958 adapter->q_vector[q_idx] = NULL; 1959 if (q_idx < napi_vectors) 1960 netif_napi_del(&q_vector->napi); 1961 kfree(q_vector); 1962 } 1963} 1964 1965/** 1966 * ixgbevf_reset_interrupt_capability - Reset MSIX setup 1967 * @adapter: board private structure 1968 * 1969 **/ 1970static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) 1971{ 1972 pci_disable_msix(adapter->pdev); 1973 kfree(adapter->msix_entries); 1974 adapter->msix_entries = NULL; 1975} 1976 1977/** 1978 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init 1979 * @adapter: board private structure to initialize 1980 * 1981 **/ 1982static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) 1983{ 1984 int err; 1985 1986 /* Number of supported queues */ 1987 ixgbevf_set_num_queues(adapter); 1988 1989 err = ixgbevf_set_interrupt_capability(adapter); 1990 if (err) { 1991 hw_dbg(&adapter->hw, 1992 "Unable to setup interrupt capabilities\n"); 1993 goto err_set_interrupt; 1994 } 1995 1996 err = ixgbevf_alloc_q_vectors(adapter); 1997 if (err) { 1998 hw_dbg(&adapter->hw, "Unable to allocate memory for queue " 1999 "vectors\n"); 2000 goto err_alloc_q_vectors; 2001 } 2002 2003 err = ixgbevf_alloc_queues(adapter); 2004 if (err) { 2005 pr_err("Unable to allocate memory for queues\n"); 2006 goto err_alloc_queues; 2007 } 2008 2009 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, " 2010 "Tx Queue count = %u\n", 2011 (adapter->num_rx_queues > 1) ? "Enabled" : 2012 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); 2013 2014 set_bit(__IXGBEVF_DOWN, &adapter->state); 2015 2016 return 0; 2017err_alloc_queues: 2018 ixgbevf_free_q_vectors(adapter); 2019err_alloc_q_vectors: 2020 ixgbevf_reset_interrupt_capability(adapter); 2021err_set_interrupt: 2022 return err; 2023} 2024 2025/** 2026 * ixgbevf_sw_init - Initialize general software structures 2027 * (struct ixgbevf_adapter) 2028 * @adapter: board private structure to initialize 2029 * 2030 * ixgbevf_sw_init initializes the Adapter private data structure. 2031 * Fields are initialized based on PCI device information and 2032 * OS network device settings (MTU size). 2033 **/ 2034static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter) 2035{ 2036 struct ixgbe_hw *hw = &adapter->hw; 2037 struct pci_dev *pdev = adapter->pdev; 2038 int err; 2039 2040 /* PCI config space info */ 2041 2042 hw->vendor_id = pdev->vendor; 2043 hw->device_id = pdev->device; 2044 hw->revision_id = pdev->revision; 2045 hw->subsystem_vendor_id = pdev->subsystem_vendor; 2046 hw->subsystem_device_id = pdev->subsystem_device; 2047 2048 hw->mbx.ops.init_params(hw); 2049 hw->mac.max_tx_queues = MAX_TX_QUEUES; 2050 hw->mac.max_rx_queues = MAX_RX_QUEUES; 2051 err = hw->mac.ops.reset_hw(hw); 2052 if (err) { 2053 dev_info(&pdev->dev, 2054 "PF still in reset state, assigning new address\n"); 2055 eth_hw_addr_random(adapter->netdev); 2056 memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr, 2057 adapter->netdev->addr_len); 2058 } else { 2059 err = hw->mac.ops.init_hw(hw); 2060 if (err) { 2061 pr_err("init_shared_code failed: %d\n", err); 2062 goto out; 2063 } 2064 memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr, 2065 adapter->netdev->addr_len); 2066 } 2067 2068 /* Enable dynamic interrupt throttling rates */ 2069 adapter->eitr_param = 20000; 2070 adapter->itr_setting = 1; 2071 2072 /* set defaults for eitr in MegaBytes */ 2073 adapter->eitr_low = 10; 2074 adapter->eitr_high = 20; 2075 2076 /* set default ring sizes */ 2077 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; 2078 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; 2079 2080 /* enable rx csum by default */ 2081 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; 2082 2083 set_bit(__IXGBEVF_DOWN, &adapter->state); 2084 return 0; 2085 2086out: 2087 return err; 2088} 2089 2090#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ 2091 { \ 2092 u32 current_counter = IXGBE_READ_REG(hw, reg); \ 2093 if (current_counter < last_counter) \ 2094 counter += 0x100000000LL; \ 2095 last_counter = current_counter; \ 2096 counter &= 0xFFFFFFFF00000000LL; \ 2097 counter |= current_counter; \ 2098 } 2099 2100#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ 2101 { \ 2102 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ 2103 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ 2104 u64 current_counter = (current_counter_msb << 32) | \ 2105 current_counter_lsb; \ 2106 if (current_counter < last_counter) \ 2107 counter += 0x1000000000LL; \ 2108 last_counter = current_counter; \ 2109 counter &= 0xFFFFFFF000000000LL; \ 2110 counter |= current_counter; \ 2111 } 2112/** 2113 * ixgbevf_update_stats - Update the board statistics counters. 2114 * @adapter: board private structure 2115 **/ 2116void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) 2117{ 2118 struct ixgbe_hw *hw = &adapter->hw; 2119 2120 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, 2121 adapter->stats.vfgprc); 2122 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, 2123 adapter->stats.vfgptc); 2124 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, 2125 adapter->stats.last_vfgorc, 2126 adapter->stats.vfgorc); 2127 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, 2128 adapter->stats.last_vfgotc, 2129 adapter->stats.vfgotc); 2130 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, 2131 adapter->stats.vfmprc); 2132} 2133 2134/** 2135 * ixgbevf_watchdog - Timer Call-back 2136 * @data: pointer to adapter cast into an unsigned long 2137 **/ 2138static void ixgbevf_watchdog(unsigned long data) 2139{ 2140 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data; 2141 struct ixgbe_hw *hw = &adapter->hw; 2142 u64 eics = 0; 2143 int i; 2144 2145 /* 2146 * Do the watchdog outside of interrupt context due to the lovely 2147 * delays that some of the newer hardware requires 2148 */ 2149 2150 if (test_bit(__IXGBEVF_DOWN, &adapter->state)) 2151 goto watchdog_short_circuit; 2152 2153 /* get one bit for every active tx/rx interrupt vector */ 2154 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { 2155 struct ixgbevf_q_vector *qv = adapter->q_vector[i]; 2156 if (qv->rxr_count || qv->txr_count) 2157 eics |= (1 << i); 2158 } 2159 2160 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics); 2161 2162watchdog_short_circuit: 2163 schedule_work(&adapter->watchdog_task); 2164} 2165 2166/** 2167 * ixgbevf_tx_timeout - Respond to a Tx Hang 2168 * @netdev: network interface device structure 2169 **/ 2170static void ixgbevf_tx_timeout(struct net_device *netdev) 2171{ 2172 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2173 2174 /* Do the reset outside of interrupt context */ 2175 schedule_work(&adapter->reset_task); 2176} 2177 2178static void ixgbevf_reset_task(struct work_struct *work) 2179{ 2180 struct ixgbevf_adapter *adapter; 2181 adapter = container_of(work, struct ixgbevf_adapter, reset_task); 2182 2183 /* If we're already down or resetting, just bail */ 2184 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 2185 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 2186 return; 2187 2188 adapter->tx_timeout_count++; 2189 2190 ixgbevf_reinit_locked(adapter); 2191} 2192 2193/** 2194 * ixgbevf_watchdog_task - worker thread to bring link up 2195 * @work: pointer to work_struct containing our data 2196 **/ 2197static void ixgbevf_watchdog_task(struct work_struct *work) 2198{ 2199 struct ixgbevf_adapter *adapter = container_of(work, 2200 struct ixgbevf_adapter, 2201 watchdog_task); 2202 struct net_device *netdev = adapter->netdev; 2203 struct ixgbe_hw *hw = &adapter->hw; 2204 u32 link_speed = adapter->link_speed; 2205 bool link_up = adapter->link_up; 2206 2207 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK; 2208 2209 /* 2210 * Always check the link on the watchdog because we have 2211 * no LSC interrupt 2212 */ 2213 if (hw->mac.ops.check_link) { 2214 if ((hw->mac.ops.check_link(hw, &link_speed, 2215 &link_up, false)) != 0) { 2216 adapter->link_up = link_up; 2217 adapter->link_speed = link_speed; 2218 netif_carrier_off(netdev); 2219 netif_tx_stop_all_queues(netdev); 2220 schedule_work(&adapter->reset_task); 2221 goto pf_has_reset; 2222 } 2223 } else { 2224 /* always assume link is up, if no check link 2225 * function */ 2226 link_speed = IXGBE_LINK_SPEED_10GB_FULL; 2227 link_up = true; 2228 } 2229 adapter->link_up = link_up; 2230 adapter->link_speed = link_speed; 2231 2232 if (link_up) { 2233 if (!netif_carrier_ok(netdev)) { 2234 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n", 2235 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? 2236 10 : 1); 2237 netif_carrier_on(netdev); 2238 netif_tx_wake_all_queues(netdev); 2239 } 2240 } else { 2241 adapter->link_up = false; 2242 adapter->link_speed = 0; 2243 if (netif_carrier_ok(netdev)) { 2244 hw_dbg(&adapter->hw, "NIC Link is Down\n"); 2245 netif_carrier_off(netdev); 2246 netif_tx_stop_all_queues(netdev); 2247 } 2248 } 2249 2250 ixgbevf_update_stats(adapter); 2251 2252pf_has_reset: 2253 /* Reset the timer */ 2254 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 2255 mod_timer(&adapter->watchdog_timer, 2256 round_jiffies(jiffies + (2 * HZ))); 2257 2258 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK; 2259} 2260 2261/** 2262 * ixgbevf_free_tx_resources - Free Tx Resources per Queue 2263 * @adapter: board private structure 2264 * @tx_ring: Tx descriptor ring for a specific queue 2265 * 2266 * Free all transmit software resources 2267 **/ 2268void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter, 2269 struct ixgbevf_ring *tx_ring) 2270{ 2271 struct pci_dev *pdev = adapter->pdev; 2272 2273 ixgbevf_clean_tx_ring(adapter, tx_ring); 2274 2275 vfree(tx_ring->tx_buffer_info); 2276 tx_ring->tx_buffer_info = NULL; 2277 2278 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2279 tx_ring->dma); 2280 2281 tx_ring->desc = NULL; 2282} 2283 2284/** 2285 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues 2286 * @adapter: board private structure 2287 * 2288 * Free all transmit software resources 2289 **/ 2290static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) 2291{ 2292 int i; 2293 2294 for (i = 0; i < adapter->num_tx_queues; i++) 2295 if (adapter->tx_ring[i].desc) 2296 ixgbevf_free_tx_resources(adapter, 2297 &adapter->tx_ring[i]); 2298 2299} 2300 2301/** 2302 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) 2303 * @adapter: board private structure 2304 * @tx_ring: tx descriptor ring (for a specific queue) to setup 2305 * 2306 * Return 0 on success, negative on failure 2307 **/ 2308int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter, 2309 struct ixgbevf_ring *tx_ring) 2310{ 2311 struct pci_dev *pdev = adapter->pdev; 2312 int size; 2313 2314 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 2315 tx_ring->tx_buffer_info = vzalloc(size); 2316 if (!tx_ring->tx_buffer_info) 2317 goto err; 2318 2319 /* round up to nearest 4K */ 2320 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 2321 tx_ring->size = ALIGN(tx_ring->size, 4096); 2322 2323 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size, 2324 &tx_ring->dma, GFP_KERNEL); 2325 if (!tx_ring->desc) 2326 goto err; 2327 2328 tx_ring->next_to_use = 0; 2329 tx_ring->next_to_clean = 0; 2330 tx_ring->work_limit = tx_ring->count; 2331 return 0; 2332 2333err: 2334 vfree(tx_ring->tx_buffer_info); 2335 tx_ring->tx_buffer_info = NULL; 2336 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit " 2337 "descriptor ring\n"); 2338 return -ENOMEM; 2339} 2340 2341/** 2342 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources 2343 * @adapter: board private structure 2344 * 2345 * If this function returns with an error, then it's possible one or 2346 * more of the rings is populated (while the rest are not). It is the 2347 * callers duty to clean those orphaned rings. 2348 * 2349 * Return 0 on success, negative on failure 2350 **/ 2351static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) 2352{ 2353 int i, err = 0; 2354 2355 for (i = 0; i < adapter->num_tx_queues; i++) { 2356 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]); 2357 if (!err) 2358 continue; 2359 hw_dbg(&adapter->hw, 2360 "Allocation for Tx Queue %u failed\n", i); 2361 break; 2362 } 2363 2364 return err; 2365} 2366 2367/** 2368 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) 2369 * @adapter: board private structure 2370 * @rx_ring: rx descriptor ring (for a specific queue) to setup 2371 * 2372 * Returns 0 on success, negative on failure 2373 **/ 2374int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter, 2375 struct ixgbevf_ring *rx_ring) 2376{ 2377 struct pci_dev *pdev = adapter->pdev; 2378 int size; 2379 2380 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 2381 rx_ring->rx_buffer_info = vzalloc(size); 2382 if (!rx_ring->rx_buffer_info) 2383 goto alloc_failed; 2384 2385 /* Round up to nearest 4K */ 2386 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 2387 rx_ring->size = ALIGN(rx_ring->size, 4096); 2388 2389 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, 2390 &rx_ring->dma, GFP_KERNEL); 2391 2392 if (!rx_ring->desc) { 2393 hw_dbg(&adapter->hw, 2394 "Unable to allocate memory for " 2395 "the receive descriptor ring\n"); 2396 vfree(rx_ring->rx_buffer_info); 2397 rx_ring->rx_buffer_info = NULL; 2398 goto alloc_failed; 2399 } 2400 2401 rx_ring->next_to_clean = 0; 2402 rx_ring->next_to_use = 0; 2403 2404 return 0; 2405alloc_failed: 2406 return -ENOMEM; 2407} 2408 2409/** 2410 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources 2411 * @adapter: board private structure 2412 * 2413 * If this function returns with an error, then it's possible one or 2414 * more of the rings is populated (while the rest are not). It is the 2415 * callers duty to clean those orphaned rings. 2416 * 2417 * Return 0 on success, negative on failure 2418 **/ 2419static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) 2420{ 2421 int i, err = 0; 2422 2423 for (i = 0; i < adapter->num_rx_queues; i++) { 2424 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]); 2425 if (!err) 2426 continue; 2427 hw_dbg(&adapter->hw, 2428 "Allocation for Rx Queue %u failed\n", i); 2429 break; 2430 } 2431 return err; 2432} 2433 2434/** 2435 * ixgbevf_free_rx_resources - Free Rx Resources 2436 * @adapter: board private structure 2437 * @rx_ring: ring to clean the resources from 2438 * 2439 * Free all receive software resources 2440 **/ 2441void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter, 2442 struct ixgbevf_ring *rx_ring) 2443{ 2444 struct pci_dev *pdev = adapter->pdev; 2445 2446 ixgbevf_clean_rx_ring(adapter, rx_ring); 2447 2448 vfree(rx_ring->rx_buffer_info); 2449 rx_ring->rx_buffer_info = NULL; 2450 2451 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2452 rx_ring->dma); 2453 2454 rx_ring->desc = NULL; 2455} 2456 2457/** 2458 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues 2459 * @adapter: board private structure 2460 * 2461 * Free all receive software resources 2462 **/ 2463static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) 2464{ 2465 int i; 2466 2467 for (i = 0; i < adapter->num_rx_queues; i++) 2468 if (adapter->rx_ring[i].desc) 2469 ixgbevf_free_rx_resources(adapter, 2470 &adapter->rx_ring[i]); 2471} 2472 2473/** 2474 * ixgbevf_open - Called when a network interface is made active 2475 * @netdev: network interface device structure 2476 * 2477 * Returns 0 on success, negative value on failure 2478 * 2479 * The open entry point is called when a network interface is made 2480 * active by the system (IFF_UP). At this point all resources needed 2481 * for transmit and receive operations are allocated, the interrupt 2482 * handler is registered with the OS, the watchdog timer is started, 2483 * and the stack is notified that the interface is ready. 2484 **/ 2485static int ixgbevf_open(struct net_device *netdev) 2486{ 2487 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2488 struct ixgbe_hw *hw = &adapter->hw; 2489 int err; 2490 2491 /* disallow open during test */ 2492 if (test_bit(__IXGBEVF_TESTING, &adapter->state)) 2493 return -EBUSY; 2494 2495 if (hw->adapter_stopped) { 2496 ixgbevf_reset(adapter); 2497 /* if adapter is still stopped then PF isn't up and 2498 * the vf can't start. */ 2499 if (hw->adapter_stopped) { 2500 err = IXGBE_ERR_MBX; 2501 pr_err("Unable to start - perhaps the PF Driver isn't " 2502 "up yet\n"); 2503 goto err_setup_reset; 2504 } 2505 } 2506 2507 /* allocate transmit descriptors */ 2508 err = ixgbevf_setup_all_tx_resources(adapter); 2509 if (err) 2510 goto err_setup_tx; 2511 2512 /* allocate receive descriptors */ 2513 err = ixgbevf_setup_all_rx_resources(adapter); 2514 if (err) 2515 goto err_setup_rx; 2516 2517 ixgbevf_configure(adapter); 2518 2519 /* 2520 * Map the Tx/Rx rings to the vectors we were allotted. 2521 * if request_irq will be called in this function map_rings 2522 * must be called *before* up_complete 2523 */ 2524 ixgbevf_map_rings_to_vectors(adapter); 2525 2526 ixgbevf_up_complete(adapter); 2527 2528 /* clear any pending interrupts, may auto mask */ 2529 IXGBE_READ_REG(hw, IXGBE_VTEICR); 2530 err = ixgbevf_request_irq(adapter); 2531 if (err) 2532 goto err_req_irq; 2533 2534 ixgbevf_irq_enable(adapter, true, true); 2535 2536 return 0; 2537 2538err_req_irq: 2539 ixgbevf_down(adapter); 2540 ixgbevf_free_irq(adapter); 2541err_setup_rx: 2542 ixgbevf_free_all_rx_resources(adapter); 2543err_setup_tx: 2544 ixgbevf_free_all_tx_resources(adapter); 2545 ixgbevf_reset(adapter); 2546 2547err_setup_reset: 2548 2549 return err; 2550} 2551 2552/** 2553 * ixgbevf_close - Disables a network interface 2554 * @netdev: network interface device structure 2555 * 2556 * Returns 0, this is not allowed to fail 2557 * 2558 * The close entry point is called when an interface is de-activated 2559 * by the OS. The hardware is still under the drivers control, but 2560 * needs to be disabled. A global MAC reset is issued to stop the 2561 * hardware, and all transmit and receive resources are freed. 2562 **/ 2563static int ixgbevf_close(struct net_device *netdev) 2564{ 2565 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2566 2567 ixgbevf_down(adapter); 2568 ixgbevf_free_irq(adapter); 2569 2570 ixgbevf_free_all_tx_resources(adapter); 2571 ixgbevf_free_all_rx_resources(adapter); 2572 2573 return 0; 2574} 2575 2576static int ixgbevf_tso(struct ixgbevf_adapter *adapter, 2577 struct ixgbevf_ring *tx_ring, 2578 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len) 2579{ 2580 struct ixgbe_adv_tx_context_desc *context_desc; 2581 unsigned int i; 2582 int err; 2583 struct ixgbevf_tx_buffer *tx_buffer_info; 2584 u32 vlan_macip_lens = 0, type_tucmd_mlhl; 2585 u32 mss_l4len_idx, l4len; 2586 2587 if (skb_is_gso(skb)) { 2588 if (skb_header_cloned(skb)) { 2589 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2590 if (err) 2591 return err; 2592 } 2593 l4len = tcp_hdrlen(skb); 2594 *hdr_len += l4len; 2595 2596 if (skb->protocol == htons(ETH_P_IP)) { 2597 struct iphdr *iph = ip_hdr(skb); 2598 iph->tot_len = 0; 2599 iph->check = 0; 2600 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, 2601 iph->daddr, 0, 2602 IPPROTO_TCP, 2603 0); 2604 adapter->hw_tso_ctxt++; 2605 } else if (skb_is_gso_v6(skb)) { 2606 ipv6_hdr(skb)->payload_len = 0; 2607 tcp_hdr(skb)->check = 2608 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 2609 &ipv6_hdr(skb)->daddr, 2610 0, IPPROTO_TCP, 0); 2611 adapter->hw_tso6_ctxt++; 2612 } 2613 2614 i = tx_ring->next_to_use; 2615 2616 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2617 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2618 2619 /* VLAN MACLEN IPLEN */ 2620 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2621 vlan_macip_lens |= 2622 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); 2623 vlan_macip_lens |= ((skb_network_offset(skb)) << 2624 IXGBE_ADVTXD_MACLEN_SHIFT); 2625 *hdr_len += skb_network_offset(skb); 2626 vlan_macip_lens |= 2627 (skb_transport_header(skb) - skb_network_header(skb)); 2628 *hdr_len += 2629 (skb_transport_header(skb) - skb_network_header(skb)); 2630 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2631 context_desc->seqnum_seed = 0; 2632 2633 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 2634 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT | 2635 IXGBE_ADVTXD_DTYP_CTXT); 2636 2637 if (skb->protocol == htons(ETH_P_IP)) 2638 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2639 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; 2640 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2641 2642 /* MSS L4LEN IDX */ 2643 mss_l4len_idx = 2644 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT); 2645 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT); 2646 /* use index 1 for TSO */ 2647 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 2648 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); 2649 2650 tx_buffer_info->time_stamp = jiffies; 2651 tx_buffer_info->next_to_watch = i; 2652 2653 i++; 2654 if (i == tx_ring->count) 2655 i = 0; 2656 tx_ring->next_to_use = i; 2657 2658 return true; 2659 } 2660 2661 return false; 2662} 2663 2664static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter, 2665 struct ixgbevf_ring *tx_ring, 2666 struct sk_buff *skb, u32 tx_flags) 2667{ 2668 struct ixgbe_adv_tx_context_desc *context_desc; 2669 unsigned int i; 2670 struct ixgbevf_tx_buffer *tx_buffer_info; 2671 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; 2672 2673 if (skb->ip_summed == CHECKSUM_PARTIAL || 2674 (tx_flags & IXGBE_TX_FLAGS_VLAN)) { 2675 i = tx_ring->next_to_use; 2676 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2677 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2678 2679 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2680 vlan_macip_lens |= (tx_flags & 2681 IXGBE_TX_FLAGS_VLAN_MASK); 2682 vlan_macip_lens |= (skb_network_offset(skb) << 2683 IXGBE_ADVTXD_MACLEN_SHIFT); 2684 if (skb->ip_summed == CHECKSUM_PARTIAL) 2685 vlan_macip_lens |= (skb_transport_header(skb) - 2686 skb_network_header(skb)); 2687 2688 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2689 context_desc->seqnum_seed = 0; 2690 2691 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | 2692 IXGBE_ADVTXD_DTYP_CTXT); 2693 2694 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2695 switch (skb->protocol) { 2696 case __constant_htons(ETH_P_IP): 2697 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2698 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 2699 type_tucmd_mlhl |= 2700 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2701 break; 2702 case __constant_htons(ETH_P_IPV6): 2703 /* XXX what about other V6 headers?? */ 2704 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 2705 type_tucmd_mlhl |= 2706 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2707 break; 2708 default: 2709 if (unlikely(net_ratelimit())) { 2710 pr_warn("partial checksum but " 2711 "proto=%x!\n", skb->protocol); 2712 } 2713 break; 2714 } 2715 } 2716 2717 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2718 /* use index zero for tx checksum offload */ 2719 context_desc->mss_l4len_idx = 0; 2720 2721 tx_buffer_info->time_stamp = jiffies; 2722 tx_buffer_info->next_to_watch = i; 2723 2724 adapter->hw_csum_tx_good++; 2725 i++; 2726 if (i == tx_ring->count) 2727 i = 0; 2728 tx_ring->next_to_use = i; 2729 2730 return true; 2731 } 2732 2733 return false; 2734} 2735 2736static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter, 2737 struct ixgbevf_ring *tx_ring, 2738 struct sk_buff *skb, u32 tx_flags, 2739 unsigned int first) 2740{ 2741 struct pci_dev *pdev = adapter->pdev; 2742 struct ixgbevf_tx_buffer *tx_buffer_info; 2743 unsigned int len; 2744 unsigned int total = skb->len; 2745 unsigned int offset = 0, size; 2746 int count = 0; 2747 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 2748 unsigned int f; 2749 int i; 2750 2751 i = tx_ring->next_to_use; 2752 2753 len = min(skb_headlen(skb), total); 2754 while (len) { 2755 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2756 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2757 2758 tx_buffer_info->length = size; 2759 tx_buffer_info->mapped_as_page = false; 2760 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev, 2761 skb->data + offset, 2762 size, DMA_TO_DEVICE); 2763 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2764 goto dma_error; 2765 tx_buffer_info->time_stamp = jiffies; 2766 tx_buffer_info->next_to_watch = i; 2767 2768 len -= size; 2769 total -= size; 2770 offset += size; 2771 count++; 2772 i++; 2773 if (i == tx_ring->count) 2774 i = 0; 2775 } 2776 2777 for (f = 0; f < nr_frags; f++) { 2778 const struct skb_frag_struct *frag; 2779 2780 frag = &skb_shinfo(skb)->frags[f]; 2781 len = min((unsigned int)skb_frag_size(frag), total); 2782 offset = 0; 2783 2784 while (len) { 2785 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2786 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2787 2788 tx_buffer_info->length = size; 2789 tx_buffer_info->dma = 2790 skb_frag_dma_map(&adapter->pdev->dev, frag, 2791 offset, size, DMA_TO_DEVICE); 2792 tx_buffer_info->mapped_as_page = true; 2793 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2794 goto dma_error; 2795 tx_buffer_info->time_stamp = jiffies; 2796 tx_buffer_info->next_to_watch = i; 2797 2798 len -= size; 2799 total -= size; 2800 offset += size; 2801 count++; 2802 i++; 2803 if (i == tx_ring->count) 2804 i = 0; 2805 } 2806 if (total == 0) 2807 break; 2808 } 2809 2810 if (i == 0) 2811 i = tx_ring->count - 1; 2812 else 2813 i = i - 1; 2814 tx_ring->tx_buffer_info[i].skb = skb; 2815 tx_ring->tx_buffer_info[first].next_to_watch = i; 2816 2817 return count; 2818 2819dma_error: 2820 dev_err(&pdev->dev, "TX DMA map failed\n"); 2821 2822 /* clear timestamp and dma mappings for failed tx_buffer_info map */ 2823 tx_buffer_info->dma = 0; 2824 tx_buffer_info->time_stamp = 0; 2825 tx_buffer_info->next_to_watch = 0; 2826 count--; 2827 2828 /* clear timestamp and dma mappings for remaining portion of packet */ 2829 while (count >= 0) { 2830 count--; 2831 i--; 2832 if (i < 0) 2833 i += tx_ring->count; 2834 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2835 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 2836 } 2837 2838 return count; 2839} 2840 2841static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter, 2842 struct ixgbevf_ring *tx_ring, int tx_flags, 2843 int count, u32 paylen, u8 hdr_len) 2844{ 2845 union ixgbe_adv_tx_desc *tx_desc = NULL; 2846 struct ixgbevf_tx_buffer *tx_buffer_info; 2847 u32 olinfo_status = 0, cmd_type_len = 0; 2848 unsigned int i; 2849 2850 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS; 2851 2852 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA; 2853 2854 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT; 2855 2856 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2857 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE; 2858 2859 if (tx_flags & IXGBE_TX_FLAGS_TSO) { 2860 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE; 2861 2862 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 2863 IXGBE_ADVTXD_POPTS_SHIFT; 2864 2865 /* use index 1 context for tso */ 2866 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 2867 if (tx_flags & IXGBE_TX_FLAGS_IPV4) 2868 olinfo_status |= IXGBE_TXD_POPTS_IXSM << 2869 IXGBE_ADVTXD_POPTS_SHIFT; 2870 2871 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM) 2872 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 2873 IXGBE_ADVTXD_POPTS_SHIFT; 2874 2875 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); 2876 2877 i = tx_ring->next_to_use; 2878 while (count--) { 2879 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2880 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 2881 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma); 2882 tx_desc->read.cmd_type_len = 2883 cpu_to_le32(cmd_type_len | tx_buffer_info->length); 2884 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 2885 i++; 2886 if (i == tx_ring->count) 2887 i = 0; 2888 } 2889 2890 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd); 2891 2892 /* 2893 * Force memory writes to complete before letting h/w 2894 * know there are new descriptors to fetch. (Only 2895 * applicable for weak-ordered memory model archs, 2896 * such as IA-64). 2897 */ 2898 wmb(); 2899 2900 tx_ring->next_to_use = i; 2901 writel(i, adapter->hw.hw_addr + tx_ring->tail); 2902} 2903 2904static int __ixgbevf_maybe_stop_tx(struct net_device *netdev, 2905 struct ixgbevf_ring *tx_ring, int size) 2906{ 2907 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2908 2909 netif_stop_subqueue(netdev, tx_ring->queue_index); 2910 /* Herbert's original patch had: 2911 * smp_mb__after_netif_stop_queue(); 2912 * but since that doesn't exist yet, just open code it. */ 2913 smp_mb(); 2914 2915 /* We need to check again in a case another CPU has just 2916 * made room available. */ 2917 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size)) 2918 return -EBUSY; 2919 2920 /* A reprieve! - use start_queue because it doesn't call schedule */ 2921 netif_start_subqueue(netdev, tx_ring->queue_index); 2922 ++adapter->restart_queue; 2923 return 0; 2924} 2925 2926static int ixgbevf_maybe_stop_tx(struct net_device *netdev, 2927 struct ixgbevf_ring *tx_ring, int size) 2928{ 2929 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size)) 2930 return 0; 2931 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size); 2932} 2933 2934static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 2935{ 2936 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2937 struct ixgbevf_ring *tx_ring; 2938 unsigned int first; 2939 unsigned int tx_flags = 0; 2940 u8 hdr_len = 0; 2941 int r_idx = 0, tso; 2942 int count = 0; 2943 2944 unsigned int f; 2945 2946 tx_ring = &adapter->tx_ring[r_idx]; 2947 2948 if (vlan_tx_tag_present(skb)) { 2949 tx_flags |= vlan_tx_tag_get(skb); 2950 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 2951 tx_flags |= IXGBE_TX_FLAGS_VLAN; 2952 } 2953 2954 /* four things can cause us to need a context descriptor */ 2955 if (skb_is_gso(skb) || 2956 (skb->ip_summed == CHECKSUM_PARTIAL) || 2957 (tx_flags & IXGBE_TX_FLAGS_VLAN)) 2958 count++; 2959 2960 count += TXD_USE_COUNT(skb_headlen(skb)); 2961 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 2962 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f])); 2963 2964 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) { 2965 adapter->tx_busy++; 2966 return NETDEV_TX_BUSY; 2967 } 2968 2969 first = tx_ring->next_to_use; 2970 2971 if (skb->protocol == htons(ETH_P_IP)) 2972 tx_flags |= IXGBE_TX_FLAGS_IPV4; 2973 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); 2974 if (tso < 0) { 2975 dev_kfree_skb_any(skb); 2976 return NETDEV_TX_OK; 2977 } 2978 2979 if (tso) 2980 tx_flags |= IXGBE_TX_FLAGS_TSO; 2981 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) && 2982 (skb->ip_summed == CHECKSUM_PARTIAL)) 2983 tx_flags |= IXGBE_TX_FLAGS_CSUM; 2984 2985 ixgbevf_tx_queue(adapter, tx_ring, tx_flags, 2986 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first), 2987 skb->len, hdr_len); 2988 2989 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); 2990 2991 return NETDEV_TX_OK; 2992} 2993 2994/** 2995 * ixgbevf_set_mac - Change the Ethernet Address of the NIC 2996 * @netdev: network interface device structure 2997 * @p: pointer to an address structure 2998 * 2999 * Returns 0 on success, negative on failure 3000 **/ 3001static int ixgbevf_set_mac(struct net_device *netdev, void *p) 3002{ 3003 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3004 struct ixgbe_hw *hw = &adapter->hw; 3005 struct sockaddr *addr = p; 3006 3007 if (!is_valid_ether_addr(addr->sa_data)) 3008 return -EADDRNOTAVAIL; 3009 3010 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3011 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); 3012 3013 if (hw->mac.ops.set_rar) 3014 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 3015 3016 return 0; 3017} 3018 3019/** 3020 * ixgbevf_change_mtu - Change the Maximum Transfer Unit 3021 * @netdev: network interface device structure 3022 * @new_mtu: new value for maximum frame size 3023 * 3024 * Returns 0 on success, negative on failure 3025 **/ 3026static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) 3027{ 3028 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3029 struct ixgbe_hw *hw = &adapter->hw; 3030 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 3031 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE; 3032 u32 msg[2]; 3033 3034 if (adapter->hw.mac.type == ixgbe_mac_X540_vf) 3035 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE; 3036 3037 /* MTU < 68 is an error and causes problems on some kernels */ 3038 if ((new_mtu < 68) || (max_frame > max_possible_frame)) 3039 return -EINVAL; 3040 3041 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n", 3042 netdev->mtu, new_mtu); 3043 /* must set new MTU before calling down or up */ 3044 netdev->mtu = new_mtu; 3045 3046 if (!netif_running(netdev)) { 3047 msg[0] = IXGBE_VF_SET_LPE; 3048 msg[1] = max_frame; 3049 hw->mbx.ops.write_posted(hw, msg, 2); 3050 } 3051 3052 if (netif_running(netdev)) 3053 ixgbevf_reinit_locked(adapter); 3054 3055 return 0; 3056} 3057 3058static void ixgbevf_shutdown(struct pci_dev *pdev) 3059{ 3060 struct net_device *netdev = pci_get_drvdata(pdev); 3061 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3062 3063 netif_device_detach(netdev); 3064 3065 if (netif_running(netdev)) { 3066 ixgbevf_down(adapter); 3067 ixgbevf_free_irq(adapter); 3068 ixgbevf_free_all_tx_resources(adapter); 3069 ixgbevf_free_all_rx_resources(adapter); 3070 } 3071 3072 pci_save_state(pdev); 3073 3074 pci_disable_device(pdev); 3075} 3076 3077static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev, 3078 struct rtnl_link_stats64 *stats) 3079{ 3080 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3081 unsigned int start; 3082 u64 bytes, packets; 3083 const struct ixgbevf_ring *ring; 3084 int i; 3085 3086 ixgbevf_update_stats(adapter); 3087 3088 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc; 3089 3090 for (i = 0; i < adapter->num_rx_queues; i++) { 3091 ring = &adapter->rx_ring[i]; 3092 do { 3093 start = u64_stats_fetch_begin_bh(&ring->syncp); 3094 bytes = ring->total_bytes; 3095 packets = ring->total_packets; 3096 } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); 3097 stats->rx_bytes += bytes; 3098 stats->rx_packets += packets; 3099 } 3100 3101 for (i = 0; i < adapter->num_tx_queues; i++) { 3102 ring = &adapter->tx_ring[i]; 3103 do { 3104 start = u64_stats_fetch_begin_bh(&ring->syncp); 3105 bytes = ring->total_bytes; 3106 packets = ring->total_packets; 3107 } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); 3108 stats->tx_bytes += bytes; 3109 stats->tx_packets += packets; 3110 } 3111 3112 return stats; 3113} 3114 3115static int ixgbevf_set_features(struct net_device *netdev, 3116 netdev_features_t features) 3117{ 3118 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3119 3120 if (features & NETIF_F_RXCSUM) 3121 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; 3122 else 3123 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED; 3124 3125 return 0; 3126} 3127 3128static const struct net_device_ops ixgbe_netdev_ops = { 3129 .ndo_open = ixgbevf_open, 3130 .ndo_stop = ixgbevf_close, 3131 .ndo_start_xmit = ixgbevf_xmit_frame, 3132 .ndo_set_rx_mode = ixgbevf_set_rx_mode, 3133 .ndo_get_stats64 = ixgbevf_get_stats, 3134 .ndo_validate_addr = eth_validate_addr, 3135 .ndo_set_mac_address = ixgbevf_set_mac, 3136 .ndo_change_mtu = ixgbevf_change_mtu, 3137 .ndo_tx_timeout = ixgbevf_tx_timeout, 3138 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid, 3139 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid, 3140 .ndo_set_features = ixgbevf_set_features, 3141}; 3142 3143static void ixgbevf_assign_netdev_ops(struct net_device *dev) 3144{ 3145 dev->netdev_ops = &ixgbe_netdev_ops; 3146 ixgbevf_set_ethtool_ops(dev); 3147 dev->watchdog_timeo = 5 * HZ; 3148} 3149 3150/** 3151 * ixgbevf_probe - Device Initialization Routine 3152 * @pdev: PCI device information struct 3153 * @ent: entry in ixgbevf_pci_tbl 3154 * 3155 * Returns 0 on success, negative on failure 3156 * 3157 * ixgbevf_probe initializes an adapter identified by a pci_dev structure. 3158 * The OS initialization, configuring of the adapter private structure, 3159 * and a hardware reset occur. 3160 **/ 3161static int __devinit ixgbevf_probe(struct pci_dev *pdev, 3162 const struct pci_device_id *ent) 3163{ 3164 struct net_device *netdev; 3165 struct ixgbevf_adapter *adapter = NULL; 3166 struct ixgbe_hw *hw = NULL; 3167 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; 3168 static int cards_found; 3169 int err, pci_using_dac; 3170 3171 err = pci_enable_device(pdev); 3172 if (err) 3173 return err; 3174 3175 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) && 3176 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 3177 pci_using_dac = 1; 3178 } else { 3179 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 3180 if (err) { 3181 err = dma_set_coherent_mask(&pdev->dev, 3182 DMA_BIT_MASK(32)); 3183 if (err) { 3184 dev_err(&pdev->dev, "No usable DMA " 3185 "configuration, aborting\n"); 3186 goto err_dma; 3187 } 3188 } 3189 pci_using_dac = 0; 3190 } 3191 3192 err = pci_request_regions(pdev, ixgbevf_driver_name); 3193 if (err) { 3194 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); 3195 goto err_pci_reg; 3196 } 3197 3198 pci_set_master(pdev); 3199 3200 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), 3201 MAX_TX_QUEUES); 3202 if (!netdev) { 3203 err = -ENOMEM; 3204 goto err_alloc_etherdev; 3205 } 3206 3207 SET_NETDEV_DEV(netdev, &pdev->dev); 3208 3209 pci_set_drvdata(pdev, netdev); 3210 adapter = netdev_priv(netdev); 3211 3212 adapter->netdev = netdev; 3213 adapter->pdev = pdev; 3214 hw = &adapter->hw; 3215 hw->back = adapter; 3216 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3217 3218 /* 3219 * call save state here in standalone driver because it relies on 3220 * adapter struct to exist, and needs to call netdev_priv 3221 */ 3222 pci_save_state(pdev); 3223 3224 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 3225 pci_resource_len(pdev, 0)); 3226 if (!hw->hw_addr) { 3227 err = -EIO; 3228 goto err_ioremap; 3229 } 3230 3231 ixgbevf_assign_netdev_ops(netdev); 3232 3233 adapter->bd_number = cards_found; 3234 3235 /* Setup hw api */ 3236 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 3237 hw->mac.type = ii->mac; 3238 3239 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, 3240 sizeof(struct ixgbe_mbx_operations)); 3241 3242 /* setup the private structure */ 3243 err = ixgbevf_sw_init(adapter); 3244 if (err) 3245 goto err_sw_init; 3246 3247 /* The HW MAC address was set and/or determined in sw_init */ 3248 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 3249 3250 if (!is_valid_ether_addr(netdev->dev_addr)) { 3251 pr_err("invalid MAC address\n"); 3252 err = -EIO; 3253 goto err_sw_init; 3254 } 3255 3256 netdev->hw_features = NETIF_F_SG | 3257 NETIF_F_IP_CSUM | 3258 NETIF_F_IPV6_CSUM | 3259 NETIF_F_TSO | 3260 NETIF_F_TSO6 | 3261 NETIF_F_RXCSUM; 3262 3263 netdev->features = netdev->hw_features | 3264 NETIF_F_HW_VLAN_TX | 3265 NETIF_F_HW_VLAN_RX | 3266 NETIF_F_HW_VLAN_FILTER; 3267 3268 netdev->vlan_features |= NETIF_F_TSO; 3269 netdev->vlan_features |= NETIF_F_TSO6; 3270 netdev->vlan_features |= NETIF_F_IP_CSUM; 3271 netdev->vlan_features |= NETIF_F_IPV6_CSUM; 3272 netdev->vlan_features |= NETIF_F_SG; 3273 3274 if (pci_using_dac) 3275 netdev->features |= NETIF_F_HIGHDMA; 3276 3277 netdev->priv_flags |= IFF_UNICAST_FLT; 3278 3279 init_timer(&adapter->watchdog_timer); 3280 adapter->watchdog_timer.function = ixgbevf_watchdog; 3281 adapter->watchdog_timer.data = (unsigned long)adapter; 3282 3283 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task); 3284 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task); 3285 3286 err = ixgbevf_init_interrupt_scheme(adapter); 3287 if (err) 3288 goto err_sw_init; 3289 3290 /* pick up the PCI bus settings for reporting later */ 3291 if (hw->mac.ops.get_bus_info) 3292 hw->mac.ops.get_bus_info(hw); 3293 3294 strcpy(netdev->name, "eth%d"); 3295 3296 err = register_netdev(netdev); 3297 if (err) 3298 goto err_register; 3299 3300 adapter->netdev_registered = true; 3301 3302 netif_carrier_off(netdev); 3303 3304 ixgbevf_init_last_counter_stats(adapter); 3305 3306 /* print the MAC address */ 3307 hw_dbg(hw, "%pM\n", netdev->dev_addr); 3308 3309 hw_dbg(hw, "MAC: %d\n", hw->mac.type); 3310 3311 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n"); 3312 cards_found++; 3313 return 0; 3314 3315err_register: 3316err_sw_init: 3317 ixgbevf_reset_interrupt_capability(adapter); 3318 iounmap(hw->hw_addr); 3319err_ioremap: 3320 free_netdev(netdev); 3321err_alloc_etherdev: 3322 pci_release_regions(pdev); 3323err_pci_reg: 3324err_dma: 3325 pci_disable_device(pdev); 3326 return err; 3327} 3328 3329/** 3330 * ixgbevf_remove - Device Removal Routine 3331 * @pdev: PCI device information struct 3332 * 3333 * ixgbevf_remove is called by the PCI subsystem to alert the driver 3334 * that it should release a PCI device. The could be caused by a 3335 * Hot-Plug event, or because the driver is going to be removed from 3336 * memory. 3337 **/ 3338static void __devexit ixgbevf_remove(struct pci_dev *pdev) 3339{ 3340 struct net_device *netdev = pci_get_drvdata(pdev); 3341 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3342 3343 set_bit(__IXGBEVF_DOWN, &adapter->state); 3344 3345 del_timer_sync(&adapter->watchdog_timer); 3346 3347 cancel_work_sync(&adapter->reset_task); 3348 cancel_work_sync(&adapter->watchdog_task); 3349 3350 if (adapter->netdev_registered) { 3351 unregister_netdev(netdev); 3352 adapter->netdev_registered = false; 3353 } 3354 3355 ixgbevf_reset_interrupt_capability(adapter); 3356 3357 iounmap(adapter->hw.hw_addr); 3358 pci_release_regions(pdev); 3359 3360 hw_dbg(&adapter->hw, "Remove complete\n"); 3361 3362 kfree(adapter->tx_ring); 3363 kfree(adapter->rx_ring); 3364 3365 free_netdev(netdev); 3366 3367 pci_disable_device(pdev); 3368} 3369 3370static struct pci_driver ixgbevf_driver = { 3371 .name = ixgbevf_driver_name, 3372 .id_table = ixgbevf_pci_tbl, 3373 .probe = ixgbevf_probe, 3374 .remove = __devexit_p(ixgbevf_remove), 3375 .shutdown = ixgbevf_shutdown, 3376}; 3377 3378/** 3379 * ixgbevf_init_module - Driver Registration Routine 3380 * 3381 * ixgbevf_init_module is the first routine called when the driver is 3382 * loaded. All it does is register with the PCI subsystem. 3383 **/ 3384static int __init ixgbevf_init_module(void) 3385{ 3386 int ret; 3387 pr_info("%s - version %s\n", ixgbevf_driver_string, 3388 ixgbevf_driver_version); 3389 3390 pr_info("%s\n", ixgbevf_copyright); 3391 3392 ret = pci_register_driver(&ixgbevf_driver); 3393 return ret; 3394} 3395 3396module_init(ixgbevf_init_module); 3397 3398/** 3399 * ixgbevf_exit_module - Driver Exit Cleanup Routine 3400 * 3401 * ixgbevf_exit_module is called just before the driver is removed 3402 * from memory. 3403 **/ 3404static void __exit ixgbevf_exit_module(void) 3405{ 3406 pci_unregister_driver(&ixgbevf_driver); 3407} 3408 3409#ifdef DEBUG 3410/** 3411 * ixgbevf_get_hw_dev_name - return device name string 3412 * used by hardware layer to print debugging information 3413 **/ 3414char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) 3415{ 3416 struct ixgbevf_adapter *adapter = hw->back; 3417 return adapter->netdev->name; 3418} 3419 3420#endif 3421module_exit(ixgbevf_exit_module); 3422 3423/* ixgbevf_main.c */ 3424