ixgbevf_main.c revision b3f4d5990bfc8b060e5010c1464789fca1f4c5b4
1/******************************************************************************* 2 3 Intel 82599 Virtual Function driver 4 Copyright(c) 1999 - 2012 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 25 26*******************************************************************************/ 27 28 29/****************************************************************************** 30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code 31******************************************************************************/ 32 33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 34 35#include <linux/types.h> 36#include <linux/bitops.h> 37#include <linux/module.h> 38#include <linux/pci.h> 39#include <linux/netdevice.h> 40#include <linux/vmalloc.h> 41#include <linux/string.h> 42#include <linux/in.h> 43#include <linux/ip.h> 44#include <linux/tcp.h> 45#include <linux/ipv6.h> 46#include <linux/slab.h> 47#include <net/checksum.h> 48#include <net/ip6_checksum.h> 49#include <linux/ethtool.h> 50#include <linux/if.h> 51#include <linux/if_vlan.h> 52#include <linux/prefetch.h> 53 54#include "ixgbevf.h" 55 56const char ixgbevf_driver_name[] = "ixgbevf"; 57static const char ixgbevf_driver_string[] = 58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver"; 59 60#define DRV_VERSION "2.2.0-k" 61const char ixgbevf_driver_version[] = DRV_VERSION; 62static char ixgbevf_copyright[] = 63 "Copyright (c) 2009 - 2012 Intel Corporation."; 64 65static const struct ixgbevf_info *ixgbevf_info_tbl[] = { 66 [board_82599_vf] = &ixgbevf_82599_vf_info, 67 [board_X540_vf] = &ixgbevf_X540_vf_info, 68}; 69 70/* ixgbevf_pci_tbl - PCI Device ID Table 71 * 72 * Wildcard entries (PCI_ANY_ID) should come last 73 * Last entry must be all 0s 74 * 75 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 76 * Class, Class Mask, private data (not used) } 77 */ 78static struct pci_device_id ixgbevf_pci_tbl[] = { 79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), 80 board_82599_vf}, 81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), 82 board_X540_vf}, 83 84 /* required last entry */ 85 {0, } 86}; 87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); 88 89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 90MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver"); 91MODULE_LICENSE("GPL"); 92MODULE_VERSION(DRV_VERSION); 93 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) 95static int debug = -1; 96module_param(debug, int, 0); 97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 98 99/* forward decls */ 100static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector); 101static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 102 u32 itr_reg); 103 104static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw, 105 struct ixgbevf_ring *rx_ring, 106 u32 val) 107{ 108 /* 109 * Force memory writes to complete before letting h/w 110 * know there are new descriptors to fetch. (Only 111 * applicable for weak-ordered memory model archs, 112 * such as IA-64). 113 */ 114 wmb(); 115 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val); 116} 117 118/* 119 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors 120 * @adapter: pointer to adapter struct 121 * @direction: 0 for Rx, 1 for Tx, -1 for other causes 122 * @queue: queue to map the corresponding interrupt to 123 * @msix_vector: the vector to map to the corresponding queue 124 * 125 */ 126static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, 127 u8 queue, u8 msix_vector) 128{ 129 u32 ivar, index; 130 struct ixgbe_hw *hw = &adapter->hw; 131 if (direction == -1) { 132 /* other causes */ 133 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 134 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); 135 ivar &= ~0xFF; 136 ivar |= msix_vector; 137 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); 138 } else { 139 /* tx or rx causes */ 140 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 141 index = ((16 * (queue & 1)) + (8 * direction)); 142 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); 143 ivar &= ~(0xFF << index); 144 ivar |= (msix_vector << index); 145 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); 146 } 147} 148 149static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter, 150 struct ixgbevf_tx_buffer 151 *tx_buffer_info) 152{ 153 if (tx_buffer_info->dma) { 154 if (tx_buffer_info->mapped_as_page) 155 dma_unmap_page(&adapter->pdev->dev, 156 tx_buffer_info->dma, 157 tx_buffer_info->length, 158 DMA_TO_DEVICE); 159 else 160 dma_unmap_single(&adapter->pdev->dev, 161 tx_buffer_info->dma, 162 tx_buffer_info->length, 163 DMA_TO_DEVICE); 164 tx_buffer_info->dma = 0; 165 } 166 if (tx_buffer_info->skb) { 167 dev_kfree_skb_any(tx_buffer_info->skb); 168 tx_buffer_info->skb = NULL; 169 } 170 tx_buffer_info->time_stamp = 0; 171 /* tx_buffer_info must be completely set up in the transmit path */ 172} 173 174#define IXGBE_MAX_TXD_PWR 14 175#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) 176 177/* Tx Descriptors needed, worst case */ 178#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \ 179 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) 180#ifdef MAX_SKB_FRAGS 181#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \ 182 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */ 183#else 184#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) 185#endif 186 187static void ixgbevf_tx_timeout(struct net_device *netdev); 188 189/** 190 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes 191 * @adapter: board private structure 192 * @tx_ring: tx ring to clean 193 **/ 194static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter, 195 struct ixgbevf_ring *tx_ring) 196{ 197 struct net_device *netdev = adapter->netdev; 198 struct ixgbe_hw *hw = &adapter->hw; 199 union ixgbe_adv_tx_desc *tx_desc, *eop_desc; 200 struct ixgbevf_tx_buffer *tx_buffer_info; 201 unsigned int i, eop, count = 0; 202 unsigned int total_bytes = 0, total_packets = 0; 203 204 i = tx_ring->next_to_clean; 205 eop = tx_ring->tx_buffer_info[i].next_to_watch; 206 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 207 208 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) && 209 (count < tx_ring->work_limit)) { 210 bool cleaned = false; 211 rmb(); /* read buffer_info after eop_desc */ 212 /* eop could change between read and DD-check */ 213 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch)) 214 goto cont_loop; 215 for ( ; !cleaned; count++) { 216 struct sk_buff *skb; 217 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 218 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 219 cleaned = (i == eop); 220 skb = tx_buffer_info->skb; 221 222 if (cleaned && skb) { 223 unsigned int segs, bytecount; 224 225 /* gso_segs is currently only valid for tcp */ 226 segs = skb_shinfo(skb)->gso_segs ?: 1; 227 /* multiply data chunks by size of headers */ 228 bytecount = ((segs - 1) * skb_headlen(skb)) + 229 skb->len; 230 total_packets += segs; 231 total_bytes += bytecount; 232 } 233 234 ixgbevf_unmap_and_free_tx_resource(adapter, 235 tx_buffer_info); 236 237 tx_desc->wb.status = 0; 238 239 i++; 240 if (i == tx_ring->count) 241 i = 0; 242 } 243 244cont_loop: 245 eop = tx_ring->tx_buffer_info[i].next_to_watch; 246 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 247 } 248 249 tx_ring->next_to_clean = i; 250 251#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 252 if (unlikely(count && netif_carrier_ok(netdev) && 253 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) { 254 /* Make sure that anybody stopping the queue after this 255 * sees the new next_to_clean. 256 */ 257 smp_mb(); 258#ifdef HAVE_TX_MQ 259 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && 260 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 261 netif_wake_subqueue(netdev, tx_ring->queue_index); 262 ++adapter->restart_queue; 263 } 264#else 265 if (netif_queue_stopped(netdev) && 266 !test_bit(__IXGBEVF_DOWN, &adapter->state)) { 267 netif_wake_queue(netdev); 268 ++adapter->restart_queue; 269 } 270#endif 271 } 272 273 /* re-arm the interrupt */ 274 if ((count >= tx_ring->work_limit) && 275 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) { 276 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx); 277 } 278 279 u64_stats_update_begin(&tx_ring->syncp); 280 tx_ring->total_bytes += total_bytes; 281 tx_ring->total_packets += total_packets; 282 u64_stats_update_end(&tx_ring->syncp); 283 284 return count < tx_ring->work_limit; 285} 286 287/** 288 * ixgbevf_receive_skb - Send a completed packet up the stack 289 * @q_vector: structure containing interrupt and ring information 290 * @skb: packet to send up 291 * @status: hardware indication of status of receive 292 * @rx_ring: rx descriptor ring (for a specific queue) to setup 293 * @rx_desc: rx descriptor 294 **/ 295static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector, 296 struct sk_buff *skb, u8 status, 297 struct ixgbevf_ring *ring, 298 union ixgbe_adv_rx_desc *rx_desc) 299{ 300 struct ixgbevf_adapter *adapter = q_vector->adapter; 301 bool is_vlan = (status & IXGBE_RXD_STAT_VP); 302 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); 303 304 if (is_vlan && test_bit(tag, adapter->active_vlans)) 305 __vlan_hwaccel_put_tag(skb, tag); 306 307 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) 308 napi_gro_receive(&q_vector->napi, skb); 309 else 310 netif_rx(skb); 311} 312 313/** 314 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum 315 * @adapter: address of board private structure 316 * @status_err: hardware indication of status of receive 317 * @skb: skb currently being received and modified 318 **/ 319static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter, 320 u32 status_err, struct sk_buff *skb) 321{ 322 skb_checksum_none_assert(skb); 323 324 /* Rx csum disabled */ 325 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED)) 326 return; 327 328 /* if IP and error */ 329 if ((status_err & IXGBE_RXD_STAT_IPCS) && 330 (status_err & IXGBE_RXDADV_ERR_IPE)) { 331 adapter->hw_csum_rx_error++; 332 return; 333 } 334 335 if (!(status_err & IXGBE_RXD_STAT_L4CS)) 336 return; 337 338 if (status_err & IXGBE_RXDADV_ERR_TCPE) { 339 adapter->hw_csum_rx_error++; 340 return; 341 } 342 343 /* It must be a TCP or UDP packet with a valid checksum */ 344 skb->ip_summed = CHECKSUM_UNNECESSARY; 345 adapter->hw_csum_rx_good++; 346} 347 348/** 349 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split 350 * @adapter: address of board private structure 351 **/ 352static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter, 353 struct ixgbevf_ring *rx_ring, 354 int cleaned_count) 355{ 356 struct pci_dev *pdev = adapter->pdev; 357 union ixgbe_adv_rx_desc *rx_desc; 358 struct ixgbevf_rx_buffer *bi; 359 struct sk_buff *skb; 360 unsigned int i; 361 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN; 362 363 i = rx_ring->next_to_use; 364 bi = &rx_ring->rx_buffer_info[i]; 365 366 while (cleaned_count--) { 367 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 368 369 if (!bi->page_dma && 370 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) { 371 if (!bi->page) { 372 bi->page = alloc_page(GFP_ATOMIC | __GFP_COLD); 373 if (!bi->page) { 374 adapter->alloc_rx_page_failed++; 375 goto no_buffers; 376 } 377 bi->page_offset = 0; 378 } else { 379 /* use a half page if we're re-using */ 380 bi->page_offset ^= (PAGE_SIZE / 2); 381 } 382 383 bi->page_dma = dma_map_page(&pdev->dev, bi->page, 384 bi->page_offset, 385 (PAGE_SIZE / 2), 386 DMA_FROM_DEVICE); 387 } 388 389 skb = bi->skb; 390 if (!skb) { 391 skb = netdev_alloc_skb(adapter->netdev, 392 bufsz); 393 394 if (!skb) { 395 adapter->alloc_rx_buff_failed++; 396 goto no_buffers; 397 } 398 399 /* 400 * Make buffer alignment 2 beyond a 16 byte boundary 401 * this will result in a 16 byte aligned IP header after 402 * the 14 byte MAC header is removed 403 */ 404 skb_reserve(skb, NET_IP_ALIGN); 405 406 bi->skb = skb; 407 } 408 if (!bi->dma) { 409 bi->dma = dma_map_single(&pdev->dev, skb->data, 410 rx_ring->rx_buf_len, 411 DMA_FROM_DEVICE); 412 } 413 /* Refresh the desc even if buffer_addrs didn't change because 414 * each write-back erases this info. */ 415 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 416 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma); 417 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma); 418 } else { 419 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); 420 } 421 422 i++; 423 if (i == rx_ring->count) 424 i = 0; 425 bi = &rx_ring->rx_buffer_info[i]; 426 } 427 428no_buffers: 429 if (rx_ring->next_to_use != i) { 430 rx_ring->next_to_use = i; 431 if (i-- == 0) 432 i = (rx_ring->count - 1); 433 434 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i); 435 } 436} 437 438static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, 439 u64 qmask) 440{ 441 u32 mask; 442 struct ixgbe_hw *hw = &adapter->hw; 443 444 mask = (qmask & 0xFFFFFFFF); 445 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 446} 447 448static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc) 449{ 450 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info; 451} 452 453static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc) 454{ 455 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; 456} 457 458static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, 459 struct ixgbevf_ring *rx_ring, 460 int *work_done, int work_to_do) 461{ 462 struct ixgbevf_adapter *adapter = q_vector->adapter; 463 struct pci_dev *pdev = adapter->pdev; 464 union ixgbe_adv_rx_desc *rx_desc, *next_rxd; 465 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer; 466 struct sk_buff *skb; 467 unsigned int i; 468 u32 len, staterr; 469 u16 hdr_info; 470 bool cleaned = false; 471 int cleaned_count = 0; 472 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 473 474 i = rx_ring->next_to_clean; 475 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 476 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 477 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 478 479 while (staterr & IXGBE_RXD_STAT_DD) { 480 u32 upper_len = 0; 481 if (*work_done >= work_to_do) 482 break; 483 (*work_done)++; 484 485 rmb(); /* read descriptor and rx_buffer_info after status DD */ 486 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 487 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc)); 488 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >> 489 IXGBE_RXDADV_HDRBUFLEN_SHIFT; 490 if (hdr_info & IXGBE_RXDADV_SPH) 491 adapter->rx_hdr_split++; 492 if (len > IXGBEVF_RX_HDR_SIZE) 493 len = IXGBEVF_RX_HDR_SIZE; 494 upper_len = le16_to_cpu(rx_desc->wb.upper.length); 495 } else { 496 len = le16_to_cpu(rx_desc->wb.upper.length); 497 } 498 cleaned = true; 499 skb = rx_buffer_info->skb; 500 prefetch(skb->data - NET_IP_ALIGN); 501 rx_buffer_info->skb = NULL; 502 503 if (rx_buffer_info->dma) { 504 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 505 rx_ring->rx_buf_len, 506 DMA_FROM_DEVICE); 507 rx_buffer_info->dma = 0; 508 skb_put(skb, len); 509 } 510 511 if (upper_len) { 512 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma, 513 PAGE_SIZE / 2, DMA_FROM_DEVICE); 514 rx_buffer_info->page_dma = 0; 515 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, 516 rx_buffer_info->page, 517 rx_buffer_info->page_offset, 518 upper_len); 519 520 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) || 521 (page_count(rx_buffer_info->page) != 1)) 522 rx_buffer_info->page = NULL; 523 else 524 get_page(rx_buffer_info->page); 525 526 skb->len += upper_len; 527 skb->data_len += upper_len; 528 skb->truesize += upper_len; 529 } 530 531 i++; 532 if (i == rx_ring->count) 533 i = 0; 534 535 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i); 536 prefetch(next_rxd); 537 cleaned_count++; 538 539 next_buffer = &rx_ring->rx_buffer_info[i]; 540 541 if (!(staterr & IXGBE_RXD_STAT_EOP)) { 542 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 543 rx_buffer_info->skb = next_buffer->skb; 544 rx_buffer_info->dma = next_buffer->dma; 545 next_buffer->skb = skb; 546 next_buffer->dma = 0; 547 } else { 548 skb->next = next_buffer->skb; 549 skb->next->prev = skb; 550 } 551 adapter->non_eop_descs++; 552 goto next_desc; 553 } 554 555 /* ERR_MASK will only have valid bits if EOP set */ 556 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) { 557 dev_kfree_skb_irq(skb); 558 goto next_desc; 559 } 560 561 ixgbevf_rx_checksum(adapter, staterr, skb); 562 563 /* probably a little skewed due to removing CRC */ 564 total_rx_bytes += skb->len; 565 total_rx_packets++; 566 567 /* 568 * Work around issue of some types of VM to VM loop back 569 * packets not getting split correctly 570 */ 571 if (staterr & IXGBE_RXD_STAT_LB) { 572 u32 header_fixup_len = skb_headlen(skb); 573 if (header_fixup_len < 14) 574 skb_push(skb, header_fixup_len); 575 } 576 skb->protocol = eth_type_trans(skb, adapter->netdev); 577 578 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc); 579 580next_desc: 581 rx_desc->wb.upper.status_error = 0; 582 583 /* return some buffers to hardware, one at a time is too slow */ 584 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { 585 ixgbevf_alloc_rx_buffers(adapter, rx_ring, 586 cleaned_count); 587 cleaned_count = 0; 588 } 589 590 /* use prefetched values */ 591 rx_desc = next_rxd; 592 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 593 594 staterr = le32_to_cpu(rx_desc->wb.upper.status_error); 595 } 596 597 rx_ring->next_to_clean = i; 598 cleaned_count = IXGBE_DESC_UNUSED(rx_ring); 599 600 if (cleaned_count) 601 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count); 602 603 u64_stats_update_begin(&rx_ring->syncp); 604 rx_ring->total_packets += total_rx_packets; 605 rx_ring->total_bytes += total_rx_bytes; 606 u64_stats_update_end(&rx_ring->syncp); 607 608 return cleaned; 609} 610 611/** 612 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine 613 * @napi: napi struct with our devices info in it 614 * @budget: amount of work driver is allowed to do this pass, in packets 615 * 616 * This function is optimized for cleaning one queue only on a single 617 * q_vector!!! 618 **/ 619static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget) 620{ 621 struct ixgbevf_q_vector *q_vector = 622 container_of(napi, struct ixgbevf_q_vector, napi); 623 struct ixgbevf_adapter *adapter = q_vector->adapter; 624 struct ixgbevf_ring *rx_ring = NULL; 625 int work_done = 0; 626 long r_idx; 627 628 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 629 rx_ring = &(adapter->rx_ring[r_idx]); 630 631 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 632 633 /* If all Rx work done, exit the polling mode */ 634 if (work_done < budget) { 635 napi_complete(napi); 636 if (adapter->itr_setting & 1) 637 ixgbevf_set_itr_msix(q_vector); 638 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 639 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx); 640 } 641 642 return work_done; 643} 644 645/** 646 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine 647 * @napi: napi struct with our devices info in it 648 * @budget: amount of work driver is allowed to do this pass, in packets 649 * 650 * This function will clean more than one rx queue associated with a 651 * q_vector. 652 **/ 653static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget) 654{ 655 struct ixgbevf_q_vector *q_vector = 656 container_of(napi, struct ixgbevf_q_vector, napi); 657 struct ixgbevf_adapter *adapter = q_vector->adapter; 658 struct ixgbevf_ring *rx_ring = NULL; 659 int work_done = 0, i; 660 long r_idx; 661 u64 enable_mask = 0; 662 663 /* attempt to distribute budget to each queue fairly, but don't allow 664 * the budget to go below 1 because we'll exit polling */ 665 budget /= (q_vector->rxr_count ?: 1); 666 budget = max(budget, 1); 667 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 668 for (i = 0; i < q_vector->rxr_count; i++) { 669 rx_ring = &(adapter->rx_ring[r_idx]); 670 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget); 671 enable_mask |= rx_ring->v_idx; 672 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 673 r_idx + 1); 674 } 675 676#ifndef HAVE_NETDEV_NAPI_LIST 677 if (!netif_running(adapter->netdev)) 678 work_done = 0; 679 680#endif 681 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 682 rx_ring = &(adapter->rx_ring[r_idx]); 683 684 /* If all Rx work done, exit the polling mode */ 685 if (work_done < budget) { 686 napi_complete(napi); 687 if (adapter->itr_setting & 1) 688 ixgbevf_set_itr_msix(q_vector); 689 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 690 ixgbevf_irq_enable_queues(adapter, enable_mask); 691 } 692 693 return work_done; 694} 695 696 697/** 698 * ixgbevf_configure_msix - Configure MSI-X hardware 699 * @adapter: board private structure 700 * 701 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X 702 * interrupts. 703 **/ 704static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) 705{ 706 struct ixgbevf_q_vector *q_vector; 707 struct ixgbe_hw *hw = &adapter->hw; 708 int i, j, q_vectors, v_idx, r_idx; 709 u32 mask; 710 711 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 712 713 /* 714 * Populate the IVAR table and set the ITR values to the 715 * corresponding register. 716 */ 717 for (v_idx = 0; v_idx < q_vectors; v_idx++) { 718 q_vector = adapter->q_vector[v_idx]; 719 /* XXX for_each_set_bit(...) */ 720 r_idx = find_first_bit(q_vector->rxr_idx, 721 adapter->num_rx_queues); 722 723 for (i = 0; i < q_vector->rxr_count; i++) { 724 j = adapter->rx_ring[r_idx].reg_idx; 725 ixgbevf_set_ivar(adapter, 0, j, v_idx); 726 r_idx = find_next_bit(q_vector->rxr_idx, 727 adapter->num_rx_queues, 728 r_idx + 1); 729 } 730 r_idx = find_first_bit(q_vector->txr_idx, 731 adapter->num_tx_queues); 732 733 for (i = 0; i < q_vector->txr_count; i++) { 734 j = adapter->tx_ring[r_idx].reg_idx; 735 ixgbevf_set_ivar(adapter, 1, j, v_idx); 736 r_idx = find_next_bit(q_vector->txr_idx, 737 adapter->num_tx_queues, 738 r_idx + 1); 739 } 740 741 /* if this is a tx only vector halve the interrupt rate */ 742 if (q_vector->txr_count && !q_vector->rxr_count) 743 q_vector->eitr = (adapter->eitr_param >> 1); 744 else if (q_vector->rxr_count) 745 /* rx only */ 746 q_vector->eitr = adapter->eitr_param; 747 748 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr); 749 } 750 751 ixgbevf_set_ivar(adapter, -1, 1, v_idx); 752 753 /* set up to autoclear timer, and the vectors */ 754 mask = IXGBE_EIMS_ENABLE_MASK; 755 mask &= ~IXGBE_EIMS_OTHER; 756 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask); 757} 758 759enum latency_range { 760 lowest_latency = 0, 761 low_latency = 1, 762 bulk_latency = 2, 763 latency_invalid = 255 764}; 765 766/** 767 * ixgbevf_update_itr - update the dynamic ITR value based on statistics 768 * @adapter: pointer to adapter 769 * @eitr: eitr setting (ints per sec) to give last timeslice 770 * @itr_setting: current throttle rate in ints/second 771 * @packets: the number of packets during this measurement interval 772 * @bytes: the number of bytes during this measurement interval 773 * 774 * Stores a new ITR value based on packets and byte 775 * counts during the last interrupt. The advantage of per interrupt 776 * computation is faster updates and more accurate ITR for the current 777 * traffic pattern. Constants in this function were computed 778 * based on theoretical maximum wire speed and thresholds were set based 779 * on testing data as well as attempting to minimize response time 780 * while increasing bulk throughput. 781 **/ 782static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter, 783 u32 eitr, u8 itr_setting, 784 int packets, int bytes) 785{ 786 unsigned int retval = itr_setting; 787 u32 timepassed_us; 788 u64 bytes_perint; 789 790 if (packets == 0) 791 goto update_itr_done; 792 793 794 /* simple throttlerate management 795 * 0-20MB/s lowest (100000 ints/s) 796 * 20-100MB/s low (20000 ints/s) 797 * 100-1249MB/s bulk (8000 ints/s) 798 */ 799 /* what was last interrupt timeslice? */ 800 timepassed_us = 1000000/eitr; 801 bytes_perint = bytes / timepassed_us; /* bytes/usec */ 802 803 switch (itr_setting) { 804 case lowest_latency: 805 if (bytes_perint > adapter->eitr_low) 806 retval = low_latency; 807 break; 808 case low_latency: 809 if (bytes_perint > adapter->eitr_high) 810 retval = bulk_latency; 811 else if (bytes_perint <= adapter->eitr_low) 812 retval = lowest_latency; 813 break; 814 case bulk_latency: 815 if (bytes_perint <= adapter->eitr_high) 816 retval = low_latency; 817 break; 818 } 819 820update_itr_done: 821 return retval; 822} 823 824/** 825 * ixgbevf_write_eitr - write VTEITR register in hardware specific way 826 * @adapter: pointer to adapter struct 827 * @v_idx: vector index into q_vector array 828 * @itr_reg: new value to be written in *register* format, not ints/s 829 * 830 * This function is made to be called by ethtool and by the driver 831 * when it needs to update VTEITR registers at runtime. Hardware 832 * specific quirks/differences are taken care of here. 833 */ 834static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx, 835 u32 itr_reg) 836{ 837 struct ixgbe_hw *hw = &adapter->hw; 838 839 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg); 840 841 /* 842 * set the WDIS bit to not clear the timer bits and cause an 843 * immediate assertion of the interrupt 844 */ 845 itr_reg |= IXGBE_EITR_CNT_WDIS; 846 847 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); 848} 849 850static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector) 851{ 852 struct ixgbevf_adapter *adapter = q_vector->adapter; 853 u32 new_itr; 854 u8 current_itr, ret_itr; 855 int i, r_idx, v_idx = q_vector->v_idx; 856 struct ixgbevf_ring *rx_ring, *tx_ring; 857 858 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 859 for (i = 0; i < q_vector->txr_count; i++) { 860 tx_ring = &(adapter->tx_ring[r_idx]); 861 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 862 q_vector->tx_itr, 863 tx_ring->total_packets, 864 tx_ring->total_bytes); 865 /* if the result for this queue would decrease interrupt 866 * rate for this vector then use that result */ 867 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ? 868 q_vector->tx_itr - 1 : ret_itr); 869 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 870 r_idx + 1); 871 } 872 873 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 874 for (i = 0; i < q_vector->rxr_count; i++) { 875 rx_ring = &(adapter->rx_ring[r_idx]); 876 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr, 877 q_vector->rx_itr, 878 rx_ring->total_packets, 879 rx_ring->total_bytes); 880 /* if the result for this queue would decrease interrupt 881 * rate for this vector then use that result */ 882 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ? 883 q_vector->rx_itr - 1 : ret_itr); 884 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 885 r_idx + 1); 886 } 887 888 current_itr = max(q_vector->rx_itr, q_vector->tx_itr); 889 890 switch (current_itr) { 891 /* counts and packets in update_itr are dependent on these numbers */ 892 case lowest_latency: 893 new_itr = 100000; 894 break; 895 case low_latency: 896 new_itr = 20000; /* aka hwitr = ~200 */ 897 break; 898 case bulk_latency: 899 default: 900 new_itr = 8000; 901 break; 902 } 903 904 if (new_itr != q_vector->eitr) { 905 u32 itr_reg; 906 907 /* save the algorithm value here, not the smoothed one */ 908 q_vector->eitr = new_itr; 909 /* do an exponential smoothing */ 910 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); 911 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); 912 ixgbevf_write_eitr(adapter, v_idx, itr_reg); 913 } 914} 915 916static irqreturn_t ixgbevf_msix_mbx(int irq, void *data) 917{ 918 struct net_device *netdev = data; 919 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 920 struct ixgbe_hw *hw = &adapter->hw; 921 u32 eicr; 922 u32 msg; 923 bool got_ack = false; 924 925 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS); 926 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr); 927 928 if (!hw->mbx.ops.check_for_ack(hw)) 929 got_ack = true; 930 931 if (!hw->mbx.ops.check_for_msg(hw)) { 932 hw->mbx.ops.read(hw, &msg, 1); 933 934 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG) 935 mod_timer(&adapter->watchdog_timer, 936 round_jiffies(jiffies + 1)); 937 938 if (msg & IXGBE_VT_MSGTYPE_NACK) 939 pr_warn("Last Request of type %2.2x to PF Nacked\n", 940 msg & 0xFF); 941 /* 942 * Restore the PFSTS bit in case someone is polling for a 943 * return message from the PF 944 */ 945 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFSTS; 946 } 947 948 /* 949 * checking for the ack clears the PFACK bit. Place 950 * it back in the v2p_mailbox cache so that anyone 951 * polling for an ack will not miss it 952 */ 953 if (got_ack) 954 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK; 955 956 return IRQ_HANDLED; 957} 958 959static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data) 960{ 961 struct ixgbevf_q_vector *q_vector = data; 962 struct ixgbevf_adapter *adapter = q_vector->adapter; 963 struct ixgbevf_ring *tx_ring; 964 int i, r_idx; 965 966 if (!q_vector->txr_count) 967 return IRQ_HANDLED; 968 969 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); 970 for (i = 0; i < q_vector->txr_count; i++) { 971 tx_ring = &(adapter->tx_ring[r_idx]); 972 tx_ring->total_bytes = 0; 973 tx_ring->total_packets = 0; 974 ixgbevf_clean_tx_irq(adapter, tx_ring); 975 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, 976 r_idx + 1); 977 } 978 979 if (adapter->itr_setting & 1) 980 ixgbevf_set_itr_msix(q_vector); 981 982 return IRQ_HANDLED; 983} 984 985/** 986 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues) 987 * @irq: unused 988 * @data: pointer to our q_vector struct for this interrupt vector 989 **/ 990static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data) 991{ 992 struct ixgbevf_q_vector *q_vector = data; 993 struct ixgbevf_adapter *adapter = q_vector->adapter; 994 struct ixgbe_hw *hw = &adapter->hw; 995 struct ixgbevf_ring *rx_ring; 996 int r_idx; 997 int i; 998 999 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1000 for (i = 0; i < q_vector->rxr_count; i++) { 1001 rx_ring = &(adapter->rx_ring[r_idx]); 1002 rx_ring->total_bytes = 0; 1003 rx_ring->total_packets = 0; 1004 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, 1005 r_idx + 1); 1006 } 1007 1008 if (!q_vector->rxr_count) 1009 return IRQ_HANDLED; 1010 1011 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); 1012 rx_ring = &(adapter->rx_ring[r_idx]); 1013 /* disable interrupts on this vector only */ 1014 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx); 1015 napi_schedule(&q_vector->napi); 1016 1017 1018 return IRQ_HANDLED; 1019} 1020 1021static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data) 1022{ 1023 ixgbevf_msix_clean_rx(irq, data); 1024 ixgbevf_msix_clean_tx(irq, data); 1025 1026 return IRQ_HANDLED; 1027} 1028 1029static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx, 1030 int r_idx) 1031{ 1032 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 1033 1034 set_bit(r_idx, q_vector->rxr_idx); 1035 q_vector->rxr_count++; 1036 a->rx_ring[r_idx].v_idx = 1 << v_idx; 1037} 1038 1039static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx, 1040 int t_idx) 1041{ 1042 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; 1043 1044 set_bit(t_idx, q_vector->txr_idx); 1045 q_vector->txr_count++; 1046 a->tx_ring[t_idx].v_idx = 1 << v_idx; 1047} 1048 1049/** 1050 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors 1051 * @adapter: board private structure to initialize 1052 * 1053 * This function maps descriptor rings to the queue-specific vectors 1054 * we were allotted through the MSI-X enabling code. Ideally, we'd have 1055 * one vector per ring/queue, but on a constrained vector budget, we 1056 * group the rings as "efficiently" as possible. You would add new 1057 * mapping configurations in here. 1058 **/ 1059static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter) 1060{ 1061 int q_vectors; 1062 int v_start = 0; 1063 int rxr_idx = 0, txr_idx = 0; 1064 int rxr_remaining = adapter->num_rx_queues; 1065 int txr_remaining = adapter->num_tx_queues; 1066 int i, j; 1067 int rqpv, tqpv; 1068 int err = 0; 1069 1070 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1071 1072 /* 1073 * The ideal configuration... 1074 * We have enough vectors to map one per queue. 1075 */ 1076 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) { 1077 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) 1078 map_vector_to_rxq(adapter, v_start, rxr_idx); 1079 1080 for (; txr_idx < txr_remaining; v_start++, txr_idx++) 1081 map_vector_to_txq(adapter, v_start, txr_idx); 1082 goto out; 1083 } 1084 1085 /* 1086 * If we don't have enough vectors for a 1-to-1 1087 * mapping, we'll have to group them so there are 1088 * multiple queues per vector. 1089 */ 1090 /* Re-adjusting *qpv takes care of the remainder. */ 1091 for (i = v_start; i < q_vectors; i++) { 1092 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i); 1093 for (j = 0; j < rqpv; j++) { 1094 map_vector_to_rxq(adapter, i, rxr_idx); 1095 rxr_idx++; 1096 rxr_remaining--; 1097 } 1098 } 1099 for (i = v_start; i < q_vectors; i++) { 1100 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i); 1101 for (j = 0; j < tqpv; j++) { 1102 map_vector_to_txq(adapter, i, txr_idx); 1103 txr_idx++; 1104 txr_remaining--; 1105 } 1106 } 1107 1108out: 1109 return err; 1110} 1111 1112/** 1113 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts 1114 * @adapter: board private structure 1115 * 1116 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests 1117 * interrupts from the kernel. 1118 **/ 1119static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) 1120{ 1121 struct net_device *netdev = adapter->netdev; 1122 irqreturn_t (*handler)(int, void *); 1123 int i, vector, q_vectors, err; 1124 int ri = 0, ti = 0; 1125 1126 /* Decrement for Other and TCP Timer vectors */ 1127 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1128 1129#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \ 1130 ? &ixgbevf_msix_clean_many : \ 1131 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \ 1132 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \ 1133 NULL) 1134 for (vector = 0; vector < q_vectors; vector++) { 1135 handler = SET_HANDLER(adapter->q_vector[vector]); 1136 1137 if (handler == &ixgbevf_msix_clean_rx) { 1138 sprintf(adapter->name[vector], "%s-%s-%d", 1139 netdev->name, "rx", ri++); 1140 } else if (handler == &ixgbevf_msix_clean_tx) { 1141 sprintf(adapter->name[vector], "%s-%s-%d", 1142 netdev->name, "tx", ti++); 1143 } else if (handler == &ixgbevf_msix_clean_many) { 1144 sprintf(adapter->name[vector], "%s-%s-%d", 1145 netdev->name, "TxRx", vector); 1146 } else { 1147 /* skip this unused q_vector */ 1148 continue; 1149 } 1150 err = request_irq(adapter->msix_entries[vector].vector, 1151 handler, 0, adapter->name[vector], 1152 adapter->q_vector[vector]); 1153 if (err) { 1154 hw_dbg(&adapter->hw, 1155 "request_irq failed for MSIX interrupt " 1156 "Error: %d\n", err); 1157 goto free_queue_irqs; 1158 } 1159 } 1160 1161 sprintf(adapter->name[vector], "%s:mbx", netdev->name); 1162 err = request_irq(adapter->msix_entries[vector].vector, 1163 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev); 1164 if (err) { 1165 hw_dbg(&adapter->hw, 1166 "request_irq for msix_mbx failed: %d\n", err); 1167 goto free_queue_irqs; 1168 } 1169 1170 return 0; 1171 1172free_queue_irqs: 1173 for (i = vector - 1; i >= 0; i--) 1174 free_irq(adapter->msix_entries[--vector].vector, 1175 &(adapter->q_vector[i])); 1176 pci_disable_msix(adapter->pdev); 1177 kfree(adapter->msix_entries); 1178 adapter->msix_entries = NULL; 1179 return err; 1180} 1181 1182static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter) 1183{ 1184 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1185 1186 for (i = 0; i < q_vectors; i++) { 1187 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i]; 1188 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES); 1189 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES); 1190 q_vector->rxr_count = 0; 1191 q_vector->txr_count = 0; 1192 q_vector->eitr = adapter->eitr_param; 1193 } 1194} 1195 1196/** 1197 * ixgbevf_request_irq - initialize interrupts 1198 * @adapter: board private structure 1199 * 1200 * Attempts to configure interrupts using the best available 1201 * capabilities of the hardware and kernel. 1202 **/ 1203static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) 1204{ 1205 int err = 0; 1206 1207 err = ixgbevf_request_msix_irqs(adapter); 1208 1209 if (err) 1210 hw_dbg(&adapter->hw, 1211 "request_irq failed, Error %d\n", err); 1212 1213 return err; 1214} 1215 1216static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) 1217{ 1218 struct net_device *netdev = adapter->netdev; 1219 int i, q_vectors; 1220 1221 q_vectors = adapter->num_msix_vectors; 1222 1223 i = q_vectors - 1; 1224 1225 free_irq(adapter->msix_entries[i].vector, netdev); 1226 i--; 1227 1228 for (; i >= 0; i--) { 1229 free_irq(adapter->msix_entries[i].vector, 1230 adapter->q_vector[i]); 1231 } 1232 1233 ixgbevf_reset_q_vectors(adapter); 1234} 1235 1236/** 1237 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC 1238 * @adapter: board private structure 1239 **/ 1240static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) 1241{ 1242 int i; 1243 struct ixgbe_hw *hw = &adapter->hw; 1244 1245 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); 1246 1247 IXGBE_WRITE_FLUSH(hw); 1248 1249 for (i = 0; i < adapter->num_msix_vectors; i++) 1250 synchronize_irq(adapter->msix_entries[i].vector); 1251} 1252 1253/** 1254 * ixgbevf_irq_enable - Enable default interrupt generation settings 1255 * @adapter: board private structure 1256 **/ 1257static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter, 1258 bool queues, bool flush) 1259{ 1260 struct ixgbe_hw *hw = &adapter->hw; 1261 u32 mask; 1262 u64 qmask; 1263 1264 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); 1265 qmask = ~0; 1266 1267 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); 1268 1269 if (queues) 1270 ixgbevf_irq_enable_queues(adapter, qmask); 1271 1272 if (flush) 1273 IXGBE_WRITE_FLUSH(hw); 1274} 1275 1276/** 1277 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset 1278 * @adapter: board private structure 1279 * 1280 * Configure the Tx unit of the MAC after a reset. 1281 **/ 1282static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) 1283{ 1284 u64 tdba; 1285 struct ixgbe_hw *hw = &adapter->hw; 1286 u32 i, j, tdlen, txctrl; 1287 1288 /* Setup the HW Tx Head and Tail descriptor pointers */ 1289 for (i = 0; i < adapter->num_tx_queues; i++) { 1290 struct ixgbevf_ring *ring = &adapter->tx_ring[i]; 1291 j = ring->reg_idx; 1292 tdba = ring->dma; 1293 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc); 1294 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j), 1295 (tdba & DMA_BIT_MASK(32))); 1296 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32)); 1297 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen); 1298 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0); 1299 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0); 1300 adapter->tx_ring[i].head = IXGBE_VFTDH(j); 1301 adapter->tx_ring[i].tail = IXGBE_VFTDT(j); 1302 /* Disable Tx Head Writeback RO bit, since this hoses 1303 * bookkeeping if things aren't delivered in order. 1304 */ 1305 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j)); 1306 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; 1307 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl); 1308 } 1309} 1310 1311#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 1312 1313static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index) 1314{ 1315 struct ixgbevf_ring *rx_ring; 1316 struct ixgbe_hw *hw = &adapter->hw; 1317 u32 srrctl; 1318 1319 rx_ring = &adapter->rx_ring[index]; 1320 1321 srrctl = IXGBE_SRRCTL_DROP_EN; 1322 1323 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1324 u16 bufsz = IXGBEVF_RXBUFFER_2048; 1325 /* grow the amount we can receive on large page machines */ 1326 if (bufsz < (PAGE_SIZE / 2)) 1327 bufsz = (PAGE_SIZE / 2); 1328 /* cap the bufsz at our largest descriptor size */ 1329 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz); 1330 1331 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1332 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; 1333 srrctl |= ((IXGBEVF_RX_HDR_SIZE << 1334 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & 1335 IXGBE_SRRCTL_BSIZEHDR_MASK); 1336 } else { 1337 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; 1338 1339 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) 1340 srrctl |= IXGBEVF_RXBUFFER_2048 >> 1341 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1342 else 1343 srrctl |= rx_ring->rx_buf_len >> 1344 IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1345 } 1346 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); 1347} 1348 1349/** 1350 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset 1351 * @adapter: board private structure 1352 * 1353 * Configure the Rx unit of the MAC after a reset. 1354 **/ 1355static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) 1356{ 1357 u64 rdba; 1358 struct ixgbe_hw *hw = &adapter->hw; 1359 struct net_device *netdev = adapter->netdev; 1360 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1361 int i, j; 1362 u32 rdlen; 1363 int rx_buf_len; 1364 1365 /* Decide whether to use packet split mode or not */ 1366 if (netdev->mtu > ETH_DATA_LEN) { 1367 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE) 1368 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1369 else 1370 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 1371 } else { 1372 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE) 1373 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 1374 else 1375 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1376 } 1377 1378 /* Set the RX buffer length according to the mode */ 1379 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1380 /* PSRTYPE must be initialized in 82599 */ 1381 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | 1382 IXGBE_PSRTYPE_UDPHDR | 1383 IXGBE_PSRTYPE_IPV4HDR | 1384 IXGBE_PSRTYPE_IPV6HDR | 1385 IXGBE_PSRTYPE_L2HDR; 1386 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); 1387 rx_buf_len = IXGBEVF_RX_HDR_SIZE; 1388 } else { 1389 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 1390 if (netdev->mtu <= ETH_DATA_LEN) 1391 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1392 else 1393 rx_buf_len = ALIGN(max_frame, 1024); 1394 } 1395 1396 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); 1397 /* Setup the HW Rx Head and Tail Descriptor Pointers and 1398 * the Base and Length of the Rx Descriptor Ring */ 1399 for (i = 0; i < adapter->num_rx_queues; i++) { 1400 rdba = adapter->rx_ring[i].dma; 1401 j = adapter->rx_ring[i].reg_idx; 1402 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j), 1403 (rdba & DMA_BIT_MASK(32))); 1404 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32)); 1405 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen); 1406 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0); 1407 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0); 1408 adapter->rx_ring[i].head = IXGBE_VFRDH(j); 1409 adapter->rx_ring[i].tail = IXGBE_VFRDT(j); 1410 adapter->rx_ring[i].rx_buf_len = rx_buf_len; 1411 1412 ixgbevf_configure_srrctl(adapter, j); 1413 } 1414} 1415 1416static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1417{ 1418 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1419 struct ixgbe_hw *hw = &adapter->hw; 1420 1421 /* add VID to filter table */ 1422 if (hw->mac.ops.set_vfta) 1423 hw->mac.ops.set_vfta(hw, vid, 0, true); 1424 set_bit(vid, adapter->active_vlans); 1425 1426 return 0; 1427} 1428 1429static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1430{ 1431 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1432 struct ixgbe_hw *hw = &adapter->hw; 1433 1434 /* remove VID from filter table */ 1435 if (hw->mac.ops.set_vfta) 1436 hw->mac.ops.set_vfta(hw, vid, 0, false); 1437 clear_bit(vid, adapter->active_vlans); 1438 1439 return 0; 1440} 1441 1442static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) 1443{ 1444 u16 vid; 1445 1446 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 1447 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid); 1448} 1449 1450static int ixgbevf_write_uc_addr_list(struct net_device *netdev) 1451{ 1452 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1453 struct ixgbe_hw *hw = &adapter->hw; 1454 int count = 0; 1455 1456 if ((netdev_uc_count(netdev)) > 10) { 1457 pr_err("Too many unicast filters - No Space\n"); 1458 return -ENOSPC; 1459 } 1460 1461 if (!netdev_uc_empty(netdev)) { 1462 struct netdev_hw_addr *ha; 1463 netdev_for_each_uc_addr(ha, netdev) { 1464 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr); 1465 udelay(200); 1466 } 1467 } else { 1468 /* 1469 * If the list is empty then send message to PF driver to 1470 * clear all macvlans on this VF. 1471 */ 1472 hw->mac.ops.set_uc_addr(hw, 0, NULL); 1473 } 1474 1475 return count; 1476} 1477 1478/** 1479 * ixgbevf_set_rx_mode - Multicast set 1480 * @netdev: network interface device structure 1481 * 1482 * The set_rx_method entry point is called whenever the multicast address 1483 * list or the network interface flags are updated. This routine is 1484 * responsible for configuring the hardware for proper multicast mode. 1485 **/ 1486static void ixgbevf_set_rx_mode(struct net_device *netdev) 1487{ 1488 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 1489 struct ixgbe_hw *hw = &adapter->hw; 1490 1491 /* reprogram multicast list */ 1492 if (hw->mac.ops.update_mc_addr_list) 1493 hw->mac.ops.update_mc_addr_list(hw, netdev); 1494 1495 ixgbevf_write_uc_addr_list(netdev); 1496} 1497 1498static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) 1499{ 1500 int q_idx; 1501 struct ixgbevf_q_vector *q_vector; 1502 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1503 1504 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1505 struct napi_struct *napi; 1506 q_vector = adapter->q_vector[q_idx]; 1507 if (!q_vector->rxr_count) 1508 continue; 1509 napi = &q_vector->napi; 1510 if (q_vector->rxr_count > 1) 1511 napi->poll = &ixgbevf_clean_rxonly_many; 1512 1513 napi_enable(napi); 1514 } 1515} 1516 1517static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) 1518{ 1519 int q_idx; 1520 struct ixgbevf_q_vector *q_vector; 1521 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 1522 1523 for (q_idx = 0; q_idx < q_vectors; q_idx++) { 1524 q_vector = adapter->q_vector[q_idx]; 1525 if (!q_vector->rxr_count) 1526 continue; 1527 napi_disable(&q_vector->napi); 1528 } 1529} 1530 1531static void ixgbevf_configure(struct ixgbevf_adapter *adapter) 1532{ 1533 struct net_device *netdev = adapter->netdev; 1534 int i; 1535 1536 ixgbevf_set_rx_mode(netdev); 1537 1538 ixgbevf_restore_vlan(adapter); 1539 1540 ixgbevf_configure_tx(adapter); 1541 ixgbevf_configure_rx(adapter); 1542 for (i = 0; i < adapter->num_rx_queues; i++) { 1543 struct ixgbevf_ring *ring = &adapter->rx_ring[i]; 1544 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count); 1545 ring->next_to_use = ring->count - 1; 1546 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail); 1547 } 1548} 1549 1550#define IXGBE_MAX_RX_DESC_POLL 10 1551static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, 1552 int rxr) 1553{ 1554 struct ixgbe_hw *hw = &adapter->hw; 1555 int j = adapter->rx_ring[rxr].reg_idx; 1556 int k; 1557 1558 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) { 1559 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE) 1560 break; 1561 else 1562 msleep(1); 1563 } 1564 if (k >= IXGBE_MAX_RX_DESC_POLL) { 1565 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d " 1566 "not set within the polling period\n", rxr); 1567 } 1568 1569 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr], 1570 (adapter->rx_ring[rxr].count - 1)); 1571} 1572 1573static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) 1574{ 1575 /* Only save pre-reset stats if there are some */ 1576 if (adapter->stats.vfgprc || adapter->stats.vfgptc) { 1577 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - 1578 adapter->stats.base_vfgprc; 1579 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - 1580 adapter->stats.base_vfgptc; 1581 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - 1582 adapter->stats.base_vfgorc; 1583 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - 1584 adapter->stats.base_vfgotc; 1585 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - 1586 adapter->stats.base_vfmprc; 1587 } 1588} 1589 1590static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) 1591{ 1592 struct ixgbe_hw *hw = &adapter->hw; 1593 1594 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); 1595 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); 1596 adapter->stats.last_vfgorc |= 1597 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); 1598 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); 1599 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); 1600 adapter->stats.last_vfgotc |= 1601 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); 1602 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); 1603 1604 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; 1605 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; 1606 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; 1607 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; 1608 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; 1609} 1610 1611static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter) 1612{ 1613 struct net_device *netdev = adapter->netdev; 1614 struct ixgbe_hw *hw = &adapter->hw; 1615 int i, j = 0; 1616 int num_rx_rings = adapter->num_rx_queues; 1617 u32 txdctl, rxdctl; 1618 1619 for (i = 0; i < adapter->num_tx_queues; i++) { 1620 j = adapter->tx_ring[i].reg_idx; 1621 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1622 /* enable WTHRESH=8 descriptors, to encourage burst writeback */ 1623 txdctl |= (8 << 16); 1624 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1625 } 1626 1627 for (i = 0; i < adapter->num_tx_queues; i++) { 1628 j = adapter->tx_ring[i].reg_idx; 1629 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1630 txdctl |= IXGBE_TXDCTL_ENABLE; 1631 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl); 1632 } 1633 1634 for (i = 0; i < num_rx_rings; i++) { 1635 j = adapter->rx_ring[i].reg_idx; 1636 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)); 1637 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME; 1638 if (hw->mac.type == ixgbe_mac_X540_vf) { 1639 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK; 1640 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) | 1641 IXGBE_RXDCTL_RLPML_EN); 1642 } 1643 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl); 1644 ixgbevf_rx_desc_queue_enable(adapter, i); 1645 } 1646 1647 ixgbevf_configure_msix(adapter); 1648 1649 if (hw->mac.ops.set_rar) { 1650 if (is_valid_ether_addr(hw->mac.addr)) 1651 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 1652 else 1653 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); 1654 } 1655 1656 clear_bit(__IXGBEVF_DOWN, &adapter->state); 1657 ixgbevf_napi_enable_all(adapter); 1658 1659 /* enable transmits */ 1660 netif_tx_start_all_queues(netdev); 1661 1662 ixgbevf_save_reset_stats(adapter); 1663 ixgbevf_init_last_counter_stats(adapter); 1664 1665 /* bring the link up in the watchdog, this could race with our first 1666 * link up interrupt but shouldn't be a problem */ 1667 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; 1668 adapter->link_check_timeout = jiffies; 1669 mod_timer(&adapter->watchdog_timer, jiffies); 1670 return 0; 1671} 1672 1673int ixgbevf_up(struct ixgbevf_adapter *adapter) 1674{ 1675 int err; 1676 struct ixgbe_hw *hw = &adapter->hw; 1677 1678 ixgbevf_configure(adapter); 1679 1680 err = ixgbevf_up_complete(adapter); 1681 1682 /* clear any pending interrupts, may auto mask */ 1683 IXGBE_READ_REG(hw, IXGBE_VTEICR); 1684 1685 ixgbevf_irq_enable(adapter, true, true); 1686 1687 return err; 1688} 1689 1690/** 1691 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue 1692 * @adapter: board private structure 1693 * @rx_ring: ring to free buffers from 1694 **/ 1695static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter, 1696 struct ixgbevf_ring *rx_ring) 1697{ 1698 struct pci_dev *pdev = adapter->pdev; 1699 unsigned long size; 1700 unsigned int i; 1701 1702 if (!rx_ring->rx_buffer_info) 1703 return; 1704 1705 /* Free all the Rx ring sk_buffs */ 1706 for (i = 0; i < rx_ring->count; i++) { 1707 struct ixgbevf_rx_buffer *rx_buffer_info; 1708 1709 rx_buffer_info = &rx_ring->rx_buffer_info[i]; 1710 if (rx_buffer_info->dma) { 1711 dma_unmap_single(&pdev->dev, rx_buffer_info->dma, 1712 rx_ring->rx_buf_len, 1713 DMA_FROM_DEVICE); 1714 rx_buffer_info->dma = 0; 1715 } 1716 if (rx_buffer_info->skb) { 1717 struct sk_buff *skb = rx_buffer_info->skb; 1718 rx_buffer_info->skb = NULL; 1719 do { 1720 struct sk_buff *this = skb; 1721 skb = skb->prev; 1722 dev_kfree_skb(this); 1723 } while (skb); 1724 } 1725 if (!rx_buffer_info->page) 1726 continue; 1727 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma, 1728 PAGE_SIZE / 2, DMA_FROM_DEVICE); 1729 rx_buffer_info->page_dma = 0; 1730 put_page(rx_buffer_info->page); 1731 rx_buffer_info->page = NULL; 1732 rx_buffer_info->page_offset = 0; 1733 } 1734 1735 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 1736 memset(rx_ring->rx_buffer_info, 0, size); 1737 1738 /* Zero out the descriptor ring */ 1739 memset(rx_ring->desc, 0, rx_ring->size); 1740 1741 rx_ring->next_to_clean = 0; 1742 rx_ring->next_to_use = 0; 1743 1744 if (rx_ring->head) 1745 writel(0, adapter->hw.hw_addr + rx_ring->head); 1746 if (rx_ring->tail) 1747 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1748} 1749 1750/** 1751 * ixgbevf_clean_tx_ring - Free Tx Buffers 1752 * @adapter: board private structure 1753 * @tx_ring: ring to be cleaned 1754 **/ 1755static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter, 1756 struct ixgbevf_ring *tx_ring) 1757{ 1758 struct ixgbevf_tx_buffer *tx_buffer_info; 1759 unsigned long size; 1760 unsigned int i; 1761 1762 if (!tx_ring->tx_buffer_info) 1763 return; 1764 1765 /* Free all the Tx ring sk_buffs */ 1766 1767 for (i = 0; i < tx_ring->count; i++) { 1768 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 1769 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 1770 } 1771 1772 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 1773 memset(tx_ring->tx_buffer_info, 0, size); 1774 1775 memset(tx_ring->desc, 0, tx_ring->size); 1776 1777 tx_ring->next_to_use = 0; 1778 tx_ring->next_to_clean = 0; 1779 1780 if (tx_ring->head) 1781 writel(0, adapter->hw.hw_addr + tx_ring->head); 1782 if (tx_ring->tail) 1783 writel(0, adapter->hw.hw_addr + tx_ring->tail); 1784} 1785 1786/** 1787 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues 1788 * @adapter: board private structure 1789 **/ 1790static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) 1791{ 1792 int i; 1793 1794 for (i = 0; i < adapter->num_rx_queues; i++) 1795 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]); 1796} 1797 1798/** 1799 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues 1800 * @adapter: board private structure 1801 **/ 1802static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) 1803{ 1804 int i; 1805 1806 for (i = 0; i < adapter->num_tx_queues; i++) 1807 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]); 1808} 1809 1810void ixgbevf_down(struct ixgbevf_adapter *adapter) 1811{ 1812 struct net_device *netdev = adapter->netdev; 1813 struct ixgbe_hw *hw = &adapter->hw; 1814 u32 txdctl; 1815 int i, j; 1816 1817 /* signal that we are down to the interrupt handler */ 1818 set_bit(__IXGBEVF_DOWN, &adapter->state); 1819 /* disable receives */ 1820 1821 netif_tx_disable(netdev); 1822 1823 msleep(10); 1824 1825 netif_tx_stop_all_queues(netdev); 1826 1827 ixgbevf_irq_disable(adapter); 1828 1829 ixgbevf_napi_disable_all(adapter); 1830 1831 del_timer_sync(&adapter->watchdog_timer); 1832 /* can't call flush scheduled work here because it can deadlock 1833 * if linkwatch_event tries to acquire the rtnl_lock which we are 1834 * holding */ 1835 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK) 1836 msleep(1); 1837 1838 /* disable transmits in the hardware now that interrupts are off */ 1839 for (i = 0; i < adapter->num_tx_queues; i++) { 1840 j = adapter->tx_ring[i].reg_idx; 1841 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j)); 1842 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), 1843 (txdctl & ~IXGBE_TXDCTL_ENABLE)); 1844 } 1845 1846 netif_carrier_off(netdev); 1847 1848 if (!pci_channel_offline(adapter->pdev)) 1849 ixgbevf_reset(adapter); 1850 1851 ixgbevf_clean_all_tx_rings(adapter); 1852 ixgbevf_clean_all_rx_rings(adapter); 1853} 1854 1855void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) 1856{ 1857 struct ixgbe_hw *hw = &adapter->hw; 1858 1859 WARN_ON(in_interrupt()); 1860 1861 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) 1862 msleep(1); 1863 1864 /* 1865 * Check if PF is up before re-init. If not then skip until 1866 * later when the PF is up and ready to service requests from 1867 * the VF via mailbox. If the VF is up and running then the 1868 * watchdog task will continue to schedule reset tasks until 1869 * the PF is up and running. 1870 */ 1871 if (!hw->mac.ops.reset_hw(hw)) { 1872 ixgbevf_down(adapter); 1873 ixgbevf_up(adapter); 1874 } 1875 1876 clear_bit(__IXGBEVF_RESETTING, &adapter->state); 1877} 1878 1879void ixgbevf_reset(struct ixgbevf_adapter *adapter) 1880{ 1881 struct ixgbe_hw *hw = &adapter->hw; 1882 struct net_device *netdev = adapter->netdev; 1883 1884 if (hw->mac.ops.reset_hw(hw)) 1885 hw_dbg(hw, "PF still resetting\n"); 1886 else 1887 hw->mac.ops.init_hw(hw); 1888 1889 if (is_valid_ether_addr(adapter->hw.mac.addr)) { 1890 memcpy(netdev->dev_addr, adapter->hw.mac.addr, 1891 netdev->addr_len); 1892 memcpy(netdev->perm_addr, adapter->hw.mac.addr, 1893 netdev->addr_len); 1894 } 1895} 1896 1897static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, 1898 int vectors) 1899{ 1900 int err, vector_threshold; 1901 1902 /* We'll want at least 3 (vector_threshold): 1903 * 1) TxQ[0] Cleanup 1904 * 2) RxQ[0] Cleanup 1905 * 3) Other (Link Status Change, etc.) 1906 */ 1907 vector_threshold = MIN_MSIX_COUNT; 1908 1909 /* The more we get, the more we will assign to Tx/Rx Cleanup 1910 * for the separate queues...where Rx Cleanup >= Tx Cleanup. 1911 * Right now, we simply care about how many we'll get; we'll 1912 * set them up later while requesting irq's. 1913 */ 1914 while (vectors >= vector_threshold) { 1915 err = pci_enable_msix(adapter->pdev, adapter->msix_entries, 1916 vectors); 1917 if (!err) /* Success in acquiring all requested vectors. */ 1918 break; 1919 else if (err < 0) 1920 vectors = 0; /* Nasty failure, quit now */ 1921 else /* err == number of vectors we should try again with */ 1922 vectors = err; 1923 } 1924 1925 if (vectors < vector_threshold) { 1926 /* Can't allocate enough MSI-X interrupts? Oh well. 1927 * This just means we'll go with either a single MSI 1928 * vector or fall back to legacy interrupts. 1929 */ 1930 hw_dbg(&adapter->hw, 1931 "Unable to allocate MSI-X interrupts\n"); 1932 kfree(adapter->msix_entries); 1933 adapter->msix_entries = NULL; 1934 } else { 1935 /* 1936 * Adjust for only the vectors we'll use, which is minimum 1937 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of 1938 * vectors we were allocated. 1939 */ 1940 adapter->num_msix_vectors = vectors; 1941 } 1942} 1943 1944/* 1945 * ixgbevf_set_num_queues: Allocate queues for device, feature dependent 1946 * @adapter: board private structure to initialize 1947 * 1948 * This is the top level queue allocation routine. The order here is very 1949 * important, starting with the "most" number of features turned on at once, 1950 * and ending with the smallest set of features. This way large combinations 1951 * can be allocated if they're turned on, and smaller combinations are the 1952 * fallthrough conditions. 1953 * 1954 **/ 1955static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) 1956{ 1957 /* Start with base case */ 1958 adapter->num_rx_queues = 1; 1959 adapter->num_tx_queues = 1; 1960 adapter->num_rx_pools = adapter->num_rx_queues; 1961 adapter->num_rx_queues_per_pool = 1; 1962} 1963 1964/** 1965 * ixgbevf_alloc_queues - Allocate memory for all rings 1966 * @adapter: board private structure to initialize 1967 * 1968 * We allocate one ring per queue at run-time since we don't know the 1969 * number of queues at compile-time. The polling_netdev array is 1970 * intended for Multiqueue, but should work fine with a single queue. 1971 **/ 1972static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter) 1973{ 1974 int i; 1975 1976 adapter->tx_ring = kcalloc(adapter->num_tx_queues, 1977 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1978 if (!adapter->tx_ring) 1979 goto err_tx_ring_allocation; 1980 1981 adapter->rx_ring = kcalloc(adapter->num_rx_queues, 1982 sizeof(struct ixgbevf_ring), GFP_KERNEL); 1983 if (!adapter->rx_ring) 1984 goto err_rx_ring_allocation; 1985 1986 for (i = 0; i < adapter->num_tx_queues; i++) { 1987 adapter->tx_ring[i].count = adapter->tx_ring_count; 1988 adapter->tx_ring[i].queue_index = i; 1989 adapter->tx_ring[i].reg_idx = i; 1990 } 1991 1992 for (i = 0; i < adapter->num_rx_queues; i++) { 1993 adapter->rx_ring[i].count = adapter->rx_ring_count; 1994 adapter->rx_ring[i].queue_index = i; 1995 adapter->rx_ring[i].reg_idx = i; 1996 } 1997 1998 return 0; 1999 2000err_rx_ring_allocation: 2001 kfree(adapter->tx_ring); 2002err_tx_ring_allocation: 2003 return -ENOMEM; 2004} 2005 2006/** 2007 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported 2008 * @adapter: board private structure to initialize 2009 * 2010 * Attempt to configure the interrupts using the best available 2011 * capabilities of the hardware and the kernel. 2012 **/ 2013static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) 2014{ 2015 int err = 0; 2016 int vector, v_budget; 2017 2018 /* 2019 * It's easy to be greedy for MSI-X vectors, but it really 2020 * doesn't do us much good if we have a lot more vectors 2021 * than CPU's. So let's be conservative and only ask for 2022 * (roughly) twice the number of vectors as there are CPU's. 2023 */ 2024 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues, 2025 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS; 2026 2027 /* A failure in MSI-X entry allocation isn't fatal, but it does 2028 * mean we disable MSI-X capabilities of the adapter. */ 2029 adapter->msix_entries = kcalloc(v_budget, 2030 sizeof(struct msix_entry), GFP_KERNEL); 2031 if (!adapter->msix_entries) { 2032 err = -ENOMEM; 2033 goto out; 2034 } 2035 2036 for (vector = 0; vector < v_budget; vector++) 2037 adapter->msix_entries[vector].entry = vector; 2038 2039 ixgbevf_acquire_msix_vectors(adapter, v_budget); 2040 2041out: 2042 return err; 2043} 2044 2045/** 2046 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors 2047 * @adapter: board private structure to initialize 2048 * 2049 * We allocate one q_vector per queue interrupt. If allocation fails we 2050 * return -ENOMEM. 2051 **/ 2052static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) 2053{ 2054 int q_idx, num_q_vectors; 2055 struct ixgbevf_q_vector *q_vector; 2056 int napi_vectors; 2057 int (*poll)(struct napi_struct *, int); 2058 2059 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2060 napi_vectors = adapter->num_rx_queues; 2061 poll = &ixgbevf_clean_rxonly; 2062 2063 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 2064 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL); 2065 if (!q_vector) 2066 goto err_out; 2067 q_vector->adapter = adapter; 2068 q_vector->v_idx = q_idx; 2069 q_vector->eitr = adapter->eitr_param; 2070 if (q_idx < napi_vectors) 2071 netif_napi_add(adapter->netdev, &q_vector->napi, 2072 (*poll), 64); 2073 adapter->q_vector[q_idx] = q_vector; 2074 } 2075 2076 return 0; 2077 2078err_out: 2079 while (q_idx) { 2080 q_idx--; 2081 q_vector = adapter->q_vector[q_idx]; 2082 netif_napi_del(&q_vector->napi); 2083 kfree(q_vector); 2084 adapter->q_vector[q_idx] = NULL; 2085 } 2086 return -ENOMEM; 2087} 2088 2089/** 2090 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors 2091 * @adapter: board private structure to initialize 2092 * 2093 * This function frees the memory allocated to the q_vectors. In addition if 2094 * NAPI is enabled it will delete any references to the NAPI struct prior 2095 * to freeing the q_vector. 2096 **/ 2097static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) 2098{ 2099 int q_idx, num_q_vectors; 2100 int napi_vectors; 2101 2102 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 2103 napi_vectors = adapter->num_rx_queues; 2104 2105 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { 2106 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx]; 2107 2108 adapter->q_vector[q_idx] = NULL; 2109 if (q_idx < napi_vectors) 2110 netif_napi_del(&q_vector->napi); 2111 kfree(q_vector); 2112 } 2113} 2114 2115/** 2116 * ixgbevf_reset_interrupt_capability - Reset MSIX setup 2117 * @adapter: board private structure 2118 * 2119 **/ 2120static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) 2121{ 2122 pci_disable_msix(adapter->pdev); 2123 kfree(adapter->msix_entries); 2124 adapter->msix_entries = NULL; 2125} 2126 2127/** 2128 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init 2129 * @adapter: board private structure to initialize 2130 * 2131 **/ 2132static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) 2133{ 2134 int err; 2135 2136 /* Number of supported queues */ 2137 ixgbevf_set_num_queues(adapter); 2138 2139 err = ixgbevf_set_interrupt_capability(adapter); 2140 if (err) { 2141 hw_dbg(&adapter->hw, 2142 "Unable to setup interrupt capabilities\n"); 2143 goto err_set_interrupt; 2144 } 2145 2146 err = ixgbevf_alloc_q_vectors(adapter); 2147 if (err) { 2148 hw_dbg(&adapter->hw, "Unable to allocate memory for queue " 2149 "vectors\n"); 2150 goto err_alloc_q_vectors; 2151 } 2152 2153 err = ixgbevf_alloc_queues(adapter); 2154 if (err) { 2155 pr_err("Unable to allocate memory for queues\n"); 2156 goto err_alloc_queues; 2157 } 2158 2159 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, " 2160 "Tx Queue count = %u\n", 2161 (adapter->num_rx_queues > 1) ? "Enabled" : 2162 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); 2163 2164 set_bit(__IXGBEVF_DOWN, &adapter->state); 2165 2166 return 0; 2167err_alloc_queues: 2168 ixgbevf_free_q_vectors(adapter); 2169err_alloc_q_vectors: 2170 ixgbevf_reset_interrupt_capability(adapter); 2171err_set_interrupt: 2172 return err; 2173} 2174 2175/** 2176 * ixgbevf_sw_init - Initialize general software structures 2177 * (struct ixgbevf_adapter) 2178 * @adapter: board private structure to initialize 2179 * 2180 * ixgbevf_sw_init initializes the Adapter private data structure. 2181 * Fields are initialized based on PCI device information and 2182 * OS network device settings (MTU size). 2183 **/ 2184static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter) 2185{ 2186 struct ixgbe_hw *hw = &adapter->hw; 2187 struct pci_dev *pdev = adapter->pdev; 2188 int err; 2189 2190 /* PCI config space info */ 2191 2192 hw->vendor_id = pdev->vendor; 2193 hw->device_id = pdev->device; 2194 hw->revision_id = pdev->revision; 2195 hw->subsystem_vendor_id = pdev->subsystem_vendor; 2196 hw->subsystem_device_id = pdev->subsystem_device; 2197 2198 hw->mbx.ops.init_params(hw); 2199 hw->mac.max_tx_queues = MAX_TX_QUEUES; 2200 hw->mac.max_rx_queues = MAX_RX_QUEUES; 2201 err = hw->mac.ops.reset_hw(hw); 2202 if (err) { 2203 dev_info(&pdev->dev, 2204 "PF still in reset state, assigning new address\n"); 2205 eth_hw_addr_random(adapter->netdev); 2206 memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr, 2207 adapter->netdev->addr_len); 2208 } else { 2209 err = hw->mac.ops.init_hw(hw); 2210 if (err) { 2211 pr_err("init_shared_code failed: %d\n", err); 2212 goto out; 2213 } 2214 memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr, 2215 adapter->netdev->addr_len); 2216 } 2217 2218 /* Enable dynamic interrupt throttling rates */ 2219 adapter->eitr_param = 20000; 2220 adapter->itr_setting = 1; 2221 2222 /* set defaults for eitr in MegaBytes */ 2223 adapter->eitr_low = 10; 2224 adapter->eitr_high = 20; 2225 2226 /* set default ring sizes */ 2227 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; 2228 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; 2229 2230 /* enable rx csum by default */ 2231 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; 2232 2233 set_bit(__IXGBEVF_DOWN, &adapter->state); 2234 return 0; 2235 2236out: 2237 return err; 2238} 2239 2240#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ 2241 { \ 2242 u32 current_counter = IXGBE_READ_REG(hw, reg); \ 2243 if (current_counter < last_counter) \ 2244 counter += 0x100000000LL; \ 2245 last_counter = current_counter; \ 2246 counter &= 0xFFFFFFFF00000000LL; \ 2247 counter |= current_counter; \ 2248 } 2249 2250#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ 2251 { \ 2252 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ 2253 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ 2254 u64 current_counter = (current_counter_msb << 32) | \ 2255 current_counter_lsb; \ 2256 if (current_counter < last_counter) \ 2257 counter += 0x1000000000LL; \ 2258 last_counter = current_counter; \ 2259 counter &= 0xFFFFFFF000000000LL; \ 2260 counter |= current_counter; \ 2261 } 2262/** 2263 * ixgbevf_update_stats - Update the board statistics counters. 2264 * @adapter: board private structure 2265 **/ 2266void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) 2267{ 2268 struct ixgbe_hw *hw = &adapter->hw; 2269 2270 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, 2271 adapter->stats.vfgprc); 2272 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, 2273 adapter->stats.vfgptc); 2274 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, 2275 adapter->stats.last_vfgorc, 2276 adapter->stats.vfgorc); 2277 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, 2278 adapter->stats.last_vfgotc, 2279 adapter->stats.vfgotc); 2280 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, 2281 adapter->stats.vfmprc); 2282} 2283 2284/** 2285 * ixgbevf_watchdog - Timer Call-back 2286 * @data: pointer to adapter cast into an unsigned long 2287 **/ 2288static void ixgbevf_watchdog(unsigned long data) 2289{ 2290 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data; 2291 struct ixgbe_hw *hw = &adapter->hw; 2292 u64 eics = 0; 2293 int i; 2294 2295 /* 2296 * Do the watchdog outside of interrupt context due to the lovely 2297 * delays that some of the newer hardware requires 2298 */ 2299 2300 if (test_bit(__IXGBEVF_DOWN, &adapter->state)) 2301 goto watchdog_short_circuit; 2302 2303 /* get one bit for every active tx/rx interrupt vector */ 2304 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { 2305 struct ixgbevf_q_vector *qv = adapter->q_vector[i]; 2306 if (qv->rxr_count || qv->txr_count) 2307 eics |= (1 << i); 2308 } 2309 2310 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics); 2311 2312watchdog_short_circuit: 2313 schedule_work(&adapter->watchdog_task); 2314} 2315 2316/** 2317 * ixgbevf_tx_timeout - Respond to a Tx Hang 2318 * @netdev: network interface device structure 2319 **/ 2320static void ixgbevf_tx_timeout(struct net_device *netdev) 2321{ 2322 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2323 2324 /* Do the reset outside of interrupt context */ 2325 schedule_work(&adapter->reset_task); 2326} 2327 2328static void ixgbevf_reset_task(struct work_struct *work) 2329{ 2330 struct ixgbevf_adapter *adapter; 2331 adapter = container_of(work, struct ixgbevf_adapter, reset_task); 2332 2333 /* If we're already down or resetting, just bail */ 2334 if (test_bit(__IXGBEVF_DOWN, &adapter->state) || 2335 test_bit(__IXGBEVF_RESETTING, &adapter->state)) 2336 return; 2337 2338 adapter->tx_timeout_count++; 2339 2340 ixgbevf_reinit_locked(adapter); 2341} 2342 2343/** 2344 * ixgbevf_watchdog_task - worker thread to bring link up 2345 * @work: pointer to work_struct containing our data 2346 **/ 2347static void ixgbevf_watchdog_task(struct work_struct *work) 2348{ 2349 struct ixgbevf_adapter *adapter = container_of(work, 2350 struct ixgbevf_adapter, 2351 watchdog_task); 2352 struct net_device *netdev = adapter->netdev; 2353 struct ixgbe_hw *hw = &adapter->hw; 2354 u32 link_speed = adapter->link_speed; 2355 bool link_up = adapter->link_up; 2356 2357 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK; 2358 2359 /* 2360 * Always check the link on the watchdog because we have 2361 * no LSC interrupt 2362 */ 2363 if (hw->mac.ops.check_link) { 2364 if ((hw->mac.ops.check_link(hw, &link_speed, 2365 &link_up, false)) != 0) { 2366 adapter->link_up = link_up; 2367 adapter->link_speed = link_speed; 2368 netif_carrier_off(netdev); 2369 netif_tx_stop_all_queues(netdev); 2370 schedule_work(&adapter->reset_task); 2371 goto pf_has_reset; 2372 } 2373 } else { 2374 /* always assume link is up, if no check link 2375 * function */ 2376 link_speed = IXGBE_LINK_SPEED_10GB_FULL; 2377 link_up = true; 2378 } 2379 adapter->link_up = link_up; 2380 adapter->link_speed = link_speed; 2381 2382 if (link_up) { 2383 if (!netif_carrier_ok(netdev)) { 2384 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n", 2385 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? 2386 10 : 1); 2387 netif_carrier_on(netdev); 2388 netif_tx_wake_all_queues(netdev); 2389 } 2390 } else { 2391 adapter->link_up = false; 2392 adapter->link_speed = 0; 2393 if (netif_carrier_ok(netdev)) { 2394 hw_dbg(&adapter->hw, "NIC Link is Down\n"); 2395 netif_carrier_off(netdev); 2396 netif_tx_stop_all_queues(netdev); 2397 } 2398 } 2399 2400 ixgbevf_update_stats(adapter); 2401 2402pf_has_reset: 2403 /* Reset the timer */ 2404 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) 2405 mod_timer(&adapter->watchdog_timer, 2406 round_jiffies(jiffies + (2 * HZ))); 2407 2408 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK; 2409} 2410 2411/** 2412 * ixgbevf_free_tx_resources - Free Tx Resources per Queue 2413 * @adapter: board private structure 2414 * @tx_ring: Tx descriptor ring for a specific queue 2415 * 2416 * Free all transmit software resources 2417 **/ 2418void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter, 2419 struct ixgbevf_ring *tx_ring) 2420{ 2421 struct pci_dev *pdev = adapter->pdev; 2422 2423 ixgbevf_clean_tx_ring(adapter, tx_ring); 2424 2425 vfree(tx_ring->tx_buffer_info); 2426 tx_ring->tx_buffer_info = NULL; 2427 2428 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2429 tx_ring->dma); 2430 2431 tx_ring->desc = NULL; 2432} 2433 2434/** 2435 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues 2436 * @adapter: board private structure 2437 * 2438 * Free all transmit software resources 2439 **/ 2440static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) 2441{ 2442 int i; 2443 2444 for (i = 0; i < adapter->num_tx_queues; i++) 2445 if (adapter->tx_ring[i].desc) 2446 ixgbevf_free_tx_resources(adapter, 2447 &adapter->tx_ring[i]); 2448 2449} 2450 2451/** 2452 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) 2453 * @adapter: board private structure 2454 * @tx_ring: tx descriptor ring (for a specific queue) to setup 2455 * 2456 * Return 0 on success, negative on failure 2457 **/ 2458int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter, 2459 struct ixgbevf_ring *tx_ring) 2460{ 2461 struct pci_dev *pdev = adapter->pdev; 2462 int size; 2463 2464 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; 2465 tx_ring->tx_buffer_info = vzalloc(size); 2466 if (!tx_ring->tx_buffer_info) 2467 goto err; 2468 2469 /* round up to nearest 4K */ 2470 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); 2471 tx_ring->size = ALIGN(tx_ring->size, 4096); 2472 2473 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size, 2474 &tx_ring->dma, GFP_KERNEL); 2475 if (!tx_ring->desc) 2476 goto err; 2477 2478 tx_ring->next_to_use = 0; 2479 tx_ring->next_to_clean = 0; 2480 tx_ring->work_limit = tx_ring->count; 2481 return 0; 2482 2483err: 2484 vfree(tx_ring->tx_buffer_info); 2485 tx_ring->tx_buffer_info = NULL; 2486 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit " 2487 "descriptor ring\n"); 2488 return -ENOMEM; 2489} 2490 2491/** 2492 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources 2493 * @adapter: board private structure 2494 * 2495 * If this function returns with an error, then it's possible one or 2496 * more of the rings is populated (while the rest are not). It is the 2497 * callers duty to clean those orphaned rings. 2498 * 2499 * Return 0 on success, negative on failure 2500 **/ 2501static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) 2502{ 2503 int i, err = 0; 2504 2505 for (i = 0; i < adapter->num_tx_queues; i++) { 2506 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]); 2507 if (!err) 2508 continue; 2509 hw_dbg(&adapter->hw, 2510 "Allocation for Tx Queue %u failed\n", i); 2511 break; 2512 } 2513 2514 return err; 2515} 2516 2517/** 2518 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) 2519 * @adapter: board private structure 2520 * @rx_ring: rx descriptor ring (for a specific queue) to setup 2521 * 2522 * Returns 0 on success, negative on failure 2523 **/ 2524int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter, 2525 struct ixgbevf_ring *rx_ring) 2526{ 2527 struct pci_dev *pdev = adapter->pdev; 2528 int size; 2529 2530 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; 2531 rx_ring->rx_buffer_info = vzalloc(size); 2532 if (!rx_ring->rx_buffer_info) 2533 goto alloc_failed; 2534 2535 /* Round up to nearest 4K */ 2536 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); 2537 rx_ring->size = ALIGN(rx_ring->size, 4096); 2538 2539 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, 2540 &rx_ring->dma, GFP_KERNEL); 2541 2542 if (!rx_ring->desc) { 2543 hw_dbg(&adapter->hw, 2544 "Unable to allocate memory for " 2545 "the receive descriptor ring\n"); 2546 vfree(rx_ring->rx_buffer_info); 2547 rx_ring->rx_buffer_info = NULL; 2548 goto alloc_failed; 2549 } 2550 2551 rx_ring->next_to_clean = 0; 2552 rx_ring->next_to_use = 0; 2553 2554 return 0; 2555alloc_failed: 2556 return -ENOMEM; 2557} 2558 2559/** 2560 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources 2561 * @adapter: board private structure 2562 * 2563 * If this function returns with an error, then it's possible one or 2564 * more of the rings is populated (while the rest are not). It is the 2565 * callers duty to clean those orphaned rings. 2566 * 2567 * Return 0 on success, negative on failure 2568 **/ 2569static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) 2570{ 2571 int i, err = 0; 2572 2573 for (i = 0; i < adapter->num_rx_queues; i++) { 2574 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]); 2575 if (!err) 2576 continue; 2577 hw_dbg(&adapter->hw, 2578 "Allocation for Rx Queue %u failed\n", i); 2579 break; 2580 } 2581 return err; 2582} 2583 2584/** 2585 * ixgbevf_free_rx_resources - Free Rx Resources 2586 * @adapter: board private structure 2587 * @rx_ring: ring to clean the resources from 2588 * 2589 * Free all receive software resources 2590 **/ 2591void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter, 2592 struct ixgbevf_ring *rx_ring) 2593{ 2594 struct pci_dev *pdev = adapter->pdev; 2595 2596 ixgbevf_clean_rx_ring(adapter, rx_ring); 2597 2598 vfree(rx_ring->rx_buffer_info); 2599 rx_ring->rx_buffer_info = NULL; 2600 2601 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2602 rx_ring->dma); 2603 2604 rx_ring->desc = NULL; 2605} 2606 2607/** 2608 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues 2609 * @adapter: board private structure 2610 * 2611 * Free all receive software resources 2612 **/ 2613static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) 2614{ 2615 int i; 2616 2617 for (i = 0; i < adapter->num_rx_queues; i++) 2618 if (adapter->rx_ring[i].desc) 2619 ixgbevf_free_rx_resources(adapter, 2620 &adapter->rx_ring[i]); 2621} 2622 2623/** 2624 * ixgbevf_open - Called when a network interface is made active 2625 * @netdev: network interface device structure 2626 * 2627 * Returns 0 on success, negative value on failure 2628 * 2629 * The open entry point is called when a network interface is made 2630 * active by the system (IFF_UP). At this point all resources needed 2631 * for transmit and receive operations are allocated, the interrupt 2632 * handler is registered with the OS, the watchdog timer is started, 2633 * and the stack is notified that the interface is ready. 2634 **/ 2635static int ixgbevf_open(struct net_device *netdev) 2636{ 2637 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2638 struct ixgbe_hw *hw = &adapter->hw; 2639 int err; 2640 2641 /* disallow open during test */ 2642 if (test_bit(__IXGBEVF_TESTING, &adapter->state)) 2643 return -EBUSY; 2644 2645 if (hw->adapter_stopped) { 2646 ixgbevf_reset(adapter); 2647 /* if adapter is still stopped then PF isn't up and 2648 * the vf can't start. */ 2649 if (hw->adapter_stopped) { 2650 err = IXGBE_ERR_MBX; 2651 pr_err("Unable to start - perhaps the PF Driver isn't " 2652 "up yet\n"); 2653 goto err_setup_reset; 2654 } 2655 } 2656 2657 /* allocate transmit descriptors */ 2658 err = ixgbevf_setup_all_tx_resources(adapter); 2659 if (err) 2660 goto err_setup_tx; 2661 2662 /* allocate receive descriptors */ 2663 err = ixgbevf_setup_all_rx_resources(adapter); 2664 if (err) 2665 goto err_setup_rx; 2666 2667 ixgbevf_configure(adapter); 2668 2669 /* 2670 * Map the Tx/Rx rings to the vectors we were allotted. 2671 * if request_irq will be called in this function map_rings 2672 * must be called *before* up_complete 2673 */ 2674 ixgbevf_map_rings_to_vectors(adapter); 2675 2676 err = ixgbevf_up_complete(adapter); 2677 if (err) 2678 goto err_up; 2679 2680 /* clear any pending interrupts, may auto mask */ 2681 IXGBE_READ_REG(hw, IXGBE_VTEICR); 2682 err = ixgbevf_request_irq(adapter); 2683 if (err) 2684 goto err_req_irq; 2685 2686 ixgbevf_irq_enable(adapter, true, true); 2687 2688 return 0; 2689 2690err_req_irq: 2691 ixgbevf_down(adapter); 2692err_up: 2693 ixgbevf_free_irq(adapter); 2694err_setup_rx: 2695 ixgbevf_free_all_rx_resources(adapter); 2696err_setup_tx: 2697 ixgbevf_free_all_tx_resources(adapter); 2698 ixgbevf_reset(adapter); 2699 2700err_setup_reset: 2701 2702 return err; 2703} 2704 2705/** 2706 * ixgbevf_close - Disables a network interface 2707 * @netdev: network interface device structure 2708 * 2709 * Returns 0, this is not allowed to fail 2710 * 2711 * The close entry point is called when an interface is de-activated 2712 * by the OS. The hardware is still under the drivers control, but 2713 * needs to be disabled. A global MAC reset is issued to stop the 2714 * hardware, and all transmit and receive resources are freed. 2715 **/ 2716static int ixgbevf_close(struct net_device *netdev) 2717{ 2718 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 2719 2720 ixgbevf_down(adapter); 2721 ixgbevf_free_irq(adapter); 2722 2723 ixgbevf_free_all_tx_resources(adapter); 2724 ixgbevf_free_all_rx_resources(adapter); 2725 2726 return 0; 2727} 2728 2729static int ixgbevf_tso(struct ixgbevf_adapter *adapter, 2730 struct ixgbevf_ring *tx_ring, 2731 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len) 2732{ 2733 struct ixgbe_adv_tx_context_desc *context_desc; 2734 unsigned int i; 2735 int err; 2736 struct ixgbevf_tx_buffer *tx_buffer_info; 2737 u32 vlan_macip_lens = 0, type_tucmd_mlhl; 2738 u32 mss_l4len_idx, l4len; 2739 2740 if (skb_is_gso(skb)) { 2741 if (skb_header_cloned(skb)) { 2742 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2743 if (err) 2744 return err; 2745 } 2746 l4len = tcp_hdrlen(skb); 2747 *hdr_len += l4len; 2748 2749 if (skb->protocol == htons(ETH_P_IP)) { 2750 struct iphdr *iph = ip_hdr(skb); 2751 iph->tot_len = 0; 2752 iph->check = 0; 2753 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, 2754 iph->daddr, 0, 2755 IPPROTO_TCP, 2756 0); 2757 adapter->hw_tso_ctxt++; 2758 } else if (skb_is_gso_v6(skb)) { 2759 ipv6_hdr(skb)->payload_len = 0; 2760 tcp_hdr(skb)->check = 2761 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 2762 &ipv6_hdr(skb)->daddr, 2763 0, IPPROTO_TCP, 0); 2764 adapter->hw_tso6_ctxt++; 2765 } 2766 2767 i = tx_ring->next_to_use; 2768 2769 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2770 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2771 2772 /* VLAN MACLEN IPLEN */ 2773 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2774 vlan_macip_lens |= 2775 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); 2776 vlan_macip_lens |= ((skb_network_offset(skb)) << 2777 IXGBE_ADVTXD_MACLEN_SHIFT); 2778 *hdr_len += skb_network_offset(skb); 2779 vlan_macip_lens |= 2780 (skb_transport_header(skb) - skb_network_header(skb)); 2781 *hdr_len += 2782 (skb_transport_header(skb) - skb_network_header(skb)); 2783 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2784 context_desc->seqnum_seed = 0; 2785 2786 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ 2787 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT | 2788 IXGBE_ADVTXD_DTYP_CTXT); 2789 2790 if (skb->protocol == htons(ETH_P_IP)) 2791 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2792 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; 2793 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2794 2795 /* MSS L4LEN IDX */ 2796 mss_l4len_idx = 2797 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT); 2798 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT); 2799 /* use index 1 for TSO */ 2800 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 2801 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); 2802 2803 tx_buffer_info->time_stamp = jiffies; 2804 tx_buffer_info->next_to_watch = i; 2805 2806 i++; 2807 if (i == tx_ring->count) 2808 i = 0; 2809 tx_ring->next_to_use = i; 2810 2811 return true; 2812 } 2813 2814 return false; 2815} 2816 2817static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter, 2818 struct ixgbevf_ring *tx_ring, 2819 struct sk_buff *skb, u32 tx_flags) 2820{ 2821 struct ixgbe_adv_tx_context_desc *context_desc; 2822 unsigned int i; 2823 struct ixgbevf_tx_buffer *tx_buffer_info; 2824 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; 2825 2826 if (skb->ip_summed == CHECKSUM_PARTIAL || 2827 (tx_flags & IXGBE_TX_FLAGS_VLAN)) { 2828 i = tx_ring->next_to_use; 2829 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2830 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); 2831 2832 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 2833 vlan_macip_lens |= (tx_flags & 2834 IXGBE_TX_FLAGS_VLAN_MASK); 2835 vlan_macip_lens |= (skb_network_offset(skb) << 2836 IXGBE_ADVTXD_MACLEN_SHIFT); 2837 if (skb->ip_summed == CHECKSUM_PARTIAL) 2838 vlan_macip_lens |= (skb_transport_header(skb) - 2839 skb_network_header(skb)); 2840 2841 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); 2842 context_desc->seqnum_seed = 0; 2843 2844 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | 2845 IXGBE_ADVTXD_DTYP_CTXT); 2846 2847 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2848 switch (skb->protocol) { 2849 case __constant_htons(ETH_P_IP): 2850 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 2851 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 2852 type_tucmd_mlhl |= 2853 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2854 break; 2855 case __constant_htons(ETH_P_IPV6): 2856 /* XXX what about other V6 headers?? */ 2857 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 2858 type_tucmd_mlhl |= 2859 IXGBE_ADVTXD_TUCMD_L4T_TCP; 2860 break; 2861 default: 2862 if (unlikely(net_ratelimit())) { 2863 pr_warn("partial checksum but " 2864 "proto=%x!\n", skb->protocol); 2865 } 2866 break; 2867 } 2868 } 2869 2870 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); 2871 /* use index zero for tx checksum offload */ 2872 context_desc->mss_l4len_idx = 0; 2873 2874 tx_buffer_info->time_stamp = jiffies; 2875 tx_buffer_info->next_to_watch = i; 2876 2877 adapter->hw_csum_tx_good++; 2878 i++; 2879 if (i == tx_ring->count) 2880 i = 0; 2881 tx_ring->next_to_use = i; 2882 2883 return true; 2884 } 2885 2886 return false; 2887} 2888 2889static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter, 2890 struct ixgbevf_ring *tx_ring, 2891 struct sk_buff *skb, u32 tx_flags, 2892 unsigned int first) 2893{ 2894 struct pci_dev *pdev = adapter->pdev; 2895 struct ixgbevf_tx_buffer *tx_buffer_info; 2896 unsigned int len; 2897 unsigned int total = skb->len; 2898 unsigned int offset = 0, size; 2899 int count = 0; 2900 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 2901 unsigned int f; 2902 int i; 2903 2904 i = tx_ring->next_to_use; 2905 2906 len = min(skb_headlen(skb), total); 2907 while (len) { 2908 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2909 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2910 2911 tx_buffer_info->length = size; 2912 tx_buffer_info->mapped_as_page = false; 2913 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev, 2914 skb->data + offset, 2915 size, DMA_TO_DEVICE); 2916 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2917 goto dma_error; 2918 tx_buffer_info->time_stamp = jiffies; 2919 tx_buffer_info->next_to_watch = i; 2920 2921 len -= size; 2922 total -= size; 2923 offset += size; 2924 count++; 2925 i++; 2926 if (i == tx_ring->count) 2927 i = 0; 2928 } 2929 2930 for (f = 0; f < nr_frags; f++) { 2931 const struct skb_frag_struct *frag; 2932 2933 frag = &skb_shinfo(skb)->frags[f]; 2934 len = min((unsigned int)skb_frag_size(frag), total); 2935 offset = 0; 2936 2937 while (len) { 2938 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2939 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD); 2940 2941 tx_buffer_info->length = size; 2942 tx_buffer_info->dma = 2943 skb_frag_dma_map(&adapter->pdev->dev, frag, 2944 offset, size, DMA_TO_DEVICE); 2945 tx_buffer_info->mapped_as_page = true; 2946 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma)) 2947 goto dma_error; 2948 tx_buffer_info->time_stamp = jiffies; 2949 tx_buffer_info->next_to_watch = i; 2950 2951 len -= size; 2952 total -= size; 2953 offset += size; 2954 count++; 2955 i++; 2956 if (i == tx_ring->count) 2957 i = 0; 2958 } 2959 if (total == 0) 2960 break; 2961 } 2962 2963 if (i == 0) 2964 i = tx_ring->count - 1; 2965 else 2966 i = i - 1; 2967 tx_ring->tx_buffer_info[i].skb = skb; 2968 tx_ring->tx_buffer_info[first].next_to_watch = i; 2969 2970 return count; 2971 2972dma_error: 2973 dev_err(&pdev->dev, "TX DMA map failed\n"); 2974 2975 /* clear timestamp and dma mappings for failed tx_buffer_info map */ 2976 tx_buffer_info->dma = 0; 2977 tx_buffer_info->time_stamp = 0; 2978 tx_buffer_info->next_to_watch = 0; 2979 count--; 2980 2981 /* clear timestamp and dma mappings for remaining portion of packet */ 2982 while (count >= 0) { 2983 count--; 2984 i--; 2985 if (i < 0) 2986 i += tx_ring->count; 2987 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 2988 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info); 2989 } 2990 2991 return count; 2992} 2993 2994static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter, 2995 struct ixgbevf_ring *tx_ring, int tx_flags, 2996 int count, u32 paylen, u8 hdr_len) 2997{ 2998 union ixgbe_adv_tx_desc *tx_desc = NULL; 2999 struct ixgbevf_tx_buffer *tx_buffer_info; 3000 u32 olinfo_status = 0, cmd_type_len = 0; 3001 unsigned int i; 3002 3003 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS; 3004 3005 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA; 3006 3007 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT; 3008 3009 if (tx_flags & IXGBE_TX_FLAGS_VLAN) 3010 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE; 3011 3012 if (tx_flags & IXGBE_TX_FLAGS_TSO) { 3013 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE; 3014 3015 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3016 IXGBE_ADVTXD_POPTS_SHIFT; 3017 3018 /* use index 1 context for tso */ 3019 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT); 3020 if (tx_flags & IXGBE_TX_FLAGS_IPV4) 3021 olinfo_status |= IXGBE_TXD_POPTS_IXSM << 3022 IXGBE_ADVTXD_POPTS_SHIFT; 3023 3024 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM) 3025 olinfo_status |= IXGBE_TXD_POPTS_TXSM << 3026 IXGBE_ADVTXD_POPTS_SHIFT; 3027 3028 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); 3029 3030 i = tx_ring->next_to_use; 3031 while (count--) { 3032 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 3033 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); 3034 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma); 3035 tx_desc->read.cmd_type_len = 3036 cpu_to_le32(cmd_type_len | tx_buffer_info->length); 3037 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); 3038 i++; 3039 if (i == tx_ring->count) 3040 i = 0; 3041 } 3042 3043 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd); 3044 3045 /* 3046 * Force memory writes to complete before letting h/w 3047 * know there are new descriptors to fetch. (Only 3048 * applicable for weak-ordered memory model archs, 3049 * such as IA-64). 3050 */ 3051 wmb(); 3052 3053 tx_ring->next_to_use = i; 3054 writel(i, adapter->hw.hw_addr + tx_ring->tail); 3055} 3056 3057static int __ixgbevf_maybe_stop_tx(struct net_device *netdev, 3058 struct ixgbevf_ring *tx_ring, int size) 3059{ 3060 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3061 3062 netif_stop_subqueue(netdev, tx_ring->queue_index); 3063 /* Herbert's original patch had: 3064 * smp_mb__after_netif_stop_queue(); 3065 * but since that doesn't exist yet, just open code it. */ 3066 smp_mb(); 3067 3068 /* We need to check again in a case another CPU has just 3069 * made room available. */ 3070 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size)) 3071 return -EBUSY; 3072 3073 /* A reprieve! - use start_queue because it doesn't call schedule */ 3074 netif_start_subqueue(netdev, tx_ring->queue_index); 3075 ++adapter->restart_queue; 3076 return 0; 3077} 3078 3079static int ixgbevf_maybe_stop_tx(struct net_device *netdev, 3080 struct ixgbevf_ring *tx_ring, int size) 3081{ 3082 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size)) 3083 return 0; 3084 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size); 3085} 3086 3087static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 3088{ 3089 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3090 struct ixgbevf_ring *tx_ring; 3091 unsigned int first; 3092 unsigned int tx_flags = 0; 3093 u8 hdr_len = 0; 3094 int r_idx = 0, tso; 3095 int count = 0; 3096 3097 unsigned int f; 3098 3099 tx_ring = &adapter->tx_ring[r_idx]; 3100 3101 if (vlan_tx_tag_present(skb)) { 3102 tx_flags |= vlan_tx_tag_get(skb); 3103 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 3104 tx_flags |= IXGBE_TX_FLAGS_VLAN; 3105 } 3106 3107 /* four things can cause us to need a context descriptor */ 3108 if (skb_is_gso(skb) || 3109 (skb->ip_summed == CHECKSUM_PARTIAL) || 3110 (tx_flags & IXGBE_TX_FLAGS_VLAN)) 3111 count++; 3112 3113 count += TXD_USE_COUNT(skb_headlen(skb)); 3114 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) 3115 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f])); 3116 3117 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) { 3118 adapter->tx_busy++; 3119 return NETDEV_TX_BUSY; 3120 } 3121 3122 first = tx_ring->next_to_use; 3123 3124 if (skb->protocol == htons(ETH_P_IP)) 3125 tx_flags |= IXGBE_TX_FLAGS_IPV4; 3126 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); 3127 if (tso < 0) { 3128 dev_kfree_skb_any(skb); 3129 return NETDEV_TX_OK; 3130 } 3131 3132 if (tso) 3133 tx_flags |= IXGBE_TX_FLAGS_TSO; 3134 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) && 3135 (skb->ip_summed == CHECKSUM_PARTIAL)) 3136 tx_flags |= IXGBE_TX_FLAGS_CSUM; 3137 3138 ixgbevf_tx_queue(adapter, tx_ring, tx_flags, 3139 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first), 3140 skb->len, hdr_len); 3141 3142 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); 3143 3144 return NETDEV_TX_OK; 3145} 3146 3147/** 3148 * ixgbevf_set_mac - Change the Ethernet Address of the NIC 3149 * @netdev: network interface device structure 3150 * @p: pointer to an address structure 3151 * 3152 * Returns 0 on success, negative on failure 3153 **/ 3154static int ixgbevf_set_mac(struct net_device *netdev, void *p) 3155{ 3156 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3157 struct ixgbe_hw *hw = &adapter->hw; 3158 struct sockaddr *addr = p; 3159 3160 if (!is_valid_ether_addr(addr->sa_data)) 3161 return -EADDRNOTAVAIL; 3162 3163 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3164 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); 3165 3166 if (hw->mac.ops.set_rar) 3167 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); 3168 3169 return 0; 3170} 3171 3172/** 3173 * ixgbevf_change_mtu - Change the Maximum Transfer Unit 3174 * @netdev: network interface device structure 3175 * @new_mtu: new value for maximum frame size 3176 * 3177 * Returns 0 on success, negative on failure 3178 **/ 3179static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) 3180{ 3181 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3182 struct ixgbe_hw *hw = &adapter->hw; 3183 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 3184 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE; 3185 u32 msg[2]; 3186 3187 if (adapter->hw.mac.type == ixgbe_mac_X540_vf) 3188 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE; 3189 3190 /* MTU < 68 is an error and causes problems on some kernels */ 3191 if ((new_mtu < 68) || (max_frame > max_possible_frame)) 3192 return -EINVAL; 3193 3194 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n", 3195 netdev->mtu, new_mtu); 3196 /* must set new MTU before calling down or up */ 3197 netdev->mtu = new_mtu; 3198 3199 msg[0] = IXGBE_VF_SET_LPE; 3200 msg[1] = max_frame; 3201 hw->mbx.ops.write_posted(hw, msg, 2); 3202 3203 if (netif_running(netdev)) 3204 ixgbevf_reinit_locked(adapter); 3205 3206 return 0; 3207} 3208 3209static void ixgbevf_shutdown(struct pci_dev *pdev) 3210{ 3211 struct net_device *netdev = pci_get_drvdata(pdev); 3212 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3213 3214 netif_device_detach(netdev); 3215 3216 if (netif_running(netdev)) { 3217 ixgbevf_down(adapter); 3218 ixgbevf_free_irq(adapter); 3219 ixgbevf_free_all_tx_resources(adapter); 3220 ixgbevf_free_all_rx_resources(adapter); 3221 } 3222 3223#ifdef CONFIG_PM 3224 pci_save_state(pdev); 3225#endif 3226 3227 pci_disable_device(pdev); 3228} 3229 3230static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev, 3231 struct rtnl_link_stats64 *stats) 3232{ 3233 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3234 unsigned int start; 3235 u64 bytes, packets; 3236 const struct ixgbevf_ring *ring; 3237 int i; 3238 3239 ixgbevf_update_stats(adapter); 3240 3241 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc; 3242 3243 for (i = 0; i < adapter->num_rx_queues; i++) { 3244 ring = &adapter->rx_ring[i]; 3245 do { 3246 start = u64_stats_fetch_begin_bh(&ring->syncp); 3247 bytes = ring->total_bytes; 3248 packets = ring->total_packets; 3249 } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); 3250 stats->rx_bytes += bytes; 3251 stats->rx_packets += packets; 3252 } 3253 3254 for (i = 0; i < adapter->num_tx_queues; i++) { 3255 ring = &adapter->tx_ring[i]; 3256 do { 3257 start = u64_stats_fetch_begin_bh(&ring->syncp); 3258 bytes = ring->total_bytes; 3259 packets = ring->total_packets; 3260 } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); 3261 stats->tx_bytes += bytes; 3262 stats->tx_packets += packets; 3263 } 3264 3265 return stats; 3266} 3267 3268static int ixgbevf_set_features(struct net_device *netdev, 3269 netdev_features_t features) 3270{ 3271 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3272 3273 if (features & NETIF_F_RXCSUM) 3274 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; 3275 else 3276 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED; 3277 3278 return 0; 3279} 3280 3281static const struct net_device_ops ixgbe_netdev_ops = { 3282 .ndo_open = ixgbevf_open, 3283 .ndo_stop = ixgbevf_close, 3284 .ndo_start_xmit = ixgbevf_xmit_frame, 3285 .ndo_set_rx_mode = ixgbevf_set_rx_mode, 3286 .ndo_get_stats64 = ixgbevf_get_stats, 3287 .ndo_validate_addr = eth_validate_addr, 3288 .ndo_set_mac_address = ixgbevf_set_mac, 3289 .ndo_change_mtu = ixgbevf_change_mtu, 3290 .ndo_tx_timeout = ixgbevf_tx_timeout, 3291 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid, 3292 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid, 3293 .ndo_set_features = ixgbevf_set_features, 3294}; 3295 3296static void ixgbevf_assign_netdev_ops(struct net_device *dev) 3297{ 3298 dev->netdev_ops = &ixgbe_netdev_ops; 3299 ixgbevf_set_ethtool_ops(dev); 3300 dev->watchdog_timeo = 5 * HZ; 3301} 3302 3303/** 3304 * ixgbevf_probe - Device Initialization Routine 3305 * @pdev: PCI device information struct 3306 * @ent: entry in ixgbevf_pci_tbl 3307 * 3308 * Returns 0 on success, negative on failure 3309 * 3310 * ixgbevf_probe initializes an adapter identified by a pci_dev structure. 3311 * The OS initialization, configuring of the adapter private structure, 3312 * and a hardware reset occur. 3313 **/ 3314static int __devinit ixgbevf_probe(struct pci_dev *pdev, 3315 const struct pci_device_id *ent) 3316{ 3317 struct net_device *netdev; 3318 struct ixgbevf_adapter *adapter = NULL; 3319 struct ixgbe_hw *hw = NULL; 3320 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; 3321 static int cards_found; 3322 int err, pci_using_dac; 3323 3324 err = pci_enable_device(pdev); 3325 if (err) 3326 return err; 3327 3328 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) && 3329 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 3330 pci_using_dac = 1; 3331 } else { 3332 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 3333 if (err) { 3334 err = dma_set_coherent_mask(&pdev->dev, 3335 DMA_BIT_MASK(32)); 3336 if (err) { 3337 dev_err(&pdev->dev, "No usable DMA " 3338 "configuration, aborting\n"); 3339 goto err_dma; 3340 } 3341 } 3342 pci_using_dac = 0; 3343 } 3344 3345 err = pci_request_regions(pdev, ixgbevf_driver_name); 3346 if (err) { 3347 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); 3348 goto err_pci_reg; 3349 } 3350 3351 pci_set_master(pdev); 3352 3353#ifdef HAVE_TX_MQ 3354 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), 3355 MAX_TX_QUEUES); 3356#else 3357 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter)); 3358#endif 3359 if (!netdev) { 3360 err = -ENOMEM; 3361 goto err_alloc_etherdev; 3362 } 3363 3364 SET_NETDEV_DEV(netdev, &pdev->dev); 3365 3366 pci_set_drvdata(pdev, netdev); 3367 adapter = netdev_priv(netdev); 3368 3369 adapter->netdev = netdev; 3370 adapter->pdev = pdev; 3371 hw = &adapter->hw; 3372 hw->back = adapter; 3373 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3374 3375 /* 3376 * call save state here in standalone driver because it relies on 3377 * adapter struct to exist, and needs to call netdev_priv 3378 */ 3379 pci_save_state(pdev); 3380 3381 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), 3382 pci_resource_len(pdev, 0)); 3383 if (!hw->hw_addr) { 3384 err = -EIO; 3385 goto err_ioremap; 3386 } 3387 3388 ixgbevf_assign_netdev_ops(netdev); 3389 3390 adapter->bd_number = cards_found; 3391 3392 /* Setup hw api */ 3393 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 3394 hw->mac.type = ii->mac; 3395 3396 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, 3397 sizeof(struct ixgbe_mbx_operations)); 3398 3399 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE; 3400 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; 3401 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE; 3402 3403 /* setup the private structure */ 3404 err = ixgbevf_sw_init(adapter); 3405 if (err) 3406 goto err_sw_init; 3407 3408 /* The HW MAC address was set and/or determined in sw_init */ 3409 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 3410 3411 if (!is_valid_ether_addr(netdev->dev_addr)) { 3412 pr_err("invalid MAC address\n"); 3413 err = -EIO; 3414 goto err_sw_init; 3415 } 3416 3417 netdev->hw_features = NETIF_F_SG | 3418 NETIF_F_IP_CSUM | 3419 NETIF_F_IPV6_CSUM | 3420 NETIF_F_TSO | 3421 NETIF_F_TSO6 | 3422 NETIF_F_RXCSUM; 3423 3424 netdev->features = netdev->hw_features | 3425 NETIF_F_HW_VLAN_TX | 3426 NETIF_F_HW_VLAN_RX | 3427 NETIF_F_HW_VLAN_FILTER; 3428 3429 netdev->vlan_features |= NETIF_F_TSO; 3430 netdev->vlan_features |= NETIF_F_TSO6; 3431 netdev->vlan_features |= NETIF_F_IP_CSUM; 3432 netdev->vlan_features |= NETIF_F_IPV6_CSUM; 3433 netdev->vlan_features |= NETIF_F_SG; 3434 3435 if (pci_using_dac) 3436 netdev->features |= NETIF_F_HIGHDMA; 3437 3438 netdev->priv_flags |= IFF_UNICAST_FLT; 3439 3440 init_timer(&adapter->watchdog_timer); 3441 adapter->watchdog_timer.function = ixgbevf_watchdog; 3442 adapter->watchdog_timer.data = (unsigned long)adapter; 3443 3444 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task); 3445 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task); 3446 3447 err = ixgbevf_init_interrupt_scheme(adapter); 3448 if (err) 3449 goto err_sw_init; 3450 3451 /* pick up the PCI bus settings for reporting later */ 3452 if (hw->mac.ops.get_bus_info) 3453 hw->mac.ops.get_bus_info(hw); 3454 3455 strcpy(netdev->name, "eth%d"); 3456 3457 err = register_netdev(netdev); 3458 if (err) 3459 goto err_register; 3460 3461 adapter->netdev_registered = true; 3462 3463 netif_carrier_off(netdev); 3464 3465 ixgbevf_init_last_counter_stats(adapter); 3466 3467 /* print the MAC address */ 3468 hw_dbg(hw, "%pM\n", netdev->dev_addr); 3469 3470 hw_dbg(hw, "MAC: %d\n", hw->mac.type); 3471 3472 hw_dbg(hw, "LRO is disabled\n"); 3473 3474 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n"); 3475 cards_found++; 3476 return 0; 3477 3478err_register: 3479err_sw_init: 3480 ixgbevf_reset_interrupt_capability(adapter); 3481 iounmap(hw->hw_addr); 3482err_ioremap: 3483 free_netdev(netdev); 3484err_alloc_etherdev: 3485 pci_release_regions(pdev); 3486err_pci_reg: 3487err_dma: 3488 pci_disable_device(pdev); 3489 return err; 3490} 3491 3492/** 3493 * ixgbevf_remove - Device Removal Routine 3494 * @pdev: PCI device information struct 3495 * 3496 * ixgbevf_remove is called by the PCI subsystem to alert the driver 3497 * that it should release a PCI device. The could be caused by a 3498 * Hot-Plug event, or because the driver is going to be removed from 3499 * memory. 3500 **/ 3501static void __devexit ixgbevf_remove(struct pci_dev *pdev) 3502{ 3503 struct net_device *netdev = pci_get_drvdata(pdev); 3504 struct ixgbevf_adapter *adapter = netdev_priv(netdev); 3505 3506 set_bit(__IXGBEVF_DOWN, &adapter->state); 3507 3508 del_timer_sync(&adapter->watchdog_timer); 3509 3510 cancel_work_sync(&adapter->reset_task); 3511 cancel_work_sync(&adapter->watchdog_task); 3512 3513 if (adapter->netdev_registered) { 3514 unregister_netdev(netdev); 3515 adapter->netdev_registered = false; 3516 } 3517 3518 ixgbevf_reset_interrupt_capability(adapter); 3519 3520 iounmap(adapter->hw.hw_addr); 3521 pci_release_regions(pdev); 3522 3523 hw_dbg(&adapter->hw, "Remove complete\n"); 3524 3525 kfree(adapter->tx_ring); 3526 kfree(adapter->rx_ring); 3527 3528 free_netdev(netdev); 3529 3530 pci_disable_device(pdev); 3531} 3532 3533static struct pci_driver ixgbevf_driver = { 3534 .name = ixgbevf_driver_name, 3535 .id_table = ixgbevf_pci_tbl, 3536 .probe = ixgbevf_probe, 3537 .remove = __devexit_p(ixgbevf_remove), 3538 .shutdown = ixgbevf_shutdown, 3539}; 3540 3541/** 3542 * ixgbevf_init_module - Driver Registration Routine 3543 * 3544 * ixgbevf_init_module is the first routine called when the driver is 3545 * loaded. All it does is register with the PCI subsystem. 3546 **/ 3547static int __init ixgbevf_init_module(void) 3548{ 3549 int ret; 3550 pr_info("%s - version %s\n", ixgbevf_driver_string, 3551 ixgbevf_driver_version); 3552 3553 pr_info("%s\n", ixgbevf_copyright); 3554 3555 ret = pci_register_driver(&ixgbevf_driver); 3556 return ret; 3557} 3558 3559module_init(ixgbevf_init_module); 3560 3561/** 3562 * ixgbevf_exit_module - Driver Exit Cleanup Routine 3563 * 3564 * ixgbevf_exit_module is called just before the driver is removed 3565 * from memory. 3566 **/ 3567static void __exit ixgbevf_exit_module(void) 3568{ 3569 pci_unregister_driver(&ixgbevf_driver); 3570} 3571 3572#ifdef DEBUG 3573/** 3574 * ixgbevf_get_hw_dev_name - return device name string 3575 * used by hardware layer to print debugging information 3576 **/ 3577char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) 3578{ 3579 struct ixgbevf_adapter *adapter = hw->back; 3580 return adapter->netdev->name; 3581} 3582 3583#endif 3584module_exit(ixgbevf_exit_module); 3585 3586/* ixgbevf_main.c */ 3587