mcdi.c revision 5731d7b35e5b87157a9b9973cc2eff70c50aec58
1/**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2008-2013 Solarflare Communications Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published 7 * by the Free Software Foundation, incorporated herein by reference. 8 */ 9 10#include <linux/delay.h> 11#include <asm/cmpxchg.h> 12#include "net_driver.h" 13#include "nic.h" 14#include "io.h" 15#include "farch_regs.h" 16#include "mcdi_pcol.h" 17#include "phy.h" 18 19/************************************************************************** 20 * 21 * Management-Controller-to-Driver Interface 22 * 23 ************************************************************************** 24 */ 25 26#define MCDI_RPC_TIMEOUT (10 * HZ) 27 28/* A reboot/assertion causes the MCDI status word to be set after the 29 * command word is set or a REBOOT event is sent. If we notice a reboot 30 * via these mechanisms then wait 250ms for the status word to be set. 31 */ 32#define MCDI_STATUS_DELAY_US 100 33#define MCDI_STATUS_DELAY_COUNT 2500 34#define MCDI_STATUS_SLEEP_MS \ 35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) 36 37#define SEQ_MASK \ 38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) 39 40struct efx_mcdi_async_param { 41 struct list_head list; 42 unsigned int cmd; 43 size_t inlen; 44 size_t outlen; 45 efx_mcdi_async_completer *complete; 46 unsigned long cookie; 47 /* followed by request/response buffer */ 48}; 49 50static void efx_mcdi_timeout_async(unsigned long context); 51static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 52 bool *was_attached_out); 53static bool efx_mcdi_poll_once(struct efx_nic *efx); 54 55static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx) 56{ 57 EFX_BUG_ON_PARANOID(!efx->mcdi); 58 return &efx->mcdi->iface; 59} 60 61int efx_mcdi_init(struct efx_nic *efx) 62{ 63 struct efx_mcdi_iface *mcdi; 64 bool already_attached; 65 int rc; 66 67 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); 68 if (!efx->mcdi) 69 return -ENOMEM; 70 71 mcdi = efx_mcdi(efx); 72 mcdi->efx = efx; 73 init_waitqueue_head(&mcdi->wq); 74 spin_lock_init(&mcdi->iface_lock); 75 mcdi->state = MCDI_STATE_QUIESCENT; 76 mcdi->mode = MCDI_MODE_POLL; 77 spin_lock_init(&mcdi->async_lock); 78 INIT_LIST_HEAD(&mcdi->async_list); 79 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async, 80 (unsigned long)mcdi); 81 82 (void) efx_mcdi_poll_reboot(efx); 83 mcdi->new_epoch = true; 84 85 /* Recover from a failed assertion before probing */ 86 rc = efx_mcdi_handle_assertion(efx); 87 if (rc) 88 return rc; 89 90 /* Let the MC (and BMC, if this is a LOM) know that the driver 91 * is loaded. We should do this before we reset the NIC. 92 */ 93 rc = efx_mcdi_drv_attach(efx, true, &already_attached); 94 if (rc) { 95 netif_err(efx, probe, efx->net_dev, 96 "Unable to register driver with MCPU\n"); 97 return rc; 98 } 99 if (already_attached) 100 /* Not a fatal error */ 101 netif_err(efx, probe, efx->net_dev, 102 "Host already registered with MCPU\n"); 103 104 return 0; 105} 106 107void efx_mcdi_fini(struct efx_nic *efx) 108{ 109 if (!efx->mcdi) 110 return; 111 112 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); 113 114 /* Relinquish the device (back to the BMC, if this is a LOM) */ 115 efx_mcdi_drv_attach(efx, false, NULL); 116 117 kfree(efx->mcdi); 118} 119 120static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, 121 const efx_dword_t *inbuf, size_t inlen) 122{ 123 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 124 efx_dword_t hdr[2]; 125 size_t hdr_len; 126 u32 xflags, seqno; 127 128 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); 129 130 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ 131 spin_lock_bh(&mcdi->iface_lock); 132 ++mcdi->seqno; 133 spin_unlock_bh(&mcdi->iface_lock); 134 135 seqno = mcdi->seqno & SEQ_MASK; 136 xflags = 0; 137 if (mcdi->mode == MCDI_MODE_EVENTS) 138 xflags |= MCDI_HEADER_XFLAGS_EVREQ; 139 140 if (efx->type->mcdi_max_ver == 1) { 141 /* MCDI v1 */ 142 EFX_POPULATE_DWORD_7(hdr[0], 143 MCDI_HEADER_RESPONSE, 0, 144 MCDI_HEADER_RESYNC, 1, 145 MCDI_HEADER_CODE, cmd, 146 MCDI_HEADER_DATALEN, inlen, 147 MCDI_HEADER_SEQ, seqno, 148 MCDI_HEADER_XFLAGS, xflags, 149 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 150 hdr_len = 4; 151 } else { 152 /* MCDI v2 */ 153 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); 154 EFX_POPULATE_DWORD_7(hdr[0], 155 MCDI_HEADER_RESPONSE, 0, 156 MCDI_HEADER_RESYNC, 1, 157 MCDI_HEADER_CODE, MC_CMD_V2_EXTN, 158 MCDI_HEADER_DATALEN, 0, 159 MCDI_HEADER_SEQ, seqno, 160 MCDI_HEADER_XFLAGS, xflags, 161 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); 162 EFX_POPULATE_DWORD_2(hdr[1], 163 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, 164 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); 165 hdr_len = 8; 166 } 167 168 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); 169 170 mcdi->new_epoch = false; 171} 172 173static int efx_mcdi_errno(unsigned int mcdi_err) 174{ 175 switch (mcdi_err) { 176 case 0: 177 return 0; 178#define TRANSLATE_ERROR(name) \ 179 case MC_CMD_ERR_ ## name: \ 180 return -name; 181 TRANSLATE_ERROR(EPERM); 182 TRANSLATE_ERROR(ENOENT); 183 TRANSLATE_ERROR(EINTR); 184 TRANSLATE_ERROR(EAGAIN); 185 TRANSLATE_ERROR(EACCES); 186 TRANSLATE_ERROR(EBUSY); 187 TRANSLATE_ERROR(EINVAL); 188 TRANSLATE_ERROR(EDEADLK); 189 TRANSLATE_ERROR(ENOSYS); 190 TRANSLATE_ERROR(ETIME); 191 TRANSLATE_ERROR(EALREADY); 192 TRANSLATE_ERROR(ENOSPC); 193#undef TRANSLATE_ERROR 194 case MC_CMD_ERR_ALLOC_FAIL: 195 return -ENOBUFS; 196 case MC_CMD_ERR_MAC_EXIST: 197 return -EADDRINUSE; 198 default: 199 return -EPROTO; 200 } 201} 202 203static void efx_mcdi_read_response_header(struct efx_nic *efx) 204{ 205 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 206 unsigned int respseq, respcmd, error; 207 efx_dword_t hdr; 208 209 efx->type->mcdi_read_response(efx, &hdr, 0, 4); 210 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); 211 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); 212 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); 213 214 if (respcmd != MC_CMD_V2_EXTN) { 215 mcdi->resp_hdr_len = 4; 216 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); 217 } else { 218 efx->type->mcdi_read_response(efx, &hdr, 4, 4); 219 mcdi->resp_hdr_len = 8; 220 mcdi->resp_data_len = 221 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); 222 } 223 224 if (error && mcdi->resp_data_len == 0) { 225 netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); 226 mcdi->resprc = -EIO; 227 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { 228 netif_err(efx, hw, efx->net_dev, 229 "MC response mismatch tx seq 0x%x rx seq 0x%x\n", 230 respseq, mcdi->seqno); 231 mcdi->resprc = -EIO; 232 } else if (error) { 233 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); 234 mcdi->resprc = 235 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0)); 236 } else { 237 mcdi->resprc = 0; 238 } 239} 240 241static bool efx_mcdi_poll_once(struct efx_nic *efx) 242{ 243 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 244 245 rmb(); 246 if (!efx->type->mcdi_poll_response(efx)) 247 return false; 248 249 spin_lock_bh(&mcdi->iface_lock); 250 efx_mcdi_read_response_header(efx); 251 spin_unlock_bh(&mcdi->iface_lock); 252 253 return true; 254} 255 256static int efx_mcdi_poll(struct efx_nic *efx) 257{ 258 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 259 unsigned long time, finish; 260 unsigned int spins; 261 int rc; 262 263 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ 264 rc = efx_mcdi_poll_reboot(efx); 265 if (rc) { 266 spin_lock_bh(&mcdi->iface_lock); 267 mcdi->resprc = rc; 268 mcdi->resp_hdr_len = 0; 269 mcdi->resp_data_len = 0; 270 spin_unlock_bh(&mcdi->iface_lock); 271 return 0; 272 } 273 274 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, 275 * because generally mcdi responses are fast. After that, back off 276 * and poll once a jiffy (approximately) 277 */ 278 spins = TICK_USEC; 279 finish = jiffies + MCDI_RPC_TIMEOUT; 280 281 while (1) { 282 if (spins != 0) { 283 --spins; 284 udelay(1); 285 } else { 286 schedule_timeout_uninterruptible(1); 287 } 288 289 time = jiffies; 290 291 if (efx_mcdi_poll_once(efx)) 292 break; 293 294 if (time_after(time, finish)) 295 return -ETIMEDOUT; 296 } 297 298 /* Return rc=0 like wait_event_timeout() */ 299 return 0; 300} 301 302/* Test and clear MC-rebooted flag for this port/function; reset 303 * software state as necessary. 304 */ 305int efx_mcdi_poll_reboot(struct efx_nic *efx) 306{ 307 if (!efx->mcdi) 308 return 0; 309 310 return efx->type->mcdi_poll_reboot(efx); 311} 312 313static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) 314{ 315 return cmpxchg(&mcdi->state, 316 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == 317 MCDI_STATE_QUIESCENT; 318} 319 320static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) 321{ 322 /* Wait until the interface becomes QUIESCENT and we win the race 323 * to mark it RUNNING_SYNC. 324 */ 325 wait_event(mcdi->wq, 326 cmpxchg(&mcdi->state, 327 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == 328 MCDI_STATE_QUIESCENT); 329} 330 331static int efx_mcdi_await_completion(struct efx_nic *efx) 332{ 333 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 334 335 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, 336 MCDI_RPC_TIMEOUT) == 0) 337 return -ETIMEDOUT; 338 339 /* Check if efx_mcdi_set_mode() switched us back to polled completions. 340 * In which case, poll for completions directly. If efx_mcdi_ev_cpl() 341 * completed the request first, then we'll just end up completing the 342 * request again, which is safe. 343 * 344 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which 345 * wait_event_timeout() implicitly provides. 346 */ 347 if (mcdi->mode == MCDI_MODE_POLL) 348 return efx_mcdi_poll(efx); 349 350 return 0; 351} 352 353/* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the 354 * requester. Return whether this was done. Does not take any locks. 355 */ 356static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) 357{ 358 if (cmpxchg(&mcdi->state, 359 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == 360 MCDI_STATE_RUNNING_SYNC) { 361 wake_up(&mcdi->wq); 362 return true; 363 } 364 365 return false; 366} 367 368static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) 369{ 370 if (mcdi->mode == MCDI_MODE_EVENTS) { 371 struct efx_mcdi_async_param *async; 372 struct efx_nic *efx = mcdi->efx; 373 374 /* Process the asynchronous request queue */ 375 spin_lock_bh(&mcdi->async_lock); 376 async = list_first_entry_or_null( 377 &mcdi->async_list, struct efx_mcdi_async_param, list); 378 if (async) { 379 mcdi->state = MCDI_STATE_RUNNING_ASYNC; 380 efx_mcdi_send_request(efx, async->cmd, 381 (const efx_dword_t *)(async + 1), 382 async->inlen); 383 mod_timer(&mcdi->async_timer, 384 jiffies + MCDI_RPC_TIMEOUT); 385 } 386 spin_unlock_bh(&mcdi->async_lock); 387 388 if (async) 389 return; 390 } 391 392 mcdi->state = MCDI_STATE_QUIESCENT; 393 wake_up(&mcdi->wq); 394} 395 396/* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the 397 * asynchronous completion function, and release the interface. 398 * Return whether this was done. Must be called in bh-disabled 399 * context. Will take iface_lock and async_lock. 400 */ 401static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) 402{ 403 struct efx_nic *efx = mcdi->efx; 404 struct efx_mcdi_async_param *async; 405 size_t hdr_len, data_len; 406 efx_dword_t *outbuf; 407 int rc; 408 409 if (cmpxchg(&mcdi->state, 410 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != 411 MCDI_STATE_RUNNING_ASYNC) 412 return false; 413 414 spin_lock(&mcdi->iface_lock); 415 if (timeout) { 416 /* Ensure that if the completion event arrives later, 417 * the seqno check in efx_mcdi_ev_cpl() will fail 418 */ 419 ++mcdi->seqno; 420 ++mcdi->credits; 421 rc = -ETIMEDOUT; 422 hdr_len = 0; 423 data_len = 0; 424 } else { 425 rc = mcdi->resprc; 426 hdr_len = mcdi->resp_hdr_len; 427 data_len = mcdi->resp_data_len; 428 } 429 spin_unlock(&mcdi->iface_lock); 430 431 /* Stop the timer. In case the timer function is running, we 432 * must wait for it to return so that there is no possibility 433 * of it aborting the next request. 434 */ 435 if (!timeout) 436 del_timer_sync(&mcdi->async_timer); 437 438 spin_lock(&mcdi->async_lock); 439 async = list_first_entry(&mcdi->async_list, 440 struct efx_mcdi_async_param, list); 441 list_del(&async->list); 442 spin_unlock(&mcdi->async_lock); 443 444 outbuf = (efx_dword_t *)(async + 1); 445 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 446 min(async->outlen, data_len)); 447 async->complete(efx, async->cookie, rc, outbuf, data_len); 448 kfree(async); 449 450 efx_mcdi_release(mcdi); 451 452 return true; 453} 454 455static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, 456 unsigned int datalen, unsigned int mcdi_err) 457{ 458 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 459 bool wake = false; 460 461 spin_lock(&mcdi->iface_lock); 462 463 if ((seqno ^ mcdi->seqno) & SEQ_MASK) { 464 if (mcdi->credits) 465 /* The request has been cancelled */ 466 --mcdi->credits; 467 else 468 netif_err(efx, hw, efx->net_dev, 469 "MC response mismatch tx seq 0x%x rx " 470 "seq 0x%x\n", seqno, mcdi->seqno); 471 } else { 472 if (efx->type->mcdi_max_ver >= 2) { 473 /* MCDI v2 responses don't fit in an event */ 474 efx_mcdi_read_response_header(efx); 475 } else { 476 mcdi->resprc = efx_mcdi_errno(mcdi_err); 477 mcdi->resp_hdr_len = 4; 478 mcdi->resp_data_len = datalen; 479 } 480 481 wake = true; 482 } 483 484 spin_unlock(&mcdi->iface_lock); 485 486 if (wake) { 487 if (!efx_mcdi_complete_async(mcdi, false)) 488 (void) efx_mcdi_complete_sync(mcdi); 489 490 /* If the interface isn't RUNNING_ASYNC or 491 * RUNNING_SYNC then we've received a duplicate 492 * completion after we've already transitioned back to 493 * QUIESCENT. [A subsequent invocation would increment 494 * seqno, so would have failed the seqno check]. 495 */ 496 } 497} 498 499static void efx_mcdi_timeout_async(unsigned long context) 500{ 501 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context; 502 503 efx_mcdi_complete_async(mcdi, true); 504} 505 506static int 507efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) 508{ 509 if (efx->type->mcdi_max_ver < 0 || 510 (efx->type->mcdi_max_ver < 2 && 511 cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) 512 return -EINVAL; 513 514 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || 515 (efx->type->mcdi_max_ver < 2 && 516 inlen > MCDI_CTL_SDU_LEN_MAX_V1)) 517 return -EMSGSIZE; 518 519 return 0; 520} 521 522int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, 523 const efx_dword_t *inbuf, size_t inlen, 524 efx_dword_t *outbuf, size_t outlen, 525 size_t *outlen_actual) 526{ 527 int rc; 528 529 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); 530 if (rc) 531 return rc; 532 return efx_mcdi_rpc_finish(efx, cmd, inlen, 533 outbuf, outlen, outlen_actual); 534} 535 536int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, 537 const efx_dword_t *inbuf, size_t inlen) 538{ 539 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 540 int rc; 541 542 rc = efx_mcdi_check_supported(efx, cmd, inlen); 543 if (rc) 544 return rc; 545 546 efx_mcdi_acquire_sync(mcdi); 547 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 548 return 0; 549} 550 551/** 552 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously 553 * @efx: NIC through which to issue the command 554 * @cmd: Command type number 555 * @inbuf: Command parameters 556 * @inlen: Length of command parameters, in bytes 557 * @outlen: Length to allocate for response buffer, in bytes 558 * @complete: Function to be called on completion or cancellation. 559 * @cookie: Arbitrary value to be passed to @complete. 560 * 561 * This function does not sleep and therefore may be called in atomic 562 * context. It will fail if event queues are disabled or if MCDI 563 * event completions have been disabled due to an error. 564 * 565 * If it succeeds, the @complete function will be called exactly once 566 * in atomic context, when one of the following occurs: 567 * (a) the completion event is received (in NAPI context) 568 * (b) event queues are disabled (in the process that disables them) 569 * (c) the request times-out (in timer context) 570 */ 571int 572efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, 573 const efx_dword_t *inbuf, size_t inlen, size_t outlen, 574 efx_mcdi_async_completer *complete, unsigned long cookie) 575{ 576 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 577 struct efx_mcdi_async_param *async; 578 int rc; 579 580 rc = efx_mcdi_check_supported(efx, cmd, inlen); 581 if (rc) 582 return rc; 583 584 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), 585 GFP_ATOMIC); 586 if (!async) 587 return -ENOMEM; 588 589 async->cmd = cmd; 590 async->inlen = inlen; 591 async->outlen = outlen; 592 async->complete = complete; 593 async->cookie = cookie; 594 memcpy(async + 1, inbuf, inlen); 595 596 spin_lock_bh(&mcdi->async_lock); 597 598 if (mcdi->mode == MCDI_MODE_EVENTS) { 599 list_add_tail(&async->list, &mcdi->async_list); 600 601 /* If this is at the front of the queue, try to start it 602 * immediately 603 */ 604 if (mcdi->async_list.next == &async->list && 605 efx_mcdi_acquire_async(mcdi)) { 606 efx_mcdi_send_request(efx, cmd, inbuf, inlen); 607 mod_timer(&mcdi->async_timer, 608 jiffies + MCDI_RPC_TIMEOUT); 609 } 610 } else { 611 kfree(async); 612 rc = -ENETDOWN; 613 } 614 615 spin_unlock_bh(&mcdi->async_lock); 616 617 return rc; 618} 619 620int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, 621 efx_dword_t *outbuf, size_t outlen, 622 size_t *outlen_actual) 623{ 624 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 625 int rc; 626 627 if (mcdi->mode == MCDI_MODE_POLL) 628 rc = efx_mcdi_poll(efx); 629 else 630 rc = efx_mcdi_await_completion(efx); 631 632 if (rc != 0) { 633 /* Close the race with efx_mcdi_ev_cpl() executing just too late 634 * and completing a request we've just cancelled, by ensuring 635 * that the seqno check therein fails. 636 */ 637 spin_lock_bh(&mcdi->iface_lock); 638 ++mcdi->seqno; 639 ++mcdi->credits; 640 spin_unlock_bh(&mcdi->iface_lock); 641 642 netif_err(efx, hw, efx->net_dev, 643 "MC command 0x%x inlen %d mode %d timed out\n", 644 cmd, (int)inlen, mcdi->mode); 645 } else { 646 size_t hdr_len, data_len; 647 648 /* At the very least we need a memory barrier here to ensure 649 * we pick up changes from efx_mcdi_ev_cpl(). Protect against 650 * a spurious efx_mcdi_ev_cpl() running concurrently by 651 * acquiring the iface_lock. */ 652 spin_lock_bh(&mcdi->iface_lock); 653 rc = mcdi->resprc; 654 hdr_len = mcdi->resp_hdr_len; 655 data_len = mcdi->resp_data_len; 656 spin_unlock_bh(&mcdi->iface_lock); 657 658 BUG_ON(rc > 0); 659 660 if (rc == 0) { 661 efx->type->mcdi_read_response(efx, outbuf, hdr_len, 662 min(outlen, data_len)); 663 if (outlen_actual != NULL) 664 *outlen_actual = data_len; 665 } else if (cmd == MC_CMD_REBOOT && rc == -EIO) 666 ; /* Don't reset if MC_CMD_REBOOT returns EIO */ 667 else if (rc == -EIO || rc == -EINTR) { 668 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", 669 -rc); 670 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 671 } else 672 netif_dbg(efx, hw, efx->net_dev, 673 "MC command 0x%x inlen %d failed rc=%d\n", 674 cmd, (int)inlen, -rc); 675 676 if (rc == -EIO || rc == -EINTR) { 677 msleep(MCDI_STATUS_SLEEP_MS); 678 efx_mcdi_poll_reboot(efx); 679 mcdi->new_epoch = true; 680 } 681 } 682 683 efx_mcdi_release(mcdi); 684 return rc; 685} 686 687/* Switch to polled MCDI completions. This can be called in various 688 * error conditions with various locks held, so it must be lockless. 689 * Caller is responsible for flushing asynchronous requests later. 690 */ 691void efx_mcdi_mode_poll(struct efx_nic *efx) 692{ 693 struct efx_mcdi_iface *mcdi; 694 695 if (!efx->mcdi) 696 return; 697 698 mcdi = efx_mcdi(efx); 699 if (mcdi->mode == MCDI_MODE_POLL) 700 return; 701 702 /* We can switch from event completion to polled completion, because 703 * mcdi requests are always completed in shared memory. We do this by 704 * switching the mode to POLL'd then completing the request. 705 * efx_mcdi_await_completion() will then call efx_mcdi_poll(). 706 * 707 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), 708 * which efx_mcdi_complete_sync() provides for us. 709 */ 710 mcdi->mode = MCDI_MODE_POLL; 711 712 efx_mcdi_complete_sync(mcdi); 713} 714 715/* Flush any running or queued asynchronous requests, after event processing 716 * is stopped 717 */ 718void efx_mcdi_flush_async(struct efx_nic *efx) 719{ 720 struct efx_mcdi_async_param *async, *next; 721 struct efx_mcdi_iface *mcdi; 722 723 if (!efx->mcdi) 724 return; 725 726 mcdi = efx_mcdi(efx); 727 728 /* We must be in polling mode so no more requests can be queued */ 729 BUG_ON(mcdi->mode != MCDI_MODE_POLL); 730 731 del_timer_sync(&mcdi->async_timer); 732 733 /* If a request is still running, make sure we give the MC 734 * time to complete it so that the response won't overwrite our 735 * next request. 736 */ 737 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { 738 efx_mcdi_poll(efx); 739 mcdi->state = MCDI_STATE_QUIESCENT; 740 } 741 742 /* Nothing else will access the async list now, so it is safe 743 * to walk it without holding async_lock. If we hold it while 744 * calling a completer then lockdep may warn that we have 745 * acquired locks in the wrong order. 746 */ 747 list_for_each_entry_safe(async, next, &mcdi->async_list, list) { 748 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); 749 list_del(&async->list); 750 kfree(async); 751 } 752} 753 754void efx_mcdi_mode_event(struct efx_nic *efx) 755{ 756 struct efx_mcdi_iface *mcdi; 757 758 if (!efx->mcdi) 759 return; 760 761 mcdi = efx_mcdi(efx); 762 763 if (mcdi->mode == MCDI_MODE_EVENTS) 764 return; 765 766 /* We can't switch from polled to event completion in the middle of a 767 * request, because the completion method is specified in the request. 768 * So acquire the interface to serialise the requestors. We don't need 769 * to acquire the iface_lock to change the mode here, but we do need a 770 * write memory barrier ensure that efx_mcdi_rpc() sees it, which 771 * efx_mcdi_acquire() provides. 772 */ 773 efx_mcdi_acquire_sync(mcdi); 774 mcdi->mode = MCDI_MODE_EVENTS; 775 efx_mcdi_release(mcdi); 776} 777 778static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) 779{ 780 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 781 782 /* If there is an outstanding MCDI request, it has been terminated 783 * either by a BADASSERT or REBOOT event. If the mcdi interface is 784 * in polled mode, then do nothing because the MC reboot handler will 785 * set the header correctly. However, if the mcdi interface is waiting 786 * for a CMDDONE event it won't receive it [and since all MCDI events 787 * are sent to the same queue, we can't be racing with 788 * efx_mcdi_ev_cpl()] 789 * 790 * If there is an outstanding asynchronous request, we can't 791 * complete it now (efx_mcdi_complete() would deadlock). The 792 * reset process will take care of this. 793 * 794 * There's a race here with efx_mcdi_send_request(), because 795 * we might receive a REBOOT event *before* the request has 796 * been copied out. In polled mode (during startup) this is 797 * irrelevant, because efx_mcdi_complete_sync() is ignored. In 798 * event mode, this condition is just an edge-case of 799 * receiving a REBOOT event after posting the MCDI 800 * request. Did the mc reboot before or after the copyout? The 801 * best we can do always is just return failure. 802 */ 803 spin_lock(&mcdi->iface_lock); 804 if (efx_mcdi_complete_sync(mcdi)) { 805 if (mcdi->mode == MCDI_MODE_EVENTS) { 806 mcdi->resprc = rc; 807 mcdi->resp_hdr_len = 0; 808 mcdi->resp_data_len = 0; 809 ++mcdi->credits; 810 } 811 } else { 812 int count; 813 814 /* Consume the status word since efx_mcdi_rpc_finish() won't */ 815 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { 816 if (efx_mcdi_poll_reboot(efx)) 817 break; 818 udelay(MCDI_STATUS_DELAY_US); 819 } 820 mcdi->new_epoch = true; 821 822 /* Nobody was waiting for an MCDI request, so trigger a reset */ 823 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); 824 } 825 826 spin_unlock(&mcdi->iface_lock); 827} 828 829/* Called from falcon_process_eventq for MCDI events */ 830void efx_mcdi_process_event(struct efx_channel *channel, 831 efx_qword_t *event) 832{ 833 struct efx_nic *efx = channel->efx; 834 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); 835 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); 836 837 switch (code) { 838 case MCDI_EVENT_CODE_BADSSERT: 839 netif_err(efx, hw, efx->net_dev, 840 "MC watchdog or assertion failure at 0x%x\n", data); 841 efx_mcdi_ev_death(efx, -EINTR); 842 break; 843 844 case MCDI_EVENT_CODE_PMNOTICE: 845 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); 846 break; 847 848 case MCDI_EVENT_CODE_CMDDONE: 849 efx_mcdi_ev_cpl(efx, 850 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), 851 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), 852 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); 853 break; 854 855 case MCDI_EVENT_CODE_LINKCHANGE: 856 efx_mcdi_process_link_change(efx, event); 857 break; 858 case MCDI_EVENT_CODE_SENSOREVT: 859 efx_mcdi_sensor_event(efx, event); 860 break; 861 case MCDI_EVENT_CODE_SCHEDERR: 862 netif_info(efx, hw, efx->net_dev, 863 "MC Scheduler error address=0x%x\n", data); 864 break; 865 case MCDI_EVENT_CODE_REBOOT: 866 case MCDI_EVENT_CODE_MC_REBOOT: 867 netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); 868 efx_mcdi_ev_death(efx, -EIO); 869 break; 870 case MCDI_EVENT_CODE_MAC_STATS_DMA: 871 /* MAC stats are gather lazily. We can ignore this. */ 872 break; 873 case MCDI_EVENT_CODE_FLR: 874 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF)); 875 break; 876 case MCDI_EVENT_CODE_PTP_RX: 877 case MCDI_EVENT_CODE_PTP_FAULT: 878 case MCDI_EVENT_CODE_PTP_PPS: 879 efx_ptp_event(efx, event); 880 break; 881 case MCDI_EVENT_CODE_TX_FLUSH: 882 case MCDI_EVENT_CODE_RX_FLUSH: 883 /* Two flush events will be sent: one to the same event 884 * queue as completions, and one to event queue 0. 885 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER 886 * flag will be set, and we should ignore the event 887 * because we want to wait for all completions. 888 */ 889 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != 890 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); 891 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) 892 efx_ef10_handle_drain_event(efx); 893 break; 894 case MCDI_EVENT_CODE_TX_ERR: 895 case MCDI_EVENT_CODE_RX_ERR: 896 netif_err(efx, hw, efx->net_dev, 897 "%s DMA error (event: "EFX_QWORD_FMT")\n", 898 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", 899 EFX_QWORD_VAL(*event)); 900 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); 901 break; 902 default: 903 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", 904 code); 905 } 906} 907 908/************************************************************************** 909 * 910 * Specific request functions 911 * 912 ************************************************************************** 913 */ 914 915void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) 916{ 917 MCDI_DECLARE_BUF(outbuf, 918 max(MC_CMD_GET_VERSION_OUT_LEN, 919 MC_CMD_GET_CAPABILITIES_OUT_LEN)); 920 size_t outlength; 921 const __le16 *ver_words; 922 size_t offset; 923 int rc; 924 925 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); 926 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, 927 outbuf, sizeof(outbuf), &outlength); 928 if (rc) 929 goto fail; 930 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { 931 rc = -EIO; 932 goto fail; 933 } 934 935 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); 936 offset = snprintf(buf, len, "%u.%u.%u.%u", 937 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), 938 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); 939 940 /* EF10 may have multiple datapath firmware variants within a 941 * single version. Report which variants are running. 942 */ 943 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { 944 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0); 945 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0, 946 outbuf, sizeof(outbuf), &outlength); 947 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN) 948 offset += snprintf( 949 buf + offset, len - offset, " rx? tx?"); 950 else 951 offset += snprintf( 952 buf + offset, len - offset, " rx%x tx%x", 953 MCDI_WORD(outbuf, 954 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID), 955 MCDI_WORD(outbuf, 956 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID)); 957 958 /* It's theoretically possible for the string to exceed 31 959 * characters, though in practice the first three version 960 * components are short enough that this doesn't happen. 961 */ 962 if (WARN_ON(offset >= len)) 963 buf[0] = 0; 964 } 965 966 return; 967 968fail: 969 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 970 buf[0] = 0; 971} 972 973static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, 974 bool *was_attached) 975{ 976 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); 977 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); 978 size_t outlen; 979 int rc; 980 981 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, 982 driver_operating ? 1 : 0); 983 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); 984 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); 985 986 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), 987 outbuf, sizeof(outbuf), &outlen); 988 if (rc) 989 goto fail; 990 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { 991 rc = -EIO; 992 goto fail; 993 } 994 995 /* We currently assume we have control of the external link 996 * and are completely trusted by firmware. Abort probing 997 * if that's not true for this function. 998 */ 999 if (driver_operating && 1000 outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN && 1001 (MCDI_DWORD(outbuf, DRV_ATTACH_EXT_OUT_FUNC_FLAGS) & 1002 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | 1003 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) != 1004 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | 1005 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) { 1006 netif_err(efx, probe, efx->net_dev, 1007 "This driver version only supports one function per port\n"); 1008 return -ENODEV; 1009 } 1010 1011 if (was_attached != NULL) 1012 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); 1013 return 0; 1014 1015fail: 1016 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1017 return rc; 1018} 1019 1020int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, 1021 u16 *fw_subtype_list, u32 *capabilities) 1022{ 1023 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); 1024 size_t outlen, i; 1025 int port_num = efx_port_num(efx); 1026 int rc; 1027 1028 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); 1029 1030 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, 1031 outbuf, sizeof(outbuf), &outlen); 1032 if (rc) 1033 goto fail; 1034 1035 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { 1036 rc = -EIO; 1037 goto fail; 1038 } 1039 1040 if (mac_address) 1041 memcpy(mac_address, 1042 port_num ? 1043 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : 1044 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0), 1045 ETH_ALEN); 1046 if (fw_subtype_list) { 1047 for (i = 0; 1048 i < MCDI_VAR_ARRAY_LEN(outlen, 1049 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); 1050 i++) 1051 fw_subtype_list[i] = MCDI_ARRAY_WORD( 1052 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); 1053 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) 1054 fw_subtype_list[i] = 0; 1055 } 1056 if (capabilities) { 1057 if (port_num) 1058 *capabilities = MCDI_DWORD(outbuf, 1059 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); 1060 else 1061 *capabilities = MCDI_DWORD(outbuf, 1062 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); 1063 } 1064 1065 return 0; 1066 1067fail: 1068 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", 1069 __func__, rc, (int)outlen); 1070 1071 return rc; 1072} 1073 1074int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) 1075{ 1076 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); 1077 u32 dest = 0; 1078 int rc; 1079 1080 if (uart) 1081 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; 1082 if (evq) 1083 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; 1084 1085 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); 1086 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); 1087 1088 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); 1089 1090 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), 1091 NULL, 0, NULL); 1092 if (rc) 1093 goto fail; 1094 1095 return 0; 1096 1097fail: 1098 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1099 return rc; 1100} 1101 1102int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) 1103{ 1104 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); 1105 size_t outlen; 1106 int rc; 1107 1108 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); 1109 1110 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, 1111 outbuf, sizeof(outbuf), &outlen); 1112 if (rc) 1113 goto fail; 1114 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { 1115 rc = -EIO; 1116 goto fail; 1117 } 1118 1119 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); 1120 return 0; 1121 1122fail: 1123 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1124 __func__, rc); 1125 return rc; 1126} 1127 1128int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, 1129 size_t *size_out, size_t *erase_size_out, 1130 bool *protected_out) 1131{ 1132 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); 1133 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); 1134 size_t outlen; 1135 int rc; 1136 1137 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); 1138 1139 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), 1140 outbuf, sizeof(outbuf), &outlen); 1141 if (rc) 1142 goto fail; 1143 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { 1144 rc = -EIO; 1145 goto fail; 1146 } 1147 1148 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); 1149 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); 1150 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & 1151 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); 1152 return 0; 1153 1154fail: 1155 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1156 return rc; 1157} 1158 1159static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) 1160{ 1161 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); 1162 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); 1163 int rc; 1164 1165 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); 1166 1167 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), 1168 outbuf, sizeof(outbuf), NULL); 1169 if (rc) 1170 return rc; 1171 1172 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { 1173 case MC_CMD_NVRAM_TEST_PASS: 1174 case MC_CMD_NVRAM_TEST_NOTSUPP: 1175 return 0; 1176 default: 1177 return -EIO; 1178 } 1179} 1180 1181int efx_mcdi_nvram_test_all(struct efx_nic *efx) 1182{ 1183 u32 nvram_types; 1184 unsigned int type; 1185 int rc; 1186 1187 rc = efx_mcdi_nvram_types(efx, &nvram_types); 1188 if (rc) 1189 goto fail1; 1190 1191 type = 0; 1192 while (nvram_types != 0) { 1193 if (nvram_types & 1) { 1194 rc = efx_mcdi_nvram_test(efx, type); 1195 if (rc) 1196 goto fail2; 1197 } 1198 type++; 1199 nvram_types >>= 1; 1200 } 1201 1202 return 0; 1203 1204fail2: 1205 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", 1206 __func__, type); 1207fail1: 1208 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1209 return rc; 1210} 1211 1212static int efx_mcdi_read_assertion(struct efx_nic *efx) 1213{ 1214 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); 1215 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); 1216 unsigned int flags, index; 1217 const char *reason; 1218 size_t outlen; 1219 int retry; 1220 int rc; 1221 1222 /* Attempt to read any stored assertion state before we reboot 1223 * the mcfw out of the assertion handler. Retry twice, once 1224 * because a boot-time assertion might cause this command to fail 1225 * with EINTR. And once again because GET_ASSERTS can race with 1226 * MC_CMD_REBOOT running on the other port. */ 1227 retry = 2; 1228 do { 1229 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); 1230 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS, 1231 inbuf, MC_CMD_GET_ASSERTS_IN_LEN, 1232 outbuf, sizeof(outbuf), &outlen); 1233 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); 1234 1235 if (rc) 1236 return rc; 1237 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) 1238 return -EIO; 1239 1240 /* Print out any recorded assertion state */ 1241 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); 1242 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) 1243 return 0; 1244 1245 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) 1246 ? "system-level assertion" 1247 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) 1248 ? "thread-level assertion" 1249 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) 1250 ? "watchdog reset" 1251 : "unknown assertion"; 1252 netif_err(efx, hw, efx->net_dev, 1253 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, 1254 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), 1255 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); 1256 1257 /* Print out the registers */ 1258 for (index = 0; 1259 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; 1260 index++) 1261 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", 1262 1 + index, 1263 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, 1264 index)); 1265 1266 return 0; 1267} 1268 1269static void efx_mcdi_exit_assertion(struct efx_nic *efx) 1270{ 1271 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1272 1273 /* If the MC is running debug firmware, it might now be 1274 * waiting for a debugger to attach, but we just want it to 1275 * reboot. We set a flag that makes the command a no-op if it 1276 * has already done so. We don't know what return code to 1277 * expect (0 or -EIO), so ignore it. 1278 */ 1279 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1280 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 1281 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); 1282 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, 1283 NULL, 0, NULL); 1284} 1285 1286int efx_mcdi_handle_assertion(struct efx_nic *efx) 1287{ 1288 int rc; 1289 1290 rc = efx_mcdi_read_assertion(efx); 1291 if (rc) 1292 return rc; 1293 1294 efx_mcdi_exit_assertion(efx); 1295 1296 return 0; 1297} 1298 1299void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) 1300{ 1301 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); 1302 int rc; 1303 1304 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); 1305 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); 1306 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); 1307 1308 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); 1309 1310 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); 1311 1312 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), 1313 NULL, 0, NULL); 1314 if (rc) 1315 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1316 __func__, rc); 1317} 1318 1319static int efx_mcdi_reset_port(struct efx_nic *efx) 1320{ 1321 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL); 1322 if (rc) 1323 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", 1324 __func__, rc); 1325 return rc; 1326} 1327 1328static int efx_mcdi_reset_mc(struct efx_nic *efx) 1329{ 1330 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); 1331 int rc; 1332 1333 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); 1334 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); 1335 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), 1336 NULL, 0, NULL); 1337 /* White is black, and up is down */ 1338 if (rc == -EIO) 1339 return 0; 1340 if (rc == 0) 1341 rc = -EIO; 1342 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1343 return rc; 1344} 1345 1346enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) 1347{ 1348 return RESET_TYPE_RECOVER_OR_ALL; 1349} 1350 1351int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) 1352{ 1353 int rc; 1354 1355 /* Recover from a failed assertion pre-reset */ 1356 rc = efx_mcdi_handle_assertion(efx); 1357 if (rc) 1358 return rc; 1359 1360 if (method == RESET_TYPE_WORLD) 1361 return efx_mcdi_reset_mc(efx); 1362 else 1363 return efx_mcdi_reset_port(efx); 1364} 1365 1366static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, 1367 const u8 *mac, int *id_out) 1368{ 1369 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); 1370 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); 1371 size_t outlen; 1372 int rc; 1373 1374 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); 1375 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, 1376 MC_CMD_FILTER_MODE_SIMPLE); 1377 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN); 1378 1379 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), 1380 outbuf, sizeof(outbuf), &outlen); 1381 if (rc) 1382 goto fail; 1383 1384 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { 1385 rc = -EIO; 1386 goto fail; 1387 } 1388 1389 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); 1390 1391 return 0; 1392 1393fail: 1394 *id_out = -1; 1395 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1396 return rc; 1397 1398} 1399 1400 1401int 1402efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) 1403{ 1404 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); 1405} 1406 1407 1408int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) 1409{ 1410 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); 1411 size_t outlen; 1412 int rc; 1413 1414 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, 1415 outbuf, sizeof(outbuf), &outlen); 1416 if (rc) 1417 goto fail; 1418 1419 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { 1420 rc = -EIO; 1421 goto fail; 1422 } 1423 1424 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); 1425 1426 return 0; 1427 1428fail: 1429 *id_out = -1; 1430 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1431 return rc; 1432} 1433 1434 1435int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) 1436{ 1437 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); 1438 int rc; 1439 1440 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); 1441 1442 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), 1443 NULL, 0, NULL); 1444 if (rc) 1445 goto fail; 1446 1447 return 0; 1448 1449fail: 1450 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1451 return rc; 1452} 1453 1454int efx_mcdi_flush_rxqs(struct efx_nic *efx) 1455{ 1456 struct efx_channel *channel; 1457 struct efx_rx_queue *rx_queue; 1458 MCDI_DECLARE_BUF(inbuf, 1459 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); 1460 int rc, count; 1461 1462 BUILD_BUG_ON(EFX_MAX_CHANNELS > 1463 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); 1464 1465 count = 0; 1466 efx_for_each_channel(channel, efx) { 1467 efx_for_each_channel_rx_queue(rx_queue, channel) { 1468 if (rx_queue->flush_pending) { 1469 rx_queue->flush_pending = false; 1470 atomic_dec(&efx->rxq_flush_pending); 1471 MCDI_SET_ARRAY_DWORD( 1472 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, 1473 count, efx_rx_queue_index(rx_queue)); 1474 count++; 1475 } 1476 } 1477 } 1478 1479 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, 1480 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); 1481 WARN_ON(rc < 0); 1482 1483 return rc; 1484} 1485 1486int efx_mcdi_wol_filter_reset(struct efx_nic *efx) 1487{ 1488 int rc; 1489 1490 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); 1491 if (rc) 1492 goto fail; 1493 1494 return 0; 1495 1496fail: 1497 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1498 return rc; 1499} 1500 1501int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled) 1502{ 1503 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); 1504 1505 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); 1506 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); 1507 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); 1508 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), 1509 NULL, 0, NULL); 1510} 1511 1512#ifdef CONFIG_SFC_MTD 1513 1514#define EFX_MCDI_NVRAM_LEN_MAX 128 1515 1516static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) 1517{ 1518 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN); 1519 int rc; 1520 1521 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); 1522 1523 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); 1524 1525 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), 1526 NULL, 0, NULL); 1527 if (rc) 1528 goto fail; 1529 1530 return 0; 1531 1532fail: 1533 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1534 return rc; 1535} 1536 1537static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, 1538 loff_t offset, u8 *buffer, size_t length) 1539{ 1540 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN); 1541 MCDI_DECLARE_BUF(outbuf, 1542 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 1543 size_t outlen; 1544 int rc; 1545 1546 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); 1547 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); 1548 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); 1549 1550 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), 1551 outbuf, sizeof(outbuf), &outlen); 1552 if (rc) 1553 goto fail; 1554 1555 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); 1556 return 0; 1557 1558fail: 1559 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1560 return rc; 1561} 1562 1563static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 1564 loff_t offset, const u8 *buffer, size_t length) 1565{ 1566 MCDI_DECLARE_BUF(inbuf, 1567 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); 1568 int rc; 1569 1570 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); 1571 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); 1572 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); 1573 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); 1574 1575 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); 1576 1577 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, 1578 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), 1579 NULL, 0, NULL); 1580 if (rc) 1581 goto fail; 1582 1583 return 0; 1584 1585fail: 1586 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1587 return rc; 1588} 1589 1590static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, 1591 loff_t offset, size_t length) 1592{ 1593 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); 1594 int rc; 1595 1596 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); 1597 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); 1598 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); 1599 1600 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); 1601 1602 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), 1603 NULL, 0, NULL); 1604 if (rc) 1605 goto fail; 1606 1607 return 0; 1608 1609fail: 1610 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1611 return rc; 1612} 1613 1614static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) 1615{ 1616 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN); 1617 int rc; 1618 1619 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); 1620 1621 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); 1622 1623 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), 1624 NULL, 0, NULL); 1625 if (rc) 1626 goto fail; 1627 1628 return 0; 1629 1630fail: 1631 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); 1632 return rc; 1633} 1634 1635int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, 1636 size_t len, size_t *retlen, u8 *buffer) 1637{ 1638 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 1639 struct efx_nic *efx = mtd->priv; 1640 loff_t offset = start; 1641 loff_t end = min_t(loff_t, start + len, mtd->size); 1642 size_t chunk; 1643 int rc = 0; 1644 1645 while (offset < end) { 1646 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 1647 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, 1648 buffer, chunk); 1649 if (rc) 1650 goto out; 1651 offset += chunk; 1652 buffer += chunk; 1653 } 1654out: 1655 *retlen = offset - start; 1656 return rc; 1657} 1658 1659int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) 1660{ 1661 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 1662 struct efx_nic *efx = mtd->priv; 1663 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); 1664 loff_t end = min_t(loff_t, start + len, mtd->size); 1665 size_t chunk = part->common.mtd.erasesize; 1666 int rc = 0; 1667 1668 if (!part->updating) { 1669 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 1670 if (rc) 1671 goto out; 1672 part->updating = true; 1673 } 1674 1675 /* The MCDI interface can in fact do multiple erase blocks at once; 1676 * but erasing may be slow, so we make multiple calls here to avoid 1677 * tripping the MCDI RPC timeout. */ 1678 while (offset < end) { 1679 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, 1680 chunk); 1681 if (rc) 1682 goto out; 1683 offset += chunk; 1684 } 1685out: 1686 return rc; 1687} 1688 1689int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, 1690 size_t len, size_t *retlen, const u8 *buffer) 1691{ 1692 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 1693 struct efx_nic *efx = mtd->priv; 1694 loff_t offset = start; 1695 loff_t end = min_t(loff_t, start + len, mtd->size); 1696 size_t chunk; 1697 int rc = 0; 1698 1699 if (!part->updating) { 1700 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); 1701 if (rc) 1702 goto out; 1703 part->updating = true; 1704 } 1705 1706 while (offset < end) { 1707 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); 1708 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, 1709 buffer, chunk); 1710 if (rc) 1711 goto out; 1712 offset += chunk; 1713 buffer += chunk; 1714 } 1715out: 1716 *retlen = offset - start; 1717 return rc; 1718} 1719 1720int efx_mcdi_mtd_sync(struct mtd_info *mtd) 1721{ 1722 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); 1723 struct efx_nic *efx = mtd->priv; 1724 int rc = 0; 1725 1726 if (part->updating) { 1727 part->updating = false; 1728 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); 1729 } 1730 1731 return rc; 1732} 1733 1734void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) 1735{ 1736 struct efx_mcdi_mtd_partition *mcdi_part = 1737 container_of(part, struct efx_mcdi_mtd_partition, common); 1738 struct efx_nic *efx = part->mtd.priv; 1739 1740 snprintf(part->name, sizeof(part->name), "%s %s:%02x", 1741 efx->name, part->type_name, mcdi_part->fw_subtype); 1742} 1743 1744#endif /* CONFIG_SFC_MTD */ 1745