pxaficp_ir.c revision 72abb46101fb5c47a9592914adb221b430ff26bd
16f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* 26f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * linux/drivers/net/irda/pxaficp_ir.c 36f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 46f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Based on sa1100_ir.c by Russell King 56f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 66f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Changes copyright (C) 2003-2005 MontaVista Software, Inc. 76f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 86f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * This program is free software; you can redistribute it and/or modify 96f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * it under the terms of the GNU General Public License version 2 as 106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * published by the Free Software Foundation. 116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor 136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/module.h> 166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/types.h> 176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/init.h> 186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/errno.h> 196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/netdevice.h> 206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/slab.h> 216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/rtnetlink.h> 226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/interrupt.h> 236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/dma-mapping.h> 24d052d1beff706920e82c5d55006b08e256b5df09Russell King#include <linux/platform_device.h> 256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/pm.h> 2682d553c67deef92c6c84ecb70afc56e99863060cRussell King#include <linux/clk.h> 276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irda.h> 296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irmod.h> 306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/wrapper.h> 316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irda_device.h> 326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/irq.h> 346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/dma.h> 356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/delay.h> 366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/hardware.h> 376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/arch/irda.h> 386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/arch/pxa-regs.h> 396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#ifdef CONFIG_MACH_MAINSTONE 416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <asm/arch/mainstone.h> 426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#endif 436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RXPL_NEG_IS_ZERO (1<<4) 456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RXPL_POS_IS_ZERO 0x0 466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_TXPL_NEG_IS_ZERO (1<<3) 476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_TXPL_POS_IS_ZERO 0x0 486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMODE_PULSE_1_6 (1<<2) 496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMODE_PULSE_3_16 0x0 506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RCVEIR_IR_MODE (1<<1) 516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RCVEIR_UART_MODE 0x0 526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMITIR_IR_MODE (1<<0) 536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMITIR_UART_MODE 0x0 546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_IR_RECEIVE_ON (\ 566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RXPL_NEG_IS_ZERO | \ 576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_TXPL_POS_IS_ZERO | \ 586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMODE_PULSE_3_16 | \ 596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RCVEIR_IR_MODE | \ 606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMITIR_UART_MODE) 616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_IR_TRANSMIT_ON (\ 636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RXPL_NEG_IS_ZERO | \ 646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_TXPL_POS_IS_ZERO | \ 656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMODE_PULSE_3_16 | \ 666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RCVEIR_UART_MODE | \ 676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMITIR_IR_MODE) 686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestruct pxa_irda { 706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int speed; 716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int newspeed; 726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long last_oscr; 736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned char *dma_rx_buff; 756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned char *dma_tx_buff; 766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_addr_t dma_rx_buff_phy; 776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_addr_t dma_tx_buff_phy; 786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int dma_tx_buff_len; 796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int txdma; 806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int rxdma; 816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device_stats stats; 836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct irlap_cb *irlap; 846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct qos_info qos; 856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iobuff_t tx_buff; 876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iobuff_t rx_buff; 886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct device *dev; 906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxaficp_platform_data *pdata; 9182d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *fir_clk; 9282d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *sir_clk; 9382d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *cur_clk; 946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre}; 956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9682d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_disable_clk(struct pxa_irda *si) 9782d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 9882d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->cur_clk) 9982d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_disable(si->cur_clk); 10082d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = NULL; 10182d553c67deef92c6c84ecb70afc56e99863060cRussell King} 10282d553c67deef92c6c84ecb70afc56e99863060cRussell King 10382d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_enable_firclk(struct pxa_irda *si) 10482d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 10582d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = si->fir_clk; 10682d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_enable(si->fir_clk); 10782d553c67deef92c6c84ecb70afc56e99863060cRussell King} 10882d553c67deef92c6c84ecb70afc56e99863060cRussell King 10982d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_enable_sirclk(struct pxa_irda *si) 11082d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 11182d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = si->sir_clk; 11282d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_enable(si->sir_clk); 11382d553c67deef92c6c84ecb70afc56e99863060cRussell King} 11482d553c67deef92c6c84ecb70afc56e99863060cRussell King 1156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IS_FIR(si) ((si)->speed >= 4000000) 1176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IRDA_FRAME_SIZE_LIMIT 2047 1186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreinline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) 1206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) = DCSR_NODESC; 1226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DSADR(si->rxdma) = __PREG(ICDR); 1236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DTADR(si->rxdma) = si->dma_rx_buff_phy; 1246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT; 1256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) |= DCSR_RUN; 1266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 1276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreinline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) 1296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) = DCSR_NODESC; 1316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DSADR(si->txdma) = si->dma_tx_buff_phy; 1326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DTADR(si->txdma) = __PREG(ICDR); 1336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len; 1346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) |= DCSR_RUN; 1356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 1366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* 1386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Set the IrDA communications speed. 1396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 1406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_set_speed(struct pxa_irda *si, int speed) 1416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long flags; 1436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int divisor; 1446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (speed) { 1466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 9600: case 19200: case 38400: 1476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 57600: case 115200: 1486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* refer to PXA250/210 Developer's Manual 10-7 */ 1506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* BaudRate = 14.7456 MHz / (16*Divisor) */ 1516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre divisor = 14745600 / (16 * speed); 1526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 1546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (IS_FIR(si)) { 1566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA */ 1576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 1586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 1596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 16082d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 1616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* set board transceiver to SIR mode */ 1636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_SIRMODE); 1646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure GPIO46/47 */ 1666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_gpio_mode(GPIO46_STRXD_MD); 1676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_gpio_mode(GPIO47_STTXD_MD); 1686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable the STUART clock */ 17082d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_enable_sirclk(si); 1716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 1726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART first */ 1746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 1756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* access DLL & DLH */ 1776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR |= LCR_DLAB; 1786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STDLL = divisor & 0xff; 1796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STDLH = divisor >> 8; 1806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR &= ~LCR_DLAB; 1816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = speed; 1836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; 1846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; 1856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 1876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 1886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 4000000: 1906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 1916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART */ 1936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 1946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = 0; 19582d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 1966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP first */ 1986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 1996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* set board transceiver to FIR mode */ 2016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_FIRMODE); 2026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure GPIO46/47 */ 2046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_gpio_mode(GPIO46_ICPRXD_MD); 2056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_gpio_mode(GPIO47_ICPTXD_MD); 2066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable the FICP clock */ 20882d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_enable_firclk(si); 2096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = speed; 2116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 2126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 2136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 2156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre default: 2186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return -EINVAL; 2196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 2226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 2236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* SIR interrupt service routine. */ 2257d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id) 2266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 2276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = dev_id; 2286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 2296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int iir, lsr, data; 2306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iir = STIIR; 2326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (iir & 0x0F) { 2346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x06: /* Receiver Line Status */ 2356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre lsr = STLSR; 2366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while (lsr & LSR_FIFOE) { 2376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre data = STRBR; 2386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { 2396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); 2406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_errors++; 2416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & LSR_FE) 2426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_frame_errors++; 2436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & LSR_OE) 2446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_fifo_errors++; 2456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 2466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_bytes++; 2476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre async_unwrap_char(dev, &si->stats, &si->rx_buff, data); 2486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre lsr = STLSR; 2506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->last_rx = jiffies; 2526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 2536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x04: /* Received Data Available */ 2566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* forth through */ 2576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x0C: /* Character Timeout Indication */ 2596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre do { 2606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_bytes++; 2616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR); 2626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } while (STLSR & LSR_DR); 2636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->last_rx = jiffies; 2646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 2656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x02: /* Transmit FIFO Data Request */ 2686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) { 2696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STTHR = *si->tx_buff.data++; 2706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.len -= 1; 2716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->tx_buff.len == 0) { 2746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.tx_packets++; 2756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.tx_bytes += si->tx_buff.data - 2766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.head; 2776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* We need to ensure that the transmitter has finished. */ 2796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((STLSR & LSR_TEMT) == 0) 2806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 2816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 2826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 2846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Ok, we've finished transmitting. Now enable 2856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * the receiver. Sometimes we get a receive IRQ 2866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * immediately after a transmit... 2876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 2886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 2896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, si->newspeed); 2906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 2916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 2926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable IR Receiver, disable IR Transmitter */ 2936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; 2946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART and receive interrupts */ 2956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; 2966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* I'm hungry! */ 2986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 2996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 3016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return IRQ_HANDLED; 3046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR Receive DMA interrupt handler */ 3077d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic void pxa_irda_fir_dma_rx_irq(int channel, void *data) 3086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int dcsr = DCSR(channel); 3106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(channel) = dcsr & ~DCSR_RUN; 3126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr); 3146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR Transmit DMA interrupt handler */ 3177d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic void pxa_irda_fir_dma_tx_irq(int channel, void *data) 3186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = data; 3206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 3216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int dcsr; 3226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dcsr = DCSR(channel); 3246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(channel) = dcsr & ~DCSR_RUN; 3256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (dcsr & DCSR_ENDINTR) { 3276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.tx_packets++; 3286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.tx_bytes += si->dma_tx_buff_len; 3296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 3306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.tx_errors++; 3316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while (ICSR1 & ICSR1_TBY) 3346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 3356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 3366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 3386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * HACK: It looks like the TBY bit is dropped too soon. 3396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Without this delay things break. 3406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 3416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre udelay(120); 3426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 3446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, si->newspeed); 3456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 3466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 3479a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski int i = 64; 3489a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 3496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 3506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 3519a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski while ((ICSR1 & ICSR1_RNE) && i--) 3529a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski (void)ICDR; 3536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 3549a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 3559a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (i < 0) 3569a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); 3576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 3596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* EIF(Error in FIFO/End in Frame) handler for FIR */ 3629a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetskistatic void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) 3636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int len, stat, data; 3656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Get the current data position. */ 3676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre len = DTADR(si->rxdma) - si->dma_rx_buff_phy; 3686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre do { 3706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Read Status, and then Data. */ 3716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre stat = ICSR1; 3726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rmb(); 3736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre data = ICDR; 3746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & (ICSR1_CRE | ICSR1_ROR)) { 3766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_errors++; 3776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_CRE) { 3786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); 3796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_crc_errors++; 3806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_ROR) { 3826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); 3839a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski si->stats.rx_over_errors++; 3846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 3866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_rx_buff[len++] = data; 3876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* If we hit the end of frame, there's no point in continuing. */ 3896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_EOF) 3906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 3916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } while (ICSR0 & ICSR0_EIF); 3926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_EOF) { 3946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* end of frame. */ 3959a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski struct sk_buff *skb; 3969a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 3979a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (icsr0 & ICSR0_FRE) { 3989a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); 3999a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski si->stats.rx_dropped++; 4009a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski return; 4019a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski } 4029a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 4039a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski skb = alloc_skb(len+1,GFP_ATOMIC); 4046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!skb) { 4056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); 4066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_dropped++; 4076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return; 4086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Align IP header to 20 bytes */ 4116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb_reserve(skb, 1); 41227d7ff46a3498d3debc6ba68fb8014c702b81170Arnaldo Carvalho de Melo skb_copy_to_linear_data(skb, si->dma_rx_buff, len); 4136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb_put(skb, len); 4146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Feed it to IrLAP */ 4166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb->dev = dev; 417459a98ed881802dee55897441bc7f77af614368eArnaldo Carvalho de Melo skb_reset_mac_header(skb); 4186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb->protocol = htons(ETH_P_IRDA); 4196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_rx(skb); 4206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_packets++; 4226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_bytes += len; 4236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->last_rx = jiffies; 4256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 4276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR interrupt handler */ 4297d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) 4306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 4316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = dev_id; 4326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 4339a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski int icsr0, i = 64; 4346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA */ 4366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 4376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 4386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre icsr0 = ICSR0; 4396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { 4416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & ICSR0_FRE) { 4426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); 4436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_frame_errors++; 4446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 4456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); 4466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->stats.rx_errors++; 4476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB); 4496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & ICSR0_EIF) { 4526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* An error in FIFO occured, or there is a end of frame */ 4539a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski pxa_irda_fir_irq_eif(si, dev, icsr0); 4546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 4576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 4589a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski while ((ICSR1 & ICSR1_RNE) && i--) 4599a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski (void)ICDR; 4606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 4616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4629a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (i < 0) 4639a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); 4649a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 4656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return IRQ_HANDLED; 4666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 4676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* hard_xmit interface of irda device */ 4696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) 4706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 4716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 4726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int speed = irda_get_next_speed(skb); 4736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 4756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Does this packet contain a request to change the interface 4766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * speed? If so, remember it until we complete the transmission 4776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * of this frame. 4786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 4796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (speed != si->speed && speed != -1) 4806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = speed; 4816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 4836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * If this is an empty frame, we can bypass a lot. 4846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 4856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (skb->len == 0) { 4866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 4876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 4886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, speed); 4896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_kfree_skb(skb); 4916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 4926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_stop_queue(dev); 4956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!IS_FIR(si)) { 4976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.data = si->tx_buff.head; 4986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); 4996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Disable STUART interrupts and switch to transmit mode. */ 5016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 5026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6; 5036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART and transmit interrupts */ 5056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_TIE; 5066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 5076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long mtt = irda_get_mtt(skb); 5086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_tx_buff_len = skb->len; 510d626f62b11e00c16e81e4308ab93d3f13551812aArnaldo Carvalho de Melo skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len); 5116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (mtt) 5136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((unsigned)(OSCR - si->last_oscr)/4 < mtt) 5146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 5156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA, disable FICP */ 5176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 5186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 5196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_tx_start(si); 5216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_TXE; 5226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_kfree_skb(skb); 5256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->trans_start = jiffies; 5266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 5276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 5286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) 5306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 5316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct if_irda_req *rq = (struct if_irda_req *)ifreq; 5326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 5336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int ret; 5346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (cmd) { 5366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCSBANDWIDTH: 5376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EPERM; 5386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (capable(CAP_NET_ADMIN)) { 5396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 5406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * We are unable to set the speed if the 5416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * device is not running. 5426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 5436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (netif_running(dev)) { 5446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = pxa_irda_set_speed(si, 5456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rq->ifr_baudrate); 5466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 5476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); 5486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCSMEDIABUSY: 5546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EPERM; 5556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (capable(CAP_NET_ADMIN)) { 5566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_device_set_media_busy(dev, TRUE); 5576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCGRECEIVING: 5626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rq->ifr_receiving = IS_FIR(si) ? 0 5646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre : si->rx_buff.state != OUTSIDE_FRAME; 5656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre default: 5686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EOPNOTSUPP; 5696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return ret; 5736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 5746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic struct net_device_stats *pxa_irda_stats(struct net_device *dev) 5766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 5776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 5786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return &si->stats; 5796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 5806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void pxa_irda_startup(struct pxa_irda *si) 5826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 5836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Disable STUART interrupts */ 5846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 5856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART interrupt to the processor */ 5866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STMCR = MCR_OUT2; 5876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ 5886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR = LCR_WLS0 | LCR_WLS1; 5896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable FIFO, we use FIFO to improve performance */ 5906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STFCR = FCR_TRFIFOE | FCR_ITL_32; 5916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 5936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 5946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure FICP ICCR2 */ 5956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR2 = ICCR2_TXP | ICCR2_TRIG_32; 5966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure DMAC */ 5986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DRCMR17 = si->rxdma | DRCMR_MAPVLD; 5996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DRCMR18 = si->txdma | DRCMR_MAPVLD; 6006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* force SIR reinitialization */ 6026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = 4000000; 6036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, 9600); 6046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda startup\n"); 6066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 6076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void pxa_irda_shutdown(struct pxa_irda *si) 6096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 6106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long flags; 6116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 6136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART and interrupt */ 6156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 6166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART SIR mode */ 6176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = 0; 6186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable DMA */ 6206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) &= ~DCSR_RUN; 6216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 6226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 6236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 62482d553c67deef92c6c84ecb70afc56e99863060cRussell King 62582d553c67deef92c6c84ecb70afc56e99863060cRussell King /* disable the STUART or FICP clocks */ 62682d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 6276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DRCMR17 = 0; 6296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DRCMR18 = 0; 6306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 6326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* power off board transceiver */ 6346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_OFF); 6356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); 6376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 6386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_start(struct net_device *dev) 6406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 6416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 6426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int err; 6436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = 9600; 6456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); 6476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 6486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irq1; 6496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); 6516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 6526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irq2; 6536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 6556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * The interrupt must remain disabled for now. 6566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 6576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre disable_irq(IRQ_STUART); 6586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre disable_irq(IRQ_ICP); 6596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -EBUSY; 6616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); 6626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->rxdma < 0) 6636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_rx_dma; 6646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev); 6666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->txdma < 0) 6676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_tx_dma; 6686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -ENOMEM; 6706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, 6716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre &si->dma_rx_buff_phy, GFP_KERNEL ); 6726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->dma_rx_buff) 6736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_dma_rx_buff; 6746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, 6766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre &si->dma_tx_buff_phy, GFP_KERNEL ); 6776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->dma_tx_buff) 6786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_dma_tx_buff; 6796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Setup the serial port for the initial speed. */ 6816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_startup(si); 6826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 6846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Open a new IrLAP layer instance. 6856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 6866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->irlap = irlap_open(dev, &si->qos, "pxa"); 6876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -ENOMEM; 6886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->irlap) 6896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irlap; 6906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 6926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Now enable the interrupt and start the queue 6936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 6946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre enable_irq(IRQ_STUART); 6956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre enable_irq(IRQ_ICP); 6966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_start_queue(dev); 6976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); 6996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irlap: 7036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); 7056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_dma_tx_buff: 7066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); 7076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_dma_rx_buff: 7086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->txdma); 7096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_tx_dma: 7106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->rxdma); 7116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_rx_dma: 7126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_ICP, dev); 7136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irq2: 7146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_STUART, dev); 7156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irq1: 7166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return err; 7186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_stop(struct net_device *dev) 7216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 7226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 7236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_stop_queue(dev); 7256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Stop IrLAP */ 7296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->irlap) { 7306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irlap_close(si->irlap); 7316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->irlap = NULL; 7326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_STUART, dev); 7356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_ICP, dev); 7366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->rxdma); 7386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->txdma); 7396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->dma_rx_buff) 7416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); 7426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->dma_tx_buff) 7436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); 7446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); 7466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 749b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state) 7506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 751b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 7526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 7536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 75491e1a512291f258746611c18ec4970a81c9f311bRichard Purdie if (dev && netif_running(dev)) { 7556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 7566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_device_detach(dev); 7576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 763b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_resume(struct platform_device *_dev) 7646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 765b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 7666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 7676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 76891e1a512291f258746611c18ec4970a81c9f311bRichard Purdie if (dev && netif_running(dev)) { 7696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 7706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_startup(si); 7716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_device_attach(dev); 7726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 7736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_init_iobuf(iobuff_t *io, int size) 7806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 7816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); 7826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (io->head != NULL) { 7836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->truesize = size; 7846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->in_frame = FALSE; 7856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->state = OUTSIDE_FRAME; 7866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->data = io->head; 7876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return io->head ? 0 : -ENOMEM; 7896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 791b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_probe(struct platform_device *pdev) 7926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 7936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev; 7946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 7956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int baudrate_mask; 7966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int err; 7976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!pdev->dev.platform_data) 7996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return -ENODEV; 8006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY; 8026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_1; 8046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY; 8066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_2; 8086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev = alloc_irdadev(sizeof(struct pxa_irda)); 8106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!dev) 8116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_3; 8126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 8146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dev = &pdev->dev; 8156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata = pdev->dev.platform_data; 8166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 81782d553c67deef92c6c84ecb70afc56e99863060cRussell King si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); 81882d553c67deef92c6c84ecb70afc56e99863060cRussell King si->fir_clk = clk_get(&pdev->dev, "FICPCLK"); 81982d553c67deef92c6c84ecb70afc56e99863060cRussell King if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { 82082d553c67deef92c6c84ecb70afc56e99863060cRussell King err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); 82182d553c67deef92c6c84ecb70afc56e99863060cRussell King goto err_mem_4; 82282d553c67deef92c6c84ecb70afc56e99863060cRussell King } 82382d553c67deef92c6c84ecb70afc56e99863060cRussell King 8246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 8256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Initialise the SIR buffers 8266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 8276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = pxa_irda_init_iobuf(&si->rx_buff, 14384); 8286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_4; 8306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = pxa_irda_init_iobuf(&si->tx_buff, 4000); 8316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_5; 8336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->hard_start_xmit = pxa_irda_hard_xmit; 8356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->open = pxa_irda_start; 8366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->stop = pxa_irda_stop; 8376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->do_ioctl = pxa_irda_ioctl; 8386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->get_stats = pxa_irda_stats; 8396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_init_max_qos_capabilies(&si->qos); 8416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask = 0; 8436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->pdata->transceiver_cap & IR_SIRMODE) 8446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; 8456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->pdata->transceiver_cap & IR_FIRMODE) 8466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask |= IR_4000000 << 8; 8476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->qos.baud_rate.bits &= baudrate_mask; 8496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->qos.min_turn_time.bits = 7; /* 1ms or more */ 8506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_qos_bits_to_value(&si->qos); 8526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = register_netdev(dev); 8546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err == 0) 8566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_set_drvdata(&pdev->dev, dev); 8576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) { 8596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->tx_buff.head); 8606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_5: 8616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->rx_buff.head); 8626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_4: 86382d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->sir_clk && !IS_ERR(si->sir_clk)) 86482d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->sir_clk); 86582d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->fir_clk && !IS_ERR(si->fir_clk)) 86682d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->fir_clk); 8676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_netdev(dev); 8686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_3: 8696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(FICP), 0x1c); 8706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_2: 8716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(STUART), 0x24); 8726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 8736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_1: 8746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return err; 8756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 8766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 877b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_remove(struct platform_device *_dev) 8786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 879b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 8806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (dev) { 8826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 8836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unregister_netdev(dev); 8846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->tx_buff.head); 8856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->rx_buff.head); 88682d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->fir_clk); 88782d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->sir_clk); 8886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_netdev(dev); 8896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 8906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(STUART), 0x24); 8926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(FICP), 0x1c); 8936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 8956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 8966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 897b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic struct platform_driver pxa_ir_driver = { 898b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky .driver = { 899b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky .name = "pxa2xx-ir", 90072abb46101fb5c47a9592914adb221b430ff26bdKay Sievers .owner = THIS_MODULE, 901b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky }, 9026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .probe = pxa_irda_probe, 9036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .remove = pxa_irda_remove, 9046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .suspend = pxa_irda_suspend, 9056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .resume = pxa_irda_resume, 9066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre}; 9076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int __init pxa_irda_init(void) 9096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 910b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky return platform_driver_register(&pxa_ir_driver); 9116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 9126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void __exit pxa_irda_exit(void) 9146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 915b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky platform_driver_unregister(&pxa_ir_driver); 9166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 9176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitremodule_init(pxa_irda_init); 9196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitremodule_exit(pxa_irda_exit); 9206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas PitreMODULE_LICENSE("GPL"); 92272abb46101fb5c47a9592914adb221b430ff26bdKay SieversMODULE_ALIAS("platform:pxa2xx-ir"); 923