pxaficp_ir.c revision d2f3ad4cedc00c8ee848e7abe9b2bbc93b9a8c2d
16f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* 26f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * linux/drivers/net/irda/pxaficp_ir.c 36f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 46f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Based on sa1100_ir.c by Russell King 56f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 66f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Changes copyright (C) 2003-2005 MontaVista Software, Inc. 76f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 86f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * This program is free software; you can redistribute it and/or modify 96f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * it under the terms of the GNU General Public License version 2 as 106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * published by the Free Software Foundation. 116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor 136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * 146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/module.h> 166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <linux/netdevice.h> 17f6a2629353718e588820b731af43a445b6f35648Alexander Beregalov#include <linux/etherdevice.h> 18d052d1beff706920e82c5d55006b08e256b5df09Russell King#include <linux/platform_device.h> 1982d553c67deef92c6c84ecb70afc56e99863060cRussell King#include <linux/clk.h> 206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irda.h> 226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irmod.h> 236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/wrapper.h> 246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#include <net/irda/irda_device.h> 256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 26dcea83adc666061864b82c96e059dffe7268b512Russell King#include <mach/dma.h> 27a09e64fbc0094e3073dbb09c3b4bfe4ab669244bRussell King#include <mach/irda.h> 2802f652626a8f23e513877cb751c8ea533739c28fEric Miao#include <mach/regs-uart.h> 295bf3df3f00f507119a26ba0780aa8799e741615cEric Miao#include <mach/regs-ost.h> 306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 31b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define FICP __REG(0x40800000) /* Start of FICP area */ 32b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ 33b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */ 34b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */ 35b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICDR __REG(0x4080000c) /* ICP Data Register */ 36b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */ 37b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */ 38b40ddf575883ceca303906556bcd0cff5c284fefEric Miao 39b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_AME (1 << 7) /* Address match enable */ 40b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */ 41b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */ 42b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_RXE (1 << 4) /* Receive enable */ 43b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_TXE (1 << 3) /* Transmit enable */ 44b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */ 45b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_LBM (1 << 1) /* Loopback mode */ 46b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR0_ITR (1 << 0) /* IrDA transmission */ 47b40ddf575883ceca303906556bcd0cff5c284fefEric Miao 48b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ 49b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ 50b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ 51b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ 52b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ 53b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ 54b40ddf575883ceca303906556bcd0cff5c284fefEric Miao 55b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#ifdef CONFIG_PXA27x 56b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ 57b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#endif 58b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_FRE (1 << 5) /* Framing error */ 59b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_RFS (1 << 4) /* Receive FIFO service request */ 60b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */ 61b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_RAB (1 << 2) /* Receiver abort */ 62b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */ 63b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR0_EIF (1 << 0) /* End/Error in FIFO */ 64b40ddf575883ceca303906556bcd0cff5c284fefEric Miao 65b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */ 66b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_CRE (1 << 5) /* CRC error */ 67b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_EOF (1 << 4) /* End of frame */ 68b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */ 69b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */ 70b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */ 71b40ddf575883ceca303906556bcd0cff5c284fefEric Miao#define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */ 726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RXPL_NEG_IS_ZERO (1<<4) 746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RXPL_POS_IS_ZERO 0x0 756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_TXPL_NEG_IS_ZERO (1<<3) 766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_TXPL_POS_IS_ZERO 0x0 776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMODE_PULSE_1_6 (1<<2) 786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMODE_PULSE_3_16 0x0 796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RCVEIR_IR_MODE (1<<1) 806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_RCVEIR_UART_MODE 0x0 816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMITIR_IR_MODE (1<<0) 826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_XMITIR_UART_MODE 0x0 836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_IR_RECEIVE_ON (\ 856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RXPL_NEG_IS_ZERO | \ 866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_TXPL_POS_IS_ZERO | \ 876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMODE_PULSE_3_16 | \ 886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RCVEIR_IR_MODE | \ 896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMITIR_UART_MODE) 906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IrSR_IR_TRANSMIT_ON (\ 926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RXPL_NEG_IS_ZERO | \ 936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_TXPL_POS_IS_ZERO | \ 946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMODE_PULSE_3_16 | \ 956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_RCVEIR_UART_MODE | \ 966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre IrSR_XMITIR_IR_MODE) 976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestruct pxa_irda { 996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int speed; 1006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int newspeed; 1016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long last_oscr; 1026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned char *dma_rx_buff; 1046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned char *dma_tx_buff; 1056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_addr_t dma_rx_buff_phy; 1066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_addr_t dma_tx_buff_phy; 1076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int dma_tx_buff_len; 1086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int txdma; 1096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int rxdma; 1106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct irlap_cb *irlap; 1126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct qos_info qos; 1136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iobuff_t tx_buff; 1156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iobuff_t rx_buff; 1166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct device *dev; 1186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxaficp_platform_data *pdata; 11982d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *fir_clk; 12082d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *sir_clk; 12182d553c67deef92c6c84ecb70afc56e99863060cRussell King struct clk *cur_clk; 1226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre}; 1236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 12482d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_disable_clk(struct pxa_irda *si) 12582d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 12682d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->cur_clk) 12782d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_disable(si->cur_clk); 12882d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = NULL; 12982d553c67deef92c6c84ecb70afc56e99863060cRussell King} 13082d553c67deef92c6c84ecb70afc56e99863060cRussell King 13182d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_enable_firclk(struct pxa_irda *si) 13282d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 13382d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = si->fir_clk; 13482d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_enable(si->fir_clk); 13582d553c67deef92c6c84ecb70afc56e99863060cRussell King} 13682d553c67deef92c6c84ecb70afc56e99863060cRussell King 13782d553c67deef92c6c84ecb70afc56e99863060cRussell Kingstatic inline void pxa_irda_enable_sirclk(struct pxa_irda *si) 13882d553c67deef92c6c84ecb70afc56e99863060cRussell King{ 13982d553c67deef92c6c84ecb70afc56e99863060cRussell King si->cur_clk = si->sir_clk; 14082d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_enable(si->sir_clk); 14182d553c67deef92c6c84ecb70afc56e99863060cRussell King} 14282d553c67deef92c6c84ecb70afc56e99863060cRussell King 1436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IS_FIR(si) ((si)->speed >= 4000000) 1456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre#define IRDA_FRAME_SIZE_LIMIT 2047 1466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreinline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) 1486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) = DCSR_NODESC; 1506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DSADR(si->rxdma) = __PREG(ICDR); 1516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DTADR(si->rxdma) = si->dma_rx_buff_phy; 1526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT; 1536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) |= DCSR_RUN; 1546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 1556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreinline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) 1576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) = DCSR_NODESC; 1596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DSADR(si->txdma) = si->dma_tx_buff_phy; 1606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DTADR(si->txdma) = __PREG(ICDR); 1616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len; 1626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) |= DCSR_RUN; 1636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 1646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* 1666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Set the IrDA communications speed. 1676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 1686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_set_speed(struct pxa_irda *si, int speed) 1696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 1706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long flags; 1716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int divisor; 1726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (speed) { 1746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 9600: case 19200: case 38400: 1756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 57600: case 115200: 1766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* refer to PXA250/210 Developer's Manual 10-7 */ 1786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* BaudRate = 14.7456 MHz / (16*Divisor) */ 1796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre divisor = 14745600 / (16 * speed); 1806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 1826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (IS_FIR(si)) { 1846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA */ 1856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 1866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 1876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 18882d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 1896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* set board transceiver to SIR mode */ 1916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_SIRMODE); 1926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable the STUART clock */ 19482d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_enable_sirclk(si); 1956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 1966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 1976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART first */ 1986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 1996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* access DLL & DLH */ 2016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR |= LCR_DLAB; 2026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STDLL = divisor & 0xff; 2036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STDLH = divisor >> 8; 2046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR &= ~LCR_DLAB; 2056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = speed; 2076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; 2086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; 2096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 2116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 4000000: 2146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 2156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART */ 2176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 2186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = 0; 21982d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 2206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP first */ 2226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 2236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* set board transceiver to FIR mode */ 2256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_FIRMODE); 2266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable the FICP clock */ 22882d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_enable_firclk(si); 2296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = speed; 2316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 2326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 2336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 2356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre default: 2386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return -EINVAL; 2396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 2426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 2436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* SIR interrupt service routine. */ 2457d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id) 2466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 2476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = dev_id; 2486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 2496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int iir, lsr, data; 2506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre iir = STIIR; 2526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (iir & 0x0F) { 2546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x06: /* Receiver Line Status */ 2556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre lsr = STLSR; 2566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while (lsr & LSR_FIFOE) { 2576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre data = STRBR; 2586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { 2596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); 260af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_errors++; 2616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & LSR_FE) 262af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_frame_errors++; 2636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (lsr & LSR_OE) 264af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_fifo_errors++; 2656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 266af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_bytes++; 267af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger async_unwrap_char(dev, &dev->stats, 268af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger &si->rx_buff, data); 2696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre lsr = STLSR; 2716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 2736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x04: /* Received Data Available */ 2766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* forth through */ 2776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x0C: /* Character Timeout Indication */ 2796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre do { 280af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_bytes++; 281af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger async_unwrap_char(dev, &dev->stats, &si->rx_buff, STRBR); 2826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } while (STLSR & LSR_DR); 2836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 2846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 2856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case 0x02: /* Transmit FIFO Data Request */ 2876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) { 2886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STTHR = *si->tx_buff.data++; 2896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.len -= 1; 2906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 2916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->tx_buff.len == 0) { 293af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.tx_packets++; 294af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head; 2956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 2966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* We need to ensure that the transmitter has finished. */ 2976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((STLSR & LSR_TEMT) == 0) 2986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 2996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 3006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 3026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Ok, we've finished transmitting. Now enable 3036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * the receiver. Sometimes we get a receive IRQ 3046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * immediately after a transmit... 3056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 3066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 3076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, si->newspeed); 3086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 3096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 3106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable IR Receiver, disable IR Transmitter */ 3116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; 3126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART and receive interrupts */ 3136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; 3146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* I'm hungry! */ 3166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 3176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 3196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return IRQ_HANDLED; 3226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR Receive DMA interrupt handler */ 3257d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic void pxa_irda_fir_dma_rx_irq(int channel, void *data) 3266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int dcsr = DCSR(channel); 3286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(channel) = dcsr & ~DCSR_RUN; 3306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr); 3326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR Transmit DMA interrupt handler */ 3357d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic void pxa_irda_fir_dma_tx_irq(int channel, void *data) 3366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = data; 3386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 3396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int dcsr; 3406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dcsr = DCSR(channel); 3426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(channel) = dcsr & ~DCSR_RUN; 3436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (dcsr & DCSR_ENDINTR) { 345af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.tx_packets++; 346af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.tx_bytes += si->dma_tx_buff_len; 3476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 348af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.tx_errors++; 3496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while (ICSR1 & ICSR1_TBY) 3526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 3536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 3546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 3566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * HACK: It looks like the TBY bit is dropped too soon. 3576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Without this delay things break. 3586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 3596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre udelay(120); 3606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 3626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, si->newspeed); 3636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 3646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 3659a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski int i = 64; 3669a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 3676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 3686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 3699a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski while ((ICSR1 & ICSR1_RNE) && i--) 3709a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski (void)ICDR; 3716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 3729a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 3739a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (i < 0) 3749a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); 3756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 3776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 3786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* EIF(Error in FIFO/End in Frame) handler for FIR */ 3809a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetskistatic void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) 3816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 3826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int len, stat, data; 3836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Get the current data position. */ 3856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre len = DTADR(si->rxdma) - si->dma_rx_buff_phy; 3866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre do { 3886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Read Status, and then Data. */ 3896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre stat = ICSR1; 3906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rmb(); 3916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre data = ICDR; 3926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 3936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & (ICSR1_CRE | ICSR1_ROR)) { 394af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_errors++; 3956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_CRE) { 3966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); 397af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_crc_errors++; 3986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 3996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_ROR) { 4006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); 401af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_over_errors++; 4026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 4046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_rx_buff[len++] = data; 4056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* If we hit the end of frame, there's no point in continuing. */ 4076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_EOF) 4086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 4096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } while (ICSR0 & ICSR0_EIF); 4106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (stat & ICSR1_EOF) { 4126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* end of frame. */ 4139a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski struct sk_buff *skb; 4149a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 4159a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (icsr0 & ICSR0_FRE) { 4169a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); 417af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_dropped++; 4189a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski return; 4199a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski } 4209a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 4219a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski skb = alloc_skb(len+1,GFP_ATOMIC); 4226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!skb) { 4236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); 424af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_dropped++; 4256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return; 4266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Align IP header to 20 bytes */ 4296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb_reserve(skb, 1); 43027d7ff46a3498d3debc6ba68fb8014c702b81170Arnaldo Carvalho de Melo skb_copy_to_linear_data(skb, si->dma_rx_buff, len); 4316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb_put(skb, len); 4326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Feed it to IrLAP */ 4346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb->dev = dev; 435459a98ed881802dee55897441bc7f77af614368eArnaldo Carvalho de Melo skb_reset_mac_header(skb); 4366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre skb->protocol = htons(ETH_P_IRDA); 4376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_rx(skb); 4386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 439af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_packets++; 440af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_bytes += len; 4416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 4436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* FIR interrupt handler */ 4457d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) 4466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 4476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev = dev_id; 4486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 4499a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski int icsr0, i = 64; 4506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA */ 4526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 4536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->last_oscr = OSCR; 4546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre icsr0 = ICSR0; 4556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { 4576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & ICSR0_FRE) { 4586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); 459af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_frame_errors++; 4606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 4616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); 462af0490810cfa159b4894ddecfc5eb2e4432fb976Stephen Hemminger dev->stats.rx_errors++; 4636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB); 4656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (icsr0 & ICSR0_EIF) { 4686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* An error in FIFO occured, or there is a end of frame */ 4699a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski pxa_irda_fir_irq_eif(si, dev, icsr0); 4706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 4716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 4736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_rx_start(si); 4749a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski while ((ICSR1 & ICSR1_RNE) && i--) 4759a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski (void)ICDR; 4766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_RXE; 4776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4789a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski if (i < 0) 4799a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); 4809a4d93d49d140c196020a1bae339efcf211cac03Guennadi Liakhovetski 4816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return IRQ_HANDLED; 4826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 4836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre/* hard_xmit interface of irda device */ 4856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) 4866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 4876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 4886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int speed = irda_get_next_speed(skb); 4896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 4916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Does this packet contain a request to change the interface 4926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * speed? If so, remember it until we complete the transmission 4936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * of this frame. 4946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 4956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (speed != si->speed && speed != -1) 4966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = speed; 4976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 4986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 4996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * If this is an empty frame, we can bypass a lot. 5006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 5016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (skb->len == 0) { 5026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->newspeed) { 5036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->newspeed = 0; 5046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, speed); 5056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_kfree_skb(skb); 5076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 5086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_stop_queue(dev); 5116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!IS_FIR(si)) { 5136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.data = si->tx_buff.head; 5146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); 5156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Disable STUART interrupts and switch to transmit mode. */ 5176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 5186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6; 5196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART and transmit interrupts */ 5216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = IER_UUE | IER_TIE; 5226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 5236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long mtt = irda_get_mtt(skb); 5246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_tx_buff_len = skb->len; 526d626f62b11e00c16e81e4308ab93d3f13551812aArnaldo Carvalho de Melo skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len); 5276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (mtt) 5296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre while ((unsigned)(OSCR - si->last_oscr)/4 < mtt) 5306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre cpu_relax(); 5316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* stop RX DMA, disable FICP */ 5336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 5346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 5356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_fir_dma_tx_start(si); 5376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = ICCR0_ITR | ICCR0_TXE; 5386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_kfree_skb(skb); 5416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev->trans_start = jiffies; 5426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 5436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 5446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) 5466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 5476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct if_irda_req *rq = (struct if_irda_req *)ifreq; 5486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 5496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int ret; 5506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre switch (cmd) { 5526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCSBANDWIDTH: 5536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EPERM; 5546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (capable(CAP_NET_ADMIN)) { 5556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 5566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * We are unable to set the speed if the 5576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * device is not running. 5586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 5596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (netif_running(dev)) { 5606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = pxa_irda_set_speed(si, 5616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rq->ifr_baudrate); 5626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } else { 5636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); 5646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCSMEDIABUSY: 5706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EPERM; 5716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (capable(CAP_NET_ADMIN)) { 5726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_device_set_media_busy(dev, TRUE); 5736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre case SIOCGRECEIVING: 5786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = 0; 5796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre rq->ifr_receiving = IS_FIR(si) ? 0 5806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre : si->rx_buff.state != OUTSIDE_FRAME; 5816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre default: 5846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ret = -EOPNOTSUPP; 5856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre break; 5866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 5876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return ret; 5896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 5906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 5916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void pxa_irda_startup(struct pxa_irda *si) 5926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 5936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Disable STUART interrupts */ 5946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 5956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable STUART interrupt to the processor */ 5966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STMCR = MCR_OUT2; 5976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ 5986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STLCR = LCR_WLS0 | LCR_WLS1; 5996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* enable FIFO, we use FIFO to improve performance */ 6006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STFCR = FCR_TRFIFOE | FCR_ITL_32; 6016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 6036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 6046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure FICP ICCR2 */ 6056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR2 = ICCR2_TXP | ICCR2_TRIG_32; 6066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* configure DMAC */ 60887f3dd77974cba1ba0798abd741ede50f56b3eb3Eric Miao DRCMR(17) = si->rxdma | DRCMR_MAPVLD; 60987f3dd77974cba1ba0798abd741ede50f56b3eb3Eric Miao DRCMR(18) = si->txdma | DRCMR_MAPVLD; 6106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* force SIR reinitialization */ 6126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = 4000000; 6136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_set_speed(si, 9600); 6146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda startup\n"); 6166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 6176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void pxa_irda_shutdown(struct pxa_irda *si) 6196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 6206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned long flags; 6216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_save(flags); 6236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART and interrupt */ 6256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STIER = 0; 6266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable STUART SIR mode */ 6276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre STISR = 0; 6286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable DMA */ 6306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->txdma) &= ~DCSR_RUN; 6316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre DCSR(si->rxdma) &= ~DCSR_RUN; 6326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* disable FICP */ 6336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre ICCR0 = 0; 63482d553c67deef92c6c84ecb70afc56e99863060cRussell King 63582d553c67deef92c6c84ecb70afc56e99863060cRussell King /* disable the STUART or FICP clocks */ 63682d553c67deef92c6c84ecb70afc56e99863060cRussell King pxa_irda_disable_clk(si); 6376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 63887f3dd77974cba1ba0798abd741ede50f56b3eb3Eric Miao DRCMR(17) = 0; 63987f3dd77974cba1ba0798abd741ede50f56b3eb3Eric Miao DRCMR(18) = 0; 6406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre local_irq_restore(flags); 6426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* power off board transceiver */ 6446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata->transceiver_mode(si->dev, IR_OFF); 6456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); 6476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 6486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_start(struct net_device *dev) 6506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 6516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 6526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int err; 6536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->speed = 9600; 6556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); 6576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 6586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irq1; 6596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); 6616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 6626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irq2; 6636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 6656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * The interrupt must remain disabled for now. 6666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 6676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre disable_irq(IRQ_STUART); 6686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre disable_irq(IRQ_ICP); 6696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -EBUSY; 6716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); 6726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->rxdma < 0) 6736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_rx_dma; 6746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev); 6766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->txdma < 0) 6776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_tx_dma; 6786f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -ENOMEM; 6806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, 6816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre &si->dma_rx_buff_phy, GFP_KERNEL ); 6826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->dma_rx_buff) 6836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_dma_rx_buff; 6846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, 6866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre &si->dma_tx_buff_phy, GFP_KERNEL ); 6876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->dma_tx_buff) 6886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_dma_tx_buff; 6896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Setup the serial port for the initial speed. */ 6916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_startup(si); 6926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 6936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 6946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Open a new IrLAP layer instance. 6956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 6966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->irlap = irlap_open(dev, &si->qos, "pxa"); 6976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = -ENOMEM; 6986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!si->irlap) 6996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_irlap; 7006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7016f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 7026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Now enable the interrupt and start the queue 7036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 7046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre enable_irq(IRQ_STUART); 7056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre enable_irq(IRQ_ICP); 7066f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_start_queue(dev); 7076f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); 7096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irlap: 7136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); 7156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_dma_tx_buff: 7166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); 7176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_dma_rx_buff: 7186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->txdma); 7196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_tx_dma: 7206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->rxdma); 7216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_rx_dma: 7226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_ICP, dev); 7236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irq2: 7246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_STUART, dev); 7256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_irq1: 7266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return err; 7286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_stop(struct net_device *dev) 7316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 7326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 7336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_stop_queue(dev); 7356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* Stop IrLAP */ 7396f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->irlap) { 7406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irlap_close(si->irlap); 7416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->irlap = NULL; 7426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_STUART, dev); 7456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_irq(IRQ_ICP, dev); 7466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->rxdma); 7486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_free_dma(si->txdma); 7496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->dma_rx_buff) 7516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); 7526f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->dma_tx_buff) 7536f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); 7546f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7556f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); 7566f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7576f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 759b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state) 7606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 761b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 7626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 7636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 76491e1a512291f258746611c18ec4970a81c9f311bRichard Purdie if (dev && netif_running(dev)) { 7656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 7666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_device_detach(dev); 7676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_shutdown(si); 7686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 773b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_resume(struct platform_device *_dev) 7746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 775b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 7766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 7776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 77891e1a512291f258746611c18ec4970a81c9f311bRichard Purdie if (dev && netif_running(dev)) { 7796f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 7806f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre pxa_irda_startup(si); 7816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_device_attach(dev); 7826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre netif_wake_queue(dev); 7836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7856f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 7866f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 7876f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7886f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 7896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int pxa_irda_init_iobuf(iobuff_t *io, int size) 7906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 7916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); 7926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (io->head != NULL) { 7936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->truesize = size; 7946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->in_frame = FALSE; 7956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->state = OUTSIDE_FRAME; 7966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre io->data = io->head; 7976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 7986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return io->head ? 0 : -ENOMEM; 7996f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 8006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 801c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalovstatic const struct net_device_ops pxa_irda_netdev_ops = { 802c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov .ndo_open = pxa_irda_start, 803c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov .ndo_stop = pxa_irda_stop, 804c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov .ndo_start_xmit = pxa_irda_hard_xmit, 805c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov .ndo_do_ioctl = pxa_irda_ioctl, 806c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov}; 807c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov 808b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_probe(struct platform_device *pdev) 8096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 8106f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct net_device *dev; 8116f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si; 8126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unsigned int baudrate_mask; 8136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre int err; 8146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!pdev->dev.platform_data) 8166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return -ENODEV; 8176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY; 8196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_1; 8216f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8226f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY; 8236f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8246f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_2; 8256f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev = alloc_irdadev(sizeof(struct pxa_irda)); 8276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (!dev) 8286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_3; 8296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 830d2f3ad4cedc00c8ee848e7abe9b2bbc93b9a8c2dMarek Vasut SET_NETDEV_DEV(dev, &pdev->dev); 8316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si = netdev_priv(dev); 8326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->dev = &pdev->dev; 8336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->pdata = pdev->dev.platform_data; 8346f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 83582d553c67deef92c6c84ecb70afc56e99863060cRussell King si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); 83682d553c67deef92c6c84ecb70afc56e99863060cRussell King si->fir_clk = clk_get(&pdev->dev, "FICPCLK"); 83782d553c67deef92c6c84ecb70afc56e99863060cRussell King if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { 83882d553c67deef92c6c84ecb70afc56e99863060cRussell King err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); 83982d553c67deef92c6c84ecb70afc56e99863060cRussell King goto err_mem_4; 84082d553c67deef92c6c84ecb70afc56e99863060cRussell King } 84182d553c67deef92c6c84ecb70afc56e99863060cRussell King 8426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre /* 8436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre * Initialise the SIR buffers 8446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre */ 8456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = pxa_irda_init_iobuf(&si->rx_buff, 14384); 8466f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8476f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_4; 8486f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = pxa_irda_init_iobuf(&si->tx_buff, 4000); 8496f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) 8506f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre goto err_mem_5; 8516f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 852baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov if (si->pdata->startup) 853baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov err = si->pdata->startup(si->dev); 854baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov if (err) 855baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov goto err_startup; 856baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov 857c76ccd6a256004cca1127c9afb5474638fc78b74Alexander Beregalov dev->netdev_ops = &pxa_irda_netdev_ops; 8586f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8596f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_init_max_qos_capabilies(&si->qos); 8606f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8616f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask = 0; 8626f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->pdata->transceiver_cap & IR_SIRMODE) 8636f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; 8646f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (si->pdata->transceiver_cap & IR_FIRMODE) 8656f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre baudrate_mask |= IR_4000000 << 8; 8666f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8676f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->qos.baud_rate.bits &= baudrate_mask; 8686f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre si->qos.min_turn_time.bits = 7; /* 1ms or more */ 8696f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8706f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre irda_qos_bits_to_value(&si->qos); 8716f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8726f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre err = register_netdev(dev); 8736f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8746f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err == 0) 8756f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre dev_set_drvdata(&pdev->dev, dev); 8766f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 8776f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (err) { 878baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov if (si->pdata->shutdown) 879baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov si->pdata->shutdown(si->dev); 880baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikoverr_startup: 8816f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->tx_buff.head); 8826f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_5: 8836f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->rx_buff.head); 8846f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_4: 88582d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->sir_clk && !IS_ERR(si->sir_clk)) 88682d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->sir_clk); 88782d553c67deef92c6c84ecb70afc56e99863060cRussell King if (si->fir_clk && !IS_ERR(si->fir_clk)) 88882d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->fir_clk); 8896f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_netdev(dev); 8906f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_3: 8916f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(FICP), 0x1c); 8926f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_2: 8936f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(STUART), 0x24); 8946f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 8956f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitreerr_mem_1: 8966f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return err; 8976f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 8986f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 899b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic int pxa_irda_remove(struct platform_device *_dev) 9006f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 901b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky struct net_device *dev = platform_get_drvdata(_dev); 9026f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9036f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre if (dev) { 9046f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre struct pxa_irda *si = netdev_priv(dev); 9056f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre unregister_netdev(dev); 906baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov if (si->pdata->shutdown) 907baf1c5d2a08c828d6333e0a37bcdf5afb3d5d003Dmitry Eremin-Solenikov si->pdata->shutdown(si->dev); 9086f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->tx_buff.head); 9096f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre kfree(si->rx_buff.head); 91082d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->fir_clk); 91182d553c67deef92c6c84ecb70afc56e99863060cRussell King clk_put(si->sir_clk); 9126f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre free_netdev(dev); 9136f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre } 9146f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9156f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(STUART), 0x24); 9166f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre release_mem_region(__PREG(FICP), 0x1c); 9176f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9186f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre return 0; 9196f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 9206f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 921b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovskystatic struct platform_driver pxa_ir_driver = { 922b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky .driver = { 923b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky .name = "pxa2xx-ir", 92472abb46101fb5c47a9592914adb221b430ff26bdKay Sievers .owner = THIS_MODULE, 925b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky }, 9266f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .probe = pxa_irda_probe, 9276f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .remove = pxa_irda_remove, 9286f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .suspend = pxa_irda_suspend, 9296f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre .resume = pxa_irda_resume, 9306f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre}; 9316f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9326f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic int __init pxa_irda_init(void) 9336f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 934b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky return platform_driver_register(&pxa_ir_driver); 9356f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 9366f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9376f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitrestatic void __exit pxa_irda_exit(void) 9386f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre{ 939b259e7d250e15d45b3c8362917931aaff1c88d73Paul Sokolovsky platform_driver_unregister(&pxa_ir_driver); 9406f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre} 9416f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9426f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitremodule_init(pxa_irda_init); 9436f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitremodule_exit(pxa_irda_exit); 9446f475c0133eb91c7df3b056843dc33d2824368a2Nicolas Pitre 9456f475c0133eb91c7df3b056843dc33d2824368a2Nicolas PitreMODULE_LICENSE("GPL"); 94672abb46101fb5c47a9592914adb221b430ff26bdKay SieversMODULE_ALIAS("platform:pxa2xx-ir"); 947